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* drm/amdgpu: remove some old gc 9.x registersAlex Deucher2017-12-135-84/+4
| | | | | | | Leftover from bring up. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: drop soc15_init_golden_registersAlex Deucher2017-12-131-31/+0
| | | | | | | | The golden register arrays were empty so the function was effectively useless. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: drop the bios scratch reg callbacks from nbioAlex Deucher2017-12-133-31/+0
| | | | | | | | They are not used any longer. We get the scratch register locations from the vbios directly now. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: convert nbio to use callbacks (v2)Alex Deucher2017-12-1311-183/+209
| | | | | | | | | Cleans up and consolidates all of the per-asic logic. v2: squash in "drm/amdgpu: fix NULL err for sriov detect" (Chunming) Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: make function names consistent in nbio filesAlex Deucher2017-12-122-16/+16
| | | | | | | All functions should have nbio_v* prefix. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: correct vce fw data and stack sizeFrank Min2017-12-121-1/+1
| | | | | | | | this fix the VCE world switch hang issue Signed-off-by: Frank Min <Frank.Min@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: fix MAP_QUEUES paramterMonk Liu2017-12-121-1/+1
| | | | | | | | Should be 0. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: no need with INT for fence pollingMonk Liu2017-12-121-1/+1
| | | | | | | | We are polling so no need for INT. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: no need to evict VRAM in device_finiMonk Liu2017-12-121-2/+1
| | | | | | | | | | this VRAM evict is not needed and also cost 2seconds to finish because the IRQ is software side disabled before it. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: allow get_vm_pde to change flags as wellChristian König2017-12-1211-38/+54
| | | | | | | | And also provide the level for which we need a PDE. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: batch PDE updates againChristian König2017-12-121-109/+94
| | | | | | | | | Now instead of one submission for each PDE batch them together over all PDs who need an update. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: remove keeping the addr of the VM PDsChristian König2017-12-122-10/+5
| | | | | | | | No more double house keeping. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: remove last_entry_used from the VM codeChristian König2017-12-122-24/+29
| | | | | | | | Not needed any more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: avoid the modulo in amdgpu_vm_get_entryChristian König2017-12-121-3/+3
| | | | | | | | We can do this with a simple mask as well. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: use polling mem to set SDMA3 wptr for VFPixel Ding2017-12-122-8/+20
| | | | | | | | | | | | | | | On Tonga VF, there're 2 sources updating wptr registers for sdma3: 1) polling mem and 2) doorbell. When doorbell and polling mem are both enabled on sdma3, there will be collision hit in occasion between those two sources when ucode and h/w are doing the updating on wptr register in parallel. Issue doesn't happen on CP GFX/Compute since CP drops all doorbell writes when VF is inactive. So enable polling mem and don't use doorbell for SDMA3. Signed-off-by: Pixel Ding <Pixel.Ding@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: update one PDE at a time v2Christian König2017-12-121-46/+34
| | | | | | | | | | | Horrible inefficient, but avoids problems when the root PD size becomes to big. v2: remove incr as well. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <davdi1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: stop joining PDEsChristian König2017-12-121-34/+7
| | | | | | | | That doesn't hit any more most of the time anyway. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add amdgpu_evict_vram debugfs fileChristian König2017-12-121-1/+12
| | | | | | | | | Torture test for MM and VM support, can be used to evict all VRAM while the system is under load. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: cleanup debugfs handling a bitChristian König2017-12-123-43/+11
| | | | | | | | | Remove the superflous .debugfs_init callback and register all files in amdgpu_device.c in just one function. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/admgpu: Reduce the usage of soc15ip.hShaoyun Liu2017-12-0816-17/+0
| | | | | | | | Remove the header where it's not used. Acked-by: Christian Konig <christian.koenig@amd.com> Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Change SOC15_REG_OFFSET to use dynamic register offsetShaoyun Liu2017-12-088-18/+46
| | | | | | Acked-by: Christian Konig <christian.koenig@amd.com> Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Avoid use SOC15_REG_OFFSET in static const arrayShaoyun Liu2017-12-0813-283/+354
| | | | | | | | Handle dynamic offsets correctly in static arrays. Acked-by: Christian Konig <christian.koenig@amd.com> Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Use dynamic IP offset for register access on SOC15Shaoyun Liu2017-12-082-95/+65
| | | | | | | | | Update the register access macros and functions to take into account the new dynamic IP base offsets. Acked-by: Christian Konig <christian.koenig@amd.com> Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Dynamic initialize IP base offsetShaoyun Liu2017-12-085-1/+96
| | | | | | | | | | The base offsets of the IP blocks may change across asics even though the relative register offsets are the same for an IP. Handle this dynamically. Acked-by: Christian Konig <christian.koenig@amd.com> Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/sched: move fence slab handling to module init/exitLucas Stach2017-12-071-8/+0
| | | | | | | | | | | | This is the only part of the scheduler which must not be called from different drivers. Move it to module init/exit so it is done a single time when loading the scheduler. Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm: move amd_gpu_scheduler into common locationLucas Stach2017-12-0731-1427/+119
| | | | | | | | | | | | | | | | This moves and renames the AMDGPU scheduler to a common location in DRM in order to facilitate re-use by other drivers. This is mostly a straight forward rename with no code changes. One notable exception is the function to_drm_sched_fence(), which is no longer a inline header function to avoid the need to export the drm_sched_fence_ops_scheduled and drm_sched_fence_ops_finished structures. Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add license to files where it was missingAlex Deucher2017-12-0715-8/+254
| | | | | | | | | These files were missing it before. Acked-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add license to MakefilesAlex Deucher2017-12-0726-6/+547
| | | | | | | | | Was missing license text. Acked-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Fix amdgpu_sync_add_later to preserve explicit flag.Andrey Grodzovsky2017-12-071-3/+6
| | | | | | Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Use drm_fb_helper_lastclose() and _poll_changed()Noralf Trønnes2017-12-065-42/+3
| | | | | | | | | | | | | This driver can use drm_fb_helper_lastclose() in its .lastclose function. It can also use drm_fb_helper_output_poll_changed() as its .output_poll_changed callback. Remove the unused driver implementations. Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Signed-off-by: Noralf Trønnes <noralf@tronnes.org> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Use drm_fb_helper_poll_changed()Noralf Trønnes2017-12-061-1/+1
| | | | | | | | | | This driver can use drm_fb_helper_output_poll_changed() as its .output_poll_changed callback. Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Signed-off-by: Noralf Trønnes <noralf@tronnes.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: fix amdgpu_sync_resv v2Christian König2017-12-061-5/+2
| | | | | | | | | | | Fixes a bug introduced by AMDGPU_GEM_CREATE_EXPLICIT_SYNC. We still need to wait for pipelined moves in the shared fences list. v2: fix typo Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Andres Rodriguez <andresx7@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/amdgpu: set gtt size according to system memory size onlyRoger He2017-12-061-5/+3
| | | | | | Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Roger He <Hongbo.He@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Get rid of dep_sync as a seperate object.Andrey Grodzovsky2017-12-067-35/+37
| | | | | | | | | | Instead mark fence as explicit in it's amdgpu_sync_entry. v2: Fix use after free bug and add new parameter description. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: allow specifying vm_block_size for multi level PDs v2Christian König2017-12-062-19/+10
| | | | | | | | | | | This patch allows specifying the vm_block_size even when multi level page directories are active. v2: fix signed/unsigned compare warning Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: move validation of the VM size into the VM codeChristian König2017-12-067-24/+20
| | | | | | | | This moves validation of the VM size parameter into amdgpu_vm_adjust_size(). Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: allow non pot VM size valuesChristian König2017-12-061-6/+0
| | | | | | | | The VM size actually doesn't need to be a power of two. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: choose number of VM levels based on VM sizeChristian König2017-12-061-5/+11
| | | | | | | | This allows us limiting the VM size for testing even of Vega10. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: unify VM size handling of Vega10 with older generationChristian König2017-12-066-47/+22
| | | | | | | | One function to rule them all. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: fix amdgpu_vm_num_entriesChristian König2017-12-061-7/+7
| | | | | | | | The block size only affects the leave nodes, everything else is fixed. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: fix VM PD addr shiftChristian König2017-12-061-5/+23
| | | | | | | | The block size only affects the leave nodes, everything else is fixed. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: correct vce4.0 fw config for SRIOV (V2)Frank Min2017-12-061-13/+25
| | | | | | | | | 1. program vce 4.0 fw with 48 bit address 2. correct vce 4.0 fw stack and date offset Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Frank Min <Frank.Min@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Don't call dm_log_to_buffer directly in dc_conn_logMichel Dänzer2017-12-061-7/+3
| | | | | | | | | | | | | | | | | | | | | | | dm_log_to_buffer logs unconditionally, so calling it directly resulted in the main message being logged even when the event type isn't enabled in the event mask. To fix this, use the new dm_logger_append_va API. Fixes spurious messages like [drm] {1920x1200, 2080x1235@154000Khz} in dmesg when a mode is set. v2: * Use new dm_logger_append_va API, fixes incorrect va_list usage in v1 * Just use and decrease entry.buf_offset to get rid of the trailing newline Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Add dm_logger_append_va APIMichel Dänzer2017-12-062-5/+17
| | | | | | | | | | Same as dm_logger_append, except it takes a va_list instead of a variable number of arguments. dm_logger_append is now a minimal wrapper around dm_logger_append_va. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: remove usage of legacy_cursor_updateShirish S2017-12-061-30/+13
| | | | | | | | | | | | | | | Currently the atomic check code uses legacy_cursor_update to differnetiate if the cursor plane is being requested by the user, which is not required as we shall be updating plane only if modeset is requested/required. Have tested cursor plane and underlay get updated seamlessly, without any lag or frame drops. Signed-off-by: Shirish S <shirish.s@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/include:cleanup raven1 vcn header files.Feifei Xu2017-12-065-205/+3
| | | | | | | | | Cleanup asic_reg/raven1/VCN folder. Remove unused vcn_1_0_default.h. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/include:cleanup raven1 thm header files.Feifei Xu2017-12-064-3/+3
| | | | | | | | | Cleanup asic_reg/raven1/THM folder. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/include:cleanup raven1 nbio header files.Feifei Xu2017-12-066-7/+7
| | | | | | | | | Cleanup asic_reg/raven1/NBIO folder. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/include:cleanup raven1 mp header files.Feifei Xu2017-12-065-4/+4
| | | | | | | | | Cleanup asic_reg/raven1/MP folder. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/include:cleanup raven1 mmhub header files.Feifei Xu2017-12-065-1032/+4
| | | | | | | | | Cleanup asic_reg/raven1/MMHUB folder.Remove unused mmhub_9_1_default.h Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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