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| * | drm/amd/include: Add get_hive_id interface in kfd2kgdShaoyun Liu2018-09-101-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | KFD need to get hive id from amdgpu to build up the XGMI topology Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu : Generate XGMI topology info from driver levelShaoyun Liu2018-09-105-1/+129
| | | | | | | | | | | | | | | | | | | | | | | | | | | Driver will save an array of XGMI hive info, each hive will have a list of devices that have the same hive ID. Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: Add place holder functions for xgmi topology interface with pspShaoyun Liu2018-09-101-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add dummy function for xgmi function interface with psp Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu : Add psp function interfaces for XGMI supportShaoyun Liu2018-09-101-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | Place holder for XGMI support Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu/gmc9: Adjust GART and AGP location with xgmi offset (v2)Alex Deucher2018-09-105-10/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On hives with xgmi enabled, the fb_location aperture is a size which defines the total framebuffer size of all nodes in the hive. Each GPU in the hive has the same view via the fb_location aperture. GPU0 starts at offset (0 * segment size), GPU1 starts at offset (1 * segment size), etc. For access to local vram on each GPU, we need to take this offset into account. This including on setting up GPUVM page table and GART table v2: squash in "drm/amdgpu: Init correct fb region for none XGMI configuration" Acked-by: Huang Rui <ray.huang@amd.com> Acked-by: Slava Abramov <slava.abramov@amd.com> Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Huang Rui <ray.huang@amd.com>
| * | drm/amdgpu/gmc9: add a new gfxhub 1.1 helper for xgmiAlex Deucher2018-09-104-1/+87
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Used to populate the xgmi info on vega20. v2: PF_MAX_REGION is val - 1 (Ray) Acked-by: Huang Rui <ray.huang@amd.com> Acked-by: Slava Abramov <slava.abramov@amd.com> Reviewed-by :Shaoyun liu <Shaoyun.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by :Shaoyun liu <Shaoyun.liu@amd.com>
| * | drm/amdgpu/gmc: add initial xgmi structure to amdgpu_gmc structureAlex Deucher2018-09-101-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Initial pass at a structure to store xgmi info. xgmi is a high speed cross gpu interconnect. Acked-by: Huang Rui <ray.huang@amd.com> Acked-by: Slava Abramov <slava.abramov@amd.com> Reviewed-by :Shaoyun liu <Shaoyun.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
| * | drm/amd/include: update the bitfield define for PF_MAX_REGIONShaoyun Liu2018-09-101-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Correct the definition based on vega20 register spec Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: move PSP init prior to IH in gpu resetEmily Deng2018-09-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | since we use PSP to program IH regs now Signed-off-by: Monk Liu <Monk.Liu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Emily Deng <Emily.Deng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: set bulk_moveable to false when a per VM is releasedChristian König2018-09-101-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | Otherwise we might run into a use after free during bulk move. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: Fix SDMA hang in prt mode v2Tao Zhou2018-09-101-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix SDMA hang in prt mode, clear XNACK_WATERMARK in reg SDMA0_UTCL1_WATERMK to avoid the issue Affected ASICs: VEGA10 VEGA12 RV1 RV2 v2: add reg clear for SDMA1 Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Tested-by: Yukun Li <yukun1.li@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/powerplay: fix compile warning for wrong data type V2Evan Quan2018-09-101-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | do_div expects the 1st argument in 64bit instead of 32bit. Drop the usage of do_div as it seems unnecessary. V2: drop usage of do_div completely Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: Fix warnings while make xmldocsMasanari Iida2018-09-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes following warnings. ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c:3011: warning: Excess function parameter 'dev' description in 'amdgpu_vm_get_task_info' ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c:3012: warning: Function parameter or member 'adev' not described in 'amdgpu_vm_get_task_info' ./drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c:3012: warning: Excess function parameter 'dev' description in 'amdgpu_vm_get_task_info' Signed-off-by: Masanari Iida <standby24x7@gmail.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: Fix compute VM BO params after rebase v2Felix Kuehling2018-09-101-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The intent of two commits was lost in the last rebase: 810955b drm/amdgpu: Fix acquiring VM on large-BAR systems b5d21aa drm/amdgpu: Don't use shadow BO for compute context This commit restores the original behaviour: * Don't set AMDGPU_GEM_CREATE_NO_CPU_ACCESS for page directories to allow them to be reused for compute VMs * Don't create shadow BOs for page tables in compute VMs v2: move more logic into amdgpu_vm_bo_param Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Tested-by: Kent Russell <Kent.Russell@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: enable AGP aperture for GMC9 v2Christian König2018-09-103-10/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the old AGP aperture to avoid GART mappings. v2: don't enable it for SRIOV Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: Clean up KFD init and finiFelix Kuehling2018-09-102-12/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Only initialize KFD once by moving amdgpu_amdkfd_init from amdgpu_pci_probe to amdgpu_init. This fixes kernel oopses and hangs when booting multi-GPU systems. Also removed some vestiges of KFD being its own module. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Add invariant support instrumentation in driverJun Lei2018-09-103-27/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Existing debug dump are all invariant, new “low 32-bit of address” dump is not invariant Signed-off-by: Jun Lei <Jun.Lei@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: clean code for transition event log.Chiawen Huang2018-09-103-29/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why] There are same purpose transition events. [How] remove the redundant event log. Signed-off-by: Chiawen Huang <chiawen.huang@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Remove call to amdgpu_pm_compute_clocksDavid Francis2018-09-101-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why] The extraneous call to amdgpu_pm_compute_clocks is deprecated. [How] Remove it. Signed-off-by: David Francis <David.Francis@amd.com> Signed-off-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: David Francis <David.Francis@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: use link type to decide stream enc acquisitionEric Yang2018-09-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why] Virtual sink is used when set mode happens on a disconnected display to allow the mode set to proceed. This did not work with MST because the logic for acquiring stream encoder uses stream signal to determine the special handling is required, and stream signal is virtual instead of DP in this case. [How] Use link type to decide instead. Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: dc 3.1.65Tony Cheng2018-09-101-1/+1
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Steven Chiu <Steven.Chiu@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Reorder resource_pool to put i2c with auxDavid Francis2018-09-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why] The i2c and aux engines are similar, and should be placed next to eachother for readability [How] Reorder the elements of the resource_pool struct Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Use DRM helper for best_encoderLeo Li2018-09-101-23/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why] Our implementation is functionally identical to DRM's Note that instead of checking if the provided id is 0, the helper follows through with the mode object search. However, It will still return NULL, since 0 is not a valid object id, and missed searches will return NULL. [How] Remove our implementation, and replace it with drm_atomic_helper_best_encoder. Signed-off-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: David Francis <David.Francis@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: num of sw i2c/aux engines less than num of connectorsHersen Wu2018-09-107-5/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [why] AMD Stoney reference board, there are only 2 pipes (not include underlay), and 3 connectors. resource creation, only 2 I2C/AUX engines are created. Within dc_link_aux_transfer, when pin_data_en =2, refer to enengines[ddc_pin->pin_data->en] = NULL. NULL point is referred later causing system crash. [how] each asic design has fixed number of ddc engines at hw side. for each ddc engine, create its i2x/aux engine at sw side. Signed-off-by: Hersen Wu <hersenxs.wu@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: add aux transition event log.Chiawen Huang2018-09-104-1/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why] Enhance aux transition debugging information. [How] Added Aux request and reply event log. Signed-off-by: Chiawen Huang <chiawen.huang@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: add disconnect_delay to dc_panel_patchDerek Lai2018-09-101-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Some display need disconnect delay. Adding this parameter for future use Signed-off-by: Derek Lai <Derek.Lai@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: remove unused clk_src codeDmytro Laktyushkin2018-09-102-90/+1
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: remove dead dc vbios codeDmytro Laktyushkin2018-09-103-1514/+39
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Add driver-side parsing for CMJun Lei2018-09-101-4/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Although 4 unique register values exist for gamma modes, two are actually the same (the two RAMs) It’s not possible for caller to understand this HW specific behavior, so some parsing is necessary in driver Signed-off-by: Jun Lei <Jun.Lei@amd.com> Reviewed-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Fix DAL217 tests modify DTN logs for other testsGary Kattan2018-09-101-6/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why]Update Code to get DTN golden log check to pass for tests run after DAL217 tests. [How]Change how dcn10_log_hw_state function prints HW state info (CM_GAMUT_REMAP_Cx_Cx registers) when GAMUT REMAP is in bypass mode. Signed-off-by: Gary Kattan <gary.kattan@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Add DP YCbCr 4:2:0 supportEric Bernstein2018-09-101-1/+188
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why] For supporting DP YCbCr 4:2:0 output. [How] Update mod_build_vsc_infopacket to support Pixel Encoding/Colorimetry Format indication for VSC SDP rev5. Signed-off-by: Eric Bernstein <eric.bernstein@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Build stream update and plane updates in dmBhawanpreet Lakha2018-09-101-1/+115
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why] We currently lock modeset by setting a boolean in dm. We want to lock Based on what DC tells us. [How] Build stream_updates and plane_update based on what changed. Then we call check_update_surfaces_for_stream() to get the update type We lock only if update_type is not fast Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: dc 3.1.64Tony Cheng2018-09-101-1/+1
| | | | | | | | | | | | | | | Signed-off-by: Tony Cheng <tony.cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: manually map the shadow BOs againChristian König2018-09-102-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | Otherwise we won't be able to use the AGP aperture. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: use the AGP aperture for system memory access v2Christian König2018-09-103-25/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Start to use the old AGP aperture for system memory access. v2: Move that to amdgpu_ttm_alloc_gart Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: add amdgpu_gmc_agp_location v3Christian König2018-09-102-0/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Helper to figure out the location of the AGP BAR. v2: fix a couple of bugs v3: correctly add one to vram_end Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: correctly sign extend 48bit addresses v3Christian König2018-09-109-32/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Correct sign extend the GMC addresses to 48bit. v2: sign extending turned out easier than thought. v3: clean up the defines and move them into amdgpu_gmc.h as well Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: improve VM state machine documentation v2Christian König2018-09-101-32/+109
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we have a lot of FAQ on the VM state machine try to improve the documentation by adding functions for each state move. v2: fix typo in amdgpu_vm_bo_invalidated, use amdgpu_vm_bo_relocated in one more place as well. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: fix amdgpu_mn_unlock() in the CS error pathChristian König2018-09-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Avoid unlocking a lock we never locked. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: separate per VM BOs from normal in the moved stateChristian König2018-09-102-36/+38
| | | | | | | | | | | | | | | | | | | | | | | | Allows us to avoid taking the spinlock in more places. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: move size calculations to the front of the file againChristian König2018-09-101-45/+45
| | | | | | | | | | | | | | | | | | | | | | | | amdgpu_vm_bo_* functions should come much later. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/powerplay: correct data type to support under voltageEvan Quan2018-09-101-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | For under voltage, negative value will be applied to voltage offset. Update the data type to cover this case. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/powerplay: added vega20 overdrive support V3Evan Quan2018-09-103-1/+335
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added vega20 overdrive support based on existing OD sysfs APIs. However, the OD logics are simplified on vega20. So, the behavior will be a little different and works only on some limited levels. V2: fix typo fix commit description revise error logs add support for clock OD V3: separate clock from voltage OD settings Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu/gmc9: don't keep stolen memory on vega20Alex Deucher2018-09-021-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Vega20 does not appear to be affected by the same issue as vega10. Enable the full stolen memory handling on vega20. Reserve the appropriate size at init time to avoid display artifacts and then free it at the end of init once the new FB is up and running. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu/gmc9: don't keep stolen memory on vega12Alex Deucher2018-09-021-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | vega12 does not appear to be affected by the same issue as vega10. Enable the full stolen memory handling on vega12. Reserve the appropriate size at init time to avoid display artifacts and then free it at the end of init once the new FB is up and running. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu/gmc9: don't keep stolen memory on RavenAlex Deucher2018-09-021-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Raven does not appear to be affected by the same issue as vega10. Enable the full stolen memory handling on Raven. Reserve the appropriate size at init time to avoid display artifacts and then free it at the end of init once the new FB is up and running. Bug: https://bugs.freedesktop.org/show_bug.cgi?id=106639 Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu/gmc9: rework stolen vga memory handlingAlex Deucher2018-09-021-19/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | No functional change, just rework it in order to adjust the behavior on a per asic level. The problem is that on vega10, something corrupts the lower 8 MB of vram on the second resume from S3. This does not seem to affect Raven, other gmc9 based asics need testing. Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: fix idle state and bulk_moveable flagChristian König2018-09-021-5/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add BOs to the idle state again and correctly clear the flag when new BOs are added. Signed-off-by: Christian König <christian.koenig@amd.com> Tested-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: fix "use bulk moves for efficient VM LRU handling" v2Christian König2018-09-021-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | First step to fix the LRU corruption, we accidentially tried to move things on the LRU after dropping the lock. Signed-off-by: Christian König <christian.koenig@amd.com> Tested-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: Use drm_dev_unplug in PCI .removeAndrey Grodzovsky2018-09-021-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This at least allows to fail any subsequent IOCTLs with -ENODEV after the device is gone. Still this operation is not supported yet in graphic mode and will lead at least to page faults and other issues. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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