summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/amd
Commit message (Collapse)AuthorAgeFilesLines
* drm/amdgpu: return from atombios_dp_get_dpcd only when errorArindam Nath2016-03-021-1/+1
| | | | | | | | | | | | | | | In amdgpu_connector_hotplug(), we need to start DP link training only after we have received DPCD. The function amdgpu_atombios_dp_get_dpcd() returns non-zero value only when an error condition is met, otherwise returns zero. So in case the function encounters an error, we need to skip rest of the code and return from amdgpu_connector_hotplug() immediately. Only when we are successfull in reading DPCD pin, we should carry on with turning-on the monitor. Signed-off-by: Arindam Nath <arindam.nath@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/amdgpu/cz: remove commented out call to enable vce pgAlex Deucher2016-03-021-2/+1
| | | | | | | | | | | This code path is not currently enabled now that we properly respect the vce pg flags, so uncomment the actual pg calls so the code is as it should be we are eventually able to enable vce pg. Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/powerplay/cz: enable/disable vce dpm independent of vce pgAlex Deucher2016-03-021-1/+1
| | | | | | | | | If we don't disable it when vce is not in use, we use extra power if vce pg is disabled. Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/cz: enable/disable vce dpm even if vce pg is disabledAlex Deucher2016-03-021-3/+1
| | | | | | | | I missed this when cleaning up the vce pg handling. Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/gfx8: specify which engine to wait before vm flushChunming Zhou2016-03-021-1/+2
| | | | | | | | | Select between me and pfp properly. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: apply gfx_v8 fixes to gfx_v7 as wellChristian König2016-03-021-0/+13
| | | | | | | | We never ported that back to CIK, so we could run into VM faults here. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/amd/powerplay: send event to notify powerplay all modules are initialized.Rex Zhu2016-03-021-1/+3
| | | | | | | with this event, powerplay can adjust current power state if needed. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: export AMD_PP_EVENT_COMPLETE_INIT task to amdgpu.Rex Zhu2016-03-022-1/+5
| | | | | | | | This is needed to init the dynamic states without a display. To be used in the next commit. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/pm: update current crtc info after setting the powerstateAlex Deucher2016-03-021-3/+3
| | | | | | | | | | | | | On CI, we need to see if the number of crtcs changes to determine whether or not we need to upload the mclk table again. In practice we don't currently upload the mclk table again after the initial load. The only reason you would would be to add new states, e.g., for arbitrary mclk setting which is not currently supported. Acked-by: Jordan Lazare <Jordan.Lazare@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/amdgpu: disable direct VM updates when vm_debug is setChristian König2016-02-241-1/+2
| | | | | | | That should make user space bugs more obvious. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* amdgpu: fix NULL pointer dereference at tonga_check_states_equalBradley Pankow2016-02-241-2/+2
| | | | | | | | | | | The event_data passed from pem_fini was not cleared upon initialization. This caused NULL checks to pass and cast_const_phw_tonga_power_state to attempt to dereference an invalid pointer. Clear the event_data in pem_init and pem_fini before calling pem_handle_event. Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Bradley Pankow <btpankow@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/pm: adjust display configuration after powerstateAlex Deucher2016-02-221-2/+3
| | | | | | | | | | | | | | set_power_state defaults to no displays, so we need to update the display configuration after setting up the powerstate on the first call. In most cases this is not an issue since ends up getting called multiple times at any given modeset and the proper order is achieved in the display changed handling at the top of the function. Reviewed-by: Christian König <christian.koenig@amd.com> Acked-by: Jordan Lazare <Jordan.Lazare@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/amdgpu/pm: add some checks for PXAlex Deucher2016-02-221-1/+20
| | | | | | | | | I.e., doesn't make sense to change power states or check the temperature when the asic is powered off. Reviewed-by: Christian König <christian.koenig@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: fix locking in force performance levelAlex Deucher2016-02-221-2/+1
| | | | | | | | | Looks like a copy paste typo when we added powerplay support. Reviewed-by: Christian König <christian.koenig@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/gfx8: fix priv reg interrupt enableAlex Deucher2016-02-221-1/+1
| | | | | | | | Looks like a copy/paste typo. Reviewed-by: Christian König <christian.koenig@amd.com> Noticed-by: David Panariti <David.Panariti@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Don't hang in amdgpu_flip_work_func on disabled crtc.Mario Kleiner2016-02-191-3/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes a regression introduced in Linux 4.4. This is a port of the same fix for radeon-kms in the patch "drm/radeon: Don't hang in radeon_flip_work_func on disabled crtc. (v2)" Limit the amount of time amdgpu_flip_work_func can delay programming a page flip, by both limiting the maximum amount of time per wait cycle and the maximum number of wait cycles. Continue the flip if the limit is exceeded, even if that may result in a visual or timing glitch. This is to prevent a hang of page flips, as reported in fdo bug #93746: Disconnecting a DisplayPort display in parallel to a kms pageflip getting queued can cause the following hang of page flips and thereby an unusable desktop: 1. kms pageflip ioctl() queues pageflip -> queues execution of amdgpu_flip_work_func. 2. Hotunplug of display causes the driver to DPMS OFF the unplugged display. Display engine shuts down, scanout no longer moves, but stays at its resting position at start line of vblank. 3. amdgpu_flip_work_func executes while crtc is off, and due to the non-moving scanout position, the new flip delay code introduced into Linux 4.4 by commit 8e36f9d33c13 ("drm/amdgpu: Fixup hw vblank counter/ts..") enters an infinite wait loop. 4. After reconnecting the display, the pageflip continues to hang in 3. and the display doesn't update its view of the desktop. This patch fixes the Linux 4.4 regression from fdo bug #93746 <https://bugs.freedesktop.org/show_bug.cgi?id=93746> Reported-by: Bernd Steinhauser <linux@bernd-steinhauser.de> Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Cc: <stable@vger.kernel.org> # 4.4+ Cc: Michel Dänzer <michel.daenzer@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: use post-decrement in error handlingRasmus Villemoes2016-02-161-1/+1
| | | | | | | | | | | We need to use post-decrement to get the pci_map_page undone also for i==0, and to avoid some very unpleasant behaviour if pci_map_page failed already at i==0. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/amdgpu: fix issue with overlapping userptrsChristian König2016-02-103-1/+23
| | | | | | | | | Otherwise we could try to evict overlapping userptr BOs in get_user_pages(), leading to a possible circular locking dependency. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/amdgpu: remove unnecessary forward declarationNicolai Hähnle2016-02-101-2/+0
| | | | | | | Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org
* drm/amdgpu: hold reference to fences in amdgpu_sa_bo_new (v2)Nicolai Hähnle2016-02-101-1/+4
| | | | | | | | | | | | | | | | | | An arbitrary amount of time can pass between spin_unlock and fence_wait_any_timeout, so we need to ensure that nobody frees the fences from under us. A stress test (rapidly starting and killing hundreds of glxgears instances) ran into a deadlock in fence_wait_any_timeout after about an hour, and this race condition appears to be a plausible cause. v2: agd: rebase on upstream Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org
* drm/amdgpu: fix s4 resumeFlora Cui2016-02-101-4/+9
| | | | | | | | | No need to re-init asic if it's already been initialized. Skip IB tests since kernel processes are frozen in thaw. Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/amdgpu/cz: plumb pg flags through to powerplayAlex Deucher2016-02-081-0/+13
| | | | | | | Enable vce and uvd pg based on single set of pg flags. Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/tonga: plumb pg flags through to powerplayAlex Deucher2016-02-081-2/+12
| | | | | | | Enable vce and uvd pg based on single set of pg flags. Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drma/dmgpu: move cg and pg flags into shared headersAlex Deucher2016-02-0813-171/+171
| | | | | | | So they can be used by powerplay. Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: remove unused cg definesAlex Deucher2016-02-081-9/+0
| | | | | | | Leftover from radeon. Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add a cgs interface to fetch cg and pg flagsAlex Deucher2016-02-082-0/+8
| | | | | | | Needed to pass the cg and pg info to powerplay. Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay/tonga: disable vce pgAlex Deucher2016-02-081-0/+2
| | | | | | | Not working reliably yet. Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay/tonga: disable uvd pgAlex Deucher2016-02-081-0/+3
| | | | | | | Not working reliably yet. Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay/cz: disable vce pgAlex Deucher2016-02-081-0/+3
| | | | | | | Not working reliably yet. Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay/cz: disable uvd pgAlex Deucher2016-02-081-0/+2
| | | | | | | Not working reliably yet. Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: be consistent with uvd cg flagsAlex Deucher2016-02-082-0/+8
| | | | | | | Don't do anything if the uvd cg flags are not set. Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: clean up vce pg flags for cz/stAlex Deucher2016-02-081-2/+1
| | | | | | | It was already disabled elsewhere, make it offical. Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: handle vce pg flags properlyAlex Deucher2016-02-082-0/+6
| | | | | | | Don't attempt to start/stop the vce block if pg is disabled. Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: handle uvd pg flags properlyAlex Deucher2016-02-083-1/+10
| | | | | | | Don't attempt to start/stop the uvd block if pg is disabled. Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/dpm/ci: switch over to the common pcie caps interfaceAlex Deucher2016-02-081-6/+5
| | | | | | | | We already query this at driver init, so use that info. Also handles virtualization cases. Reviewed-by: monk liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/cik: don't mess with aspm if gpu is root busAlex Deucher2016-02-081-0/+3
| | | | | | | | Pcie registers may not be available in a virtualized environment. Reviewed-by: monk liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add pcie cap module parameters (v2)Alex Deucher2016-02-083-65/+92
| | | | | | | | | | | | | | | | Allows the user to force the supported pcie gen and lane config on both the asic and the chipset. Useful for debugging pcie problems and for virtualization where we may not be able to query the pcie bridge caps. Default to: gen: chipset 1/2, asic 1/2/3 lanes: 1/2/4/8/16 v2: fix bare metal case Reviewed-by: monk liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* Merge branch 'drm-fixes-4.5' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie2016-02-0510-59/+107
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-fixes - fix and enable iceland/topaz support - handle WC on platforms that don't support it * 'drm-fixes-4.5' of git://people.freedesktop.org/~agd5f/linux: drm/amdgpu: disable uvd and vce clockgating on Fiji drm/amdgpu: remove exp hardware support from iceland drm/amdgpu: load MEC ucode manually on iceland drm/amdgpu: don't load MEC2 on topaz drm/amdgpu: drop topaz support from gmc8 module drm/amdgpu: pull topaz gmc bits into gmc_v7 drm/amdgpu: The VI specific EXE bit should only apply to GMC v8.0 above drm/amdgpu: iceland use CI based MC IP drm/amdgpu: move gmc7 support out of CIK dependency drm/amdgpu/gfx7: enable cp inst/reg error interrupts drm/amdgpu/gfx8: enable cp inst/reg error interrupts drm/amdgpu: mask out WC from BO on unsupported arches drm/radeon: mask out WC from BO on unsupported arches drm: add helper to check for wc memory support drm/amdgpu: no need to load MC firmware on fiji
| * drm/amdgpu: disable uvd and vce clockgating on FijiAlex Deucher2016-02-031-2/+1
| | | | | | | | | | | | | | | | Doesn't work properly yet. Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Sonny Jiang <sonny.jiang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: remove exp hardware support from icelandAlex Deucher2016-02-021-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | It's working now. bug: https://bugs.freedesktop.org/show_bug.cgi?id=92270 Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| * drm/amdgpu: load MEC ucode manually on icelandAlex Deucher2016-02-021-4/+10
| | | | | | | | | | | | | | | | | | The smc doesn't handle it. Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| * drm/amdgpu: don't load MEC2 on topazAlex Deucher2016-02-022-11/+5
| | | | | | | | | | | | | | | | | | Not validated. Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| * drm/amdgpu: drop topaz support from gmc8 moduleAlex Deucher2016-02-021-27/+1
| | | | | | | | | | | | | | | | | | topaz is actually gmc7. Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| * drm/amdgpu: pull topaz gmc bits into gmc_v7Alex Deucher2016-02-021-2/+33
| | | | | | | | | | | | | | | | | | Add the topaz golden settings into the gmc7 module. Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| * drm/amdgpu: The VI specific EXE bit should only apply to GMC v8.0 aboveKen Wang2016-02-021-1/+1
| | | | | | | | | | | | | | Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Cc: stable@vger.kernel.org
| * drm/amdgpu: iceland use CI based MC IPKen Wang2016-02-022-4/+13
| | | | | | | | | | | | | | Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Cc: stable@vger.kernel.org
| * drm/amdgpu: move gmc7 support out of CIK dependencyAlex Deucher2016-02-021-1/+2
| | | | | | | | | | | | | | | | | | It's used by iceland which is VI. Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| * drm/amdgpu/gfx7: enable cp inst/reg error interruptsAlex Deucher2016-02-021-1/+19
| | | | | | | | | | | | | | | | Enable CP register/instruction error interrupts. Useful for debugging command stream problems. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu/gfx8: enable cp inst/reg error interruptsAlex Deucher2016-02-021-0/+10
| | | | | | | | | | | | | | | | Enable CP register/instruction error interrupts. Useful for debugging command stream problems. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: mask out WC from BO on unsupported archesOded Gabbay2016-02-021-0/+8
| | | | | | | | | | | | | | | | Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
OpenPOWER on IntegriCloud