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| * drm/amdgpu/powerplay: split out common smu9 BACO codeAlex Deucher2019-03-059-89/+106
| | | | | | | | | | | | | | | | Several of the BACO functions are common across smu9-based asics. Split the common code out. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu/powerplay: add BACO support for vega12Alex Deucher2019-03-055-1/+197
| | | | | | | | | | | | | | | | This implements BACO (Bus Active, Chip Off) support for vega12. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amd/powerplay: correct power reading on fijiEvan Quan2019-03-111-3/+3
| | | | | | | | | | | | | | | | | | | | | | Set sampling period as 500ms to provide a smooth power reading output. Also, correct the register for power reading. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* | drm/amd/powerplay: set max fan target temperature as 105CEvan Quan2019-03-111-0/+17
|/ | | | | | | | | A workaround to override the fan target temperature in SMC table. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: show the right override pcie parametersEvan Quan2019-02-272-16/+34
| | | | | | | | Instead of the hard-coded ones from VBIOS. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: honor the OD settingsEvan Quan2019-02-272-16/+18
| | | | | | | | | Set the soft/hard max settings as max possible to not violate the OD settings. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: set default fclk for no fclk dpm support caseEvan Quan2019-02-274-2/+10
| | | | | | | | Set the default fclk as what we got from VBIOS. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: support retrieving clock information from other syspllsEvan Quan2019-02-273-16/+18
| | | | | | | | | There will be some needs to retrieve clock information from other sysplls also except default 0. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: overwrite ODSettingsMin for UCLK_FMAX featureEvan Quan2019-02-271-14/+5
| | | | | | | | | | For UCLK_FMAX OD feature, SMU overwrites the highest UCLK DPM level freq. Therefore it can only take values that are greater than the second highest DPM level freq. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: force FCLK to highest also for 5K or higher displaysEvan Quan2019-02-271-1/+37
| | | | | | | | This can fix possible screen freeze on high resolution displays. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: need to reapply the dpm level settingsEvan Quan2019-02-271-2/+1
| | | | | | | | As these settings got reset during above phm_apply_clock_adjust_rules. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: drop redundant soft min/max settingsEvan Quan2019-02-271-24/+0
| | | | | | | | As these are already set during apply_clocks_adjust_rules. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: use REG32_PCIE wrapper instead for powerplayHuang Rui2019-02-272-8/+4
| | | | | | | | | This patch uses REG32_PCIE wrapper instead of writting pci_index2 and reading pci_data2 for powerplay. This sequence should be protected by pcie_idx_lock. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/powerplay: add missing breaks in polaris10_smumgrAlex Deucher2019-02-271-0/+2
| | | | | | | | | | | This was noticed by Gustavo and his -Wimplicit-fallthrough patches. However, in this case, I believe we should have breaks rather than falling though, that said, in practice we should never fall through in the first place so there should be no change in behavior. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: fix the confusing ppfeature mask calculationsEvan Quan2019-02-223-6/+6
| | | | | | | | Simplify the ppfeature mask calculations. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/powerplay: print current clock level when dpm is disabled on vg20shaoyunl2019-02-221-28/+28
| | | | | | | | | When DPM for the specific clock is disabled, driver should still print out current clock info for rocm-smi support on vega20 Signed-off-by: shaoyunl <shaoyun.liu@amd.com> Reviewed-by: Eric Huang <JinhuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* Merge branch 'drm-next-5.1' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie2019-02-2210-21/+67
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-next Fixes for 5.1: amdgpu: - Fix missing fw declaration after dropping old CI DPM code - Fix debugfs access to registers beyond the MMIO bar size - Fix context priority handling - Add missing license on some new files - Various cleanups and bug fixes radeon: - Fix missing break in CS parser for evergreen - Various cleanups and bug fixes sched: - Fix entities with 0 run queues Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190221214134.3308-1-alexander.deucher@amd.com
| * drm/amdgpu/powerplay: fix typo in BACO header guardsAlex Deucher2019-02-212-4/+4
| | | | | | | | | | | | | | s/BOCO/BACO/g Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu/powerplay: fix return codes in BACO codeAlex Deucher2019-02-212-5/+5
| | | | | | | | | | | | | | Use a proper return code rather than -1. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: add missing license on baco filesAlex Deucher2019-02-212-0/+44
| | | | | | | | | | | | | | Trivial. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/powerplay/smu10_hwmgr: use struct_size() in kzalloc()Gustavo A. R. Silva2019-02-191-5/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | One of the more common cases of allocation size calculations is finding the size of a structure that has a zero-sized array at the end, along with memory for some number of elements for that array. For example: struct foo { int stuff; struct boo entry[]; }; size = sizeof(struct foo) + count * sizeof(struct boo); instance = kzalloc(size, GFP_KERNEL); Instead of leaving these open-coded and prone to type mistakes, we can now use the new struct_size() helper: instance = kzalloc(struct_size(instance, entry, count), GFP_KERNEL); Notice that, in this case, variable table_size is not necessary, hence it is removed. This code was detected with the help of Coccinelle. Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/powerplay/smu8_hwmgr: use struct_size() in kzalloc()Gustavo A. R. Silva2019-02-191-5/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | One of the more common cases of allocation size calculations is finding the size of a structure that has a zero-sized array at the end, along with memory for some number of elements for that array. For example: struct foo { int stuff; struct boo entry[]; }; size = sizeof(struct foo) + count * sizeof(struct boo); instance = kzalloc(size, GFP_KERNEL); Instead of leaving these open-coded and prone to type mistakes, we can now use the new struct_size() helper: instance = kzalloc(struct_size(instance, entry, count), GFP_KERNEL); Notice that, in this case, variable table_size is not necessary, hence it is removed. This code was detected with the help of Coccinelle. Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/powerplay/smu7_hwmgr: Mark expected switch fall-throughsGustavo A. R. Silva2019-02-181-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. Warning level 3 was used: -Wimplicit-fallthrough=3 This patch is part of the ongoing efforts to enable -Wimplicit-fallthrough. Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: fix several indentation issuesColin Ian King2019-02-132-2/+2
| | | | | | | | | | | | | | | | There are several statements that are incorrectly indented. Fix these. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu/powerplay: declare firmware for CI cardsAlex Deucher2019-02-131-0/+4
| | | | | | | | | | | | | | | | | | | | | | Missing firmware declaration caused firmware requirement to not be noted by the module and may cause firmware to not be available in initrd. Fixes: bc4b539e385088 "drm/amdgpu: remove old CI DPM implementation" Reviewed-by: James Zhu <James.Zhu@amd.com> Tested-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | Merge v5.0-rc7 into drm-nextDave Airlie2019-02-181-0/+1
|\ \ | |/ |/| | | | | | | Backmerging for nouveau and imx that needed some fixes for next pulls. Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/amd/powerplay: Fix missing break in switchGustavo A. R. Silva2019-01-291-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add missing break statement in order to prevent the code from falling through to the default case. The resoning for this is that pclk_vol_table is an automatic variable. So, it makes no sense to update it just before falling through to the default case and return -EINVAL. This bug was found thanks to the ongoing efforts to enabling -Wimplicit-fallthrough. Fixes: cd70f3d6e3fa ("drm/amd/powerplay: PP/DAL interface changes for dynamic clock switch") Cc: stable@vger.kernel.org Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/powerplay: OD setting fix on Vega10Kenneth Feng2019-01-211-1/+21
| | | | | | | | | | | | | | | | | | gfxclk for OD setting is limited to 1980M for non-acg ASICs of Vega10 Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/powerplay: run acg btc for Vega12Kenneth Feng2019-01-141-0/+21
| | | | | | | | | | | | | | | | acg btc was added to Vega12 Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * Merge branch 'drm-fixes-5.0' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie2019-01-115-30/+50
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-fixes - Powerplay fixes - Virtual display pinning fixes - Golden register updates for vega - Pitch and gem size validation fixes - Fix for error case in sr-iov init - Disable page tables in system memory on RV due to issues with IOMMU reported on some platforms Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190109204336.3315-1-alexander.deucher@amd.com
| | * drm/amd/powerplay: drop the unnecessary uclk hard min settingEvan Quan2019-01-081-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since soft min setting is enough. Hard min setting is redundant. Reported-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amd/powerplay: avoid possible buffer overflowEvan Quan2019-01-081-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make sure the clock level enforced is within the allowed ranges. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amd/powerplay: update OD support flag for SKU with no OD capabilitiesEvan Quan2019-01-081-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | For those ASICs with no overdrive capabilities, the OD support flag will be reset. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * drm/amd/powerplay: support BOOTUP_DEFAULT power profile modeEvan Quan2019-01-025-23/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | This can avoid unexpected profile mode change after running compute workload. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/powerplay: add override pcie parameters for Vega20 (v2)Harish Kasiviswanathan2019-02-071-20/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | v2: Fix SMU message format Send override message after SMU enable features Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Reviewed-by: Eric Huang <JinhuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/powerplay: update soc boot and max level on vega10Kenneth Feng2019-02-051-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | update soc boot and max level,then uclk isn't stuck at minimum. Bug: https://bugs.freedesktop.org/show_bug.cgi?id=109462 Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/powerplay: add override pcie parameters for Vega20Eric Huang2019-01-281-0/+46
| | | | | | | | | | | | | | | | | | | | | | | | It is to solve RDMA performance issue. Signed-off-by: Eric Huang <JinhuiEric.Huang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/powerplay: support Vega12 retrieving and setting ppfeaturesEvan Quan2019-01-251-0/+100
| | | | | | | | | | | | | | | | | | | | | | | | Enable retrieving and setting ppfeatures on Vega12. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/powerplay: support Vega12 SOCclk and DCEFclk dpm level settingsEvan Quan2019-01-251-1/+97
| | | | | | | | | | | | | | | | | | | | | | | | Enable SOCclk and DCEFclk dpm level retrieving and setting on Vega12. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/powerplay: support Vega10 retrieving and setting ppfeaturesEvan Quan2019-01-251-0/+101
| | | | | | | | | | | | | | | | | | | | | | | | Enable retrieving and setting ppfeatures on Vega10. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/powerplay: support Vega10 SOCclk and DCEFclk dpm level settingsEvan Quan2019-01-252-0/+84
| | | | | | | | | | | | | | | | | | | | | | | | Enable SOCclk and DCEFclk dpm level retrieving and setting on Vega10. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/powerplay: avoid frequent metrics table exportEvan Quan2019-01-252-13/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | That's unnecessary. Also it makes more sense to show all the clocks on one metrics table export. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/powerplay: correct Vega20 gfxclk readout under DSEvan Quan2019-01-251-5/+9
| | | | | | | | | | | | | | | | | | | | | | | | Current implementation cannot report the correct gfxclk under DS. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/powerplay: enable MGPU fan boost feature on Vega10Evan Quan2019-01-253-0/+39
| | | | | | | | | | | | | | | | | | | | | | | | For those SKUs which support this feature only. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/powerplay: support Vega10 fan table V3Evan Quan2019-01-253-1/+74
| | | | | | | | | | | | | | | | | | | | | | | | MGPU fan boost related parameter is added. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/powerplay: run btc before enabling all SMU featuresEvan Quan2019-01-251-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | BTC is needed before enabling all SMU features. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/powerplay: fit the SOC clock also to the new performance levelEvan Quan2019-01-251-0/+37
| | | | | | | | | | | | | | | | | | | | | | | | The SOC clock needs also to fit the new performance level. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/powerplay: enforce display related settings only on neededEvan Quan2019-01-253-12/+11
| | | | | | | | | | | | | | | | | | | | | | | | No display related settings are needed on dpm level change. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/powerplay: avoid unnecessary dpm level settingEvan Quan2019-01-251-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | No dpm level setting is needed when the request level is actually same as current. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/powerplay: OD setting fix on Vega10Kenneth Feng2019-01-251-1/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | gfxclk for OD setting is limited to 1980M for non-acg ASICs of Vega10 Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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