summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/amd/display/dc/dce110
Commit message (Collapse)AuthorAgeFilesLines
...
* drm/amd/display: move ocsc programming from opp to dpp for dceYue Hin Lau2017-09-266-34/+63
| | | | | | | Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Rename firmware_info to dc_firmware_infoHarry Wentland2017-09-261-1/+1
| | | | | | | | | | This is to avoid conflicts with amdgpu's firmware_info once we merge amdgpu_dm_types with amdgpu_dm. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: collapse dce11 reset_hw_ctx_wrap into 1 functionDmytro Laktyushkin2017-09-261-27/+20
| | | | | | | Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: safeguard compressor apiRoman Li2017-09-261-3/+6
| | | | | | | | | Only call compressor api if it's available. Signed-off-by: Roman Li <Roman.Li@amd.com> Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Roll core_stream into dc_streamLeo (Sunpeng) Li2017-09-262-111/+111
| | | | | | Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Clean up some DCN1 guardsZeyu Fan2017-09-261-3/+3
| | | | | | | Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Move stream validations into seperate function.Andrey Grodzovsky2017-09-261-20/+3
| | | | | | | | | | | | | Stateless streams validations (not require resource population) moved into hook to be called directly from DM. Call dc_validate_stream be before validate_with_context for non Linux APIs Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: break up plane disable and disconnect in set modeEric Yang2017-09-261-1/+4
| | | | | | | Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Roll core_sink into dc_sinkHarry Wentland2017-09-261-1/+1
| | | | | | | Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Roll core_link into dc_linkHarry Wentland2017-09-262-9/+9
| | | | | | | Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Roll core_surface into dc_surfaceHarry Wentland2017-09-262-52/+52
| | | | | | | Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Move DCHUBBUB block from MemInput to HW sequencer.Zeyu Fan2017-09-261-0/+1
| | | | | | | Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com> Reviewed-by: Zeyu Fan <Zeyu.Fan@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: add missing func for dce11o to avoid crashEric Yang2017-09-261-0/+6
| | | | | | | Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: move VGA to HWSS from TGTony Cheng2017-09-261-1/+2
| | | | | | | | Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Zeyu Fan <Zeyu.Fan@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: support for updated register headers on DCNDmytro Laktyushkin2017-09-261-1/+1
| | | | | | | Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: fix index and union overwrite in compressorRoman Li2017-09-261-2/+2
| | | | | | | | | | | Fixing 2 bugs in compressor: - array out of bounds due to incorrect index - compressor options always 0 due to union overwrite Signed-off-by: Roman Li <Roman.Li@amd.com> Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: fix aviInfoFrame bar Info and add set_avMuteCharlene Liu2017-09-262-2/+12
| | | | | | | Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Flattening to dc_transfer_funcLeo (Sunpeng) Li2017-09-261-5/+5
| | | | | | | | | | | | Flattening dc transfer functions in the following manner: transfer_func > core_transfer_func > dc_transfer_func References to deleted structs are updated as needed. Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Fix MPO visual confirmAnthony Koo2017-09-262-4/+8
| | | | | | | | | | | 1. Need to blend non-active area to show visual confirm borders 2. Set number of Visual Confirm lines based on pipe instance 3. Set Different colors representing surface format of bottom most plan Signed-off-by: Anthony Koo <anthony.koo@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: set drr during program timing.Yongqiang Sun2017-09-261-0/+21
| | | | | | | Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Set static screen register for stoney/carrizoBhawanpreet Lakha2017-09-261-0/+4
| | | | | | | | | | -Set CRTC_STATIC_SCREEN_EVENT for stoney/carrizo for FBC implementation -Code is currently guarded with "ENABLE_FBC" compile time flag Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Connect DC resource to FBC compressorBhawanpreet Lakha2017-09-264-39/+66
| | | | | | | | | | | - Connected DC resource to FBC compressor, - Initial Implementation of FBC for Stoney/Carrizo - Code is currently guarded with "ENABLE_FBC" compile time flag Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: fix dcn pipe reset sequenceDmytro Laktyushkin2017-09-261-9/+8
| | | | | | | | | | | | This change fixes dcn10 front end reset sequence. Previously we would reset front end during flip which led to issues in certain MPO and 4k/5k scenarios. We would also never properly power gate our front end. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: remove unneeded FBC hw programming codeBhawanpreet Lakha2017-09-262-444/+93
| | | | | | | | | | - Removed uneeded FBC code. - Initial placeholder for FBC implementation on stoney/carrizo Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Don't program scaler if we have no surfaceHarry Wentland2017-09-261-3/+5
| | | | | | | | | | | If we don't have a surface in dc_commit_streams scl_data won't get populated in resource_build_scaling_params_for_context. In this case we shouldn't attempt to program the scaler. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: fix dc_post_update_surfaces_to_streamDmytro Laktyushkin2017-09-261-8/+3
| | | | | | | Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Don't call DCN clk code for VegaHarry Wentland2017-09-261-1/+1
| | | | | | | Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: RV stereo supportVitaly Prosyak2017-09-261-0/+6
| | | | | | | | | HDMI frame pack and DP frame alternate in band Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: remove get_position() of underlayShirish S2017-09-261-8/+1
| | | | | | | | | | | | | | | | | | | | | get_position() returns CRTC vertical/horizontal counters, hence it is not applicable for underlay which is plane and not attached to one crtc. This patch hence removes the callback from dce110_tg_v_funcs and hence fixes a bug in dc_debug.c where in get_position() for underlay pipe is called un-conditionally. Witout this patch get_position() is called in case one has to update underlay plane's data, since callback implmented with an ASSERT(), the old_surface_count and new_surface_count mismatches; causing only one plane update which is not right and also assert makes the rendering slow. Signed-off-by: Shirish S <shirish.s@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Call program_gamut explicitly instead of entire set_planeZeyu Fan2017-09-261-0/+42
| | | | | | | | | This fixes on boot crush on Vega, Polaris with Dal3. Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: re-order the luma chroma addres updationShirish S2017-09-261-3/+3
| | | | | | | | | | | | | | | | | | The DCE engine triggers scan as soon as the luma address is updated, since it is updated before chroma address the chroma data is not scanned out properly or in order. This patch fixes this by re-ordering the same. BUG: SWDEV-119421 TEST: (On Chromium OS for Stoney Only) * Executed below tests to see YUV(underlay) & RGB planes on eDP plane_test --format XR24 --size 500x100 -p --format NV12 --size 500x500 * Chroma data is scanned properly. Signed-off-by: Shirish S <shirish.s@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: program scaler not called.Andrey Grodzovsky2017-09-261-4/+2
| | | | | | | | | | Scaler code in case of UPDATE_TYPE_MED was not called since new pipe context and current context are the same. Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Refactor use_lut() from dce110 to dceLeo (Sunpeng) Li2017-09-261-15/+2
| | | | | | | | | | | use_lut() checks if the input surface's pixel format is compatible with a 256 entry LUT. This function can be used across different versions and not just dce11. Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: make dc_get_validate_context re-entrantDmytro Laktyushkin2017-09-261-10/+12
| | | | | | | Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: dce 8 - 12 mem_input refactor to new styleDmytro Laktyushkin2017-09-266-759/+81
| | | | | | | Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: fix mpo blanking out on one of planes being set not visibleDmytro Laktyushkin2017-09-262-6/+7
| | | | | | | Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Move output transfer function to stream updatesAmy Zhang2017-09-261-1/+0
| | | | | | | Signed-off-by: Amy Zhang <Amy.Zhang@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: switch to using calc_clk and cur_clk for dcn bw settingDmytro Laktyushkin2017-09-261-18/+32
| | | | | | | Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: refactor bw related variable structure in val_ctxDmytro Laktyushkin2017-09-266-92/+90
| | | | | | | Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/display: Enable DCN in DCAlex Deucher2017-09-261-0/+29
| | | | | | | Enable DCN in DC. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Add function to set dither optionDing Wang2017-09-262-51/+1
| | | | | | | Signed-off-by: Ding Wang <Ding.Wang@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: decouple resource_pool from resource_contextTony Cheng2017-09-262-33/+34
| | | | | | | | | | to avoid null access in case res_ctx is used to access res_pool before it's fully constructed also make it clear which function has dependency on resource_pool Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: FreeSync Auto Sweep SupportEric Cook2017-09-264-58/+48
| | | | | | | | | Implement core support to allow for FreeSync Auto Sweep to work Signed-off-by: Eric Cook <Eric.Cook@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: dce80, 100, 110 and 112 to dce ipp refactorDmytro Laktyushkin2017-09-266-588/+31
| | | | | | | Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: dce120 to dce ipp refactorDmytro Laktyushkin2017-09-262-4/+2
| | | | | | | Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: PSR RefactorSylvia Tsai2017-09-262-17/+17
| | | | | | | | | | - Refacotr PSR to follow correct module pattern - fix eDP only working on sink index 0. Signed-off-by: Sylvia Tsai <sylvia.tsai@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: improve cursor programming reliabilityDmytro Laktyushkin2017-09-262-4/+2
| | | | | | | | | | | This change will cache cursor attributes and reprogram them when enabling cursor after power gating if the attributes were not yet reprogrammed Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Make sure v_total_min and max not less than v_total.Yongqiang Sun2017-09-261-2/+2
| | | | | | | Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: set correct v_total_min and v_total_max for dce.Yongqiang Sun2017-09-261-2/+2
| | | | | | | Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: remove unnecessary allocation for regamma_params inside oppDmytro Laktyushkin2017-09-262-7/+3
| | | | | | Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
OpenPOWER on IntegriCloud