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* gpu/drm/amdgpu: Fix build when CONFIG_DEBUG_FS is not setAlexander Kuleshov2015-06-291-0/+6
| | | | | | | | | | | | | | If the CONFIG_DEBUG_FS is not selected, compilation of the drivers/gpu/drm/amd/amdgpu/amdgpu_device.c provides two warnings that amdgpu_debugfs_regs_init and amdgpu_debugfs_regs_cleanup are used but never defined. And as result: ERROR: "amdgpu_debugfs_regs_cleanup" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! ERROR: "amdgpu_debugfs_regs_init" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! ^ Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alexander Kuleshov <kuleshovmail@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: disable enable_nb_ps_policy temporarilySonny Jiang2015-06-291-1/+1
| | | | | | | Fixes a hang on resume. Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: correct define SMU_EnabledFeatureScoreboard_SclkDpmOnSonny Jiang2015-06-291-1/+1
| | | | | Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: allocate ip_block_enabled memory in common codeAlex Deucher2015-06-293-9/+3
| | | | | | | | Remove duplication across asic families and make it symmetric with the freeing of the code in amdgpu_device.c Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: remove unnecessary check before kfreeManinder Singh2015-06-291-2/+1
| | | | | | | | | kfree(NULL) is safe and this check is probably not required Signed-off-by: Maninder Singh <maninder1.s@samsung.com> Reviewed-by: Vaneet Narang <v.narang@samsung.com> Reviewed-by: Christian Konig <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: use kzalloc for allocating one thingManinder Singh2015-06-291-1/+1
| | | | | | | | | | Use kzalloc rather than kcalloc(1.. for allocating one thing. Signed-off-by: Maninder Singh <maninder1.s@samsung.com> Reviewed-by: Vaneet Narang <v.narang@samsung.com> Reviewed-by: Christian Konig <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add chunk id validity checkChristian König2015-06-291-3/+11
| | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: fix crash on invalid CS IOCTLChristian König2015-06-291-2/+3
| | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: reset wptr at cp compute resume (v2)Sonny Jiang2015-06-291-0/+6
| | | | | | | | | This patch is to resolve compute hang at resume time. v2: (agd5f) squash in second fix Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* drm/amdgpu: check VCE feedback and bitstream indexChristian König2015-06-291-8/+16
| | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com>
* drm/amdgpu: make VCE handle check more strictChristian König2015-06-291-16/+48
| | | | | | | Port of radeon commit 29c63fe22a17c64e54016040cd882481bd45ee5a. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com>
* drm/amdgpu: check VCE relocation buffer rangeChristian König2015-06-293-29/+92
| | | | | | | port of radeon commit 2fc5703abda201f138faf63bdca743d04dbf4b1a. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com>
* drm/amdgpu: silence invalid error messageChristian König2015-06-291-1/+1
| | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com>
* drm/amdgpu: fix wrong typemonk.liu2015-06-291-1/+2
| | | | | Signed-off-by: monk.liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* drm/amdgpu: print the bo_list in the CS trace point as wellChristian König2015-06-291-2/+4
| | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <aleander.deucher@amd.com>
* drm/amdgpu: add amdgpu_bo_list_set trace pointChristian König2015-06-292-0/+18
| | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <aleander.deucher@amd.com>
* drm/amdgpu: add BO map/unmap trace pointChristian König2015-06-292-0/+52
| | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <aleander.deucher@amd.com>
* drm/amdgpu: simplify fence debugfs output a bitChristian König2015-06-291-2/+3
| | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <aleander.deucher@amd.com>
* drm/amdgpu: Configure doorbell to maximum slotsBen Goz2015-06-291-1/+1
| | | | | | Signed-off-by: Ben Goz <ben.goz@amd.com> Acked-by: Oded Gabbay <oded.gabbay@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Initialize compute sdma and memory from kgdBen Goz2015-06-294-0/+123
| | | | | | | | | v2: add missing MTYPE_NONCACHED enum Signed-off-by: Ben Goz <ben.goz@amd.com> Acked-by: Oded Gabbay <oded.gabbay@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: fix hpd range check in dce_v8_0_hpd_irq()Alex Deucher2015-06-291-1/+1
| | | | | | | Spotted by Dan Carpenter. This is a slight variant of his fix. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: fix a amdgpu_dpm=0 bugSonny Jiang2015-06-101-3/+5
| | | | | Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: don't enable/disable display twice on suspend/resumeAlex Deucher2015-06-103-54/+0
| | | | | | | | | We were doing it in the common code and in the IP specific code. Remove the IP specific code. The common code handles the ordering properly. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: fix UVD/VCE VM emulationChristian König2015-06-101-3/+15
| | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: enable vce powergatingSonny Jiang2015-06-104-14/+148
| | | | | | | | | Enable VCE dpm and powergating. VCE dpm dynamically scales the VCE clocks on demand. Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* drm/amdgpu/iceland: don't call smu_init on resumeAlex Deucher2015-06-101-6/+19
| | | | | | | | | | | | smu_init allocates buffers and initializes them. It does not touch the hw. There is no need to do it again on resume. It should really be part of sw_init (and smu_fini should be part of sw_fini), but we need the firmware sizes from the other IPs for firmware loading so we have to wait until sw init is done for all other IPs. Reviewed-by: Sonny Jiang <Sonny.Jiang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/tonga: don't call smu_init on resumeAlex Deucher2015-06-101-6/+19
| | | | | | | | | | | | smu_init allocates buffers and initializes them. It does not touch the hw. There is no need to do it again on resume. It should really be part of sw_init (and smu_fini should be part of sw_fini), but we need the firmware sizes from the other IPs for firmware loading so we have to wait until sw init is done for all other IPs. Reviewed-by: Sonny Jiang <Sonny.Jiang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/cz: don't call smu_init on resumeAlex Deucher2015-06-101-7/+8
| | | | | | | | | | | | smu_init allocates buffers and initializes them. It does not touch the hw. There is no need to do it again on resume. It should really be part of sw_init (and smu_fini should be part of sw_fini), but we need the firmware sizes from the other IPs for firmware loading so we have to wait until sw init is done for all other IPs. Reviewed-by: Sonny Jiang <Sonny.Jiang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: update to latest gfx8 golden register settingsAlex Deucher2015-06-101-0/+7
| | | | | Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: whitespace cleanup in gmc8 golden regsAlex Deucher2015-06-101-1/+1
| | | | | Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/admgpu: move XDMA golden registers to dce codeAlex Deucher2015-06-103-4/+18
| | | | | | | Already moved other display registers. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: fix the build on big endianAlex Deucher2015-06-102-3/+5
| | | | | | | | | Some leftover copy and pastes from radeon that never got updated. Reviewed-by: Christian König <christian.koenig@amd.com> Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: remove the VI hardware semaphore in ring syncDavid Zhang2015-06-101-5/+4
| | | | | | Signed-off-by: David Zhang <david1.zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* drm/amdgpu: set the gfx config properly for all CZ variants (v2)Alex Deucher2015-06-081-2/+36
| | | | | | | | | | Need to adjust the number of CUs and RBs. v2: get proper values Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: also print the pci revision when printing the pci idsAlex Deucher2015-06-081-3/+3
| | | | | | | | | The driver makes use of this information so print if to aid in debugging. Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: cleanup VA IOCTLChristian König2015-06-081-43/+21
| | | | | | | Remove the unnecessary returned status and make the IOCTL write only. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: fix saddr handling in amdgpu_vm_bo_unmapChristian König2015-06-081-0/+2
| | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: fix amdgpu_vm_bo_mapChristian König2015-06-081-0/+2
| | | | | | | | We need to reset the bo_va address, otherwise new mappings wouldn't be updated in the page table. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: disable user fence interrupt (v2)Chunming Zhou2015-06-0513-26/+46
| | | | | | | | | | amdgpu submits both kernel and user fences, but just need one interrupt, disable user fence interrupt and don't effect user fence. v2: fix merge error Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: fix user ptr race conditionChristian König2015-06-052-1/+1
| | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: monk liu <monk.liu@amd.com>
* drm/amdgpu: add zero timeout check in amdgpu_fence_wait_seq_timeoutJack Xiao2015-06-051-0/+4
| | | | | Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
* drm/amdgpu: only support IBs in the buffer list (v2)Marek Olšák2015-06-032-72/+24
| | | | | | | | | | amdgpu_cs_find_mapping doesn't work without all buffers being validated, so the TTM validation must be done first. v2: only use amdgpu_cs_find_mapping for UVD/VCE VM emulation Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* drm/amdgpu: add vram_type and vram_bit_width for interface query (v2)Ken Wang2015-06-037-27/+76
| | | | | | | | | | | Track the type of vram on the board and provide a query for it. User mode drivers and tools want this information for determining bandwidth information and form informational purposes. v2: fix build when CI support is not enabled Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
* drm/amdgpu: add ib_size/start_alignment interface queryKen Wang2015-06-031-0/+14
| | | | | | | | Query the IB alignment requirements from the kernel rather than hardcoding them in the user mode drivers. Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
* drm/amdgpu: add me/ce/pfp_feature_version interface queryKen Wang2015-06-034-3/+12
| | | | | | | | Provide this information to usermode drivers. We were previously missing this info. Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
* drm/amdgpu add ce_ram_size for interface queryKen Wang2015-06-034-0/+7
| | | | | | | | | Add a query for the CE ram size. User mode drivers will want to use this to determine how much size of the cache on the CE. Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewd-by: Jammy Zhou <Jammy.Zhou@amd.com>
* drm/amdgpu add max_memory_clock for interface query (v2)Ken Wang2015-06-031-2/+6
| | | | | | | | | Add a query for the max memory clock. v2: handle the dpm enabled case properly Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewd-by: Jammy Zhou <Jammy.Zhou@amd.com>
* drm/amdgpu: add hdp flush for gfx8 compute ringmonk.liu2015-06-031-0/+1
| | | | | | | | We had forgotten to register the callback. Signed-off-by: monk.liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: jammy zhou <jammy.zhou@amd.com>
* drm/amdgpu: fix no hdp flush for compute ringmonk.liu2015-06-031-1/+3
| | | | | | | No pfp on compute. Signed-off-by: monk.liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* drm/amdgpu: add HEVC/H.265 UVD supportChristian König2015-06-031-0/+8
| | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
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