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* drm/amdgpu: deal with foreign fences in amdgpu_syncChristian König2015-08-175-29/+45
| | | | | | | | This also requires some error handling from the callers of that function. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
* drm/amdgpu: cleanup context structure v2Alex Deucher2015-08-172-49/+29
| | | | | | | | | | | | | | | | | The comment is misleading and incorrect, remove it. Printing the id is completely meaningless and this practice can cause a race conditions on command submission. The flags and hangs fields are completely unused. Give all fields a common indentation. v2: remove fpriv reference and unused flags as well, fix debug message. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
* drm/amdgpu: add cgs_interface for pg and cgrezhu2015-08-171-1/+46
| | | | | | | v3: check whether ip_blocks is enable v2: add break in the for loop. Signed-off-by: Rex zhu <rezhu@amd.com>
* drm/amdgpu: add cgs_get_firmware_info interface v2Jammy Zhou2015-08-171-1/+121
| | | | | | | | | | | | This new interface can be used by IP components to retrieve the firmware information from the core driver. v2: fix one typo Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Rex Zhu <Rex.Zhou@amd.com> Signed-off-by: Young Yang <Young.Yang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: implement cgs gpu memory callbacksChunming Zhou2015-08-171-12/+226
| | | | | | | | | This implements the cgs interface for allocating GPU memory. Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add atom interfaces for CGSChunming Zhou2015-08-171-6/+22
| | | | | | | | | This implements the interface for atombios command and data table access. Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Implement irq interfaces for CGSAlex Deucher2015-08-175-6/+84
| | | | | | | | This implements the irq src registrar. Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Implement the pciconfig callbacks for CGSChunming Zhou2015-08-171-12/+28
| | | | | | | | This implements the pciconfig register accessors. Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Implement mmio callbacks for CGSChunming Zhou2015-08-171-7/+38
| | | | | | | | This implements the MMIO register accessors. Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd: Add CGS interfacesChunming Zhou2015-08-173-0/+338
| | | | | | | | | | | | | | | | | CGS (Common Graphics Services) is an AMD cross component abstraction layer to designed to better encapsulate specific IP block drivers so different teams can effectively work on differnet IP block drivers independently. It provides a common interface for things like accessing registers, allocating GPU memory, and registering interrupt sources. The plan is to eventually move more and more IP drivers to this interface. The first user is the ACP IP driver. Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: fix one warning messageJammy Zhou2015-08-171-1/+2
| | | | | | | | | | | | | In function 'amdgpu_uvd_cs_pass2': warning: 'min_ctx_size' may be used uninitialized in this function buf_sizes[0x4] = min_ctx_size; ^ note: 'min_ctx_size' was declared here unsigned image_size, tmp, min_dpb_size, num_dpb_buffer, min_ctx_size; ^ Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org
* Merge tag 'v4.2-rc7' into drm-nextDave Airlie2015-08-1715-97/+296
|\ | | | | | | | | | | Linux 4.2-rc7 Backmerge master for i915 fixes
| * Revert "drm/amdgpu: Configure doorbell to maximum slots"Alex Deucher2015-08-121-1/+1
| | | | | | | | | | This reverts commit 78ad5cdd21f0d614983fc397338944e797ec70b9. This commit breaks dpm and suspend/resume on CZ.
| * drm/amdgpu: add context buffer size check for HEVCBoyuan Zhang2015-08-121-3/+14
| | | | | | | | | | Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
| * drm/amdgpu: set fw_version and feature_version for smu fw loadingJammy Zhou2015-08-053-21/+30
| | | | | | | | | | | | | | | | The fw_version and feature_verion should be set correctly when the firmwares are loaded by SMU on Tonga/Carrzio/Iceland Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
| * drm/amdgpu: add feature version for SDMA ucodeJammy Zhou2015-08-055-1/+5
| | | | | | | | | | Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
| * drm/amdgpu: add feature version for RLC and MEC v2Jammy Zhou2015-08-054-5/+21
| | | | | | | | | | | | | | | | | | Expose feature version to user space for RLC/MEC/MEC2 ucode as well v2: fix coding style Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
| * drm/amdgpu: increment queue when iterating on this variable.Nicolas Iooss2015-08-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gfx_v7_0_print_status contains a for loop on variable queue which does not update this variable between each iteration. This is bug is reported by clang while building allmodconfig LLVMLinux on x86_64: drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:5126:19: error: variable 'queue' used in loop condition not modified in loop body [-Werror,-Wloop-analysis] for (queue = 0; queue < 8; i++) { ^~~~~ Fix this by incrementing variable queue instead of i in this loop. Signed-off-by: Nicolas Iooss <nicolas.iooss_linux@m4x.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: fix rb setting for CZAlex Deucher2015-08-051-4/+1
| | | | | | | | | | | | | | | | | | Always set num_rbs to 2 for CZ. The 1 RB parts are often harvest configs. The will get sorted out in mesa when we program PA_SC_RASTER_CONFIG[_1]. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: add new parameter to seperate map and unmapmonk.liu2015-07-291-3/+5
| | | | | | | | | | Signed-off-by: monk.liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
| * drm/amdgpu: hdp_flush is not needed for inside IBmonk.liu2015-07-291-8/+8
| | | | | | | | | | | | | | | | hdp flush is not needed for IBs that dispatched from kernel inside because there is no video memory host access Signed-off-by: monk.liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
| * drm/amdgpu: different emit_ib for gfx and computemonk.liu2015-07-292-22/+71
| | | | | | | | | | | | | | | | compute ring didn't use const engine byfar, so ignore CE things in compute routine Signed-off-by: monk.liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
| * drm/amdgpu: information leak in amdgpu_info_ioctl()Dan Carpenter2015-07-291-1/+1
| | | | | | | | | | | | | | | | | | | | We recently changed the drm_amdgpu_info_device struct so now there is a 4 byte hole at the end. We need to initialize it so we don't disclose secret information from the stack. Fixes: fa92754e9c47 ('drm/amdgpu: add VCE harvesting instance query') Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: clean up init sequence for failuresAlex Deucher2015-07-293-19/+31
| | | | | | | | | | | | | | | | | | | | If we fail during device init, record what state each block is in so that we can tear down clearly. Fixes various problems on device init failure. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu/cz/dpm: properly report UVD and VCE clock levelsAlex Deucher2015-07-231-16/+45
| | | | | | | | | | | | | | VCE, UVD DPM work similarly to SCLK DPM. Report the current clock levels for UVD and VCE via debugfs. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu/cz: implement voltage validation properlyAlex Deucher2015-07-231-7/+16
| | | | | | | | | | | | | | | | CZ uses a different set of registers compared to previous asics and supports separate NB and GFX planes. Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: add VCE harvesting instance queryLeo Liu2015-07-231-0/+1
| | | | | | | | | | | | Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
| * drm/amdgpu: implement VCE 3.0 harvesting support (v4)Alex Deucher2015-07-232-0/+52
| | | | | | | | | | | | | | | | | | | | | | | | For boards with bad VCE blocks, only configure the working block. v2: use the harvest info for pipe setup v3: fix mask check as noted by Leo v4: add dGPU support Reviewed-by: Christian König <christian.koenig@amd.com> (v2) Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu/dce10: Re-set VBLANK interrupt state when enabling a CRTCMichel Dänzer2015-07-231-0/+4
| | | | | | | | | | | | | | | | This doesn't seem strictly necessary with Tonga right now, but that might change with future power management enhancements. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
| * drm/amdgpu/dce11: Re-set VBLANK interrupt state when enabling a CRTCMichel Dänzer2015-07-231-0/+4
| | | | | | | | | | | | | | | | | | | | Something (ATOM BIOS?) seems to be clobbering the LB_INTERRUPT_MASK register while the CRTC is off, which caused e.g. glxgears or gnome-shell to hang after a modeset. Reviewed-and-Tested-by: Alex Deucher <alexander.deucher@amd.com> Tested-by: Sonny Jiang <sonny.jiang@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
* | Merge tag 'drm-amdkfd-next-fixes-2015-08-05' of ↵Dave Airlie2015-08-141-1/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://people.freedesktop.org/~gabbayo/linux into drm-next Two small bug fixes for the code you pulled for 4.3: - Used a SHIFT define instead of a MASK define to check if a bit is turned on when destroying hqd. Luckily, this is in gfx7 interface file with amdgpu, which was used only for bring-up purposes of amdgpu, so no real effect on a running system - Used a logical AND instead of a bitwise AND operator, when initializing sdma virtual memory when using SDMA queues * tag 'drm-amdkfd-next-fixes-2015-08-05' of git://people.freedesktop.org/~gabbayo/linux: drm/amdkfd: fix bug when initializing sdma vm drm/amdgpu: fix bug when amdkfd destroys hqd
| * | drm/amdgpu: fix bug when amdkfd destroys hqdOded Gabbay2015-07-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The wrong define was used to check if the hqd is still active v2: Don't use SHIFT as the MASK is already shifted Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amdgpu: Use new drm_fb_helper functionsArchit Taneja2015-08-061-31/+14
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the newly created wrapper drm_fb_helper functions instead of calling core fbdev functions directly. They also simplify the fb_info creation. v3: - Don't touch remove_conflicting_framebuffers v2: - Fixed PTR_ERR issue mentioned by kbuild bot Cc: Fengguang Wu <fengguang.wu@intel.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Oded Gabbay <oded.gabbay@gmail.com> Cc: "Christian König" <christian.koenig@amd.com> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | drm/amdgpu: Add amdgpu <--> amdkfd gfx8 interfaceBen Goz2015-07-205-1/+554
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the gfx8 interface file between amdgpu and amdkfd. This interface file is currently in use when running on a Carrizo-based system. The interface itself is represented by a pointer to struct kfd_dev. The pointer is located inside amdgpu_device structure. All the register accesses that amdkfd need are done using this interface. This allows us to avoid direct register accesses in amdkfd proper, while also allows us to avoid locking between amdkfd and amdgpu. The single exception is the doorbells that are used in both of the drivers. However, because they are located in separate pci bar pages, the danger of sharing registers between the drivers is minimal. Having said that, we are planning to move the doorbells as well to amdgpu. Signed-off-by: Ben Goz <ben.goz@amd.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
* | drm/amdgpu: add amdgpu <--> amdkfd gfx7 interfaceOded Gabbay2015-07-204-1/+680
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the gfx7 interface file between amdgpu and amdkfd. This interface file mirrors (some) of the functions in radeon_kfd.c (the interface file between radeon and amdkfd). The gfx7 interface is used when it is run on a Kaveri-based system. This interface file was used for bring-up of amdkfd on amdgpu and for debugging purposes. For users who would like to run HSA on Kaveri, please use the radeon graphic driver. Note: CONFIG_DRM_AMDGPU_CIK must be selected for amdgpu to handle Kaveri. v2: removed MTYPE_NONCACHED enum definition as it is defined in another patch Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
* | drm/amdgpu: Add H/W agnostic amdgpu <--> amdkfd interfaceOded Gabbay2015-07-208-1/+362
|/ | | | | | | | | | | | | | | | | | | | | | | | This patch adds an interface file between amdgpu and amdkfd. This interface file is H/W agnostic, thus containing functions that operate the same for any AMD APU/GPU H/W generation. The functions in this interface mirror (some) of the functions in radeon_kfd.c (the radeon<-->amdkfd interface file). The main functions are: - amdgpu_amdkfd_init - initialize the amdkfd module - amdgpu_amdkfd_load_interface - load the H/W interface according to the currently probed device - amdgpu_amdkfd_device_probe - probe the device in amdkfd - amdgpu_amdkfd_device_init - initialize the device in amdkfd - amdgpu_amdkfd_interrupt - call the ISR of amdkfd - amdgpu_amdkfd_suspend - suspend callback from amdgpu - amdgpu_amdkfd_resume - resume callback from amdgpu This patch also modifies the relevant amdgpu files, to use this new interface. Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
* drm/amdgpu/dce8: Re-set VBLANK interrupt state when enabling a CRTCMichel Dänzer2015-07-161-0/+4
| | | | | | | | | Something (ATOM BIOS?) seems to be clobbering the LB_INTERRUPT_MASK register while the CRTC is off, which caused e.g. glxgears or gnome-shell to hang after a modeset. Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
* drm/amdgpu/cz: silence some dpm debug outputAlex Deucher2015-07-161-3/+3
| | | | | Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/cz: store the forced dpm levelAlex Deucher2015-07-161-0/+2
| | | | | | | So the selected forced level shows up properly in sysfs. Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/cz: unforce dpm levels before forcing to low/highAlex Deucher2015-07-161-1/+7
| | | | | | | | | This is necessary to properly reset the min/max limits before clamping them otherwise we may get improper clamping depending on what what was the last forced level. Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: remove bogus check in gfx8 rb setupAlex Deucher2015-07-161-4/+1
| | | | | | | Always respect the harvest configuration as is. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: set proper index/data pair for smc regs on CZ (v2)Alex Deucher2015-07-161-2/+33
| | | | | | | v2: squash in later fix Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: disable the IP module if early_init returns -ENOENT (v2)Alex Deucher2015-07-161-2/+7
| | | | | | | | | | If we run into a part with a harvest configuration where the entire IP block is unusable, just disable the IP block. v2: fix logic as noted by Christian Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: stop context leak in the error pathChristian König2015-07-161-2/+6
| | | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
* drm/amdgpu: validate the context id in the dependenciesChristian König2015-07-161-1/+10
| | | | | | | | Just to make sure userspace don't send nonsense to the kernel. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
* drm/amdgpu: fix timeout calculationChristian König2015-07-091-1/+1
| | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Handle irqs only based on irq ring, not irq status regs.Mario Kleiner2015-07-083-24/+42
| | | | | | | | | | | | | | | This is a translation of the patch ... "drm/radeon: Handle irqs only based on irq ring, not irq status regs." ... for the vblank irq handling, to fix the same problem described in that patch on the new driver. Only compile tested due to lack of suitable hw. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> CC: Michel Dänzer <michel.daenzer@amd.com> CC: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add flag to delay VM updatesChristian König2015-06-291-3/+3
| | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add optional dependencies to the CS IOCTL v2Christian König2015-06-291-1/+58
| | | | | | | v2: remove unrelated whitespace change, fix C comment Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: recreate fence from user seqChristian König2015-06-293-9/+44
| | | | | | | | And use common fence infrastructure for the wait. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
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