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* | drm/amdgpu: Don't touch PG&CG for SRIOV MMXiangliang Yu2017-03-292-0/+12
| | | | | | | | | | | | | | | | | | | | For SRIOV, MM don't need to care about PG & CG, skip it. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu/vega10:fix DOORBELL64 schemeMonk Liu2017-03-291-9/+18
| | | | | | | | | | | | | | | | Signed-off-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu:vega10: enable virtual display if set via module optionAlex Deucher2017-03-291-1/+1
| | | | | | | | | | | | | | | | Enable virtual displays if the user has enabled them via the kernel command line. Useful in virtual or headless environments. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu/soc15: enable virtual dce for vfXiangliang Yu2017-03-291-0/+3
| | | | | | | | | | | | | | | | | | | | VF need virtual dce, enable it if device is vf. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <Monk.Liu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu/soc15: init virt ops for vfXiangliang Yu2017-03-291-0/+4
| | | | | | | | | | | | | | | | | | | | | | If gpu device is vf, set virt ops so that guest can talk with GPU hypervisor. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <Monk.Liu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu/virt: impl mailbox for aiXiangliang Yu2017-03-293-1/+255
| | | | | | | | | | | | | | | | | | | | | | Implement mailbox protocol for AI so that guest vf can communicate with GPU hypervisor. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <Monk.Liu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu/dce_virtual: bypass DPM for vfXiangliang Yu2017-03-291-0/+3
| | | | | | | | | | | | | | | | | | | | | | If enable DPM for VF, always get lot of warn_slow_patch_null in dmesg and vf doesn't support DPM. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu/gmc9: no need use kiq in vega10 tlb flushXiangliang Yu2017-03-291-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | two reasons: 1. there is a spinlock around; 2. vm register is pf/vf copy, vf can access via mmio safely. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu/soc15: bypass PSP for VFXiangliang Yu2017-03-291-1/+2
| | | | | | | | | | | | | | | | | | | | Bypass PSP block for VF device. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu/sdma4:re-org SDMA initial steps for sriovMonk Liu2017-03-291-0/+20
| | | | | | | | | | | | | | | | | | | | Rework sdma init to support SR-IOV. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu:bypass RLC init for SRIOVMonk Liu2017-03-291-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | one issue unresolved for RLC: rlc will go wrong completely if there is a soft_reset before RLC ucode loading. to workaround above issue, we can totally ignore RLC in guest driver side due to there was already full initialization on RLC side by GIM Signed-off-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu/gfx9: impl gfx9 meta data emitXiangliang Yu2017-03-291-0/+47
| | | | | | | | | | | | | | | | | | | | Insert ce meta prior to cntx_cntl and de follow it. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu:impl gfx9 cond_exec (v2)Monk Liu2017-03-291-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | it is needed for virtualization v2: squash in wptr value fix Signed-off-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: init kiq and kcq for vega10Xiangliang Yu2017-03-292-1/+465
| | | | | | | | | | | | | | | | | | | | Init kiq via cpu mmio and init kcq through kiq. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu/gfx9: fullfill kiq irq funcs (v2)Xiangliang Yu2017-03-291-0/+79
| | | | | | | | | | | | | | | | | | | | | | | | Fullfill KIQ irq funcs to support kiq interrupt. v2: squash in adding interrupt src Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu/gfx9: fullfill kiq funcs (v2)Xiangliang Yu2017-03-291-0/+80
| | | | | | | | | | | | | | | | | | | | | | | | Fullfill kiq funcs to support kiq ring. v2: squash in 64bit ptr fix Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: add kiq ring for gfx9Xiangliang Yu2017-03-291-0/+88
| | | | | | | | | | | | | | | | | | | | Allocate KIQ ring in sw_init for gfx9. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: impl sriov detection for vega10Xiangliang Yu2017-03-293-0/+21
| | | | | | | | | | | | | | | | | | | | | | Read vega10 hw register to detect if sriov is enabled, and call it before IP blocks setting. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu/gfx9: programing wptr_poll_addr registerMonk Liu2017-03-291-1/+5
| | | | | | | | | | | | | | | | | | | | Required for SR-IOV. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: add Vega10 Device IDs (v2)Junwei Zhang2017-03-291-1/+8
| | | | | | | | | | | | | | | | v2: add AMD_EXP_HW_SUPPORT for now Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: Set the IP blocks for vega10Ken Wang2017-03-291-0/+8
| | | | | | | | | | | | Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: soc15 enable (v3)Ken Wang2017-03-293-1/+810
| | | | | | | | | | | | | | | | | | | | | | | | Add soc15 support and enable all the IPs for vega10. v2: squash in xclk fix v3: disable HDP MGCG Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amd/powerplay: add Vega10 powerplay support (v5)Eric Huang2017-03-291-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Adds power management support for vega10. v2: squash in fan control and led config fixes from Rex v3: squash in dead code removal and socvid fixes from Rex v4: squash in dpm force level fix from Rex v5: squash in latest headless, gpu load fixes from Rex Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: add SMC firmware into global ucode list for psp loadingHuang Rui2017-03-291-0/+11
| | | | | | | | | | | | | | Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: add psp firmware info into info query and debugfsHuang Rui2017-03-291-0/+25
| | | | | | | | | | | | | | Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: add PSP driver for vega10 (v2)Huang Rui2017-03-298-0/+1449
| | | | | | | | | | | | | | | | | | | | | | PSP is responsible for firmware loading on SOC-15 asics. v2: fix memory leak (Ken) Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: add initial vce 4.0 support for vega10Leo Liu2017-03-294-1/+932
| | | | | | | | | | | | | | Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: add initial uvd 7.0 support for vega10Leo Liu2017-03-294-12/+1615
| | | | | | | | | | | | | | Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: add vega10 interrupt handlerKen Wang2017-03-293-1/+456
| | | | | | | | | | | | | | Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: implement GFX 9.0 support (v2)Ken Wang2017-03-294-1/+3331
| | | | | | | | | | | | | | | | | | | | | | Add support for gfx v9.0. v2: update golden settings from Ken Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: add SDMA v4.0 implementation (v2)Ken Wang2017-03-293-1/+1585
| | | | | | | | | | | | | | | | v2: fix Makefile Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: Add GMC 9.0 support (v2)Alex Xie2017-03-299-7/+2011
| | | | | | | | | | | | | | | | | | | | | | On SOC-15 parts, the GMC (Graphics Memory Controller) consists of two hubs: GFX (graphics and compute) and MM (sdma, uvd, vce). v2: drop sdma from Makefile, fix duplicate return statement. Signed-off-by: Alex Xie <AlexBin.Xie@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: add NBIO 6.1 driverJunwei Zhang2017-03-293-1/+286
| | | | | | | | | | | | | | | | | | | | | | | | This handles nbio 6.1 specific implementations which are used by various other IPs. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: handle PTE MTYPE in amdgpu_vm_bo_split_mappingAlex Xie2017-03-291-0/+3
| | | | | | | | | | | | Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Xie <AlexBin.Xie@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: handle PTE EXEC in amdgpu_vm_bo_split_mappingAlex Xie2017-03-291-0/+3
| | | | | | | | | | | | Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Xie <AlexBin.Xie@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: gart fixes for vega10Alex Deucher2017-03-291-1/+2
| | | | | | | | | | | | | | | | Flags need to be 0 to be considered invalid. Reviewed-by: Christian König <christian.koenig@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: add psp firmware header infoHuang Rui2017-03-291-0/+9
| | | | | | | | | | | | | | | | Defines the header info for the psp firmware. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: rework common ucode handling for vega10Huang Rui2017-03-293-23/+53
| | | | | | | | | | | | | | | | | | Handle ucode differences in vega10. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: don't validate TILE_SPLIT on GFX9Marek Olšák2017-03-291-1/+4
| | | | | | | | | | | | | | Signed-off-by: Marek Olšák <marek.olsak@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: add NGG parametersAlex Deucher2017-03-293-0/+57
| | | | | | | | | | | | | | | | NGG (Next Generation Graphics) is a new feature in GFX9.0. This adds the relevant parameters. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: add PTE defines for MTYPEAlex Deucher2017-03-291-0/+4
| | | | | | | | | | | | New on SOC-15 asics. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: add IV trace pointChristian König2017-03-292-0/+40
| | | | | | | | | | | | | | | | | | This allows us to grab IVs without spamming the log. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: update IH IV ring entry for soc-15Alex Deucher2017-03-291-1/+4
| | | | | | | | | | | | | | Reflect the new format on soc-15 asics. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: use atomfirmware interfaces for scratch reg save/restoreAlex Deucher2017-03-291-4/+16
| | | | | | | | | | | | | | If the board is atomfirmware based. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: Add MTYPE flags to GPU VM IOCTL interfaceAlex Xie2017-03-291-1/+1
| | | | | | | | | | | | | | Signed-off-by: Alex Xie <AlexBin.Xie@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: add 64bit doorbell assignmentsKen Wang2017-03-291-0/+68
| | | | | | | | | | | | Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: gb_addr_config structAndrey Grodzovsky2017-03-291-0/+10
| | | | | | | | | | | | | | Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: use new flag to handle different firmware loading methodHuang Rui2017-03-2910-20/+90
| | | | | | | | | | | | | | | | | | | | | | | | This patch introduces a new flag named "amdgpu_firmware_load_type" to handle different firmware loading method. Since Vega10, there are three ways to load firmware. It would be better to use a flag and a fw_load_type kernel parameter to configure it. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: add clinetid definition for vega10ken2017-03-291-2/+40
| | | | | | | | | | | | Signed-off-by: ken <Qingqing.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: add vega10 chip nameKen Wang2017-03-291-0/+1
| | | | | | | | | | | | | | Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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