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| * drm/amdgpu: fix to clear ASIC INIT COMPLETE bit on resuming phaseHuang Rui2017-04-282-0/+13
| | | | | | | | | | | | | | | | | | | | ASIC_INIT_COMPLETE bit must be cleared during S3 resuming phase, because VBIOS will check the bit to decide if execute ASIC_Init posting via kernel driver. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: do not free fence buf when driver probes.Huang Rui2017-04-281-2/+4
| | | | | | | | | | | | | | | | Fence buf needs to be used on suspend/resume phase. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu:fix race conditionMonk Liu2017-04-281-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | sequence is protected by spinlock so don't access sequence in paramter seq when invoking this function. ~0 means to get the latest sequence number and 0 means none to get. Change-Id: Ib7a03f3cf5594deeb4ad333cc59b47a6bddfd1ad Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/amdgpu: Port gfx9 driver over to new read/write macrosTom St Denis2017-04-281-203/+203
| | | | | | | | | | | | | | Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/amdgpu: Introduce new read/write macros for SOC15Tom St Denis2017-04-282-4/+19
| | | | | | | | | | | | Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: add hw_start and non-psp firmware loading into resumeHuang Rui2017-04-281-2/+14
| | | | | | | | | | | | | | | | Rework in order to properly support suspend. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: split psp ring init functionHuang Rui2017-04-284-44/+87
| | | | | | | | | | | | | | | | Rework in order to properly support suspend. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: split psp asd functionHuang Rui2017-04-282-24/+26
| | | | | | | | | | | | | | | | Rework in order to properly support suspend. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: use private memory to store psp firmware dataHuang Rui2017-04-283-61/+16
| | | | | | | | | | | | | | | | Rework in order to properly support suspend. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: add psp firmware private memoryHuang Rui2017-04-282-4/+25
| | | | | | | | | | | | | | | | Needed for proper suspend support. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: split psp tmr init functionHuang Rui2017-04-281-10/+17
| | | | | | | | | | | | | | | | Rework in order to properly support suspend. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm: use set_memory.h headerLaura Abbott2017-05-081-0/+3
|/ | | | | | | | | | | set_memory_* functions have moved to set_memory.h. Switch to this explicitly. [akpm@linux-foundation.org: track drivers/gpu/drm/i915/i915_gem_gtt.c linux-next changes] Link: http://lkml.kernel.org/r/1488920133-27229-8-git-send-email-labbott@redhat.com Signed-off-by: Laura Abbott <labbott@redhat.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge tag 'drm-misc-next-2017-04-07' of ↵Dave Airlie2017-04-115-5/+10
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://anongit.freedesktop.org/git/drm-misc into drm-next Last drm-misc-next pull req for 4.12 Core changes: - fb_helper checkpatch cleanup and simplified _add_one_connector() (Thierry) - drm_ioctl and drm_sysfs improved/gained documentation (Daniel) - [ABI] Repurpose reserved field in drm_event_vblank for crtc_id (Ander) - Plumb acquire ctx through legacy paths to avoid lock_all and legacy_backoff (Daniel) - Add connector_atomic_check to check conn constraints on modeset (Maarten) - Add drm_of_find_panel_or_bridge to remove boilerplate in drivers (Rob) Driver changes: - meson moved to drm-misc (Neil) - Added support for Amlogic GX SoCs in dw-hdmi (Neil) - Rockchip unbind actually cleans up the things bind initializes (Jeffy) - A couple misc fixes in virtio, dw-hdmi NOTE: this also includes a backmerge of drm-next as well rc5 (we needed vmwgfx as well as the new synopsys media formats) * tag 'drm-misc-next-2017-04-07' of git://anongit.freedesktop.org/git/drm-misc: (77 commits) Revert "drm: Don't allow interruptions when opening debugfs/crc" drm: Only take cursor locks when the cursor plane exists drm/vmwgfx: Fix fbdev emulation using legacy functions drm/rockchip: Shutdown all crtcs when unbinding drm drm/rockchip: Reorder drm bind/unbind sequence drm/rockchip: analogix_dp: Disable clock when unbinding drm/rockchip: vop: Unprepare clocks when unbinding drm/rockchip: vop: Enable pm domain before vop_initial drm/rockchip: cdn-dp: Don't unregister audio dev when unbinding drm/rockchip: cdn-dp: Don't try to release firmware when not loaded drm: bridge: analogix: Destroy connector & encoder when unbinding drm: bridge: analogix: Disable clock when unbinding drm: bridge: analogix: Unregister dp aux when unbinding drm: bridge: analogix: Detach panel when unbinding analogix dp drm: Don't allow interruptions when opening debugfs/crc drm/virtio: don't leak bo on drm_gem_object_init failure drm: bridge: dw-hdmi: fix input format/encoding from plat_data drm: omap: use common OF graph helpers drm: convert drivers to use drm_of_find_panel_or_bridge drm: convert drivers to use of_graph_get_remote_node ...
| * drm: Add acquire ctx to ->gamma_set hookDaniel Vetter2017-04-065-5/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Atomic helpers really want this instead of the hacked-up legacy backoff trick, which unfortunately prevents drivers from using their own private drm_modeset_locks. Aside: There's a few atomic drivers (nv50, vc4, soon vmwgfx) which don't yet use the new atomic color mgmt/gamma table stuff. Would be nice if they could switch over and just hook up drm_atomic_helper_legacy_gamma_set() instead. Cc: Dave Airlie <airlied@redhat.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Ben Skeggs <bskeggs@redhat.com> Cc: Sinclair Yeh <syeh@vmware.com> Cc: Thomas Hellstrom <thellstrom@vmware.com> Cc: Eric Anholt <eric@anholt.net> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Sinclair Yeh <syeh@vmware.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170403083304.9083-13-daniel.vetter@ffwll.ch
* | drm/amdgpu: fix fence memory leak in wait_all_fence V2Chunming Zhou2017-04-071-0/+1
| | | | | | | | | | | | | | | | | | V2: remove **array method, directly fence_put after fence wait. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <chrstian.koenig@amd.com> Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: fix "fix 64bit division"Christian König2017-04-071-0/+1
| | | | | | | | | | | | | | | | | | The offset must be 64bit and add back the accidential dropped line. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: set vm size and block size by individual gmc by default (v3)Junwei Zhang2017-04-078-40/+66
| | | | | | | | | | | | | | | | | | | | | | | | By default, the value is set by individual gmc. if a specific value is input, it overrides the global value for all v2: create helper funcs v3: update gmc9 APU's num_level athough it may be updated in the future. Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: Avoid overflows/divide-by-zero in latency_watermark calculations.Mario Kleiner2017-04-074-64/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At dot clocks > approx. 250 Mhz, some of these calcs will overflow and cause miscalculation of latency watermarks, and for some overflows also divide-by-zero driver crash ("divide error: 0000 [#1] PREEMPT SMP" in "dce_v10_0_latency_watermark+0x12d/0x190"). This zero-divide happened, e.g., on AMD Tonga Pro under DCE-10, on a Displayport panel when trying to set a video mode of 2560x1440 at 165 Hz vrefresh with a dot clock of 635.540 Mhz. Refine calculations to avoid the overflows. Tested for DCE-10 with R9 380 Tonga + ASUS ROG PG279 panel. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* | drm/amdgpu: Make display watermark calculations more accurateMario Kleiner2017-04-074-20/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Avoid big roundoff errors in scanline/hactive durations for high pixel clocks, especially for >= 500 Mhz, and thereby program more accurate display fifo watermarks. Implemented here for DCE 6,8,10,11. Successfully tested on DCE 10 with AMD R9 380 Tonga. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* | drm/amdgpu: Refuse to pin or change acceptable domains of prime BOs to VRAM. ↵Christopher James Halse Rogers2017-04-072-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | (v2) Migration to VRAM will break the sharing, resulting in rendering on the exporting GPU never becoming visible on the importing GPU. v2: Don't pin BOs to GTT. Instead, refuse to migrate them out of GTT. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Christopher James Halse Rogers <christopher.halse.rogers@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: Fail fb creation from imported dma-bufs. (v2)Christopher James Halse Rogers2017-04-071-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | Any use of the framebuffer will migrate it to VRAM, which is not sensible for an imported dma-buf. v2: Use DRM_DEBUG_KMS to prevent userspace accidentally spamming dmesg. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Christopher James Halse Rogers <christopher.halse.rogers@canonical.com> CC: amd-gfx@lists.freedesktop.org Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | Merge branch 'drm-next-4.12' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie2017-04-0741-854/+771
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-next A few more things for 4.12: - ttm and amdgpu support for non-contiguous vram CPU mappings - lots of bug fixes and cleanups for vega10 - misc bug fixes and code cleanups [airlied: fix do_div error on 32-bit arm, not sure it's 100% correct] * 'drm-next-4.12' of git://people.freedesktop.org/~agd5f/linux: (58 commits) drm/amdgpu: use uintptr_t instead of unsigned long to store pointer drm/amdgpu: Avoid using signed integer to store pointer value drm/amdgpu:invoke new implemented AI MB func drm/amdgpu/vega10:timeout set to equal with VI drm/amdgpu:implement the reset MB func for vega10 drm/amdgpu:fix typo for mxgpu_ai drm/amdgpu:no need to involv HDP in KIQ drm/amdgpu:add PSP block only load_type=PSP (v2) drm/amdgpu/smu9: update to latest driver interface drm/amd/amdgpu: cleanup gfx_v9_0_gpu_init() drm/amd/amdgpu: cleanup gfx_v9_0_rlc_reset() drm/amd/amdgpu: cleanup gfx_v9_0_rlc_start() drm/amd/amdgpu: simplify gfx_v9_0_cp_gfx_enable() drm/amd/amdgpu: cleanup gfx_v9_0_kiq_init_register() drm/amd/amdgpu: Drop gfx_v9_0_print_status() drm/amd/amdgpu: cleanup gfx_v9_0_set_gfx_eop_interrupt_state() drm/amd/amdgpu: cleanup gfx_v9_0_set_priv_reg_fault_state() drm/amd/amdgpu: cleanup gfx_v9_0_set_priv_inst_fault_state() drm/amd/amdgpu: cleanup gfx_v9_0_init_queue() drm/amdgpu: Move function amdgpu_has_atpx near other similar functions ...
| * drm/amdgpu: use uintptr_t instead of unsigned long to store pointerAlex Xie2017-04-061-4/+4
| | | | | | | | | | | | Signed-off-by: Alex Xie <AlexBin.Xie@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: Avoid using signed integer to store pointer valueAlex Xie2017-04-063-3/+3
| | | | | | | | | | | | Signed-off-by: Alex Xie <AlexBin.Xie@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu:invoke new implemented AI MB funcMonk Liu2017-04-061-1/+19
| | | | | | | | | | | | | | | | Implement the sr-iov mailbox for soc15 asics. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu/vega10:timeout set to equal with VIMonk Liu2017-04-061-1/+1
| | | | | | | | | | | | Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu:implement the reset MB func for vega10Monk Liu2017-04-062-0/+138
| | | | | | | | | | | | | | | | | | they are lack in the bringup stage, we need them for GPU reset feature. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu:fix typo for mxgpu_aiMonk Liu2017-04-061-2/+2
| | | | | | | | | | | | Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu:no need to involv HDP in KIQMonk Liu2017-04-063-8/+0
| | | | | | | | | | | | | | | | | | 1,KIQ won't touch VRAM so no need to involv HDP flush/invalidate at all. 2,According to CP hw designer KIQ better not use any PM4 package lead to wait behave. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu:add PSP block only load_type=PSP (v2)Monk Liu2017-04-061-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | SRIOV currently only can load ucode directly, and PSP block is not supported by VF temporarily. will remove this restrict and use PSP load all ucode even for SRIOV later v2: squash in check against module parameter Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/amdgpu: cleanup gfx_v9_0_gpu_init()Tom St Denis2017-04-061-3/+1
| | | | | | | | | | | | | | | | Use new WREG32_FIELD15 macro Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/amdgpu: cleanup gfx_v9_0_rlc_reset()Tom St Denis2017-04-061-6/+2
| | | | | | | | | | | | | | | | Use new WREG32_FIELD15 macro Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/amdgpu: cleanup gfx_v9_0_rlc_start()Tom St Denis2017-04-061-3/+1
| | | | | | | | | | | | | | | | Use new WREG32_FIELD15 macro Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/amdgpu: simplify gfx_v9_0_cp_gfx_enable()Tom St Denis2017-04-061-8/+4
| | | | | | | | | | | | Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/amdgpu: cleanup gfx_v9_0_kiq_init_register()Tom St Denis2017-04-061-9/+3
| | | | | | | | | | | | | | | | Use new WREG32_FIELD macro Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/amdgpu: Drop gfx_v9_0_print_status()Tom St Denis2017-04-061-174/+1
| | | | | | | | | | | | | | | | It's not used in gfx 6/7/8 so drop it from gfx 9 as well. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/amdgpu: cleanup gfx_v9_0_set_gfx_eop_interrupt_state()Tom St Denis2017-04-061-12/+3
| | | | | | | | | | | | | | | | Use new WREG32_FIELD15 macro. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/amdgpu: cleanup gfx_v9_0_set_priv_reg_fault_state()Tom St Denis2017-04-061-11/+3
| | | | | | | | | | | | | | | | Use new WREG32_FIELD15 macro. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/amdgpu: cleanup gfx_v9_0_set_priv_inst_fault_state()Tom St Denis2017-04-061-12/+3
| | | | | | | | | | | | | | | | Use new WREG32_FIELD15 macro. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/amdgpu: cleanup gfx_v9_0_init_queue()Tom St Denis2017-04-062-8/+6
| | | | | | | | | | | | | | | | | | Introduce WREG32_FIELD15 macro for SOC15 architectures. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: Move function amdgpu_has_atpx near other similar functionsAlex Xie2017-04-062-6/+2
| | | | | | | | | | | | Signed-off-by: Alex Xie <AlexBin.Xie@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: fix over allocating of IRQ sourcesChristian König2017-04-061-3/+4
| | | | | | | | | | | | | | | | | | We need an array of pointers to IRQ sources, not an array of sources. Signed-off-by: Christian König <christian.koenig@amd.com> Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/amdgpu: Clean up psp reload_quirk()Tom St Denis2017-04-061-8/+4
| | | | | | | | | | | | Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/amdgpu: Fix psp_v3_1 compare sramTom St Denis2017-04-061-1/+1
| | | | | | | | | | | | | | | | Had the wrong sense in the loop Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: cleanup get_invalidate_req v2Christian König2017-04-068-49/+27
| | | | | | | | | | | | | | | | | | | | | | The two hubs are just instances of the same hardware, so the register bits are identical. v2: keep the function pointer Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: fix vm size and block size for VMPT (v5)Zhang, Jerry2017-04-069-35/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | Set reasonable defaults per family. v2: set both of them in gmc v3: move vm size and block size in vm manager v4: squash in warning fix from Alex Xie v5: squash in min() warning fix Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/amdgpu: Fix srbm_indexing in init/inactive hqd codeTom St Denis2017-04-061-0/+5
| | | | | | | | | | | | Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/amdgpu: Clean up gfx_v8_0_mqd_init()Tom St Denis2017-04-061-8/+4
| | | | | | | | | | | | | | | | Clean up a toggle with ?:. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/amdgpu: de-numberify HQD_ACTIVE check.Tom St Denis2017-04-061-2/+2
| | | | | | | | | | | | Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/amdgpu: clean up gfx_v8_0_kiq_init_register()Tom St Denis2017-04-061-9/+3
| | | | | | | | | | | | | | | | Swap read/write pattern for WREG32_FIELD() Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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