Commit message (Collapse) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | clk: mpc85xx: Update the compatible string | Tang Yuantian | 2013-05-30 | 1 | -1/+1 |
| | | | | | | | | | The compatible string of clock is changed from *-2 to *-2.0 on chassis 2. So updated it accordingly. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> [mturquette@linaro.org: improved $SUBJECT line] | ||||
* | clk: add PowerPC corenet clock driver support | Tang Yuantian | 2013-05-28 | 1 | -0/+280 |
This adds the clock driver for Freescale PowerPC corenet series SoCs using common clock infrastructure. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> |