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path: root/drivers/bcma/driver_gpio.c
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* bcma: use chipcommon node from DT for SoC GPIO chipRafał Miłecki2014-09-301-0/+4
| | | | | | | | | This will allow us to define GPIO-attached devices (LEDs, buttons) in the the device tree. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* bcma: gpio: use ChipCommon GPIO IRQ on BCM47XX arch onlyRafał Miłecki2014-09-261-2/+2
| | | | | | | | | GPIOs can be also used on bcm53xx, however this arch requires different implementation of IRQ support. It uses different IRQ number (117) and different masks & acking. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* bcma: gpio: register all 32 GPIOs on BCM53572Rafał Miłecki2014-06-191-0/+1
| | | | | | | | | | I've here a device detected as: bcma: bus0: Found chip with id 0xD144, rev 0x01 and package 0x08 I couldn't find GPIO handling hw button until trying GPIO 20. It seems BCM53572 also has 32 GPIOs. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* bcma: gpio: register 32 GPIOs on BCM5357Rafał Miłecki2014-03-271-1/+8
| | | | | | | | | Some Broadcom boards have more GPIOs available. For example Linksys E3200 home router is based on SoC id 0x5357, package 0x0A and uses GPIO 23 to reset internal USB WiFi (gpio23=wombo_reset). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* bcma: gpio: don't cast u32 to unsigned longRafał Miłecki2014-01-241-2/+2
| | | | | | Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6343/
* bcma: prevent irq handler from firing when registeredHauke Mehrtens2014-01-241-0/+3
| | | | | | | | | | | | | | | | With this patch we prevent the irq from being fired when it is registered. The Hardware fires an IRQ when input signal XOR polarity AND gpio mask is 1. Now we are setting polarity to a vlaue so that is is 0 when we register it. In addition we also set the irq mask register to 0 when the irq handler is initialized, so all gpio irqs are masked and there will be no unexpected irq. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Tested-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6304/
* bcma: gpio: add own IRQ domainRafał Miłecki2014-01-231-2/+132
| | | | | | | | | | | | | | Input GPIO changes can generate interrupts, but we need kind of ACK for them by changing IRQ polarity. This is required to stop hardware from keep generating interrupts and generate another one on the next GPIO state change. This code allows using GPIOs with standard interrupts and add for example GPIO buttons support. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6216/
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller2013-02-081-0/+5
|\ | | | | | | | | | | | | Synchronize with 'net' in order to sort out some l2tp, wireless, and ipv6 GRE fixes that will be built on top of in 'net-next'. Signed-off-by: David S. Miller <davem@davemloft.net>
| * bcma: unregister gpios before unloading bcmaHauke Mehrtens2013-02-041-0/+5
| | | | | | | | | | | | | | | | This patch unregisters the gpio chip before bcma gets unloaded. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Reported-by: Piotr Haber <phaber@broadcom.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* | bcma: add gpio_to_irqHauke Mehrtens2013-01-301-0/+11
|/ | | | | | | | | The old bcm47xx gpio code had support for gpio_to_irq, but the new code did not provide this function, but returned -ENXIO all the time. This patch adds the missing function. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
* bcma: add GPIO driverHauke Mehrtens2012-11-211-0/+98
Register a GPIO driver to access the GPIOs provided by the chip. The GPIOs of the SoC should always start at 0 and the other GPIOs could start at a random position. There is just one SoC in a system and when they start at 0 the number is predictable. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Patchwork: http://patchwork.linux-mips.org/patch/4587 Acked-by: Florian Fainelli <florian@openwrt.org>
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