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* MIPS: Introduce support for Platform definitionsSam Ravnborg2010-08-055-8/+16
| | | | | | | | | | | | | | | | | | | | | | | | Move platform specific definitions to the platfrom directories. Each platform shall do the following: 1) include an entry in arch/mips/Kbuild.platforms 2) add relevant definitions to arch/mips/<platform>/Platform This commits changes ar7 to the new scheme as an example. Introducing a platform speecific Platfrom file has following advantages: 1) decentralization of platfrom definitions 2) simplification af arch/mips/Makefile 3) force all platfrom to build with -Werror (done in arch/mips/Kbuild) [Ralf: Remove forgotten -Werror from AR7 Makefile] Signed-off-by: Sam Ravnborg <sam@ravnborg.org> To: linux-mips <linux-mips@linux-mips.org> To: Wu Zhangjin <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/1302/ Patchwork: http://patchwork.linux-mips.org/patch/1308/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add -Werror to arch/mips/KbuildSam Ravnborg2010-08-054-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | Adding subdirs-ccflags-y := -Werror to arch/mips/Kbuild let us in one go cover all files with -Werror. In addition this allows us to remove the individual -Werror definition in various Makefile. Adding the definition to Kbuild as a recursive option help us not to forget to do so. With this change we now compile arch/mips/kernel/cpufreq with -Werror One drawback: When specifying a subdirectory covered by the Kbuild file like this: make arch/mips/kernel/ then kbuild fails to pick up the -Werror definition. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> To: linux-mips <linux-mips@linux-mips.org> To: Wu Zhangjin <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/1301/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Introduce arch/mips/KbuildSam Ravnborg2010-08-052-1/+8
| | | | | | | | Signed-off-by: Sam Ravnborg <sam@ravnborg.org> To: linux-mips <linux-mips@linux-mips.org> To: Wu Zhangjin <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/1300/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: IP27: klconfig.c checkpatch cleanupAndrea Gelmini2010-08-051-4/+4
| | | | | | | | | | | | arch/mips/sgi-ip27/ip27-klconfig.c:51: ERROR: "foo * bar" should be "foo *bar" arch/mips/sgi-ip27/ip27-klconfig.c:63: ERROR: "foo * bar" should be "foo *bar" arch/mips/sgi-ip27/ip27-klconfig.c:81: ERROR: "foo * bar" should be "foo *bar" arch/mips/sgi-ip27/ip27-klconfig.c:100: ERROR: "foo * bar" should be "foo *bar" Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1278/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: PCI: RM9000 checkpatch cleanupAndrea Gelmini2010-08-051-2/+2
| | | | | | | | | | | | arch/mips/pci/ops-titan-ht.c:36: ERROR: "foo * bar" should be "foo *bar" arch/mips/pci/ops-titan-ht.c:68: ERROR: "foo * bar" should be "foo *bar" Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: Tejun Heo <tj@kernel.org> Cc: Christoph Lameter <cl@linux-foundation.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1277/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: math-emu: Checkpatch cleanupAndrea Gelmini2010-08-051-2/+1
| | | | | | | | | arch/mips/math-emu/sp_tlong.c:75: ERROR: else should follow close brace '}' Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1276/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: math-emu: Checkpatch cleanupAndrea Gelmini2010-08-051-2/+1
| | | | | | | | | arch/mips/math-emu/sp_tint.c:76: ERROR: else should follow close brace '}' Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1275/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: math-emu: Checkpatch cleanupAndrea Gelmini2010-08-051-1/+1
| | | | | | | | | arch/mips/math-emu/sp_modf.c:32: ERROR: "foo * bar" should be "foo *bar" Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1273/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: math-emu: Checkpatch cleanupAndrea Gelmini2010-08-051-2/+1
| | | | | | | | | arch/mips/math-emu/dp_tlong.c:75: ERROR: else should follow close brace '}' Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1272/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: math-emu: Checkpatch cleanupAndrea Gelmini2010-08-051-2/+1
| | | | | | | | | arch/mips/math-emu/dp_tint.c:73: ERROR: else should follow close brace '}' Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1271/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: math-emu: Checkpatch cleanupAndrea Gelmini2010-08-051-1/+1
| | | | | | | | | arch/mips/math-emu/dp_modf.c:32: ERROR: "foo * bar" should be "foo *bar" Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1269/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: DECstation: Checkpatch cleanupAndrea Gelmini2010-08-051-2/+1
| | | | | | | | | arch/mips/dec/promcon.c:37: ERROR: that open brace { should be on the previous line Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1270/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Yosemite: ht-irq.c: Checkpatch cleanupAndrea Gelmini2010-08-051-7/+6
| | | | | | | | | | | | | | arch/mips/pmc-sierra/yosemite/ht-irq.c:38: ERROR: code indent should use tabs where possible arch/mips/pmc-sierra/yosemite/ht-irq.c:39: ERROR: code indent should use tabs where possible arch/mips/pmc-sierra/yosemite/ht-irq.c:40: ERROR: code indent should use tabs where possible arch/mips/pmc-sierra/yosemite/ht-irq.c:43: ERROR: code indent should use tabs where possible arch/mips/pmc-sierra/yosemite/ht-irq.c:44: ERROR: code indent should use tabs where possible arch/mips/pmc-sierra/yosemite/ht-irq.c:45: ERROR: code indent should use tabs where possible Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1268/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: PowerTV: Correct ASIC device register names and locationsDavid VomLehn2010-08-055-8/+8
| | | | | | | | | Correct ASIC device register names and addresses for USB devices. Signed-off-by: David VomLehn <dvomlehn@cisco.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1258/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: PowerTV: Use O(1) algorthm for phys_to_dma/dma_to_physDavid VomLehn2010-08-056-142/+529
| | | | | | | | | | | | | | | | | | | | | | | | Replace phys_to_dma()/dma_to_phys() looping algorithm with an O(1) algorithm The approach taken is inspired by the sparse memory implementation: take a certain number of high-order bits off the address them, use this as an index into a table containing an offset to the desired address and add it to the original value. There is a table for mapping physical addresses to DMA addresses and another one for the reverse mapping. The table sizes depend on how fine-grained the mappings need to be; Coarser granularity less to smaller tables. On a processor with 32-bit physical and DMA addresses, with 4 MIB granularity, memory usage is two 2048-byte arrays. Each 32-byte cache line thus covers 64 MiB of address space. Also, renames phys_to_bus() to phys_to_dma() and bus_to_phys() to dma_to_phys() to align with kernel usage. [Ralf: Fixed silly build breakage due to stackoverflow warning caused by huge array on stack.] Signed-off-by: David VomLehn <dvomlehn@cisco.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1257/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: MTX1: Fix build.Ralf Baechle2010-08-053-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | CC arch/mips/alchemy/mtx-1/board_setup.o {standard input}: Assembler messages: {standard input}:263: Error: opcode not supported on this processor: mips1 (mips1) `sync' {standard input}:274: Error: opcode not supported on this processor: mips1 (mips1) `sync' {standard input}:296: Error: opcode not supported on this processor: mips1 (mips1) `sync' [...] Any .set mipsX statement other than .set mips0 at the end of inline assembler is a big fat bug. Introduced by 9482eabeca315c0276ffb50026b7482481b7097b (linux-mips.org) rsp. 32fd6901a6d8d19f94e4de6be4e4b552ab078620 (kernel.org). While at it, fix the same issue in arch/mips/alchemy/devboards/pb1000/board_setup.c arch/mips/alchemy/xxs1500/board_setup.c as well. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM47xx: Activate SSB_B43_PCI_BRIDGE by defaultHauke Mehrtens2010-08-051-0/+1
| | | | | | | | | | | B43_pci_bridge is needed to use the b43 driver with brcm47xx. Activate it by default if PCI is available. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1510/ Acked-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: BCM47xx: Really fix 128MB RAM problemHauke Mehrtens2010-08-051-8/+14
| | | | | | | | | | | | | | | | | | | The previous patch 4a86f2d27733f610e642649aca3e82e86fca9e22 (lmo) rsp. 84a6fcb368a080620d12fc4d79e07902dbee7335 (kernel.org) was wrong. The BCM47xx architecture maps the ram into a 128MB address space. It will be spaced there as often as goes into the 128MB. Detection tries to find the position where the same memory is found. When reading beyond 128MB the processor will throw an exception. If 128MB RAM is installed, it will not find a memory alias because it tries to read beyond the 128MB border. Now it just assumes 128MB installed ram if it can not find an alias. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1508/ Acked-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Workaround link failures with gcc-4.4.x 32-bits toolchainsFlorian Fainelli2010-08-051-8/+0
| | | | | | | | | | | | | | When building with a gcc-4.4.x toolchain that is configured to produce 32-bits executables by default, we will produce __lshrti3 in sched_clock() which is never resolved so the kernel fails to link. Unconditionally use the inline assembly version as suggested by David Daney, which works around the issue. Signed-off-by: Florian Fainelli <florian@openwrt.org> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1514/ Acked-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: N32: Fix syscall number comments.David Daney2010-08-051-4/+4
| | | | | | | Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1515/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Don't overflow cevt-r4k.c calculations at high clock rates.David Daney2010-08-051-3/+2
| | | | | | | | | | | | | | | The 'mult' element of struct clock_event_device must never be wider than 32-bits. If it were, it would get truncated when used by clockevent_delta2ns() when this calls do_div(). We can meet this requirement by using clockevent_set_clock() to set the MULT and SHIFT values. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1253/ Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: IP27: Don't include <linux/topology.h> into <asm/sn/agent.h>.Ralf Baechle2010-08-051-1/+0
| | | | | | | The include is unecessary and will when building the IP35 result in recursive header inclusion spaghetti. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: TX49xx: Define ARCH_KMALLOC_MINALIGNAtsushi Nemoto2010-08-051-3/+1
| | | | | | | | | | | With SLAB, it works without ARCH_KMALLOC_MINALIGN, but with SLOB/SLUB, ARCH_KMALLOC_MINALIGN is required to ensure alignment of kmalloced buffer. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1248/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2010-07-309-47/+66
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * master.kernel.org:/home/rmk/linux-2.6-arm: cyber2000fb: fix console in truecolor modes cyber2000fb: fix machine hang on module load SA1111: Eliminate use after free ARM: Fix Versatile/Realview/VExpress MMC card detection sense ARM: 6279/1: highmem: fix SMP preemption bug in kmap_high_l1_vipt ARM: Add barriers to io{read,write}{8,16,32} accessors as well ARM: 6273/1: Add barriers to the I/O accessors if ARM_DMA_MEM_BUFFERABLE ARM: 6272/1: Convert L2x0 to use the IO relaxed operations ARM: 6271/1: Introduce *_relaxed() I/O accessors ARM: 6275/1: ux500: don't use writeb() in uncompress.h ARM: 6270/1: clean files in arch/arm/boot/compressed/ ARM: Fix csum_partial_copy_from_user()
| * SA1111: Eliminate use after freeJulia Lawall2010-07-301-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | __sa1111_remove always frees its argument, so the subsequent reference to sachip->saved_state represents a use after free. __sa1111_remove does not appear to use the saved_state field, so the patch simply frees it first. A simplified version of the semantic patch that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression E,E2; @@ __sa1111_remove(E) ... ( E = E2 | * E ) // </smpl> Signed-off-by: Julia Lawall <julia@diku.dk> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: Fix Versatile/Realview/VExpress MMC card detection senseRussell King2010-07-302-2/+2
| | | | | | | | | | | | | | | | | | The MMC card detection sense has become really confused with negations at various levels, leading to some platforms not detecting inserted cards. Fix this by converting everything to positive logic throughout, thereby getting rid of these negations. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 6279/1: highmem: fix SMP preemption bug in kmap_high_l1_viptGary King2010-07-301-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | smp_processor_id() must not be called from a preemptible context (this is checked by CONFIG_DEBUG_PREEMPT). kmap_high_l1_vipt() was doing so. This lead to a problem where the wrong per_cpu kmap_high_l1_vipt_depth could be incremented, causing a BUG_ON(*depth <= 0); in kunmap_high_l1_vipt(). The solution is to move the call to smp_processor_id() after the call to preempt_disable(). Originally by: Andrew Howe <ahowe@nvidia.com> Signed-off-by: Gary King <gking@nvidia.com> Acked-by: Nicolas Pitre <nico.as.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: Add barriers to io{read,write}{8,16,32} accessors as wellRussell King2010-07-291-20/+18
| | | | | | | | | | | | | | | | | | The ioread/iowrite accessors also need barriers as they're used in place of readl/writel et.al. in portable drivers. Create __iormb() and __iowmb() which are conditionally defined to be barriers dependent on ARM_DMA_MEM_BUFFERABLE, and always use these macros in the accessors. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 6273/1: Add barriers to the I/O accessors if ARM_DMA_MEM_BUFFERABLECatalin Marinas2010-07-291-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the coherent DMA buffers are mapped as Normal Non-cacheable (ARM_DMA_MEM_BUFFERABLE enabled), buffer accesses are no longer ordered with Device memory accesses causing failures in device drivers that do not use the mandatory memory barriers before starting a DMA transfer. LKML discussions led to the conclusion that such barriers have to be added to the I/O accessors: http://thread.gmane.org/gmane.linux.kernel/683509/focus=686153 http://thread.gmane.org/gmane.linux.ide/46414 http://thread.gmane.org/gmane.linux.kernel.cross-arch/5250 This patch introduces a wmb() barrier to the write*() I/O accessors to handle the situations where Normal Non-cacheable writes are still in the processor (or L2 cache controller) write buffer before a DMA transfer command is issued. For the read*() accessors, a rmb() is introduced after the I/O to avoid speculative loads where the driver polls for a DMA transfer ready bit. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 6272/1: Convert L2x0 to use the IO relaxed operationsCatalin Marinas2010-07-291-13/+13
| | | | | | | | | | | | | | | | | | | | | | This patch is in preparation for a subsequent patch which adds barriers to the I/O accessors. Since the mandatory barriers may do an L2 cache sync, this patch avoids a recursive call into l2x0_cache_sync() via the write*() accessors and wmb() and a call into l2x0_cache_sync() with the l2x0_lock held. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 6271/1: Introduce *_relaxed() I/O accessorsCatalin Marinas2010-07-291-12/+17
| | | | | | | | | | | | | | | | | | | | | | | | This patch introduces readl*_relaxed()/write*_relaxed() as the main I/O accessors (when __mem_pci is defined). The standard read*()/write*() macros are now based on the relaxed accessors. This patch is in preparation for a subsequent patch which adds barriers to the I/O accessors. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 6275/1: ux500: don't use writeb() in uncompress.hRabin Vincent2010-07-291-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Don't use writeb() in uncompress.h, to avoid the following build errors when the "Add barriers to the I/O accessors" series is applied. Use __raw_writeb() instead. arch/arm/boot/compressed/misc.o: In function `putc': arch/arm/mach-ux500/include/mach/uncompress.h:41: undefined reference to `outer_cache' Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 6270/1: clean files in arch/arm/boot/compressed/Magnus Damm2010-07-291-0/+3
| | | | | | | | | | | | | | | | Update the compressed boot Makefile for ARM to remove files during clean. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: Fix csum_partial_copy_from_user()Russell King2010-07-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | Using the parent functions frame pointer to access our arguments is completely wrong, whether or not we're building with frame pointers or not. What we should be using is the stack pointer to get at the word above the registers we stacked ourselves. Reported-by: Bosko Radivojevic <bosko.radivojevic@gmail.com> Tested-by: Bosko Radivojevic <bosko.radivojevic@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Merge branch 'for-linus' of git://git390.marist.edu/pub/scm/linux-2.6Linus Torvalds2010-07-293-10/+32
|\ \ | | | | | | | | | | | | | | | * 'for-linus' of git://git390.marist.edu/pub/scm/linux-2.6: [S390] etr: fix clock synchronization race [S390] Fix IRQ tracing in case of PER
| * | [S390] etr: fix clock synchronization raceMartin Schwidefsky2010-07-271-6/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The etr events switch-to-local and sync-check disable the synchronous clock and schedule a work queue that tries to get the clock back into sync. If another switch-to-local or sync-check event occurs while the work queue function etr_work_fn still runs the eacr.es bit and the clock_sync_word can become inconsistent because check_sync_clock only uses the clock_sync_word to determine if the clock is in sync or not. The second pass of the etr_work_fn will reset the eacr.es bit but will leave the clock_sync_word intact. Fix this race by moving the reset of the eacr.es bit into the switch-to-local and sync-check functions and by checking the eacr.es bit as well to decide if the clock needs to be synced. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
| * | [S390] Fix IRQ tracing in case of PERHeiko Carstens2010-07-272-4/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case user space is single stepped (PER) the program check handler claims too early that IRQs are enabled on the return path. Subsequent checks will notice that the IRQ mask in the PSW and what lockdep thinks the IRQ mask should be do not correlate and therefore will print a warning to the console and disable lockdep. Fix this by doing all the work within the correct context. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
* | | Merge branch 'for_linus' of ↵Linus Torvalds2010-07-281-2/+7
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jwessel/linux-2.6-kgdb * 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jwessel/linux-2.6-kgdb: x86,kgdb: Fix hw breakpoint regression
| * | | x86,kgdb: Fix hw breakpoint regressionJason Wessel2010-07-281-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | HW breakpoints events stopped working correctly with kgdb as a result of commit: 018cbffe6819f6f8db20a0a3acd9bab9bfd667e4 (Merge commit 'v2.6.33' into perf/core). The regression occurred because the behavior changed for setting NOTIFY_STOP as the return value to the die notifier if the breakpoint was known to the HW breakpoint API. Because kgdb is using the HW breakpoint API to register HW breakpoints slots, it must also now implement the overflow_handler call back else kgdb does not get to see the events from the die notifier. The kgdb_ll_trap function will be changed to be general purpose code which can allow an easy way to implement the hw_breakpoint API overflow call back. Signed-off-by: Jason Wessel <jason.wessel@windriver.com> Acked-by: Dongdong Deng <dongdong.deng@windriver.com> Acked-by: Frederic Weisbecker <fweisbec@gmail.com>
* | | | Merge branch 'for-linus' of ↵Linus Torvalds2010-07-281-0/+8
|\ \ \ \ | |/ / / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/lrg/voltage-2.6 * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lrg/voltage-2.6: davinci: da850/omap-l138 evm: account for DEFDCDC{2,3} being tied high regulator: tps6507x: allow driver to use DEFDCDC{2,3}_HIGH register wm8350-regulator: fix wm8350_register_regulator error handling ab3100: fix off-by-one value range checking for voltage selector
| * | | davinci: da850/omap-l138 evm: account for DEFDCDC{2,3} being tied highSekhar Nori2010-07-281-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Per the da850/omap-l138 Beta EVM SOM schematic, the DEFDCDC2 and DEFDCDC3 lines are tied high. This leads to a 3.3V IO and 1.2V CVDD voltage. Pass the right platform data to the TPS6507x driver so it can operate on the DEFDCDC{2,3}_HIGH register to read and change voltage levels. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
* | | | perf, powerpc: Use perf_sample_data_init() for the FSL codePeter Zijlstra2010-07-271-3/+3
| |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We should use perf_sample_data_init() to initialize struct perf_sample_data. As explained in the description of commit dc1d628a ("perf: Provide generic perf_sample_data initialization"), it is possible for userspace to get the kernel to dereference data.raw, so if it is not initialized, that means that unprivileged userspace can possibly oops the kernel. Using perf_sample_data_init makes sure it gets initialized to NULL. This conversion should have been included in commit dc1d628a, but it got missed. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Acked-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | | Merge branch 'x86-fixes-for-linus' of ↵Linus Torvalds2010-07-262-11/+16
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86: Do not try to disable hpet if it hasn't been initialized before x86, i8259: Only register sysdev if we have a real 8259 PIC
| * | | x86: Do not try to disable hpet if it hasn't been initialized beforeStefano Stabellini2010-07-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | hpet_disable is called unconditionally on machine reboot if hpet support is compiled in the kernel. hpet_disable only checks if the machine is hpet capable but doesn't make sure that hpet has been initialized. [ tglx: Made it a one liner and removed the redundant hpet_address check ] Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Acked-by: Venkatesh Pallipadi <venki@google.com> LKML-Reference: <alpine.DEB.2.00.1007211726240.22235@kaball-desktop> Cc: stable@kernel.org Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| * | | x86, i8259: Only register sysdev if we have a real 8259 PICAdam Lackorzynski2010-07-201-10/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | My platform makes use of the null_legacy_pic choice and oopses when doing a shutdown as the shutdown code goes through all the registered sysdevs and calls their shutdown method which in my case poke on a non-existing i8259. Imho the i8259 specific sysdev should only be registered if the i8259 is actually there. Do not register the sysdev function when the null_legacy_pic is used so that the i8259 resume, suspend and shutdown functions are not called. Signed-off-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de> LKML-Reference: <201007202218.o6KMIJ3m020955@imap1.linux-foundation.org> Cc: Jacob Pan <jacob.jun.pan@intel.com> Cc: <stable@kernel.org> 2.6.34 Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
* | | | Merge branch 'fixes' of ↵Linus Torvalds2010-07-262-27/+25
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/davej/cpufreq * 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/davej/cpufreq: [CPUFREQ] powernow-k8: Limit Pstate transition latency check [CPUFREQ] Fix PCC driver error path [CPUFREQ] fix double freeing in error path of pcc-cpufreq [CPUFREQ] pcc driver should check for pcch method before calling _OSC [CPUFREQ] fix memory leak in cpufreq_add_dev [CPUFREQ] revert "[CPUFREQ] remove rwsem lock from CPUFREQ_GOV_STOP call (second call site)"
| * | | | [CPUFREQ] powernow-k8: Limit Pstate transition latency checkBorislav Petkov2010-07-261-6/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Pstate transition latency check was added for broken F10h BIOSen which wrongly contain a value of 0 for transition and bus master latency. Fam11h and later, however, (will) have similar transition latency so extend that behavior for them too. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com> Signed-off-by: Dave Jones <davej@redhat.com>
| * | | | [CPUFREQ] Fix PCC driver error pathMatthew Garrett2010-07-261-8/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PCC cpufreq driver unmaps the mailbox address range if any CPUs fail to initialise, but doesn't do anything to remove the registered CPUs from the cpufreq core resulting in failures further down the line. We're better off simply returning a failure - the cpufreq core will unregister us cleanly if we end up with no successfully registered CPUs. Tidy up the failure path and also add a sanity check to ensure that the firmware gives us a realistic frequency - the core deals badly with that being set to 0. Signed-off-by: Matthew Garrett <mjg@redhat.com> Cc: Naga Chumbalkar <nagananda.chumbalkar@hp.com> Signed-off-by: Dave Jones <davej@redhat.com>
| * | | | [CPUFREQ] fix double freeing in error path of pcc-cpufreqDaniel J Blueman2010-07-261-12/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Prevent double freeing on error path. Signed-off-by: Daniel J Blueman <daniel.blueman@gmail.com> Signed-off-by: Dave Jones <davej@redhat.com>
| * | | | [CPUFREQ] pcc driver should check for pcch method before calling _OSCMatthew Garrett2010-07-261-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pcc specification documents an _OSC method that's incompatible with the one defined as part of the ACPI spec. This shouldn't be a problem as both are supposed to be guarded with a UUID. Unfortunately approximately nobody (including HP, who wrote this spec) properly check the UUID on entry to the _OSC call. Right now this could result in surprising behaviour if the pcc driver performs an _OSC call on a machine that doesn't implement the pcc specification. Check whether the PCCH method exists first in order to reduce this probability. Signed-off-by: Matthew Garrett <mjg@redhat.com> Cc: Naga Chumbalkar <nagananda.chumbalkar@hp.com> Signed-off-by: Dave Jones <davej@redhat.com>
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