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* x86: coding style fix to arch/x86/boot/pm.cPaolo Ciarrocchi2008-04-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | Before: total: 1 errors, 0 warnings, 178 lines checked After: total: 0 errors, 0 warnings, 178 lines checked No code changed: arch/x86/boot/pm.o: text data bss dec hex filename 351 0 6 357 165 pm.o.before 351 0 6 357 165 pm.o.after md5: 81de3616bceb29691bf835bb62a84ff1 pm.o.before.asm 81de3616bceb29691bf835bb62a84ff1 pm.o.after.asm Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86 setup: correct the base in the GDT_ENTRY() macroH. Peter Anvin2008-01-301-1/+1
| | | | | | | | | | | | The GDT_ENTRY() macro in pm.c would incorrectly cut the bottom 8 bits off the base. We didn't define any bases with the bottom 8 bits nonzero, so it is a non-manifest bug, but it's still a bug. Pointed out by John Smith <johnsmith9344@gmail.com>. Cc: John Smith <johnsmith9344@gmail.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86 setup: initialize LDTR and TR to make life easier to Intel VTH. Peter Anvin2008-01-301-0/+4
| | | | | | | | | | | Intel VT doesn't like to engage when the protected-mode state isn't fully initialized. Make life easier for it by initializing LDTR (to null) and TR (to a dummy hunk of low memory which will never actually be touched.) Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* i386: move bootThomas Gleixner2007-10-111-0/+174
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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