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* [MIPS] Change PCI host bridge setup/resourcesThomas Bogendoerfer2007-04-271-95/+10
| | | | | | | | | | | | | | PCI host bridge setup for SNI RM machines with PCI is quite broken, now that Linux does it's resource setup own its own. It will use IO addresses, which are needed by the EISA config detection and assigns PCI memory addresses, which overlap with ISA legacy addresses (video ram). Below is a patch, which changes the way how the PCI memory addresses are used and sets the minimum IO address to give enough IO space for 8 EISA slots). This patch needs the other PCI resource change, I've posted. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Misc fixes for plat_irq_dispatch functionsThiemo Seufer2007-03-191-1/+1
| | | | | | | | | | | | o adds missing ST0_IM masks, which caused the logging of valid interrupts as spurious o stops pnx8550 to log every interrupt as spurious o adds cause register masks for ip22/ip32, which caused handling of masked interrupts o removes some superfluous parentheses in the SNI interrupt code Signed-Off-By: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] SNI: MIPS_CPU_IRQ_BASE cleanupThomas Bogendoerfer2007-02-261-2/+2
| | | | | | | Use MIPS_CPU_IRQ_BASE instead of own define. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Support for several more SNI RM models.Thomas Bogendoerfer2007-02-181-0/+390
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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