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path: root/arch/mips/pci/fixup-cobalt.c
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* [MIPS] Cobalt: Fix ethernet interrupts for RaQ1Thomas Bogendoerfer2008-01-151-1/+1
| | | | | | | RAQ1 uses the same interrupt routing as Qube2. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Cobalt: Move PCI definitions to arch/mips/pci/fixup-cobalt.c.Yoichi Yuasa2007-10-111-0/+17
| | | | | | | These PCI definitions are only used in arch/mips/pci/fixup-cobalt.c. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Add GT641xx IRQ routines.Yoichi Yuasa2007-10-111-11/+12
| | | | | Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* PCI: Change all drivers to use pci_device->revisionAuke Kok2007-07-111-7/+3
| | | | | | | | | | | | | | | | | | | | Instead of all drivers reading pci config space to get the revision ID, they can now use the pci_device->revision member. This exposes some issues where drivers where reading a word or a dword for the revision number, and adding useless error-handling around the read. Some drivers even just read it for no purpose of all. In devices where the revision ID is being copied over and used in what appears to be the equivalent of hotpath, I have left the copy code and the cached copy as not to influence the driver's performance. Compile tested with make all{yes,mod}config on x86_64 and i386. Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Acked-by: Dave Jones <davej@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [MIPS] PCI: Make dev pointer argument of pcibios_map_irq const.Ralf Baechle2007-07-101-1/+1
| | | | | | | This is to break the code of people who think they are supposed to scribble into the pci device structure - it's off limits. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Rework cobalt_board_idYoichi Yuasa2007-05-111-0/+21
| | | | | | | | | This patch has reworked cobalt_board_id. The cobalt_board_id is read from PCI config register. It should be in PCI routine. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Add extern cobalt_board_idYoichi Yuasa2007-05-111-3/+1
| | | | | Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Rewrite GALILEO_INL/GALILEO_OUTL to GT_READ/GT_WRITEYoichi Yuasa2006-11-301-6/+5
| | | | | | | | This patch has rewritten GALILEO_INL/GALILEO_OUTL using GT_READ/GT_WRITE. This patch tested on Cobalt Qube2. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Fix Cobalt PCI cache line sizesPeter Horton2006-02-071-2/+2
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Rename include/asm-mips/cobalt to include/asm-mips/mach-cobalt.Ralf Baechle2006-02-071-1/+1
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Resurrect Cobalt support for 2.6.Ralf Baechle2005-10-291-3/+52
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Linux-2.6.12-rc2v2.6.12-rc2Linus Torvalds2005-04-161-0/+112
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
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