summaryrefslogtreecommitdiffstats
path: root/arch/mips/include/asm/mach-cavium-octeon
Commit message (Expand)AuthorAgeFilesLines
* MIPS: Octeon: Support 256 MSI on PCIeDavid Daney2010-08-051-1/+1
* MIPS: Octeon: Implement delays with cycle counter.David Daney2010-08-051-11/+0
* MIPS: Octeon: Get rid of a bunch of MSI IRQ number definitions.David Daney2010-08-051-64/+2
* MIPS: Octeon: Define ARCH_HAS_USABLE_BUILTIN_POPCOUNT for OCTEON.David Daney2010-08-051-0/+8
* MIPS: Enable Read Inhibit/eXecute Inhibit for Octeon+ CPUsDavid Daney2010-02-271-0/+3
* MIPS: Octeon: Set kernel_uses_llsc to false on non-SMP builds.David Daney2009-09-171-4/+8
* MIPS: Move Cavium CP0 hwrena impl bits to cpu-feature-overrides.hDavid Daney2009-06-171-0/+1
* MIPS: Remove execution hazard barriers for Octeon.David Daney2009-06-171-0/+1
* MIPS: Pass struct device to plat_dma_addr_to_phys()Kevin Cernekee2009-06-171-1/+2
* MIPS: Add size and direction arguments to plat_unmap_dma_mem()Kevin Cernekee2009-06-171-1/+2
* MIPS: Add Cavium OCTEON processor support files to arch/mips/cavium-octeon.David Daney2009-01-115-0/+543
OpenPOWER on IntegriCloud