| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | MIPS: Collect FPU emulator statistics per-CPU. | David Daney | 2009-12-17 | 1 | -7/+17 |
| | | | | | | | | | | | | | | | | | | | | On SMP systems, the collection of statistics can cause cache line bouncing in the lines associated with the counters. Also there are races incrementing the counters on multiple CPUs. To fix both problems, we collect the statistics in per-CPU variables, and add them up in the debugfs read operation. As a test I ran the LTP float_bessel test on a 12 CPU Octeon system. Without CONFIG_DEBUG_FS : 2602 seconds. With CONFIG_DEBUG_FS: 2640 seconds. With non-cpu-local atomic statistics: 14569 seconds. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org> | ||||
| * | MIPS: Switch FPU emulator trap to BREAK instruction. | Ralf Baechle | 2008-10-30 | 1 | -0/+17 |
| | | | | | | | | | | | | | Arguably using the address error handler has always been ugly. But with processors that handle unaligned loads and stores in hardware the current mechanism ceases to work so switch it to a BREAK instruction and allocate break code 514 to the FPU emulator. Yoichi Yuasa provided a build fix for CONFIG_BUG=n. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | ||||
| * | MIPS: Move headfiles to new location below arch/mips/include | Ralf Baechle | 2008-10-11 | 1 | -0/+37 |
| Signed-off-by: Ralf Baechle <ralf@linux-mips.org> | |||||
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