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* MIPS: Cobalt: Fix theoretical port aliasing issueRalf Baechle2010-02-271-1/+1
| | | | | | | | | | | | | | | | | | | Because the VIA SuperIO chip only decodes 24 bits of address space but port address space currently being configured as 32MB there is the theoretical possibility of aliases within the I/O port address range. The complicated solution is to reserve all address range that potencially could cause such aliases. But with the PCI spec limiting port allocations for devices to a maximum of 256 bytes 16MB of port address space already is way more than one would ever expect to be used so we just reduce the port space to 16MB. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> To: Yoichi Yuasa <yuasa@linux-mips.org> Cc: Bjorn Helgaas <bjorn.helgaas@hp.com> Cc: linux-mips@linux-mips.org Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Patchwork: http://patchwork.linux-mips.org/patch/995/
* [MIPS] add io_map_base to pci_controller on CobaltYoichi Yuasa2007-06-261-0/+1
| | | | | Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] merge GT64111 PCI routines and GT64120 PCI_0 routinesYoichi Yuasa2007-04-271-2/+2
| | | | | | | | | This patch has merged GT64111 PCI routines and GT64120 PCI_0 routines. GT64111 PCI is almost the same as GT64120's PCI_0. This patch don't change GT64120 PCI routines. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Cobalt: Split PCI codes from setup.cYoichi Yuasa2007-04-271-0/+47
It's removed #ifdef CONFIG_PCI/#endif from cobalt setup.c . Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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