| Commit message (Collapse) | Author | Age | Files | Lines |
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When compiling the kernel to Thumb-2, using a 16-bit NOP in the
memmove() implementation causes the preceding ADD PC instruction to
branch incorrectly in the middle of a 32-bit LDR or STR instruction. The
memmove() code is now similar to the memcpy() template.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Current implementation of jprobes allocates empty pt_regs from the
stack which is then passed to kprobe_handler() and eventually to
singlestep(). Now when instruction being simulated is STMFD (like
in normal function prologues without CONFIG_FRAME_POINTER), stores
using SP actually write over top of the fabricated pt_regs
structure.
This can be reproduced for example by using LKDTM module:
# modprobe lkdtm
# mount -t debugfs none /sys/kernel/debug
# echo PANIC > /sys/kernel/debug/provoke-crash/INT_HW_IRQ_EN
after this, it fails with corrupted registers (before the requested crash would occur):
lkdtm: Crash point INT_HW_IRQ_EN of type PANIC hit, trigger in 9 rounds
lkdtm: Crash point INT_HW_IRQ_EN of type PANIC hit, trigger in 8 rounds
Internal error: Oops - undefined instruction: 0 [#1]
last sysfs file: /sys/devices/platform/serial8250.0/sleep_timeout
Modules linked in: lkdtm
CPU: 0 Not tainted (2.6.34-rc2 #69)
PC is at irq_desc+0x1638/0xeeb0
LR is at 0x25
pc : [<c050b428>] lr : [<00000025>] psr: c80a0013
sp : ce94bd60 ip : c050b3e8 fp : a0000013
r10: c0aa453c r9 : cf5d4000 r8 : ce9a1822
r7 : c050b424 r6 : 00000025 r5 : c039d8f8 r4 : c050b3e8
r3 : 00000001 r2 : cf4d0440 r1 : c039d8f8 r0 : 00000020
Flags: NZcv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user
Control: 10c5387d Table: 8e804019 DAC: 00000015
Process sh (pid: 496, stack limit = 0xce94a2e8)
Stack: (0xce94bd60 to 0xce94c000)
[...]
Code: 000002cd 00000000 00000000 00000001 (dead4ead)
---[ end trace 2b46d5f2b682f370 ]---
Kernel panic - not syncing: Fatal exception in interrupt
This patch allocates enough space (2 * sizeof(struct pt_regs)) from
the stack to prevent such corruption.
Signed-off-by: Mika Westerberg <ext-mika.1.westerberg@nokia.com>
Acked-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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clkdev.h is using struct device *. Due to this compilation
warning is comming. Removing this warning.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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irq.h is using struct pt_regs *. Due to this compilation
warning is comming. Removing this warning by adding declaration
of struct pt_regs.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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A CPU has VFPv3 hardware if the FPSID[19:16] bits are 2 or more.
Currently Linux was only checking for 3 or more.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The mandatory barriers (mb, rmb, wmb) are used even on uniprocessor
systems for things like ordering Normal Non-cacheable memory accesses
with DMA transfer (via Device memory writes). The current implementation
uses dmb() for mb() and friends but this is not sufficient. The DMB only
ensures the relative ordering of the observability of accesses by other
processors or devices acting as masters. In case of DMA transfers
started by writes to device memory, the relative ordering is not ensured
because accesses to slave ports of a device are not considered
observable by the DMB definition.
A DSB is required for the data to reach the main memory (even if mapped
as Normal Non-cacheable) before the device receives the notification to
begin the transfer. Furthermore, some L2 cache controllers (like L2x0 or
PL310) buffer stores to Normal Non-cacheable memory and this would need
to be drained with the outer_sync() function call.
The patch also allows platforms to define their own mandatory barriers
implementation by selecting CONFIG_ARCH_HAS_BARRIERS and providing a
mach/barriers.h file.
Note that the SMP barriers are unchanged (being DMBs as before) since
they are only guaranteed to work with Normal Cacheable memory.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The L2x0 cache controllers need to explicitly drain their write buffer
even for Normal Noncacheable memory accesses.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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This patch introduces the outer_cache_fns.sync function pointer together
with the OUTER_CACHE_SYNC config option that can be used to drain the
write buffer of the outer cache.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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To avoid #include collisions with subsequent patches in the series, this
patch moves the outer_cache definitions to a separate asm/outercache.h
file.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
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"Input: add KEY_WPS_BUTTON definition" introduced
a generic keycode for WPS input events.
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
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Commit "Input: add KEY_WPS_BUTTON definition"
added a generic keycode for WPS button.
Let's use it, instead of "F1" mapping.
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6
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This fixes a warning when booting 2.6.34-rc2:
[ 26.619814] ------------[ cut here ]------------
[ 26.624604] WARNING: at fs/proc/generic.c:316 __xlate_proc_name+0xac/0xc0()
[ 26.631555] name 'on/off button'
[ 26.634753] Modules linked in:
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Cc: Sven Neumann <s.neumann@raumfeld.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
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Remove duplicated #include('s) in
arch/arm/mach-pxa/raumfeld.c
Signed-off-by: Huang Weiyi <weiyi.huang@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
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The function locomo_m62332_senddata sends a three byte i2c message to
a M62332 DAC. This entire function is guarded with a spin_lock_irqsave
at the start of the function and a spin_unlock_irqrestore at the end.
As each byte is transferred, the i2c ACK from the DAC is checked.
Currently, if the ACK is missing the function simply returns without
the unlock. It also leaves the i2c bus in an invalid state since the
last byte transferred did not have a "stop" condition and leave the
bus idle.
Fix this by adding an exit path using goto.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
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The locomo spi registers are all defined in locomo.h as offsets
from the first spi register LOCOMO_SPI (0x60), which is itself
an offset from the locomo base address. To correctly access
these registers LOCOMO_SPI must always be included in the
address calculation.
There are two places in locomo.c where this is not done. The
first one, in locomo_suspend, actually results in a write to
LOCOMO_ST instead of LOCOMO_SPICT. The second is in __locomo_probe
and results in a write to LOCOMO_MCSX2 instead of LOCOMO_SPIIE.
Fix these by including LOCOMO_SPI in the calculation.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
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sharpsl_pm.c actually depends on max1111 driver being built-in when
not using legacy ssp code.
Reported-by: Jonathan Cameron <jic23@cam.ac.uk>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
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Reported-by: Jonathan Cameron <jic23@cam.ac.uk>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
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Signed-off-by: Jonathan Cameron <jic23@cam.ac.uk>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
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Due to commit:
5de813b ARM: Eliminate decompressor -Dstatic= PIC hack
The data section will be discarded for the decompressor, thus move the
static variables into BSS section by initializing them at run time.
Reported-by: Jonathan Cameron <jic23@cam.ac.uk>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
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Due to commit:
5de813b ARM: Eliminate decompressor -Dstatic= PIC hack
The data section will be discarded for the decompressor, thus move the
static variables into BSS section by initializing them at run time.
Signed-off-by: Jonathan Cameron <jic23@cam.ac.uk>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
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Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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One to many close parens.
In file included from arch/arm/include/asm/page.h:202,
from include/linux/mm_types.h:15,
from include/linux/sched.h:63,
from arch/arm/kernel/asm-offsets.c:13:
arch/arm/include/asm/memory.h: In function 'virt_to_bus':
arch/arm/include/asm/memory.h:214: error: expected ';' before ')' token
arch/arm/include/asm/memory.h:214: error: expected statement before ')' token
arch/arm/include/asm/memory.h: In function 'bus_to_virt':
arch/arm/include/asm/memory.h:219: error: expected ';' before ')' token
arch/arm/include/asm/memory.h:219: error: expected statement before ')' token
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
* 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6:
ARM/OMAP: Remove the +x bit from a couple of source files
omap: McBSP: Drop unnecessary status/error bit clearing on reg_cacheretrieved register values
OMAP4: fix temporary hacks that break multi-omap PM
OMAP2: cpu_is_omap2*: fix compile-time removal of unused code
omap3: pandora: add missing i2c3 board_info
omap: mach-omap2/io.c: fix function declarations
omap: Fix gpio_resume_after_retention
omap3: Fix support for the LEDs connected to GPIO outputs on IGEP v2board
omap: Checkpatch cleanup for blizzard.h
omap: pass the reboot command to the boot loader
omap2/3/4: mailbox: remove compiler warning
OMAP2: serial.c: Fix number of uarts in early_init
omap: Enable PM_RUNTIME in defconfigs to avoid USB compile errors
omap2: Update n8x0 defconfig to test multi-omap and DMA api changes
omap2: add USB initialization for tusb6010
omap4: Fix build break by moving omap_smc1 into a separate .S
omap2/3/4: ehci: avoid compiler error with touchbook
omap3: Fix compile for Touch Book early_param
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Remove the +x bit from a couple of source files
Signed-off-by: Andrew Clayton <andrew@digital-domain.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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reg_cacheretrieved register values
The MsBSP register cache will never have any error/status flags set, since
these flags are never written to the reg_cache. So it is kind of not
necessary to clear these flags, which are actually always 0.
In other words, clearing the status/error flags are not necessary, since the
reg_cache will never got these bits set. We can just write back the
register content from the cache as it is when clearing an error condition.
Tested on Amstrad Delta.
Reported-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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When building for multi-omap, and OMAP4 is enabled, CONFIG_ARCH_OMAP4
will be true and prevent included code from building/running for
OMAP2/3 as well.
This problem exists in io.c where some hwmod/PM/SDRC init code is
prevented from running even on OMAP2/3 when OMAP4 is included in a
multi-OMAP build.
A quick glance suggests that this #ifndef is no longer needed in most
of the cases. In the remaining cases, the function is wrapped with
"if (cpu_is_omap24xx() || cpu_is_omap34xx())" which will be optimized
out for OMAP4-only builds.
Note that this is only a short-term fix. Longer-term, OMAP4
needs to create init functions for SDRC and hwmod late-init.
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Currently if omap2420 is defined but not omap2430, cpu_is_omap2430()
is still defined as a macro, instead of #define'd to zero. This
results in conditional cpu_is_omap2430() code still being compiled,
and leads to possible compile/link errors. In particular for hwmod
init.
To fix, add extra #ifdefs to CPU check macros to ensure that the
is_omap* macros are zero for each OMAP2 if they are not configured
into the kernel.
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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This will allow BQ27500 fuel gauge to function.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Get rid of the following warnings:
warning: non-ANSI function declaration of function [...]
Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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For omap4 case, this was wrongly writing GPIO_LEVELDETECTx
registers with OMAP24XX_ offset and OMAP4_ offset.
Bug introduced in commit:
commit 3f1686a9bfe74979c6ad538c78039730f665f77e
Author: Tony Lindgren <tony@atomide.com>
Date: Mon Feb 15 09:27:25 2010 -0800
omap: Fix gpio.c for multi-omap for omap4
Signed-off-by: Sergio Aguirre <saaguirre@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Select CONFIG_LEDS_GPIO to enable IGEP v2 LED support and control of supported
LEDs from userspace. Otherwise GPIO LEDs are exported as GPIO 26, 27 and 28 using
the gpiolib framework.
Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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arch/arm/plat-omap/include/plat/blizzard.h:9:
ERROR: spaces prohibited around that ':' (ctx:WxW)
Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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This patch follows the commit be093beb608edf821b45fe00a8a080fb5c6ed4af
by Russell King:
OMAP wishes to pass state to the boot loader upon reboot in order
to instruct it whether to wait for USB-based reflashing or not.
There is already a facility to do this via the reboot() syscall,
except we ignore the string passed to machine_restart().
The patch adds the missing parameter to omap1_arch_reset() and
omap_prcm_arch_reset(), and modifies the latter to pass the reboot
command parameter to the boot loader instead of reboot mode (which is
for kernel internal use only and cannot be modified by the userspace).
Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Remove a compiler warning in device-specific
mailbox module.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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The omap_serial_early_init prints the following errors:
Could not get uart4_ick
Could not get uart4_fck
because all the uarts available in omap_uart[] will be initialized.
Only omap4430 and omap3630 have 4 uarts at the moment.
This patch reduces the number of uarts when cpu is not omap4430 or
omap3630.
Signed-off-by: Thomas Weber <weber@corscience.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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While waiting for the related USB patch, fix compile by enabling
it in the defconfigs. As discussed at:
http://thread.gmane.org/gmane.linux.usb.general/27432/focus=4460
Otherwise we'll get errors like:
drivers/usb/core/hcd.c:1892: error: 'pm_wq' undeclared (first use in this function)
drivers/usb/core/hcd.c:1892: error: (Each undeclared identifier is reported only once
drivers/usb/core/hcd.c:1892: error: for each function it appears in.)
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Recent DMA API changes broke compile for tusb6010. While
testing the fixes for tusb6010, I had to update the n8x0
defconfig quite a bit. Might as well merge it while at it
to make it more usable as we're using this to test the
multi-omap booting between V6 and V7 ARMs.
Also, anybody using n8x0 with a current kernel will most
likely want to mount root on the MMC instead of the onenand
to keep the Maemo install intact.
Enable I2C, REGULATOR, MMC, MFD, PM, and USB. Also change the root
to /dev/mmcblk0p2 instead of the onenand.
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Based on Kalle's and Tony's patches. Some variables re-organized
and unused code removed.
Signed-off-by: Kalle Valo <kalle.valo@iki.fi>
Signed-off-by: Francisco Alecrim <francisco.alecrim@openbossa.org>
[tony@atomide.com: this is needed to fix the related tusb6010 DMA API changes]
Signed-off-by: Tony Lindgren <tony@atomide.com>
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This patch moves omap_smc1 function to a seperate omap44xx-smc.S file
and sets compile flags as -Wa,-march=armv7-a.
This fix was suggested by Tony Lindgren <tony@atomide.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
[tony@atomide.com: otherwise multi-omap build with V6 and V7 breaks]
Signed-off-by: Tony Lindgren <tony@atomide.com>
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the early_param() call in board-omap3touchbook.c expands to:
static const char __setup_str_early_touchbook_revision[]
__section(.init.rodata) _aligned(1) = tbr;
[...]
and we have a non-const variable being added to the
same section:
static struct ehci_hcd_omap_platform_data ehci_pdata
__section(.init.rodata);
because of that, gcc generates a section type conflict
which can (and actually should) be avoided by marking
const every variable marked with __initconst.
This patch fixes that for the ehci_hdc_omap_platform_data.
Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Commit 2b0d8c251b8876d530a6bf671eb5425838fa698a changed ARM to use
the common early_param code. Fix compile for Touch Book accordingly.
Signed-off-by: Tony Lindgren <tony@atomide.com>
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* master.kernel.org:/home/rmk/linux-2.6-arm: (23 commits)
ARM: Fix RiscPC decompressor build errors
ARM: Fix sorting of platform group config options and includes
ARM: 5991/1: Fix regression in restore_user_regs macro
ARM: 5989/1: ARM: KGDB: add support for SMP platforms
ARM: 5990/1: ARM: use __armv5tej_mmu_cache_flush for V5TEJ instead of __armv4_mmu_cache_flush
ARM: Add final piece to fix XIP decompressor in read-only memory
video: enable sh_mobile_lcdc on SH-Mobile ARM
ARM: mach-shmobile: ap4evb SDHI0 platform data V2
ARM: mach-shmobile: sh7372 SDHI vector merge
ARM: mach-shmobile: sh7377 SDHI vector merge
ARM: mach-shmobile: sh7367 SDHI vector merge
ARM: mach-shmobile: G4EVM KEYSC platform data
mtd: enable sh_flctl on SH-Mobile ARM
ARM: mach-shmobile: G3EVM FLCTL platform data
ARM: mach-shmobile: G3EVM KEYSC platform data
Video: ARM CLCD: Better fix for swapped IENB and CNTL registers
ARM: Add L2 cache handling to smp boot support
ARM: 5960/1: ARM: perf-events: fix v7 event selection mask
ARM: 5959/1: ARM: perf-events: request PMU interrupts with IRQF_NOBALANCING
ARM: 5988/1: pgprot_dmacoherent() for non-mmu builds
...
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arch/arm/boot/compressed/decompress.o: In function `do_decompress':
decompress.c:(.text+0x26e8): undefined reference to `error'
decompress.c:(.text+0x2760): undefined reference to `error'
decompress.c:(.text+0x27d8): undefined reference to `error'
decompress.c:(.text+0x2824): undefined reference to `error'
decompress.c:(.text+0x28f0): undefined reference to `error'
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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... and document the sorting criteria to help future additions.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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ARMv5T and earlier require that a ldm {}^ instruction is not followed
by an instruction that accesses banked registers. This patch restores
the nop that was lost in commit b86040a59feb255a8193173caa4d5199464433d5.
Signed-off-by: Anders Grafström <grfstrm@users.sourceforge.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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To support SMP platforms, KGDB requires the architecture backend to
implement the kgdb_roundup_cpus function.
This patch, taken against 2.6.33, implements the function for ARM based
on the MIPS port.
Cc: Jason Wessel <jason.wessel@windriver.com>
Cc: Jean-Michel Hautbois <jhautbois@gmail.com>
Cc: KGDB Mailing List <kgdb-bugreport@lists.sourceforge.net>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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__armv4_mmu_cache_flush
This got broken with commit 0e056f20
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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