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* ARM: dts: OMAP3: beagle: enable user button via gpio_keys, enable wakeupKevin Hilman2013-06-182-0/+50
| | | | | | | | | | | | | | Using the gpio-keys bindings, configure the user button on Beagle boards. Since the user button is enabled as a wakeup source, also ensure the GPIO pin is mux'd correctly and has IO ring wakeups enabled, so it can also wakeup from off mode. Special thanks to Florian Vaussard for suggesting the preprocessor feature. Cc: Florian Vaussard <florian.vaussard@epfl.ch> Signed-off-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: OMAP3: beagle/overo: mux console UART, enable wakeupKevin Hilman2013-06-183-0/+40
| | | | | | | | | | | | | | Ensure the console uart (UART3) on these boards is mux'd correctly, and IO ring wakeup is enabled. This is needed for serial console wakeups when using DT boot. Thanks to Florian Vaussard for suggestion to use preprocessor features. Cc: Florian Vaussard <florian.vaussard@epfl.ch> Signed-off-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: omap5-uevm: Add uart pinctrl dataSourav Poddar2013-06-181-0/+41
| | | | | | | | | | | | | | Booting omap5 uevm results in the following error "did not get pins for uart error: -19" This happens because omap5 uevm dts file is not adapted to use uart through pinctrl framework. Populate uart pinctrl data to get rid of the error. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> [r.sricharan@ti.com: Replaced constants with preprocessor macros] Signed-off-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: omap5-uevm: Add LED support for uEVM blue LEDDan Murphy2013-06-181-0/+16
| | | | | | | | | | | Add support for blue LED 1 off of GPIO 153. Make the LED a heartbeat LED Configure the MUX for GPIO output. Signed-off-by: Dan Murphy <dmurphy@ti.com> [r.sricharan@ti.com: Replaced constants with preprocessor macros] Signed-off-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: omap5-uevm: Add USB Host supportRoger Quadros2013-06-182-0/+100
| | | | | | | | | | | | | Provide the RESET regulators for the USB PHYs, the USB Host port modes and the PHY devices. Also provide pin multiplexer information for the USB host pins. Signed-off-by: Roger Quadros <rogerq@ti.com> [r.sricharan@ti.com: Replaced constants with preprocessor macros] Signed-off-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: omap5: Make uevm as the official board and deprecate sevm supportSricharan R2013-06-182-81/+4
| | | | | | | | | | | | | | | | | | | | | | | The uevm is the only official board supported for the OMAP5 soc in mainline. The existent sevm platform will no more be supported. Hence cleaning up the board dts file to have only the data required for uevm. Renaming the board dts file and adding the following cleanups. * There are no devices connected on I2C 2,3,4 buses. So remove the pinmux data for the same. * OMAP5432 and DDR3 memory is used in the uevm. Temperature polling is not supported with DDR3 memories. Because of DDR3 phy limitation the voltage change across DVFS and all shadow registers for DVFS on DDR3 is not supported. Hence the emif kernel driver is not required, so removing the DDR3 device file and emif nodes for uevm. * Keypad is not supported on uevm. So remove the device node. Signed-off-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: OMAP4/AM35xx: Add missing dtb in the dtbs targetFlorian Vaussard2013-06-181-1/+4
| | | | | | | | When making the dtbs target on OMAP/AM35xx, some trees are not built. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: AM33XX: Use pinctrl constantsFlorian Vaussard2013-06-184-51/+52
| | | | | | | | | Using constants for pinctrl allows a better readability, and removes redundancy with comments. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Tested-by: Afzal Mohammed <afzal@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: AM33XX: Use existing constants for GPIOsFlorian Vaussard2013-06-184-19/+21
| | | | | | | | Use standard GPIO constants to enhance the readability of DT GPIOs. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Tested-by: Afzal Mohammed <afzal@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: AM3XXX: Use #include for all device treesFlorian Vaussard2013-06-186-8/+8
| | | | | | | | | | Replace /include/ by #include for AM33XX and AM35XX device tree files, in order to use the C pre-processor, making use of #define features possible. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Tested-by: Afzal Mohammed <afzal@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: AM43x: Initial supportAfzal Mohammed2013-06-181-0/+68
| | | | | | | | | | | | | DT source (minimal) for AM4372 SoC to represent AM43x SoC's. Those represented here are the minimal DT nodes necessary to get kernel booting. In DT nodes, "ti,hwmod" property has not been added, this would be added along with PRCM support for AM43x. Signed-off-by: Ankur Kishore <a-kishore@ti.com> Signed-off-by: Afzal Mohammed <afzal@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: omap4-panda: Update the twl6040 gpio to macro definitionDan Murphy2013-06-181-1/+1
| | | | | | | | | Update the dt property ti,audpwron-gpio to use the gpio macro definition for GPIO_ACTIVE_HIGH. Signed-off-by: Dan Murphy <dmurphy@ti.com> Reviewed-by: Florian Vaussard <florian.vaussard@epfl.ch> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: omap4-panda: Update the LED support for the pandaDan Murphy2013-06-182-1/+43
| | | | | | | | | | | | | | | | The GPIO for LED D1 on the omap4-panda a1-a3 rev and the omap4-panda-es are different. A1-A3 = gpio_wk7 ES = gpio_110 There is no change to LED D2 Abstract away the pinmux and the LED definitions for the two boards into the respective DTS files. Signed-off-by: Dan Murphy <dmurphy@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: OMAP2+: Use pinctrl constantsFlorian Vaussard2013-06-1812-158/+162
| | | | | | | | | | Using constants for pinctrl allows a better readability, and removes redundancy with comments. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: OMAP4/5: Use existing constants for IRQsFlorian Vaussard2013-06-186-128/+130
| | | | | | | | | | Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: OMAP2+: Use existing constants for GPIOsFlorian Vaussard2013-06-1813-28/+36
| | | | | | | | | Use standard GPIO constants to enhance the readability of DT GPIOs. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: OMAP2+: Use #include for all device treesFlorian Vaussard2013-06-1829-44/+44
| | | | | | | | | | Replace /include/ by #include for OMAP2+ DT, in order to use the C pre-processor, making use of #define features possible. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: AM33XX: Add NAND flash device tree data to am335x-evmPhilip Avinash2013-06-181-0/+105
| | | | | | | | | | | | | GPMC controller on AM335x-EVM has a NAND flash connected to it. This patch updates following in am335x-evm.dts: - adds nandflash specific pin-mux configs - adds nand node as child of GPMC contoller, with information about NAND flash interface, NAND partition table, ECC scheme, elm handle id. - updates GPMC node for newer GPMC DT properties added in linux-3.10. Signed-off-by: Philip Avinash <avinashphilip@ti.com> Signed-off-by: Gupta, Pekon <pekon@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: AM33XX: Add ELM nodePhilip, Avinash2013-06-181-0/+8
| | | | | | | | | | | ELM hardware engine is used for locating bit-flips in NAND data This patch is required for working of hardware based NAND ECC schemes with DT support. Signed-off-by: Philip Avinash <avinashphilip@ti.com> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Pekon Gupta <pekon@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: omap3-igep0030: Add NAND flash supportJavier Martinez Canillas2013-06-181-0/+50
| | | | | | | | | The IGEP COM Module has an 512MB NAND flash memory. Add a device node for this NAND and its partition layout. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: omap3-igep0020: Add NAND flash supportJavier Martinez Canillas2013-06-181-1/+49
| | | | | | | | | The IGEPv2 board has an 512MB NAND flash memory. Add a device node for this NAND and its partition layout. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: omap3-igep0020: Add SMSC911x LAN chip supportJavier Martinez Canillas2013-06-182-0/+59
| | | | | | | | | | | The IGEPv2 board has an SMSC LAN9221i ethernet chip connected to the OMAP3 processor though the General-Purpose Memory Controller. This patch adds a device node for the ethernet chip as a GPMC child and all its dependencies (regulators, GPIO and pin muxs). Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: AM33XX: Set pinmux for clkout2 pad used for clock outputVaibhav Hiremath2013-06-183-3/+21
| | | | | | | | | | | | xdma_event_intr1.clkout2 pad can be used to source clock from either 32K OSC or any of the PLL (except MPU) outputs. On the existing AM335x based boards (EVM, EVM-SK and Bone), this pad is used to feed the clock to audio codes. So, this patch configures the pinmux to get clkout2 on the pad. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: AM33XX: Add default pinctrl binding for UART0 deviceVaibhav Hiremath2013-06-183-0/+30
| | | | | | | | | Add pin control binding for UART0 device nodes in all board specific DT files. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Matt Porter <mporter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: AM33XX: Fix uart numbering to match hardware/TRMVaibhav Hiremath2013-06-184-15/+15
| | | | | | | | | | | | With DT support, where naming convention is based on base-addr and not id, so we should follow TRM/Spec numbering label. This patch changes UART numbering as per TRM, as uart0-5. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Matt Porter <mporter@ti.com> Cc: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: AM33XX: Add pinctrl binding to gpio-leds nodeVaibhav Hiremath2013-06-182-2/+8
| | | | | | | | | | Now gpio-leds driver is using devm_pinctrl_get_select_default() api to set default pinmux configuration required for the functionality of the driver, so this patch moves respective pinctrl binding inside leds node. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: AM33XX: Add default pinctrl binding for I2C deviceVaibhav Hiremath2013-06-183-0/+40
| | | | | | | | | | | | Add pin control binding for I2C device nodes in all board specific DT files (as per current usage), EVM: Both i2c0 and i2c1 EVM-SK and Bone: Only i2c0 Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Matt Porter <mporter@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* ARM: dts: OMAP4+: Remove multimedia carveoutsSuman Anna2013-06-182-16/+0
| | | | | | | | | | The carveouts that have been reserved for multimedia usecases are not being used currently by any driver and so have been cleaned up. Memory will be allocated runtime through CMA for enabling the multimedia usecases. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
* Merge tag 'fixes-for-linus' of ↵Linus Torvalds2013-06-1513-29/+96
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Olof Johansson: "These are a little later than I planned on since I got caught up with handling merges for 3.11 most of the week. Another week, another batch of fixes for arm-soc platforms. Again, nothing controversial. A few more than would be ideal, but all are valid fixes. In particular the prima2 panic patch is critical since it fixes a problem where multiplatform kernels panic on all but prima2 hardware." * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: SAMSUNG: pm: Adjust for pinctrl- and DT-enabled platforms ARM: prima2: fix incorrect panic usage arm: mvebu: armada-xp-{gp,openblocks-ax3-4}: specify PCIe range ARM: Kirkwood: handle mv88f6282 cpu in __kirkwood_variant(). ARM: omap3: clock: fix wrong container_of in clock36xx.c ARM: dts: OMAP5: Fix missing PWM capability to timer nodes ARM: dts: omap4-panda|sdp: Fix mux for twl6030 IRQ pin and msecure line ARM: dts: AM33xx: Fix properties on gpmc node arm: omap2: fix AM33xx hwmod infos for UART2 ARM: OMAP3: Fix iva2_pwrdm settings for 3703
| * Merge tag 'fixes-3.10-4' of git://git.infradead.org/users/jcooper/linux into ↵Olof Johansson2013-06-113-6/+9
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fixes From Jason Cooper, mvebu fixes for v3.10 round 4: - mvebu - fix PCIe ranges property so NOR flash is visible - kirkwood - fix identification of 88f6282 so MPPs can be set correctly * tag 'fixes-3.10-4' of git://git.infradead.org/users/jcooper/linux: arm: mvebu: armada-xp-{gp,openblocks-ax3-4}: specify PCIe range ARM: Kirkwood: handle mv88f6282 cpu in __kirkwood_variant(). Signed-off-by: Olof Johansson <olof@lixom.net>
| | * arm: mvebu: armada-xp-{gp,openblocks-ax3-4}: specify PCIe rangeThomas Petazzoni2013-06-062-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ranges DT entry needed by the PCIe controller is defined at the SoC .dtsi level. However, some boards have a NOR flash, and to support it, they need to override the SoC-level ranges property to add an additional range. Since PCIe and NOR support came separately, some boards were not properly changed to include the PCIe range in their ranges property at the .dts level. This commit fixes those platforms. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * ARM: Kirkwood: handle mv88f6282 cpu in __kirkwood_variant().Nicolas Schichan2013-06-061-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MPP_F6281_MASK would be previously be returned when on mv88f6282, which would disallow some valid MPP configurations. Commit 830f8b91 (arm: plat-orion: fix printing of "MPP config unavailable on this hardware") made this problem visible as an invalid MPP configuration is now correctly detected and not applied. Signed-off-by: Nicolas Schichan <nschichan@freebox.fr> Cc: <stable@vger.kernel.org> # v3.9.x Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| * | ARM: SAMSUNG: pm: Adjust for pinctrl- and DT-enabled platformsTomasz Figa2013-06-111-5/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes legacy code on suspend/resume path being executed conditionally, on non-DT platforms only, to fix suspend/resume of DT-enabled systems, for which the code is inappropriate. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> [olof: add #include <linux/of.h>] Signed-off-by: Olof Johansson <olof@lixom.net>
| * | ARM: prima2: fix incorrect panic usageHaojian Zhuang2013-06-112-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In prima2, some functions of checking DT is registered in initcall level. If it doesn't match the compatible name of sirf, kernel will panic. It blocks the usage of multiplatform on other verndor. The error message is in below. Knic - not syncing: unable to find compatible pwrc node in dtb CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.10.0-rc3-00006-gd7f26ea-dirty #86 [<c0013adc>] (unwind_backtrace+0x0/0xf8) from [<c0011430>] (show_stack+0x10/0x1) [<c0011430>] (show_stack+0x10/0x14) from [<c026f724>] (panic+0x90/0x1e8) [<c026f724>] (panic+0x90/0x1e8) from [<c03267fc>] (sirfsoc_of_pwrc_init+0x24/0x) [<c03267fc>] (sirfsoc_of_pwrc_init+0x24/0x58) from [<c0320864>] (do_one_initcal) [<c0320864>] (do_one_initcall+0x90/0x150) from [<c0320a20>] (kernel_init_freeab) [<c0320a20>] (kernel_init_freeable+0xfc/0x1c4) from [<c026b9e8>] (kernel_init+0) [<c026b9e8>] (kernel_init+0x8/0xe4) from [<c000e158>] (ret_from_fork+0x14/0x3c) Signen-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
| * | Merge tag 'omap-for-v3.10/fixes-v3.10-rc4' of ↵Olof Johansson2013-06-097-14/+66
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes From Tony Lindgren, a set of small fixes for omaps for the -rc cycle: - am7303 iva2 reset PM regression fix - am33xx uart2 dma channel fix - am33xx gpmc properties fix - omap44xx rtc wake-up mux fix for nirq pins - omap36xx clock divider restore fix There's also one tiny non-critical .dts fix for omap5 timer pwm properties. * tag 'omap-for-v3.10/fixes-v3.10-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: omap3: clock: fix wrong container_of in clock36xx.c ARM: dts: OMAP5: Fix missing PWM capability to timer nodes ARM: dts: omap4-panda|sdp: Fix mux for twl6030 IRQ pin and msecure line ARM: dts: AM33xx: Fix properties on gpmc node arm: omap2: fix AM33xx hwmod infos for UART2 ARM: OMAP3: Fix iva2_pwrdm settings for 3703
| | * \ Merge tag 'omap-fixes-b-for-3.10-rc' of ↵Tony Lindgren2013-06-072-10/+17
| | |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.10/fixes More OMAP hwmod and clock fixes for v3.10-rc. Fixes the AM33xx UART2. Also fixes some CCF-related breakage on OMAP36xx/37xx, affecting DSS at the very least. Basic test logs for this branch are here: http://www.pwsan.com/omap/testlogs/fixes_b_v3.10-rc/20130606093449/
| | | * | ARM: omap3: clock: fix wrong container_of in clock36xx.cJean-Philippe Francois2013-06-061-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | omap36xx_pwrdn_clk_enable_with_hsdiv_restore expects the parent hw of the clock to be a clk_hw_omap. However, looking at cclock3xxx_data.c, all concerned clock have parent defined as clk_divider. Fix the function to use clk_divider. Tested with 3.9 on dm3730. Signed-off-by: Jean-Philippe François <jp.francois@cynove.com> Cc: NeilBrown <neilb@suse.de> Cc: Mike Turquette <mturquette@linaro.org> Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | | * | arm: omap2: fix AM33xx hwmod infos for UART2Thomas Petazzoni2013-06-031-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The UART2 hwmod structure is pointing to the EDMA channels of UART1, which doesn't look right. This patch fixes this by making the UART2 hwmod structure to a new structure that lists the EDMA channels to be used by the UART2. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Vaibhav Hiremath <hvaibhav@ti.com> [paul@pwsan.com: updated to apply] Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | | Merge branch 'dts-fixes-for-3.10' of ↵Tony Lindgren2013-06-0712-20/+165
| | |\ \ \ | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt into omap-for-v3.10/fixes
| | | * | | ARM: dts: OMAP5: Fix missing PWM capability to timer nodesSuman Anna2013-06-031-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP5 has 6 timers (GPTimers 5, 6, 8 to 11) that are capable of PWM. The PWM capability property is missing from the node definitions of couple of timers. Add ti,timer-pwm attribute for timer 5, 6, 8 and 11. Signed-off-by: Suman Anna <s-anna@ti.com> [benoit.cousson@linaro.org: Update changelog and subject to highlight the fix] Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
| | | * | | ARM: dts: omap4-panda|sdp: Fix mux for twl6030 IRQ pin and msecure lineKevin Hilman2013-06-032-0/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Earlier commits ensured proper muxing of pins related to proper TWL6030 behavior: see commit 265a2bc8 (ARM: OMAP3: TWL4030: ensure sys_nirq1 is mux'd and wakeup enabled) and commit 1ef43369 (ARM: OMAP4: TWL: mux sys_drm_msecure as output for PMIC). However these only fixed legacy boot and not DT boot. For DT boot, the default mux values need to be set properly in DT. Special thanks to Nishanth Menon for the review and catching some major flaws in earlier versions. Tested on OMAP4430/Panda and OMAP4460/Panda-ES. Cc: Nishanth Menon <nm@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Kevin Hilman <khilman@linaro.org> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> [benoit.cousson@linaro.org: Slightly change the subject to align board name with file name] Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
| | | * | | ARM: dts: AM33xx: Fix properties on gpmc nodeLars Poeschel2013-06-031-2/+2
| | | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The gpmc driver is actually looking for "gpmc,num-cs" and "gpmc,num-waitpins" properties in DT. The binding doc also states this. Correct the properties in the dts to provide the right values for the gpmc driver. Signed-off-by: Lars Poeschel <poeschel@lemonage.de> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Acked-by: Pekon Gupta <pekon@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
| | * | | ARM: OMAP3: Fix iva2_pwrdm settings for 3703Tony Lindgren2013-05-301-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit a819c4f1 (ARM: OMAP3: PM: Only access IVA if one exists) changed PM to not access IVA registers on omaps that don't have them. Turns out we still need to idle iva2 as otherwise iva2_pwrdm will stay on and block deeper idle states. It seems that the only part of the reset that may not be needed is the setting of the iva2 boot mode to idle. But as that register seems to be there and is harmless if no iva2 is on the SoC, it's probably safest to do the complete reset. Acked-by: Mark A. Greer <mgreer@animalcreek.com> Acked-by: Kevin Hilman <khilman@linaro.org> Tested-by: Yegor Yefremov <yegorslists@googlemail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | | | | Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-armLinus Torvalds2013-06-097-5/+45
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM fixes from Russell King: "The biggest two fixes are fixing a compilation error with the decompressor, and a problem with our __my_cpu_offset implementation. Other changes are very trivial and small, which seems to be the way for most -rc stuff." * 'fixes' of git://git.linaro.org/people/rmk/linux-arm: ARM: 7747/1: pcpu: ensure __my_cpu_offset cannot be re-ordered across barrier() ARM: 7750/1: update legacy CPU ID in decompressor cache support jump table ARM: 7743/1: compressed/head.S: work around new binutils warning ARM: 7742/1: topology: export cpu_topology ARM: 7737/1: fix kernel decompressor compilation error with CONFIG_DEBUG_SEMIHOSTING
| * | | | | ARM: 7747/1: pcpu: ensure __my_cpu_offset cannot be re-ordered across barrier()Will Deacon2013-06-051-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | __my_cpu_offset is non-volatile, since we want its value to be cached when we access several per-cpu variables in a row with preemption disabled. This means that we rely on preempt_{en,dis}able to hazard with the operation via the barrier() macro, so that we can't end up migrating CPUs without reloading the per-cpu offset. Unfortunately, GCC doesn't treat a "memory" clobber on a non-volatile asm block as a side-effect, and will happily re-order it before other memory clobbers (including those in prempt_disable()) and cache the value. This has been observed to break the cmpxchg logic in the slub allocator, leading to livelock in kmem_cache_alloc in mainline kernels. This patch adds a dummy memory input operand to __my_cpu_offset, forcing it to be ordered with respect to the barrier() macro. Cc: <stable@vger.kernel.org> Cc: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | ARM: 7750/1: update legacy CPU ID in decompressor cache support jump tableMarc C2013-06-051-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The previous mask values for the legacy ARM CPU IDs were conflicting with the CPU ID assignments for late-generation CPUs (like the Qualcomm MSM/QSD or Broadcom Brahma-15 processors). This change corrects the legacy ARM CPU ID value so that the jump table can fall-through to the appropriate cache maintenance / MMU functions. Signed-off-by: Marc C <marc.ceeeee@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | ARM: 7743/1: compressed/head.S: work around new binutils warningArnd Bergmann2013-06-054-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In August 2012, Matthew Gretton-Dann checked a change into binutils labelled "Error on obsolete & warn on deprecated registers", apparently as part of ARMv8 support. Apparently, this was supposed to emit the message "Warning: This coprocessor register access is deprecated in ARMv8" when using certain mcr/mrc instructions and building for ARMv8. Unfortunately, the message that is actually emitted appears to be '(null)', which is less helpful in comparison. Even more unfortunately, this is biting us on every single kernel build with a new gas, because arch/arm/boot/compressed/head.S and some other files in that directory are built with -march=all since kernel commit 80cec14a8 "[ARM] Add -march=all to assembly file build in arch/arm/boot/compressed" back in v2.6.28. This patch reverts Russell's nice solution and instead marks the head.S file to be built for armv7-a, which fortunately lets us build all instructions in that file without warnings even on the broken binutils. Without this patch, building anything results in: arch/arm/boot/compressed/head.S: Assembler messages: arch/arm/boot/compressed/head.S:565: Warning: (null) arch/arm/boot/compressed/head.S:676: Warning: (null) arch/arm/boot/compressed/head.S:698: Warning: (null) arch/arm/boot/compressed/head.S:722: Warning: (null) arch/arm/boot/compressed/head.S:726: Warning: (null) arch/arm/boot/compressed/head.S:957: Warning: (null) arch/arm/boot/compressed/head.S:996: Warning: (null) arch/arm/boot/compressed/head.S:997: Warning: (null) arch/arm/boot/compressed/head.S:1027: Warning: (null) arch/arm/boot/compressed/head.S:1035: Warning: (null) arch/arm/boot/compressed/head.S:1046: Warning: (null) arch/arm/boot/compressed/head.S:1060: Warning: (null) arch/arm/boot/compressed/head.S:1092: Warning: (null) arch/arm/boot/compressed/head.S:1094: Warning: (null) arch/arm/boot/compressed/head.S:1095: Warning: (null) arch/arm/boot/compressed/head.S:1102: Warning: (null) arch/arm/boot/compressed/head.S:1134: Warning: (null) Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: stable@vger.kernel.org Cc: Matthew Gretton-Dann <matthew.gretton-dann@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | ARM: 7742/1: topology: export cpu_topologyArnd Bergmann2013-06-051-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cpu_topology symbol is required by any driver using the topology interfaces, which leads to a couple of build errors: ERROR: "cpu_topology" [drivers/net/ethernet/sfc/sfc.ko] undefined! ERROR: "cpu_topology" [drivers/cpufreq/arm_big_little.ko] undefined! ERROR: "cpu_topology" [drivers/block/mtip32xx/mtip32xx.ko] undefined! The obvious solution is to export this symbol. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Will Deacon <will.deacon@arm.com> Cc: stable@vger.kernel.org Cc: Nicolas Pitre <nico@linaro.org> Cc: Vincent Guittot <vincent.guittot@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | ARM: 7737/1: fix kernel decompressor compilation error with ↵Nicolas Pitre2013-06-051-0/+28
| | |_|/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_DEBUG_SEMIHOSTING Selecting this option produces: AS arch/arm/boot/compressed/debug.o arch/arm/boot/compressed/debug.S:4:33: fatal error: mach/debug-macro.S: No such file or directory compilation terminated. make[3]: *** [arch/arm/boot/compressed/debug.o] Error 1 The semihosting support cannot be modelled into a senduart macro as it requires memory space for argument passing. So the CONFIG_DEBUG_LL_INCLUDE may not have any sensible value and the include directive should be omitted. While at it, let's add proper semihosting output support to the decompressor. Signed-off-by: Nicolas Pitre <nico@linaro.org> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | | Merge tag 'fixes-for-linus' of ↵Linus Torvalds2013-06-0813-30/+44
|\ \ \ \ \ | | |/ / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Olof Johansson: "Another week, another batch of fixes for arm-soc platforms. Nothing controversial here, a handful of fixes for regressions and/or serious problems across several of the platforms. Things are slowing down nicely on fix rates for 3.10" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: exynos: add debug_ll_io_init() call in exynos_init_io() ARM: EXYNOS: uncompress - print debug messages if DEBUG_LL is defined ARM: shmobile: sh73a0: Update CMT clockevent rating to 80 sh-pfc: r8a7779: Don't group USB OVC and PENC pins ARM: mxs: icoll: Fix interrupts gpio bank 0 ARM: imx: clk-imx6q: AXI clock select index is incorrect ARM: bcm2835: override the HW UART periphid ARM: mvebu: Fix bug in coherency fabric low level init function ARM: Kirkwood: TS219: Fix crash by double PCIe instantiation ARM: ux500: Provide supplies for AUX1, AUX2 and AUX3 ARM: ux500: Only configure wake-up reasons on ux500 based platforms ARM: dts: imx: fix clocks for cspi ARM i.MX6q: fix for ldb_di_sels
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