Commit message (Collapse) | Author | Age | Files | Lines | |
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* | [ARM] nommu: abort handler fixup for !CPU_CP15_MMU cores. | Hyok S. Choi | 2006-09-28 | 1 | -1/+1 |
| | | | | | | | | | | There is no FSR/FAR register on no-CP15 or MPU cores. This patch adds a dummy abort handler which returns zero for the base restored Data Abort model !CPU_CP15_MMU cores. The abort-lv4t.S is still used with the fix-up for the base updated Data Abort model cores. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> | ||||
* | [ARM] nommu: add ARM946E-S core support | Hyok S. Choi | 2006-09-27 | 1 | -0/+424 |
This patch adds ARM946E-S core support which has typically 8KB I&D cache. It has a MPU and supports ARMv5TE instruction set. Because the ARM946E-S core can be synthesizable with various cache size, CONFIG_CPU_DCACHE_SIZE is defined for vendor specific configurations. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> |