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* OMAP4: DSS2: Add hwmod device names for OMAP4.Mayuresh Janorkar2011-03-111-7/+13
| | | | | | | | | Add hwmod device names for OMAP4; this enables device build for omap4 dss hwmod IPs. Signed-off-by: Sumit Semwal <sumit.semwal@ti.com> Signed-off-by: Mayuresh Janorkar <mayur@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP4: DSS2: clocks: Add ick as dummy clockSumit Semwal2011-03-111-0/+5
| | | | | | | | | | | | DSS code uses ick as one of the clocks in clk_get/clk_put. OMAP4 clock database doesn't have ick for DSS, so adding ick as dummy clock. This is needed for backward compatibility with OMAP2/3. Once pm_runtime* APIs get introduced in DSS, this will be revisited. Signed-off-by: Sumit Semwal <sumit.semwal@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP2PLUS: clocks: Align DSS clock names and rolesSumit Semwal2011-03-115-17/+17
| | | | | | | | | | | | | | | | Currently, clock database has <dev, clock-name> tuples for DSS2. Because of this, the clock names are different across different OMAP platforms. This patch aligns the DSS2 clock names and roles across OMAP 2420, 2430, 3xxx, 44xx platforms in the clock databases, hwmod databases for opt-clocks, and DSS clock handling. This ensures that clk_get/put/enable/disable APIs in DSS can use uniform role names. Signed-off-by: Sumit Semwal <sumit.semwal@ti.com> Acked-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP2, 3: DSS2: DSI: create platform_driver, move init, exit to driverSenthilvadivu Guruswamy2011-03-118-24/+38
| | | | | | | | | | | | | | | | Hwmod adaptation design requires each of the DSS HW IP to be a platform driver. So a platform_driver for DSI is created and init exit methods are moved from core.c to its driver probe,remove. pdev member has to be maintained by its own drivers. Also, vdds_dsi regulator handling is copied to dsi.c, since vdds_dsi regulator is needed by dpi_init() too. Board files are updated accordingly to add 2 instances of vdds_dsi regulator. DSI platform driver is registered from inside omap_dss_probe, in the order desired. Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com> Signed-off-by: Sumit Semwal <sumit.semwal@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP2, 3: DSS2: VENC: create platform_driver, move init, exit to driverSenthilvadivu Guruswamy2011-03-119-9/+9
| | | | | | | | | | | | | | Hwmod adaptation design requires each of the DSS HW IP to be a platform driver. So a platform_driver for VENC is created and init exit methods are moved from core.c to its driver probe,remove. pdev member has to be maintained by its own drivers. Also, venc_vdda_dac reading is moved to venc.c. VENC platform driver is registered from inside omap_dss_probe, in the order desired. Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com> Signed-off-by: Sumit Semwal <sumit.semwal@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP2, 3: DSS2: Move clocks from core driver to dss driverSenthilvadivu Guruswamy2011-03-113-15/+15
| | | | | | | | | | | | | | | | | | | All clock management is moved to dss platform driver. clk_get/put APIs use dss device instead of core platform device. Hwmod adaptation design requires each of the DSS HW IP to be a platform driver. So the device name is changed from omapdss to omapdss_dss in 2420, 2430, 3xxx clock database files. Now the core driver "omapdss" only takes care of panel registration with the custom bus. core driver also uses the clk_enable() / clk_disable() APIs exposed by DSS for clock management. DSS driver would do clock management of clocks needed by DISPC, RFBI, DSI, VENC TODO: The clock content would be adapted to omap_hwmod in a seperate series. Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com> Signed-off-by: Sumit Semwal <sumit.semwal@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP2,3: DSS2: Build omap_device for each DSS HWIPSenthilvadivu Guruswamy2011-03-111-0/+52
| | | | | | | | | Looks up the hwmod database for each of the given DSS HW IP and builds omap_device which inturn does the platform device register for each of DSS HW IP Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com> Signed-off-by: Sumit Semwal <sumit.semwal@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP: 3430SDP: Remove unused vdda_dac supplyTomi Valkeinen2011-03-111-3/+0
| | | | | | | Remove extra vdda_dac supply definition. It was a leftover from conflict resolution. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* Merge branch 'for_2.6.39/pm-misc' of ↵Tony Lindgren2011-03-1017-244/+339
|\ | | | | | | ssh://master.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into omap-for-linus
| * OMAP3: PM: Clear the SCTLR C bit in asm code to prevent data cache allocationSantosh Shilimkar2011-03-101-0/+27
| | | | | | | | | | | | | | | | | | | | | | On the newer ARM processors like CortexA8, CortexA9, the caches can be speculatively loaded while they are getting flushed. Clear the SCTLR C bit to prevent further data cache allocation as part of cache clean routine Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * OMAP3: PM: Remove un-necessary cp15 registers form low power cpu contextSantosh Shilimkar2011-03-101-116/+40
| | | | | | | | | | | | | | | | | | | | | | The current code saves few un-necessary registers which are read-only or write-only, unused CP15 registers. Remove them and keep only necessary CP15 registers part of low power context save/restore. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * OMAP3: PM: Allow the cache clean when L1 is lost.Santosh Shilimkar2011-03-101-12/+3
| | | | | | | | | | | | | | | | | | | | | | When L1 cache is suppose to be lost, it needs to be cleaned before entrering to the low power mode. While at this, also fix few comments and remove un-necessary clean_l2 lable. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * OMAP3: PM: Fix the MMU on sequence in the asm codeSantosh Shilimkar2011-03-101-0/+5
| | | | | | | | | | | | | | | | Add necessary barriers after enabling MMU. Also use the sane way to load pc and jump to it instead of executing ldma first up. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * OMAP3: PM: Use ARMv7 supported instructions instead of legacy CP15 onesSantosh Shilimkar2011-03-101-11/+10
| | | | | | | | | | | | | | | | | | On ARMv7 dsb, dmb instructions are supported and can be used directly instead of their cp15 equivalnet. Also remove the opcodes for smc and use the available instruction directly in OMAP3 low power asm code Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * OMAP2+: smartreflex: remove SR debug directory in omap_sr_remove()Anand S Sawant2011-03-091-10/+13
| | | | | | | | | | | | | | | | | | | | | | omap_sr_probe() creates the smartreflex debug directory and its underlying nvalue debug directory. These directories are removed in omap_sr_remove(). Basic smartreflex functionality tested on OMAP3630 Zoom3 & OMAP4430 SDP Signed-off-by: Anand S Sawant <sawant@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * ARM: omap3: Thumb-2 compatibility for sleep34xx.SDave Martin2011-03-091-5/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Build unconditionally as ARM for correct interoperation with OMAP firmware. * Fix an out-of-range ADR when building for ARM. * Remove deprecated PC-relative stores. * Add the required ENDPROC() directive for each ENTRY(). * .align before data words. * Handle non-interworking return from v7_flush_dcache_all. Signed-off-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * ARM: omap3: Thumb-2 compatibility for sram34xx.SDave Martin2011-03-091-8/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Build unconditionally as ARM for correct interoperation with OMAP firmware. * Remove deprecated PC-relative stores * Add the required ENDPROC() directive for each ENTRY(). * .align before data words Signed-off-by: Dave Martin <dave.martin@linaro.org> Tested-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * ARM: omap3: Remove hand-encoded SMC instructionsDave Martin2011-03-091-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For various reasons, Linux now only officially supports being built with tools which are new enough to understand the SMC instruction. Replacing the hand-encoded instructions when the mnemonic also allows for correct assembly in Thumb-2 (otherwise, the result is random data in the middle of the code). The Makefile already ensures that this file is built with a high enough gcc -march= flag (armv7-a). Signed-off-by: Dave Martin <dave.martin@linaro.org> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * ARM: omap4: Convert END() to ENDPROC() for correct linkage with ↵Dave Martin2011-03-092-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_THUMB2_KERNEL Code marked with ENTRY() also needs a matching ENDPROC() directive, in order to ensure that the type and instruction set of the symbol are correctly annotated. ENDPROC() tags the affected symbol as a function symbol, which will ensure that link-time fixups don't accidentally switch to the wrong instruction set. Signed-off-by: Dave Martin <dave.martin@linaro.org> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * ARM: omap4: Provide do_wfi() for Thumb-2Dave Martin2011-03-091-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | For CONFIG_THUMB2_KERNEL, the existing definition of do_wfi() will insert invalid code into the instruction stream. Any assembler which can assemble Thumb-2 is guaranteed to accept the "wfi" mnemonic, so for the Thumb-2 case, just use the mnemonic. The ARM case is left as-is. Signed-off-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * OMAP3: PM: Initialize IVA only if availableSanjeev Premi2011-03-091-1/+3
| | | | | | | | | | | | | | | | | | | | IVA device is not present in many OMAP3 variants. This patch ensures that initialization is tied to the presence of IVA on the device. Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * OMAP3: PM: Set/clear T2 bit for Smartreflex on TWLThara Gopinath2011-03-092-0/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Voltage control on TWL can be done using VMODE/I2C1/I2C_SR. Since almost all platforms use I2C_SR on omap3, omap3_twl_init by default expects that OMAP's I2C_SR is plugged in to TWL's I2C and calls omap3_twl_set_sr_bit. On platforms where I2C_SR is not connected, the board files are expected to call omap3_twl_set_sr_bit(false) to ensure that I2C_SR path is not set for voltage control and prevent the default behavior of omap3_twl_init. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Thara Gopinath <thara@ti.com> Signed-off-by: Shweta Gulati <shweta.gulati@ti.com> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Kevin Hilman <khilman@ti.com>
| * omap3: cpuidle: Add description field to each C-state.Santosh Shilimkar2011-03-091-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | Add a description field to each idle C-state. This helps to give better data with PowerTop and one don't have to refer to the code to link what Cx means from system point of view while analysing PowerTop data. No functional change. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * omap3: pm: Use exported set_cr() instead of a custom one.Santosh Shilimkar2011-03-091-6/+1
| | | | | | | | | | | | | | | | | | | | | | Remove the custom restore_control_register() and use the exported set_cr() instead to set the system control register(SCTRL) value. No functional change. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * OMAP2/3: PM: remove unnecessary wakeup/sleep dependency clearPaul Walmsley2011-03-092-22/+1
| | | | | | | | | | | | | | | | | | | | | | The OMAP2 and OMAP3 PM code clears clockdomain wakeup and sleep dependencies. This is unnecessary after commit 6f7f63cc9adf3192e6fcac4e8bed5cc10fd924aa ("OMAP clockdomain: initialize clockdomain registers when the clockdomain layer starts") which clears these dependencies during clockdomain init. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * OMAP2+: remove unused UART base addresses from omap_globalsKevin Hilman2011-03-091-14/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | Now that omap_hwmod + omap_device is used for OMAP UART device and driver code, we no longer need the UART physical addresses in omap_globals. Note that the #defines for the base addresses are still left in <plat/serial.h> since they are used by DEBUG_LL and uncompress code. Build tested for OMAP1 (omap1_defconfig) and OMAP2+ (omap2plus_defconfig) Signed-off-by: Kevin Hilman <khilman@ti.com>
| * OMAP: PM: SmartReflex: fix potential NULL dereferenceVasiliy Kulikov2011-03-091-3/+5
| | | | | | | | | | | | | | | | kzalloc() may fail, if so return -ENOMEM. Also Walter Harms suggested to use kasprintf() instead of kzalloc+strcpy+strcat. Signed-off-by: Vasiliy Kulikov <segoon@openwall.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * OMAP3: beagle xm: enable up to 800MHz OPPNishanth Menon2011-03-091-0/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMP3630 silicon can enable higher frequencies only depending on the board characteristics meeting the recommended standards, and has to be selectively toggled. Beagle XM uses 3730 variant and the board design allows enabling 800MHz and 1GHz OPPs. However, We need Smart reflex class 1.5 and ABB to enable 1GHz safely. For the moment, we tweak the default table to allow for 800Mhz OPP usage. Reported-by: Koen Kooi <koen@beagleboard.org> Tested-by: Koen Kooi <koen@beagleboard.org> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * OMAP3|4: OPP: make omapx_opp_init non-staticMenon, Nishanth2011-03-092-2/+4
| | | | | | | | | | | | | | | | | | | | | | omap3 and omap4 opp_init should be made non-static to allow for platform specific opp table tweaking. making these static conflicts with the definition in pm.h(global) as well. we include pm.h as well to ensure that there are no such prototype conflicts with actual implementation in the future. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * OMAP3630: PM: don't warn the user with a trace in case of PM34XX_ERRATUMRicardo Salveti de Araujo2011-03-092-3/+2
| | | | | | | | | | | | | | | | | | | | In case in user has a OMAP3630 < ES1.2 the kernel should warn the user about the ERRATUM, but using pr_warn instead of WARN_ON is already enough, as there is nothing else the user can do besides changing the board. Signed-off-by: Ricardo Salveti de Araujo <ricardo.salveti@canonical.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * Merge branch 'for_2.6.38/pm-fixes' of ↵Tony Lindgren2011-03-031-18/+15
| |\ | | | | | | | | | ssh://master.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into devel-fixes
| | * OMAP2+: PM: SmartReflex: fix memory leaks in Smartreflex driverShweta Gulati2011-03-021-6/+12
| | | | | | | | | | | | | | | | | | | | | | | | This Patch frees all the dynamically allocated memory which couldn't have been released in some error hitting cases. Signed-off-by: Shweta Gulati <shweta.gulati@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| | * arm: mach-omap2: smartreflex: fix another memory leakAaro Koskinen2011-03-021-12/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Temporary strings with volt_* file names should be released after the debugfs entries are created. While at it, also simplify the string allocation, and use just snprintf() to create the name. The patch eliminates kmemleak reports with the following stack trace (multiple objects depending on HW): unreferenced object 0xcedbc5a0 (size 64): comm "swapper", pid 1, jiffies 4294929375 (age 423.734s) hex dump (first 32 bytes): 76 6f 6c 74 5f 39 37 35 30 30 30 00 00 00 00 00 volt_975000..... 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ backtrace: [<c012fee0>] create_object+0x104/0x208 [<c012dbc8>] kmem_cache_alloc_trace+0xf0/0x17c [<c0013f64>] omap_sr_probe+0x314/0x420 [<c02a1724>] platform_drv_probe+0x18/0x1c [<c02a088c>] driver_probe_device+0xc8/0x188 [<c02a09b4>] __driver_attach+0x68/0x8c [<c02a00ac>] bus_for_each_dev+0x44/0x74 [<c029f9e0>] bus_add_driver+0xa0/0x228 [<c02a0cac>] driver_register+0xa8/0x130 [<c02a1b2c>] platform_driver_probe+0x18/0x8c [<c0013c1c>] sr_init+0x40/0x74 [<c005a554>] do_one_initcall+0xc8/0x1a0 [<c00084f4>] kernel_init+0x150/0x218 [<c0065d64>] kernel_thread_exit+0x0/0x8 [<ffffffff>] 0xffffffff Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | omap: mailbox: resolve hang issueHari Kanigeri2011-03-031-4/+6
| |/ | | | | | | | | | | | | | | | | | | | | omap4 interrupt disable bits is different. On rx kfifo full, the mbox rx interrupts wasn't getting disabled, and this is causing the rcm stress tests to hang. Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com> Signed-off-by: Armando Uribe <x0095078@ti.com> Signed-off-by: Fernando Guzman Lugo <fernando.lugo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | Merge branch 'omap-l3-for-next' of ↵Tony Lindgren2011-03-098-2/+1163
|\ \ | | | | | | | | | git://dev.omapzoom.org/pub/scm/santosh/kernel-omap4-base into omap-for-linus
| * | OMAP4: l3: Introduce l3-interconnect error handling driverSantosh Shilimkar2011-03-093-0/+386
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver provides the information regarding the ocp errors that gets logged in the interconnect. The error information gives the detail regarding the target that was attempted to be accessed and its corresponding address. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Benoit Cousson <b-cousson@ti.com>
| * | OMAP4: Initialise the l3 device with the hwmod data.sricharan2011-03-091-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The l3 interconnect device is build with all the data required to handle the error logging. The data is extracted from the hwmod data base. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: sricharan <r.sricharan@ti.com> Acked-by: Benoit Cousson <b-cousson@ti.com>
| * | OMAP4: hwmod_data: Add address space and irq in L3 hwmod.sricharan2011-03-091-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add the address spaces, irqs of the l3 interconnect to the hwmod data. The hwmod change is aligned with Benoit Cousson. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: sricharan <r.sricharan@ti.com> Acked-by: Benoit Cousson <b-cousson@ti.com>
| * | OMAP3: l3: Introduce l3-interconnect error handling driverFelipe Balbi2011-03-093-0/+655
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver provides the information regarding the ocp errors that gets logged in the interconnect.The error info provides the details regarding the master or the target that generated the error, type of error and the corresponding address. The stack dump is also provided. Signed-off-by: sricharan <r.sricharan@ti.com> [r.sricharan@ti.com: Enhacements, major cleanup and made it functional] Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [santosh.shilimkar@ti.com: Driver design changes as per OMAP4 version] Signed-off-by: Felipe Balbi <balbi@ti.com> [balbi@ti.com: Initial version of the driver] Acked-by: Benoit Cousson <b-cousson@ti.com>
| * | OMAP3: devices: Initialise the l3 device with the hwmod data.sricharan2011-03-091-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The l3 interconnect device is build with all the data required to handle the error logging. The data is extracted from the hwmod database. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Benoit Cousson <b-cousson@ti.com>
| * | OMAP3: hwmod_data: Add address space and irq in L3 hwmod.sricharan2011-03-091-2/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add the address spaces, irqs of the l3 interconnect to the hwmod data. The hwmod changes are aligned with Benoit Cousson. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Benoit Cousson <b-cousson@ti.com>
* | | OMAP2/3: VENC hwmod: add OCPIF_SWSUP_IDLE flag to interfacePaul Walmsley2011-03-093-0/+3
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the hwmod interface data, the DSS submodule "VENC" uses a clock, "dss_54m_fck"/"dss_tv_fck", which the PRCM cannot autoidle. By default, the hwmod code assumes that interface clocks can be autoidled by the PRCM. When the interface clock can't be autoidled by the PRCM, those interfaces must be marked with the OCPIF_SWSUP_IDLE flag. Otherwise, the "interface clock" will always have a non-zero use count, and the device won't enter idle. This problem was observed on N8x0. Fix the immediate problem by marking the VENC interface with the OCPIF_SWSUP_IDLE flag. But it's not clear that "dss_54m_fck"/"dss_tv_fck" is really the correct interface clock for VENC. It may be that the VENC interface should use a hardware-autoidling interface clock. This is the situation on OMAP4, which uses "l3_div_ck" as the VENC interface clock, which can be autoidled by the PRCM. Clarification from TI is needed. Problem found and patch tested on N8x0 by Tony Lindgren <tony@atomide.com>. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Senthilvadivu Guruswamy <svadivu@ti.com> Cc: Sumit Semwal <sumit.semwal@ti.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Benoît Cousson <b-cousson@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | audio : AM3517 : Adding i2c info for AIC23 codecAbhilash Vadakkepat Koyamangalath2011-03-081-0/+3
| | | | | | | | | | | | | | | | | | The i2c_board_info entry supporting AIC23 codec was added into the i2c2 bus. Signed-off-by: Abhilash K V <abhilash.kv@ti.com> Acked-by: Jarkko Nikula <jhnikula@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | Revert "OMAP4: hwmod data: Prevent timer1 to be reset and idle during init"Benoit Cousson2011-03-041-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The following commit: 38698be: OMAP2+: clockevent: set up GPTIMER clockevent hwmod right before timer init Fixed properly the issue with early init for the timer1 So reverts commit 3b03b58dab847883e6b9a431558c7d8e43fa94c6 that is now generated a warning at boot time. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Reviewed-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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*-----. \ Merge branches 'devel-iommu-mailbox', 'devel-mcbsp', 'devel-board' and ↵Tony Lindgren2011-03-0243-885/+2116
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'devel-hsmmc' into omap-for-linus Conflicts: arch/arm/mach-omap2/omap_hwmod_44xx_data.c
| | | | * | OMAP: hsmmc: Rename the device and driverKishore Kadiyala2011-03-0116-53/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modifying the device & driver name from "mmci-omap-hs" to "omap_hsmmc". Signed-off-by: Kishore Kadiyala <kishore.kadiyala@ti.com> Acked-by: Benoit Cousson<b-cousson@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | | * | OMAP: adapt hsmmc to hwmod frameworkKishore Kadiyala2011-03-012-317/+197
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP2420 platform consists of mmc block as in omap1 and not the hsmmc block as present in omap2430, omap3, omap4 platforms. Removing all base address macro defines except keeping one for OMAP2420 and adapting only hsmmc device registration and driver to hwmod framework. Changes involves: 1) Remove controller reset in devices.c which is taken care of by hwmod framework. 2) Using omap-device layer to register device and utilizing data from hwmod data file for base address, dma channel number, Irq_number, device attribute. 3) Update the driver to use dev_attr to find whether controller supports dual volt cards Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kishore Kadiyala <kishore.kadiyala@ti.com> Reviewed-by: Balaji T K <balajitk@ti.com> Cc: Benoit Cousson <b-cousson@ti.com> CC: Kevin Hilman <khilman@deeprootsystems.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | | * | OMAP: hsmmc: Move mux configuration to hsmmc.cKishore Kadiyala2011-03-012-83/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Moving the definition of mux setting API from devices.c to hsmmc.c and renaming it from "omap2_mmc_mux" to "omap_hsmmc_mux". Also calling "omap_hsmmc_mux" from omap2_hsmmc_init. Signed-off-by: Kishore Kadiyala <kishore.kadiyala@ti.com> Cc: Chris Ball <cjb@laptop.org Cc: Tony Lindgren <tony@atomide.com Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | | * | OMAP: hwmod data: Add dev_attr and use in the host driverKishore Kadiyala2011-03-013-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a device attribute to hwmod data of omap2430, omap3, omap4. Currently the device attribute holds information regarding dual volt MMC card support by the controller which will be later passed to the host driver via platform data. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Kishore Kadiyala <kishore.kadiyala@ti.com> Acked-by: Benoit Cousson<b-cousson@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | | | * | OMAP4: hwmod data: enable HSMMCAnand Gadiyar2011-03-011-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enabling hsmmc hwmod for OMAP4 Signed-off-by: Anand Gadiyar <gadiyar@ti.com> Signed-off-by: Kishore Kadiyala <kishore.kadiyala@ti.com> Acked-by: Benoit Cousson<b-cousson@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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