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| | * | | | | ARM: dts: witherspoon: Cleanup gpio-keys-polled propertiesAndrew Jeffery2019-12-171-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dtbs_check gave the following warning: Warning (avoid_unnecessary_addr_size): /gpio-keys-polled: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Cc: Joel Stanley <joel@jms.id.au> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | | | ARM: dts: swift: Cleanup gpio-keys-polled propertiesAndrew Jeffery2019-12-171-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dtbs_check gave the following warning: Warning (avoid_unnecessary_addr_size): /gpio-keys-polled: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Cc: Adriana Kobylak <anoo@us.ibm.com> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Adriana Kobylak <anoo@us.ibm.com> Tested-by: Adriana Kobylak <anoo@us.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | | | ARM: dts: fp5280g2: Cleanup gpio-keys-polled propertiesAndrew Jeffery2019-12-171-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dtbs_check gave the following warning: Warning (avoid_unnecessary_addr_size): /gpio-keys-polled: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Cc: John Wang <wangzqbj@inspur.com> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Adriana Kobylak <anoo@us.ibm.com> Tested-by: Adriana Kobylak <anoo@us.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | | | ARM: dts: vesnin: Add unit address for memory nodeAndrew Jeffery2019-12-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes the following warnings: arch/arm/boot/dts/aspeed-bmc-opp-vesnin.dt.yaml: /: memory: False schema does not allow {'reg': [[1073741824, 536870912]]} arch/arm/boot/dts/aspeed-bmc-opp-vesnin.dt.yaml: memory: 'device_type' is a required property Cc: Alexander Filippov <a.filippov@yadro.com> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Tested-by: Alexander Filippov <a.filippov@yadro.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | | | ARM: dts: aspeed-g5: Use recommended generic node name for SDMCAndrew Jeffery2019-12-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The EDAC is a sub-function of the SDRAM Memory Controller. Rename the node to the appropriate generic node name. Cc: Stefan M Schaeckeler <sschaeck@cisco.com> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Stefan Schaeckeler <sschaeck@cisco.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
| | * | | | | ARM: dts: aspeed-g5: Move EDAC node to APBAndrew Jeffery2019-12-171-7/+7
| | |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously the register interface was not attached to any internal bus, which is not correct - it lives on the APB. Cc: Stefan M Schaeckeler <sschaeck@cisco.com> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Stefan Schaeckeler <sschaeck@cisco.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
| * | | | | Merge tag 'at91-5.6-dt-2' of ↵Olof Johansson2020-01-193-0/+1340
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt AT91 DT for 5.6 #2 - Add sam9x60 dtsi - New board sam9x60 Evaluation Kit * tag 'at91-5.6-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: dts: at91: sam9x60: add device tree for soc and board dt-bindings: arm: add sam9x60-ek board dt-bindings: atmel-gpbr: add microchip,sam9x60-gpbr dt-bindings: atmel-smc: add microchip,sam9x60-smc dt-bindings: atmel-sysreg: add microchip,sam9x60-ddramc dt-bindings: atmel-nand: add microchip,sam9x60-pmecc dt-bindings: atmel-matrix: add microchip,sam9x60-matrix dt-bindings: at91-sama5d2_adc: add microchip,sam9x60-adc dt-bindings: atmel-isi: add microchip,sam9x60-isi dt-bindings: atmel-can: add microchip,sam9x60-can dt-bindings: at_xdmac: add microchip,sam9x60-dma dt-bindings: at_xdmac: remove wildcard Link: https://lore.kernel.org/r/20200119234707.GA90094@piout.net Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | ARM: dts: at91: sam9x60: add device tree for soc and boardSandeep Sheriker Mallikarjun2020-01-163-0/+1340
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add device tree files for SAM9X60 SoC and SAM9X60-EK board. Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/1579085987-13976-6-git-send-email-claudiu.beznea@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
| * | | | | | Merge tag 'v5.6-rockchip-dts32-2' of ↵Olof Johansson2020-01-1910-20/+23
| |\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt Removal of the simple-panel compatible and some minor additional cleanups. * tag 'v5.6-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: Kill off "simple-panel" compatibles ARM: dts: rockchip: rename dwmmc node names to mmc ARM: dts: rockchip: add reg property to brcmf sub node for rk3188-bqedison2qc Link: https://lore.kernel.org/r/3473489.DgqFdXXe5V@phil Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | | ARM: dts: rockchip: Kill off "simple-panel" compatiblesRob Herring2020-01-184-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "simple-panel" is a Linux driver and has never been an accepted upstream compatible string, so remove it. Cc: Heiko Stuebner <heiko@sntech.de> Cc: linux-rockchip@lists.infradead.org Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200117230851.25434-1-robh@kernel.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| | * | | | | | ARM: dts: rockchip: rename dwmmc node names to mmcJohan Jonker2020-01-185-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current dts files with 'dwmmc' nodes are manually verified. In order to automate this process rockchip-dw-mshc.txt has to be converted to yaml. In the new setup rockchip-dw-mshc.yaml will inherit properties from mmc-controller.yaml and synopsys-dw-mshc-common.yaml. 'dwmmc' will no longer be a valid name for a node, so change them all to 'mmc' Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200115185244.18149-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| | * | | | | | ARM: dts: rockchip: add reg property to brcmf sub node for rk3188-bqedison2qcJohan Jonker2020-01-131-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | An experimental test with the command below gives this error: rk3188-bqedison2qc.dt.yaml: dwmmc@10218000: wifi@1: 'reg' is a required property So fix this by adding a reg property to the brcmf sub node. Also add #address-cells and #size-cells to prevent more warnings. make ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200110134420.11280-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| * | | | | | | Merge tag 'arm-soc/for-5.6/devicetree-part2' of ↵Olof Johansson2020-01-172-21/+56
| |\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://github.com/Broadcom/stblinux into arm/dt This pull request contains Broadcom ARM-based SoC changes for 5.6, please pull the following: - Nicolas unifies the CMA reserved region declaration between all BCM283x/BCM2711 chips in order for firmwares to easily adjust those based on the use case needs - Nicolas adds the Broadcom STB PCIe Root Complex Device Tree node for the Raspberry Pi 4. The driver will go through the PCIe maintainers pull request for 5.6. * tag 'arm-soc/for-5.6/devicetree-part2' of https://github.com/Broadcom/stblinux: ARM: dts: bcm2711: Enable PCIe controller ARM: dts: bcm283x: Unify CMA configuration Link: https://lore.kernel.org/r/20200117222705.25391-2-f.fainelli@gmail.com Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | | | ARM: dts: bcm2711: Enable PCIe controllerNicolas Saenz Julienne2020-01-151-1/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This enables bcm2711's PCIe bus, which is hardwired to a VIA Technologies XHCI USB 3.0 controller. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
| | * | | | | | | ARM: dts: bcm283x: Unify CMA configurationNicolas Saenz Julienne2020-01-152-20/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the introduction of the Raspberry Pi 4 we were forced to explicitly configure CMA's location, since arm64 defaults it into the ZONE_DMA32 memory area, which is not good enough to perform DMA operations on that device. To bypass this limitation a dedicated CMA DT node was created, explicitly indicating the acceptable memory range and size. That said, compatibility between boards is a must on the Raspberry Pi ecosystem so this creates a common CMA DT node so as for DT overlays to be able to update CMA's properties regardless of the board being used. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Reviewed-by: Phil Elwell <phil@raspberrypi.org> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
| * | | | | | | | Merge tag 'omap-for-v5.6/dt-part2-signed' of ↵Olof Johansson2020-01-165-0/+496
| |\ \ \ \ \ \ \ \ | | | |_|_|_|_|_|/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt More dts changes for omaps for v5.6 merge window Add basic support for first generation Amazon omap3-echo. This got applied rather late as we discussed how to deal with SoC variants with some accelerators unaccessible, and eventually ended up setting up few more SoC specific dtsi files. Eventually we'll need to also detect the disabled accelerators on driver init, but more patching is needed for that. * tag 'omap-for-v5.6/dt-part2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: Add omap3-echo ARM: dts: Add dtsi files for AM3703, AM3715 and DM3725 Link: https://lore.kernel.org/r/pull-1579200367-372444@atomide.com-4 Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | | | ARM: dts: Add omap3-echoAndré Hentschel2020-01-132-0/+462
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is the first generation Amazon Echo from 2016. Audio support is not yet implemented. Signed-off-by: André Hentschel <nerv@dawncrow.de> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | | | | | | ARM: dts: Add dtsi files for AM3703, AM3715 and DM3725André Hentschel2020-01-133-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DM3730 is considered as omap36xx.dtsi, while the rest has: DM3730 | DM3725 | AM3715 | AM3703 IVA X | X | | SGX X | | X | Where X is "supported" Signed-off-by: André Hentschel <nerv@dawncrow.de> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | | | | | | Merge tag 'amlogic-dt' of ↵Olof Johansson2020-01-167-29/+49
| |\ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt ARM: dts: Amlogic updates for v5.6 - add DDR clock controller - GPU OPP updates * tag 'amlogic-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: ARM: dts: meson8b: use the actual frequency for the GPU's 364MHz OPP ARM: dts: meson8: use the actual frequency for the GPU's 182.1MHz OPP ARM: dts: meson8b: fix the clock controller compatible string ARM: dts: meson8b: add the DDR clock controller ARM: dts: meson8: add the DDR clock controller ARM: dts: meson: provide the XTAL clock using a fixed-clock dt-bindings: clock: meson8b: add the clock inputs dt-bindings: clock: add the Amlogic Meson8 DDR clock controller binding Link: https://lore.kernel.org/r/7hwo9udi7m.fsf@baylibre.com Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | | | | ARM: dts: meson8b: use the actual frequency for the GPU's 364MHz OPPMartin Blumenstingl2020-01-081-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The clock setup on Meson8 cannot achieve a Mali frequency of exactly 182.15MHz. The vendor driver uses "FCLK_DIV7 / 1" for this frequency, which translates to 2550MHz / 7 / 1 = 364285714Hz. Update the GPU operating point to that specific frequency to not confuse myself when comparing the frequency from the .dts with the actual clock rate on the system. Fixes: c3ea80b6138cae ("ARM: dts: meson8b: add the Mali-450 MP2 GPU") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
| | * | | | | | | | ARM: dts: meson8: use the actual frequency for the GPU's 182.1MHz OPPMartin Blumenstingl2020-01-081-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The clock setup on Meson8 cannot achieve a Mali frequency of exactly 182.15MHz. The vendor driver uses "FCLK_DIV7 / 2" for this frequency, which translates to 2550MHz / 7 / 2 = 182142857Hz. Update the GPU operating point to that specific frequency to not confuse myself when comparing the frequency from the .dts with the actual clock rate on the system. Fixes: 7d3f6b536e72c9 ("ARM: dts: meson8: add the Mali-450 MP6 GPU") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
| | * | | | | | | | ARM: dts: meson8b: fix the clock controller compatible stringMartin Blumenstingl2020-01-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Meson8b clock controller is an evolution of the Meson8 clock controller. The clock controller on Meson8b contains two identical mali clock trees for glitch-free rate switching. Use the correct compatible string to make use of the glitch free mux. Fixes: b6db3936f2833c ("ARM: dts: meson: switch the clock controller to the HHI register area") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
| | * | | | | | | | ARM: dts: meson8b: add the DDR clock controllerMartin Blumenstingl2019-12-111-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the DDR clock controller and pass it's DDR_CLKID_DDR_PLL to the main (HHI) clock controller as "ddr_clk". The "ddr_clk" is used as one of the inputs for the audio clock muxes. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
| | * | | | | | | | ARM: dts: meson8: add the DDR clock controllerMartin Blumenstingl2019-12-111-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the DDR clock controller and pass it's DDR_CLKID_DDR_PLL to the main (HHI) clock controller as "ddr_clk". The "ddr_clk" is used as one of the inputs for the audio clock muxes. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reported-by: kbuild test robot <lkp@intel.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
| | * | | | | | | | ARM: dts: meson: provide the XTAL clock using a fixed-clockMartin Blumenstingl2019-12-117-24/+26
| | | |_|_|_|/ / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The clock controller driver has provided the XTAL clock so far. This does not match how the hardware actually works because the XTAL clock is an actual crystal which is mounted on the PCB. Add the "xtal" clock to meson.dtsi and replace all references to the clock controller's CLKID_XTAL with the new xtal clock node. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
| * | | | | | | | Merge tag 'qcom-dts-for-5.6' of ↵Olof Johansson2020-01-164-38/+280
| |\ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt Qualcomm ARM dts updates for v5.6 * Add SAW L2 nodes to boot secondary cpus on IPQ40xx * Fix remaining IRQ_TYPE_NONE on APQ8084 * Update tsens node to new style * Add modem remoteproc node to MSM8974 * Move ADSP SMD edge into ADSP remoteproc node for MSM8974 * Add and enable wireless communication subsystem on MSM8974 and Fairphone 2 * Add MSM8974 interconnect provider nodes * Add MSM8974 OCMEM node * tag 'qcom-dts-for-5.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: ARM: dts: qcom: Add nodes for SMP boot in IPQ40xx ARM: dts: qcom: apq8084: Remove all instances of IRQ_TYPE_NONE ARM: dts: qcom: apq8084: Change tsens definition to new style ARM: dts: msm8974: Move ADSP smd edge to ADSP PIL ARM: dts: msm8974: Add modem remoteproc node ARM: dts: msm8974-FP2: Introduce the wcnss remoteproc node ARM: dts: msm8974: Introduce the wcnss remoteproc node ARM: dts: qcom: msm8974: add interconnect nodes ARM: dts: qcom: msm8974: add ocmem node Link: https://lore.kernel.org/r/20200113204448.GE3325@yoga Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | | | | ARM: dts: qcom: Add nodes for SMP boot in IPQ40xxDamir Franusic2019-12-281-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add missing nodes and properties to enable SMP support on IPQ40xx devices. Booting without "saw_l2" node: [ 0.001400] CPU: Testing write buffer coherency: ok [ 0.001856] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.060163] Setting up static identity map for 0x80300000 - 0x80300060 [ 0.080140] rcu: Hierarchical SRCU implementation. [ 0.120258] smp: Bringing up secondary CPUs ... [ 0.200540] CPU1: failed to boot: -19 [ 0.280689] CPU2: failed to boot: -19 [ 0.360874] CPU3: failed to boot: -19 [ 0.360966] smp: Brought up 1 node, 1 CPU [ 0.360979] SMP: Total of 1 processors activated (96.00 BogoMIPS). [ 0.360988] CPU: All CPU(s) started in SVC mode. Then, booting with "saw_l2" node present (this patch applied): [ 0.001450] CPU: Testing write buffer coherency: ok [ 0.001904] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.060161] Setting up static identity map for 0x80300000 - 0x80300060 [ 0.080137] rcu: Hierarchical SRCU implementation. [ 0.120252] smp: Bringing up secondary CPUs ... [ 0.200958] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 [ 0.281091] CPU2: thread -1, cpu 2, socket 0, mpidr 80000002 [ 0.361264] CPU3: thread -1, cpu 3, socket 0, mpidr 80000003 [ 0.361430] smp: Brought up 1 node, 4 CPUs [ 0.361460] SMP: Total of 4 processors activated (384.00 BogoMIPS). [ 0.361469] CPU: All CPU(s) started in SVC mode. Signed-off-by: Damir Franusic <damir.franusic@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Robert Marko <robert.marko@sartura.hr> Cc: Andy Gross <agross@kernel.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: linux-arm-msm@vger.kernel.org Link: https://lore.kernel.org/r/20191121152902.21394-1-damir.franusic@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | * | | | | | | | ARM: dts: qcom: apq8084: Remove all instances of IRQ_TYPE_NONEVicthor Foster2019-12-281-20/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes all instances of IRQ_TYPE_NONE, which fixes warning messages during boot. It also changes interrupt types to their corresponding macros, as defined in arm-gic.h. Signed-off by: Victhor Foster <victhor.foster@ufpe.br> Link: https://lore.kernel.org/r/1238987932.9511963.1577060836760.JavaMail.zimbra@ufpe.br Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | * | | | | | | | ARM: dts: qcom: apq8084: Change tsens definition to new styleVicthor Foster2019-12-281-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes the tsens peripheral definition to the new style, which fixes a kernel panic caused by a change in the tsens driver, introduced by commit 37624b58542fb9f2d9a70e6ea006ef8a5f66c30b. There was a patch submitted recently to this list that should fix this problem with old device trees and the new driver, so it may be redundant at this point, in terms of fixing the kernel panic, but this should align the APQ8084 device tree with the others. Signed-off by: Victhor Foster <victhor.foster@ufpe.br> Link: https://lore.kernel.org/r/108381142.9510389.1577057823350.JavaMail.zimbra@ufpe.br Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | * | | | | | | | ARM: dts: msm8974: Move ADSP smd edge to ADSP PILBjorn Andersson2019-12-121-7/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the introduction of SSR support in the ADSP PIL we should describe the SMD edge inside the ADSP PIL node. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> [luca@z3ntu.xyz: Add label for the smd edge] Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Link: https://lore.kernel.org/r/20191114175348.288976-2-luca@z3ntu.xyz Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | * | | | | | | | ARM: dts: msm8974: Add modem remoteproc nodeBjorn Andersson2019-12-121-9/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the remoteproc node for the modem on msm8974. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> [luca@z3ntu.xyz: cleanups, add label to smd-edge node] Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Link: https://lore.kernel.org/r/20191114175348.288976-1-luca@z3ntu.xyz Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | * | | | | | | | ARM: dts: msm8974-FP2: Introduce the wcnss remoteproc nodeLuca Weiss2019-12-101-0/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the remoteproc node and add the necessary pinctrl states. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Link: https://lore.kernel.org/r/20191104212302.105469-2-luca@z3ntu.xyz Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | * | | | | | | | ARM: dts: msm8974: Introduce the wcnss remoteproc nodeBjorn Andersson2019-12-101-1/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Link: https://lore.kernel.org/r/20191104212302.105469-1-luca@z3ntu.xyz Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | * | | | | | | | ARM: dts: qcom: msm8974: add interconnect nodesBrian Masney2019-12-101-0/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add interconnect nodes that's needed to support bus scaling. Signed-off-by: Brian Masney <masneyb@onstation.org> Link: https://lore.kernel.org/r/20191024103140.10077-5-masneyb@onstation.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| | * | | | | | | | ARM: dts: qcom: msm8974: add ocmem nodeBrian Masney2019-12-101-0/+19
| | |/ / / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add ocmem node that is needed in order to support the GPU upstream. Signed-off-by: Brian Masney <masneyb@onstation.org> Link: https://lore.kernel.org/r/20191024103140.10077-4-masneyb@onstation.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| * | | | | | | | Merge tag 'at91-5.6-dt-1' of ↵Olof Johansson2020-01-1622-213/+1012
| |\ \ \ \ \ \ \ \ | | | |_|_|_|/ / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt AT91 DT for 5.6 - Fix sama5d3 peripheral clock rate range - New boards: Overkiz Smartikz and Kizbox Mini, Microchip SAMA5D27 wlsom1-ek - sama5d2 sdmcc fixes * tag 'at91-5.6-dt-1' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: dts: at91: sama5d3: define clock rate range for tcb1 ARM: dts: at91: sama5d3: fix maximum peripheral clock rates ARM: dts: at91: nattis 2: remove unnecessary include ARM: dts: at91: add smartkiz support and a common kizboxmini dtsi file dt-bindings: arm: at91: Document Kizboxmini and Smartkiz boards binding ARM: dts: at91: rearrange kizbox dts using aliases nodes ARM: dts: at91: sama5d27_som1_ek: add the microchip,sdcal-inverted on sdmmc0 ARM: dts: at91: Reenable UART TX pull-ups ARM: dts: at91: sama5d2: set the sdmmc gclk frequency ARM: dts: at91: sama5d27_som1_ek: add i2c filters properties ARM: dts: at91: sama5d27_wlsom1: add SAMA5D27 wlsom1 and wlsom1-ek dt-bindings: ARM: at91: Document SAMA5D27 WLSOM1 and Evaluation Kit ARM: dts: at91: sama5d2: mark secumod as a GPIO controller ARM: dts: at91: sama5d2: disable pwm0 by default Link: https://lore.kernel.org/r/20200113155423.GA1357189@piout.net Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | | | ARM: dts: at91: sama5d3: define clock rate range for tcb1Alexandre Belloni2020-01-101-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The clock rate range for the TCB1 clock is missing. define it in the device tree. Reported-by: Karl Rudbæk Olsen <karl@micro-technic.com> Fixes: d2e8190b7916 ("ARM: at91/dt: define sama5d3 clocks") Link: https://lore.kernel.org/r/20200110172007.1253659-2-alexandre.belloni@bootlin.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
| | * | | | | | | ARM: dts: at91: sama5d3: fix maximum peripheral clock ratesAlexandre Belloni2020-01-103-18/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the maximum rate for peripheral clock is calculated based on a typical 133MHz MCK. The maximum frequency is defined in the datasheet as a ratio to MCK. Some sama5d3 platforms are using a 166MHz MCK. Update the device trees to match the maximum rate based on 166MHz. Reported-by: Karl Rudbæk Olsen <karl@micro-technic.com> Fixes: d2e8190b7916 ("ARM: at91/dt: define sama5d3 clocks") Link: https://lore.kernel.org/r/20200110172007.1253659-1-alexandre.belloni@bootlin.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
| | * | | | | | | ARM: dts: at91: nattis 2: remove unnecessary includeAlexandre Belloni2020-01-101-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sama5d3_lcd.dtsi is already included by sama5d31.dtsi, itself included by at91-linea.dtsi. Link: https://lore.kernel.org/r/20191229203503.336593-1-alexandre.belloni@bootlin.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
| | * | | | | | | ARM: dts: at91: add smartkiz support and a common kizboxmini dtsi fileKamel Bouhara2019-12-206-83/+293
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Split the existing Kizbox Mini boards into three board configuration, the base board, the mother board and the RailDIN board. Add a new dts file for the SmartKiz board support. Signed-off-by: Kévin RAYMOND <k.raymond@overkiz.com> Signed-off-by: Mickael GARDET <m.gardet@overkiz.com> Signed-off-by: Kamel Bouhara <kamel.bouhara@bootlin.com> Link: https://lore.kernel.org/r/20191220103835.160154-2-kamel.bouhara@bootlin.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
| | * | | | | | | ARM: dts: at91: rearrange kizbox dts using aliases nodesKamel Bouhara2019-12-102-90/+86
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use aliases nodes to easy kizbox dts readability. Signed-off-by: Kamel Bouhara <kamel.bouhara@bootlin.com> Link: https://lore.kernel.org/r/20191205223021.1370083-1-kamel.bouhara@bootlin.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
| | * | | | | | | ARM: dts: at91: sama5d27_som1_ek: add the microchip,sdcal-inverted on sdmmc0Nicolas Ferre2019-12-101-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Specify the SoC SDCAL pin connection that is used in the sama5d27c 128MiB SiP on the SAMA5D27 SOM1. This will put in place a software workaround that would reduce power consumption on all boards using this SoM, including the SAMA5D27 SOM1 EK. Uses property introduced in 5cd41fe89704 ("dt-bindings: sdhci-of-at91: add the microchip,sdcal-inverted property") Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20191205113604.9000-1-nicolas.ferre@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
| | * | | | | | | ARM: dts: at91: Reenable UART TX pull-upsIngo van Lil2019-12-105-20/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull-ups for SAM9 UART/USART TX lines were disabled in a previous commit. However, several chips in the SAM9 family require pull-ups to prevent the TX lines from falling (and causing an endless break condition) when the transceiver is disabled. From the SAM9G20 datasheet, 32.5.1: "To prevent the TXD line from falling when the USART is disabled, the use of an internal pull up is mandatory.". This commit reenables the pull-ups for all chips having that sentence in their datasheets. Fixes: 5e04822f7db5 ("ARM: dts: at91: fixes uart pinctrl, set pullup on rx, clear pullup on tx") Signed-off-by: Ingo van Lil <inguin@gmx.de> Cc: Peter Rosin <peda@axentia.se> Link: https://lore.kernel.org/r/20191203142147.875227-1-inguin@gmx.de Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
| | * | | | | | | ARM: dts: at91: sama5d2: set the sdmmc gclk frequencyLudovic Desroches2019-12-101-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set the frequency of the generated clock used by sdmmc devices in order to not rely on the configuration done by previous components. Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com> Link: https://lore.kernel.org/r/20191128074522.69706-3-ludovic.desroches@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
| | * | | | | | | ARM: dts: at91: sama5d27_som1_ek: add i2c filters propertiesEugen Hristev2019-12-091-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add properties for i2c filters for i2c0 and i2c1 on sama5d27_som1_ek. Noise is affecting communication on i2c for example when connecting i2c camera sensors. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Link: https://lore.kernel.org/r/1575531818-21332-1-git-send-email-eugen.hristev@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
| | * | | | | | | ARM: dts: at91: sama5d27_wlsom1: add SAMA5D27 wlsom1 and wlsom1-ekEugen Hristev2019-12-093-0/+575
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is the addition of a new Evaluation Kit the SAMA5D27-WLSOM1-EK. It's based on the Microchip WireLess SoM which contains the SAMA5D27 LPDDR2 2Gbits SiP. [nicolas.ferre@microchip.com]: initial implementation Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> [eugen.hristev@microchip.com]: ported to new kernel version, [eugen.hristev@microchip.com]: addition of peripherals (adc, pmic, qspi, uart) Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Link: https://lore.kernel.org/r/1573543139-8533-4-git-send-email-eugen.hristev@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
| | * | | | | | | ARM: dts: at91: sama5d2: mark secumod as a GPIO controllerAndrei Stefanescu2019-12-091-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Security Module exposes the PIOBU pins which an be used as regular GPIOs. The PIOBU pins are special because they do not lose their voltage during suspend-to-mem. This patch marks the secumod as a GPIO controller. Signed-off-by: Andrei Stefanescu <andrei.stefanescu@microchip.com> [razvan.stefanescu@microchip.com Updated title] Signed-off-by: Razvan Stefanescu <razvan.stefanescu@microchip.com> Link: https://lore.kernel.org/r/1573543139-8533-2-git-send-email-eugen.hristev@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
| | * | | | | | | ARM: dts: at91: sama5d2: disable pwm0 by defaultRazvan Stefanescu2019-12-091-0/+1
| | |/ / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It will be enabled as needed by each board. Signed-off-by: Razvan Stefanescu <razvan.stefanescu@microchip.com> Link: https://lore.kernel.org/r/1573543139-8533-1-git-send-email-eugen.hristev@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
| * | | | | | | Merge tag 'sunxi-dt-for-5.6-2' of ↵Olof Johansson2020-01-1618-54/+802
| |\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt This is our usual set of DT patches for the Allwinner SoCs. It's fairly big this time, but the highlights are: - Enable cpufreq and CPU thermal throttling on the A64 - CLK_CPUX macro usage removed (changed from first pull request) - CSI0 support on the R40 - CSI1 support on the A10 and A20 - SPI support on the R40 - PMU support on the H3, H5, H6 and R40 - MIPI-DSI support on the A64 - PWM support on the H6 - Thermal sensor on the A64, A83t, H3, H5, H6 and R40 - More DT schemas fixes and conversions - New boards: LibreComputer ALL-H5-CC H5, LibreComputer ALL-H3-IT H5, Pine64 H64 Model B, Neutis N5H3 * tag 'sunxi-dt-for-5.6-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (52 commits) arm64: dts: allwinner: a64: enable DVFS arm64: dts: allwinner: a64: add dtsi with CPU operating points arm64: dts: allwinner: a64: add cooling maps and thermal tripping points arm64: dts: allwinner: a64: add CPU clock to CPU0-3 nodes arm64: dts: allwinner: sun50i-a64: Use macros for newly exported clocks ARM: dts: sunxi: Use macros for references to CCU clocks arm64: dts: allwinner: h5: Add Libre Computer ALL-H5-CC H5 board ARM: dts: sun8i: R40: Add SPI controllers nodes and pinmuxes arm64: dts: allwinner: a64: pinebook: Fix lid wakeup ARM: dts: sun8i: r40: Add device node for CSI0 ARM: dts: sun7i: Add CSI1 controller and pinmux options ARM: dts: sun4i: Add CSI1 controller and pinmux options ARM: dts: sunxi: Add missing LVDS resets and clocks ARM: dts: sun8i: r40: Use tcon top clock index macros ARM: dts: sun8i: R40: Add PMU node ARM: dts: sun8i: R40: Upgrade GICC reg size to 8K arm64: dts: allwinner: h6: Add thermal sensor and thermal zones ARM: dts: sunxi: Add Libre Computer ALL-H3-IT H5 board arm64: dts: allwinner: a64: Add MIPI DSI pipeline arm64: dts: allwinner: a64: Add thermal sensors and thermal zones ... Link: https://lore.kernel.org/r/20200113095555.GA29848@wens.csie.org Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | | | ARM: dts: sunxi: Use macros for references to CCU clocksChen-Yu Tsai2020-01-064-8/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A few clocks from the CCU were exported later, and references to them in the device tree were using raw numbers. Now that the DT binding header changes are in as well, switch to the macros for more clarity. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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