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* ARM: tegra: remove clock-frequency properties from serial nodesStephen Warren2013-02-131-5/+0
| | | | | | | | | | | | | Currently, the serial nodes define both a clock-frequency and a clocks property. We should not provide both, since they might conflict. In practice, this also causes problems since the of_serial driver uses the clock-frequency property in preference to the clocks property, and hence doesn't clk_prepare_enable() the clock, which may then leave it with no known users, and hence the common clock framework will disable it, thus breaking the port, which is usually the console. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: dt: tegra30: Rename "smmu" to "iommu"Hiroshi Doyu2013-01-291-1/+1
| | | | | | | Use functional name for DT entry instead of h/w name. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: move serial clock-frequency attr into the Tegra30 dtsiStephen Warren2013-01-281-0/+5
| | | | | | | | No Tegra30 Platform is running PLL_P at another rate than 408MHz, nor is any using any other PLL as UART source clock. Move attribute into SoC level dtsi file to slim down board DT files. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: add DT entry for KBC controllerLaxman Dewangan2013-01-281-0/+8
| | | | | | | | | | | | NVIDIA's Tegra SoCs have the matrix keyboard controller which supports 16x8 type of matrix. The number of rows and columns are configurable. Add DT entry for KBC controller. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: added clocks property] Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: swap cache-/interrupt-ctrlr nodes in DTStephen Warren2013-01-281-9/+9
| | | | | | | | | | | | This ensures nodes are sorted in order of reg address. This makes it easier to compare against e.g. the U-Boot device trees, and is simply consistent and clean. While we're at it, remove the unit address from the cache-controller node name, since it's unique without it. Reported-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: dts: add aliases and DMA requestor for serial controllerLaxman Dewangan2013-01-281-5/+26
| | | | | | | | | | | | | Add APB DMA requestor and serial aliases for serial controller. There will be two serial driver i.e. 8250 based simple serial driver and APB DMA based serial driver for higher baudrate and performace. The simple serial driver get enabled with compatible nvidia,tegra20-uart and APB DMA based driver will get enabled with compatible nvidia,tegra20-hsuart. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra30: tegra30 gpio is not compatible with tegra20 gpioLaxman Dewangan2013-01-281-1/+1
| | | | | | | | | | tegra30 gpio controller is not compatible with the tegra20 due to their bank stride i.e. Tegra20 bank stride is 0x80 where Tegra30 bank stride is 0x100. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: fixed typo syntax error] Signed-off-by: Stephen Warren <swarren@nvidia.com>
* Merge branch 'for-3.9/scu-base-rework' into for-3.9/soc-t114Stephen Warren2013-01-281-0/+29
|\ | | | | | | | | Conflicts: arch/arm/mach-tegra/platsmp.c
| * ARM: tegra: Add CPU nodes to Tegra30 device treeHiroshi Doyu2013-01-281-0/+29
| | | | | | | | | | | | | | | | Add CPU node for Tegra30. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Reviewed-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | ARM: tegra: add clock properties to Tegra30 DTPrashant Gaikwad2013-01-281-1/+55
| | | | | | | | | | | | | | | | Add clock information to device nodes. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> [swarren: added second clock to 3d node] Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | ARM: tegra: define Tegra30 CAR bindingPrashant Gaikwad2013-01-281-0/+6
|/ | | | | | | | | The device tree binding models Tegra30 CAR (Clock And Reset) as a single monolithic clock provider. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> [swarren: fixed typo in binding doc] Signed-off-by: Stephen Warren <swarren@nvidia.com>
* Merge tag 'multiplatform' of ↵Linus Torvalds2012-12-131-0/+23
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC multiplatform conversion patches from Olof Johansson: "Here are more patches in the progression towards multiplatform, sparse irq conversions in particular. Tegra has a handful of cleanups and general groundwork, but is not quite there yet on full enablement. Platforms that are enabled through this branch are VT8500 and Zynq. Note that i.MX was converted in one of the earlier cleanup branches as well (before we started a separate topic for multiplatform). And both new platforms for this merge window, sunxi and bcm, were merged with multiplatform support enabled." Fix up conflicts mostly as per Olof. * tag 'multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (29 commits) ARM: zynq: Remove all unused mach headers ARM: zynq: add support for ARCH_MULTIPLATFORM ARM: zynq: make use of debug_ll_io_init() ARM: zynq: remove TTC early mapping ARM: tegra: move debug-macro.S to include/debug ARM: tegra: don't include iomap.h from debug-macro.S ARM: tegra: decouple uncompress.h and debug-macro.S ARM: tegra: simplify DEBUG_LL UART selection options ARM: tegra: select SPARSE_IRQ ARM: tegra: enhance timer.c to get IO address from device tree ARM: tegra: enhance timer.c to get IRQ info from device tree ARM: timer: fix checkpatch warnings ARM: tegra: add TWD to device tree ARM: tegra: define DT bindings for and instantiate RTC ARM: tegra: define DT bindings for and instantiate timer clocksource/mtu-nomadik: use apb_pclk clk: ux500: Register mtu apb_pclocks ARM: plat-nomadik: convert platforms to SPARSE_IRQ mfd/db8500-prcmu: use the irq_domain_add_simple() mfd/ab8500-core: use irq_domain_add_simple() ...
| * ARM: tegra: add TWD to device treeStephen Warren2012-11-161-0/+6
| | | | | | | | | | | | | | This will allow timer.c to use twd_local_timer_of_register(), and hence not need to hard-code the TWD address or IRQ. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * ARM: tegra: define DT bindings for and instantiate RTCStephen Warren2012-11-161-0/+6
| | | | | | | | | | | | | | | | | | | | | | The Tegra RTC maintains seconds and milliseconds counters, and five alarm registers. The alarms and other interrupts may wake the system from low-power state. Define a DT binding for this HW module, and add the module into the Tegra device tree files. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * ARM: tegra: define DT bindings for and instantiate timerStephen Warren2012-11-161-0/+11
| | | | | | | | | | | | | | | | | | | | | | The Tegra timer provides a number of 29-bit timer channels, a single 32-bit free running counter, and in the Tegra30 variant, 5 watchdog modules. The first two channels may also trigger a legacy watchdog reset. Define a DT binding for this HW module, and add the module into the Tegra device tree files. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | Merge tag 'orion_dt_for_3.8' of git://git.infradead.org/users/jcooper/linux ↵Olof Johansson2012-11-261-2/+2
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into next/dt From Jason Cooper: orion dt for v3.8 - ehci-orion dt binding - gpio-poweroff - use dt regulators - move mpp to DT/pinctrl Depends on: - orion/boards - merge conflicts - keep all 'select's in Kconfig - remove all #includes in board-*.c - pinctrl/devel up to: - 06763c7 pinctrl: mvebu: move to its own directory * tag 'orion_dt_for_3.8' of git://git.infradead.org/users/jcooper/linux: (211 commits) ARM: Kirkwood: remove kirkwood_ehci_init() from new boards ARM: Kirkwood: Add support LED of OpenBlocks A6 ARM: Kirkwood: Convert to EHCI via DT for OpenBlocks A6 ARM: kirkwood: Add NAND partiton map for OpenBlocks A6 ARM: kirkwood: Add support second I2C bus and RTC on OpenBlocks A6 ARM: kirkwood: Add support DT of second I2C bus ARM: kirkwood: Convert mplcec4 board to pinctrl ARM: Kirkwood: Convert km_kirkwood to pinctrl ARM: Kirkwood: support 98DX412x kirkwoods with pinctrl ARM: Kirkwood: Convert IX2-200 to pinctrl. ARM: Kirkwood: Convert lsxl boards to pinctrl. ARM: Kirkwood: Convert ib62x0 to pinctrl. ARM: Kirkwood: Convert GoFlex Net to pinctrl. ARM: Kirkwood: Convert dreamplug to pinctrl. ARM: Kirkwood: Convert dockstar to pinctrl. ARM: Kirkwood: Convert dnskw to pinctrl ARM: Kirkwood: Convert iConnect to pinctrl. ARM: Kirkwood: Convert TS219 to pinctrl. ARM: Kirkwood: Add DTSI files for pinctrl ARM: Kirkwood: Make use of mvebu pincltl and gpio drivers ... Signed-off-by: Olof Johansson <olof@lixom.net>
| * ARM: dt: tegra: fix length of pad control and mux registersPritesh Raithatha2012-10-301-2/+2
| | | | | | | | | | | | | | | | | | The reg property contains <base length> not <base last_offset>. Fix the length values to be length not last_offset. Cc: stable@vger.kernel.org Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | ARM: tegra: Add Tegra30 host1x supportThierry Reding2012-11-151-0/+87
| | | | | | | | | | | | | | | | | | Add the host1x node along with its children to the Tegra30 DTSI. Board- specific DTS files are expected to enable the available outputs and complement the device tree with data specific to the hardware. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | ARM: tegra: dts: add slink controller dt entryLaxman Dewangan2012-11-151-0/+60
| | | | | | | | | | | | | | | | Add slink controller details in the dts file of Tegra20 and Tegra30. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | ARM: tegra: dt: add L2 cache controllerJoseph Lo2012-11-051-0/+9
|/ | | | | | | Add L2 cache controller binding into DT for Tegra. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: dts: Add pwm labelThierry Reding2012-09-201-1/+1
| | | | | | | | | PWM devices can be referenced in the DT by phandle and per-chip index. In order for this to work properly, the PWM controller needs to have a label attached to it. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* Merge branch 'for-3.6' of git://gitorious.org/linux-pwm/linux-pwmLinus Torvalds2012-07-301-0/+6
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull PWM subsystem from Thierry Reding: "The new PWM subsystem aims at collecting all implementations of the legacy PWM API and to eventually replace it completely. The subsystem has been in development for over half a year now and many drivers have already been converted. It has been in linux-next for a couple of weeks and there have been no major issues so I think it is ready for inclusion in your tree." Arnd Bergmann <arnd@arndb.de>: "Very much Ack on the new subsystem. It uses the interface declarations as the previously separate pwm drivers, so nothing changes for now in the drivers using it, although it enables us to change those more easily in the future if we want to. This work is also one of the missing pieces that are required to eventually build ARM kernels for multiple platforms, which is currently prohibited (amongs other things) by the fact that you cannot have more than one driver exporting the pwm functions." Tested-and-acked-by: Alexandre Courbot <acourbot@nvidia.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Philip, Avinash <avinashphilip@ti.com> # TI's AM33xx platforms Acked-By: Alexandre Pereira da Silva <aletes.xgr@gmail.com> # LPC32XX Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Sachin Kamat <sachin.kamat@linaro.org> Fix up trivial conflicts with other cleanups and DT updates. * 'for-3.6' of git://gitorious.org/linux-pwm/linux-pwm: (36 commits) pwm: pwm-tiehrpwm: PWM driver support for EHRPWM pwm: pwm-tiecap: PWM driver support for ECAP APWM pwm: fix used-uninitialized warning in pwm_get() pwm: add lpc32xx PWM support pwm_backlight: pass correct brightness to callback pwm: Use pr_* functions in pwm-samsung.c file pwm: Convert pwm-samsung to use devm_* APIs pwm: Convert pwm-tegra to use devm_clk_get() pwm: pwm-mxs: Return proper error if pwmchip_remove() fails pwm: pwm-bfin: Return proper error if pwmchip_remove() fails pwm: pxa: Propagate pwmchip_remove() error pwm: Convert pwm-pxa to use devm_* APIs pwm: Convert pwm-vt8500 to use devm_* APIs pwm: Convert pwm-imx to use devm_* APIs pwm: Conflict with legacy PWM API pwm: pwm-mxs: add pinctrl support pwm: pwm-mxs: use devm_* managed functions pwm: pwm-mxs: use global reset function stmp_reset_block pwm: pwm-mxs: encode soc name in compatible string pwm: Take over maintainership of the PWM subsystem ...
| * pwm: tegra: Add device tree supportThierry Reding2012-07-021-0/+6
| | | | | | | | | | | | | | | | | | Add auxdata to instantiate the PWFM controller from a device tree, include the corresponding nodes in the dtsi files for Tegra 20 and Tegra 30 and add binding documentation. Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
* | ARM: tegra: Fix dts files w/ status property: "disable" -> "disabled"Roland Stigge2012-06-201-19/+19
| | | | | | | | | | | | | | | | | | | | | | This patches fixes some status = "disable" strings to "disabled", the correct way of disabling nodes in the devicetree. Just the tegra part here. Everything else goes via other patches and trees. Signed-off-by: Roland Stigge <stigge@antcom.de> Acked-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | ARM: dt: tegra{20,30}.dtsi: Rename "mc" to "memory-controller"hdoyu@nvidia.com2012-06-111-1/+1
|/ | | | | | | | Use a more plain english name. Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> [swarren: remove redundant unit address from tegra30.dtsi change] Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: dt: tegra: invert status=disable vs status=okayStephen Warren2012-05-141-0/+19
| | | | | | | | | | | | | In tegra*.dtsi, set status="disable" for all HW modules that the board design may choose not to use. Update all boards to specifically enable any of those modules that are useful by setting status="okay". This makes board files say which features they do use, rather than which they don't, which feels more logical. It also makes the .dts files slightly smaller, at least for existing content. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Olof Johansson <olof@lixom.net>
* ARM: dt: tegra: consistent basic property orderingStephen Warren2012-05-141-12/+12
| | | | | | | | Put properties in order compatible, reg, interrupts, then anything else the node has. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Olof Johansson <olof@lixom.net>
* ARM: dt: tegra: sort nodes based on bus orderStephen Warren2012-05-141-89/+89
| | | | | | | | | | | | | | | | Sort the nodes according to the following rules: * First, any overrides for properties or nodes created by included files, in the order they appeared in the include file. * Second, any nodes with a reg property, in numerical order. * Third, any nodes without a reg property, in alphabetical order of node name. The second sorting rule at least will probably help if/when we need to explicitly insert nodes for the various busses in Tegra; that will just be an indentation change rather than also a node re-ordering. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Olof Johansson <olof@lixom.net>
* ARM: dt: tegra: consistenly use lower-case for hex constantsStephen Warren2012-05-141-4/+4
| | | | | Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Olof Johansson <olof@lixom.net>
* ARM: dt: tegra: format regs properties consistentlyStephen Warren2012-05-141-3/+4
| | | | | | | | | | | Place each reg "entry" on its own line, and wrap the whole list in <> rather than each individual entry. The convention chosen here is slightly arbitrary, but is not consistent throughout all Tegra files. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Olof Johansson <olof@lixom.net>
* ARM: dt: tegra: remove unnecessary unit addressesStephen Warren2012-05-141-6/+6
| | | | | | | | DT node names only need to include the unit address if it's required to make the node name unique. Remove the unnecessary unit addresses. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Olof Johansson <olof@lixom.net>
* ARM: dt: tegra: whitespace cleanupStephen Warren2012-05-141-60/+60
| | | | | | | Consistently don't place a space after < or before >. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Olof Johansson <olof@lixom.net>
* ARM: dt: tegra30.dtsi: Add SMMU nodehdoyu@nvidia.com2012-05-141-0/+10
| | | | | | | Add a node for the Tegra30 SMMU Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: dt: tegra30.dtsi: Add Memory Controller(MC) nodeshdoyu@nvidia.com2012-05-141-0/+9
| | | | | | | Add Tegra MC(Memory Controller) nodes for tegra30.dtsi. Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: dt: tegra: Add device tree support for AHBHiroshi DOYU2012-05-141-0/+5
| | | | | | | Add AHB entry for tegra20/30. Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: dt: tegra30.dtsi: Add audio-related nodesStephen Warren2012-04-251-0/+41
| | | | | | | Add nodes for the Tegra30 AHUB and I2S controllers. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Olof Johansson <olof@lixom.net>
* Merge tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds2012-03-271-0/+8
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull "ARM: device tree work" from Arnd Bergmann: "Most of these patches convert code from using static platform data to describing the hardware in the device tree. This is only the first half of the changes for v3.4 because a lot of patches for this topic came in the last week before the merge window. Signed-off-by: Arnd Bergmann <arnd@arndb.de>" Fix up trivial conflicts in arch/arm/mach-vexpress/{Kconfig,core.h} * tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (86 commits) Document: devicetree: add OF documents for arch-mmp ARM: dts: append DTS file of pxa168 ARM: mmp: append OF support on pxa168 ARM: mmp: enable rtc clk in pxa168 i2c: pxa: add OF support serial: pxa: add OF support arm/dts: mt_ventoux: very basic support for TeeJet Mt.Ventoux board ARM: OMAP2+: Remove extra ifdefs for board-generic ARM: OMAP2+: Fix build error when only ARCH_OMAP2/3 or 4 is selected ASoC: DT: Add digital microphone binding to PAZ00 board. ARM: dt: Add ARM PMU to tegra*.dtsi ARM: at91: at91sam9x5cm/dt: add leds support ARM: at91: usb_a9g20/dt: add gpio-keys support ARM: at91: at91sam9m10g45ek/dt: add gpio-keys support ARM: at91: at91sam9m10g45ek/dt: add leds support ARM: at91: usb_a9g20/dt: add leds support ARM: at91/pio: add new PIO3 features ARM: at91: add sam9_smc.o to at91sam9x5 build ARM: at91/tc/clocksource: Add 32 bit variant to Timer Counter ARM: at91/tc: add device tree support to atmel_tclib ...
| * ARM: dt: Add ARM PMU to tegra*.dtsiStephen Warren2012-03-041-0/+8
| | | | | | | | | | | | | | This enables HW performance measurements, and usage of the "perf" tool. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* | gpio: tegra: Dynamically allocate IRQ base, and support DTStephen Warren2012-02-061-0/+2
|/ | | | | | | | | | | | | | | | | | | Enhance the driver to dynamically allocate the base IRQ number, and create an IRQ domain for itself. The use of an IRQ domain ensures that any device tree node interrupts properties are correctly parsed. Describe interrupt-related properties in the device tree binding docs, and the contents of "child" node interrupts property. Update tegra*.dtsi to specify the required interrupt-related properties. Finally, remove the definition of TEGRA_GPIO_TO_IRQ; this macro no longer gives correct results since the IRQ numbers for GPIOs are dynamically allocated. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Olof Johansson <olof@lixom.net>
* ARM: dt: Add binding for Tegra PMCStephen Warren2012-02-061-0/+5
| | | | | | | | | | | The Tegra PMC (Power Management Controller) interfaces with an external PMU (Power Management Unit), and controls wake-up from sleep modes. This initial binding is the bare minimum required to control the PMC's inversion of the PMU's interrupt signal. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* ARM: dt: tegra: Add Tegra APB DMA device tree bindingStephen Warren2012-02-061-0/+37
| | | | | | | | | | | Document binding, and add the node to tegra*.dtsi. The driver isn't actually instantiated from this node yet, but the I2S binding will rely on being able to refer to the APB DMA node using a phandle. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* ARM: dt: tegra30.dtsi: Add extra GPIO interruptStephen Warren2012-02-061-1/+2
| | | | | | | | | The Tegra30 GPIO controller has one more bank than Tegra20, and hence has one more interrupt. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Olof Johansson <olof@lixom.net>
* ARM: dt: tegra30.dtsi: Reformat gpio's interrupts propertyStephen Warren2012-02-061-1/+7
| | | | | | | | The new content matches tegra20.dtsi, and is < 80 columns. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Olof Johansson <olof@lixom.net>
* arm/tegra: initial device tree for tegra30Peter De Schrijver2011-12-171-0/+127
This patch adds the initial device tree for tegra30 Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Colin Cross <ccross@android.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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