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path: root/arch/arm/boot/dts/tegra20-whistler.dts
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* ARM: tegra: fix VBUS regulator GPIO polarity in DTStephen Warren2013-07-031-0/+2
| | | | | | | | | | Commit 4c94c8b "ARM: tegra: update device trees for USB binding rework" added regulator definitions for GPIO-controlled USB VBUS. However, none of these contained the essential DT property enable-active-high. Add this so that the regulator definitions are correct. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* ARM: tegra20: convert device tree files to use CLK definesHiroshi Doyu2013-05-281-1/+3
| | | | | | | | | | | | Use the Tegra20 CAR binding header (tegra20-car.h) to replace magic numbers in the device tree. For example, - clocks = <&tegra_car 28>; + clocks = <&tegra_car CLK_HOST1X>; Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> [swarren, updated since tegra20-car.h moved for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: convert device tree files to use IRQ definesStephen Warren2013-05-281-1/+1
| | | | | | Use the GIC and standard IRQ binding defines in all IRQ specifiers. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: convert device tree files to use GPIO definesStephen Warren2013-05-281-5/+6
| | | | | | | Use TEGRA_GPIO() macro to name all GPIOs referenced by GPIO properties, and some interrupts properties. Use standard GPIO flag defines too. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: use #include for all device treesStephen Warren2013-05-281-1/+1
| | | | | | | | | | | | | Replace /include/ (dtc) with #include (C pre-processor) for all Tegra DT files, so that gcc -E handles the entire include tree, and hence any of those files can #include some other file e.g. for constant definitions. This allows future use of #defines and header files in order to define names for various constants, such as the IDs and flags in GPIO specifiers. Use of those features will increase the readability of the device tree files. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: update device trees for USB binding reworkVenu Byravarasu2013-05-171-0/+28
| | | | | | | | | | | | | This patch updates all Tegra board files so that they contain all the properties required by the updated USB DT binding. Note that this patch only adds the new properties and does not yet remove the old properties, in order to maintain bisectability. The old properties will be removed once the driver has been updated to assume the new bindings. Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com> [swarren: fixed some newly added regulator-name properties to better match schematic, avoided duplicate regulator-name on Whistler.] Signed-off-by: Stephen Warren <swarren@nvidia.com>
* clk: tegra: Fix cdev1 and cdev2 IDsPrashant Gaikwad2013-04-041-1/+1
| | | | | | | | Correct IDs for cdev1 and cdev2 are 94 and 93 respectively. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> [swarren: split into separate driver and device-tree patches] Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: dts: tegra: add the PM configurations of PMCJoseph Lo2013-04-041-0/+8
| | | | | | | | Adding the PM configuration of PMC when the platform support suspend function. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: add non-removable and keep-power-in-suspend property for MMCJoseph Lo2013-04-041-0/+1
| | | | | | | | | | | This patch adds "non-removable" property of MMC host where the eMMC device is for Tegra platform. And the "keep-power-in-suspend" property was used for the SDIO device that need this to go into suspend mode (e.g. BRCM43xx series). Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: whistler: add wakeup source for KBCJoseph Lo2013-04-041-0/+1
| | | | | | | Adding KBC as a wakeup source for Whistler board. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: add clocks property to sound nodesStephen Warren2013-04-041-0/+3
| | | | | | | | Audio-related clocks need to be represented in the device tree. Update bindings to describe which clocks are needed, and DT files to include those clocks. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: add clock source of PMC to device treesJoseph Lo2013-04-031-0/+13
| | | | | | | Adding the bindings of the clock source of PMC in DT. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: dts: tegra: fix the activate polarity of cd-gpio in mmc hostJoseph Lo2013-03-111-0/+1
| | | | | | | | The GPIO pin of SD slot card detection should active low. Signed-off-by: Joseph Lo <josephl@nvidia.com> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: move serial clock-frequency attr into the Tegra20 dtsiLucas Stach2013-01-281-1/+0
| | | | | | | | | No Tegra20 Platform is running PLL_P at another rate than 216MHz, nor is any using any other PLL as UART source clock. Move attribute into SoC level dtsi file to slim down board DT files. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: whistler: enable keyboard in DTLaxman Dewangan2013-01-281-0/+12
| | | | | | | | | | | | Enable Tegra based keyboard controller and populate the key mapping for Whistler. With this patch, HOME, BACK, POWER and MENU keys will work. Still other keys which are in ROW3 and ROW4 will not work as it conflicts with KBC pins on SDIO2 pinmux. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: DT: tegra: Unify the description of Tegra20 boardsBryan Wu2013-01-281-1/+1
| | | | | | | Use engineering name 'Tegra20' instead of 'Tegra2' Signed-off-by: Bryan Wu <pengw@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: whistler: enable HDMI portStephen Warren2012-11-161-2/+19
| | | | | | | | | | Enable host1x, and the HDMI output. Whistler also has a DSI-based LCD, and a VGA output. tegradrm doesn't support either of those output types yet. Based on work by Thierry Reding for TrimSlice. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: update *.dts for regulator-compatible deprecationStephen Warren2012-11-051-90/+29
| | | | | | | | | Commit 13511de "regulator: deprecate regulator-compatible DT property" now allows for simpler content within the regulators node within a PMIC. Modify all the Tegra device tree files to take advantage of this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Thierry Reding <thierry.reding@avionic-design.de>
* ARM: dt: tegra: whistler: configure power offStephen Warren2012-09-191-0/+2
| | | | | | | Add DT property to tell the MAX8907 that it should provide the pm_power_off() implementation. This allows "shutdown" to work. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: dt: tegra: whistler: add regulatorsStephen Warren2012-09-061-0/+293
| | | | | | | | | | | | | | | Whistler uses a Maxim 8907 regulator. Instantiate this. The voltage settings were derived from the schematic. The only exception is the BBAT voltage; the schematic says 1.2v, but the HW can't go that low, so use the HW default of 2.4v instead. Almost all regulators list all driven supply signal names in their regulator-names property. The exception is nvvdd_sv3, which is in turn named 12 more different names on the schematic, so these were omitted for brevity. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: dt: tegra: add Whistler device tree fileStephen Warren2012-07-061-0/+301
Whistler is a highly configurable Tegra evaluation and development board. This change adds support for the following specific configuration: E1120 motherboard E1108 CPU board E1116 PMU board The motherboard configuration switches are set as follows: SW1=0 SW2=0 SW3=5 S1/S2/S3/S4 all on, except S3 7/8 are off. Other combinations of daugher boards may work to varying degrees, but will likely require some SW adjustment. Signed-off-by: Stephen Warren <swarren@nvidia.com>
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