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Set 'ti,set-rate-parent' property for clocks in the dpll4_m4 clock
path, which is used for DSS functional clock. This fixes DSS driver's
clock rate configuration, which needs the rate to be propagated properly
to the divider node (dpll4_m4_ck).
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tested-by: Christoph Fritz <chf.fritz@googlemail.com>
Tested-by: Marek Belisko <marek@goldelico.com>
Acked-by: Tony Lindgren <tony@atomide.com>
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We need to use set-rate-parent for dpll4_m4 clock path, so use the
ti,fixed-factor-clock version which supports set-rate-parent property.
The set-rate-parent flag itself is set in the following patch, this one
just changes the clock driver to ti,fixed-factor-clock without any other
changes.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tested-by: Christoph Fritz <chf.fritz@googlemail.com>
Tested-by: Marek Belisko <marek@goldelico.com>
Acked-by: Tony Lindgren <tony@atomide.com>
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This patch creates a unique node for each clock in the OMAP3 power,
reset and clock manager (PRCM).
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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