| Commit message (Expand) | Author | Age | Files | Lines | ||
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| | | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dt-bindings: clock: document the fsl-sai driver | Michael Walle | 2020-01-28 | 1 | -0/+55 | |
| | | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: composite: add _register_composite_pdata() variants | Michael Walle | 2020-01-28 | 2 | -3/+66 | |
| | | | | | | | |/ / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / | ||||||
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: qcom: rpmh: Sort OF match table | Bjorn Andersson | 2020-01-28 | 1 | -1/+1 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dt-bindings: fix warnings in validation of qcom,gcc.yaml | Dafna Hirschfeld | 2020-01-28 | 1 | -1/+1 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dt-binding: fix compilation error of the example in qcom,gcc.yaml | Dafna Hirschfeld | 2020-01-28 | 1 | -0/+1 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: qcom: Add ipq6018 Global Clock Controller support | Sricharan R | 2020-01-09 | 3 | -0/+4644 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: qcom: Add DT bindings for ipq6018 gcc clock controller | Sricharan R | 2020-01-09 | 3 | -1/+421 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: qcom: gcc-msm8996: Fix parent for CLKREF clocks | Bjorn Andersson | 2020-01-06 | 2 | -7/+38 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: qcom: rpmh: Add IPA clock for SC7180 | Taniya Das | 2020-01-06 | 1 | -0/+1 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: qcom: rpmh: skip undefined clocks when registering | Taniya Das | 2020-01-06 | 1 | -1/+6 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: qcom: Add video clock controller driver for SC7180 | Taniya Das | 2020-01-04 | 3 | -0/+268 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dt-bindings: clock: Introduce SC7180 QCOM Video clock bindings | Taniya Das | 2020-01-04 | 2 | -0/+24 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dt-bindings: clock: Add YAML schemas for the QCOM VIDEOCC clock bindings | Taniya Das | 2020-01-04 | 2 | -18/+61 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: qcom: Add graphics clock controller driver for SC7180 | Taniya Das | 2020-01-04 | 3 | -0/+275 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dt-bindings: clock: Introduce SC7180 QCOM Graphics clock bindings | Taniya Das | 2020-01-04 | 2 | -0/+22 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dt-bindings: clock: Add YAML schemas for the QCOM GPUCC clock bindings | Taniya Das | 2020-01-04 | 2 | -24/+71 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: qcom: apcs-msm8916: use clk_parent_data to specify the parent | Niklas Cassel | 2020-01-04 | 1 | -5/+5 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge branch 'clk-register-dt-node-better' into clk-qcom | Stephen Boyd | 2020-01-04 | 1 | -2/+25 | |
| | | | | | | |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | ||||||
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: qcom: Add display clock controller driver for SC7180 | Taniya Das | 2019-12-23 | 3 | -0/+786 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dt-bindings: clock: Introduce QCOM sc7180 display clock bindings | Taniya Das | 2019-12-23 | 2 | -0/+47 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dt-bindings: clock: Add YAML schemas for the QCOM DISPCC clock bindings | Taniya Das | 2019-12-23 | 2 | -19/+66 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: qcom: clk-alpha-pll: Add support for Fabia PLL calibration | Taniya Das | 2019-12-23 | 2 | -0/+80 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: qcom: alpha-pll: Remove useless read from set rate | Taniya Das | 2019-12-23 | 1 | -6/+1 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: qcom: Add missing msm8998 gcc_bimc_gfx_clk | Jeffrey Hugo | 2019-12-23 | 2 | -0/+15 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: qcom: apcs-msm8916: silently error out on EPROBE_DEFER | Jorge Ramirez-Ortiz | 2019-12-18 | 1 | -1/+2 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: qcom: hfpll: use clk_parent_data to specify the parent | Jorge Ramirez-Ortiz | 2019-12-18 | 1 | -1/+3 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: qcom: hfpll: CLK_IGNORE_UNUSED | Jorge Ramirez-Ortiz | 2019-12-18 | 1 | -0/+7 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: qcom: hfpll: register as clock provider | Jorge Ramirez-Ortiz | 2019-12-18 | 1 | -1/+9 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: qcom: gcc: limit GPLL0_AO_OUT operating frequency | Jorge Ramirez-Ortiz | 2019-12-18 | 3 | -1/+10 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dt-bindings: mailbox: qcom: Add clock-name optional property | Jorge Ramirez-Ortiz | 2019-12-18 | 1 | -3/+21 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: qcom: smd: Add missing bimc clock | Jeffrey Hugo | 2019-12-18 | 1 | -0/+3 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: qcom: Add MSM8998 Multimedia Clock Controller (MMCC) driver | Jeffrey Hugo | 2019-12-18 | 3 | -0/+2923 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dt-bindings: clock: Add support for the MSM8998 mmcc | Jeffrey Hugo | 2019-12-18 | 2 | -0/+248 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dt-bindings: clock: Convert qcom,mmcc to DT schema | Jeffrey Hugo | 2019-12-18 | 2 | -28/+60 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dt-bindings: clock: Document external clocks for MSM8998 gcc | Jeffrey Hugo | 2019-12-18 | 1 | -14/+59 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: qcom: mmcc8974: move gfx3d_clk_src from the mmcc to rpm | Brian Masney | 2019-12-18 | 2 | -13/+2 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: qcom: dispcc: Add support for display port clocks | Taniya Das | 2019-12-18 | 2 | -2/+225 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: qcom: rcg2: Add support for display port clock ops | Taniya Das | 2019-12-18 | 3 | -0/+79 | |
| | | | | | | | |/ / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / | | | | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ||||||
| | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge tag 'for-5.6-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegr... | Stephen Boyd | 2020-01-27 | 5 | -11/+15 | |
| | | | | | |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | | | | | |/ / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / | | | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ||||||
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: tegra20/30: Explicitly set parent clock for Video Decoder | Dmitry Osipenko | 2020-01-10 | 2 | -2/+2 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: tegra20/30: Don't pre-initialize displays parent clock | Dmitry Osipenko | 2020-01-10 | 2 | -4/+0 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: tegra: divider: Check UART's divider enable-bit state on rate's recalcul... | Dmitry Osipenko | 2020-01-10 | 1 | -2/+7 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: tegra: clk-dfll: Remove call to pm_runtime_irq_safe() | Sowjanya Komatineni | 2020-01-10 | 1 | -2/+1 | |
| | | | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: tegra: Mark fuse clock as critical | Stephen Warren | 2020-01-08 | 1 | -1/+5 | |
| | | | | | |/ / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / | ||||||
| | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: zynqmp: Add support for clock with CLK_DIVIDER_POWER_OF_TWO flag | Tejas Patel | 2020-01-23 | 1 | -5/+31 | |
| | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: zynqmp: Fix divider calculation | Rajan Vaja | 2020-01-23 | 1 | -0/+46 | |
| | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: zynqmp: Add support for get max divider | Rajan Vaja | 2020-01-23 | 2 | -0/+37 | |
| | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: zynqmp: Warn user if clock user are more than allowed | Rajan Vaja | 2020-01-23 | 3 | -2/+7 | |
| | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk: zynqmp: Extend driver for versal | Rajan Vaja | 2020-01-23 | 1 | -1/+2 | |
| | | | | * | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dt-bindings: clock: Add bindings for versal clock driver | Rajan Vaja | 2020-01-23 | 2 | -0/+187 | |
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