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* ARM: omap2: add select of TI_PRIV_EDMAOlof Johansson2013-07-091-0/+1
| | | | | | | | | | "ARM: OMAP: build mach-omap code only if needed" moved around the ARCH_OMAP2PLUS stanza, but accidentally dropped the seleciton of TI_PRIV_EDMA in the process. Add it back. Cc: Arnd Bergmann <arnd@arndb.de> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* ARM: exynos: select PM_GENERIC_DOMAINS only when usedArnd Bergmann2013-07-061-1/+1
| | | | | | | This fixes building exynos kernels with CONFIG_PM disabled. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Kukjin Kim <kgene.kim@samsung.com>
* ARM: ixp4xx: avoid circular header dependencyArnd Bergmann2013-07-063-1/+5
| | | | | | | | | | | | With the new linux/reboot.h header file dependency added, we can no longer build ixp4xx. The easiest way to avoid that is to remove the inclusion of mach/hardware.h from mach/timex.h, which does not need that header anyway. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: Krzysztof Halasa <khc@pm.waw.pl> Cc: Jason Cooper <jason@lakedaemon.net>
* ARM: OMAP: omap_common_late_init may be unusedArnd Bergmann2013-07-051-1/+1
| | | | | | | | | | Some OMAP SoCs use this function while others do not, and that causes a warning when building multi_v7_defconfig. Marking the function __maybe_unused silences the harmless warning without the need to add complex #ifdef logic. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Tony Lindgren <tony@atomide.com>
* ARM: sti: move DEBUG_STI_UART into alphabetical orderArnd Bergmann2013-07-051-10/+10
| | | | | | | This was accidentally added in the wrong place, messing up the ordering of the file. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* ARM: OMAP: build mach-omap code only if neededArnd Bergmann2013-07-052-74/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | If we build a kernel with CONFIG_ARCH_OMAP2PLUS enabled but all of the individual SoCs disabled, we run into a large number of link errors because if incorrect dependencies: arch/arm/mach-omap2/built-in.o: In function `_add_initiator_dep': arch/arm/mach-omap2/omap_hwmod.c:691: undefined reference to `clkdm_add_sleepdep' arch/arm/mach-omap2/built-in.o: In function `_del_initiator_dep': arch/arm/mach-omap2/omap_hwmod.c:720: undefined reference to `clkdm_del_sleepdep' arch/arm/mach-omap2/built-in.o: In function `_enable': arch/arm/mach-omap2/omap_hwmod.c:2145: undefined reference to `clkdm_in_hwsup' arch/arm/mach-omap2/omap_hwmod.c:2147: undefined reference to `clkdm_hwmod_enable' arch/arm/mach-omap2/omap_hwmod.c:2191: undefined reference to `clkdm_hwmod_disable' arch/arm/mach-omap2/omap_hwmod.c:2146: undefined reference to `clkdm_missing_idle_reporting' arch/arm/mach-omap2/built-in.o: In function `_idle': arch/arm/mach-omap2/omap_hwmod.c:2235: undefined reference to `clkdm_hwmod_disable' arch/arm/mach-omap2/built-in.o: In function `_shutdown': arch/arm/mach-omap2/omap_hwmod.c:2338: undefined reference to `clkdm_hwmod_disable' arch/arm/mach-omap2/built-in.o: In function `omap_hwmod_get_context_loss_count': arch/arm/mach-omap2/omap_hwmod.c:4071: undefined reference to `pwrdm_get_context_loss_count' arch/arm/mach-omap2/built-in.o: In function `omap_pm_clkdms_setup': arch/arm/mach-omap2/pm.c:114: undefined reference to `clkdm_allow_idle' arch/arm/mach-omap2/pm.c:117: undefined reference to `clkdm_sleep' arch/arm/mach-omap2/built-in.o: In function `omap2_common_pm_late_init': arch/arm/mach-omap2/pm.c:294: undefined reference to `omap_voltage_late_init' arch/arm/mach-omap2/built-in.o: In function `omap2_gpio_dev_init': arch/arm/mach-omap2/gpio.c:133: undefined reference to `pwrdm_can_ever_lose_context' We can avoid this if we make CONFIG_ARCH_OMAP2PLUS a silent option that gets enabled any time that one of the SoC versions is enabled. Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* ARM: zynq: use DT_MACHINE_STARTArnd Bergmann2013-07-051-1/+1
| | | | | | | | The zynq platform code only supports DT based booting, so we should use DT_MACHINE_START rather than MACHINE_START. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Michal Simek <michal.simek@xilinx.com>
* ARM: omap5: omap5 has SCU and TWDArnd Bergmann2013-07-051-0/+2
| | | | | | | | | These are selected by omap4 but used in common omap4/5 SMP code, so building an omap5-only kernel is actually broken without this patch. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Tony Lindgren <tony@atomide.com>
* ARM: tegra: fix VBUS regulator GPIO polarity in DTStephen Warren2013-07-033-0/+4
| | | | | | | | | | Commit 4c94c8b "ARM: tegra: update device trees for USB binding rework" added regulator definitions for GPIO-controlled USB VBUS. However, none of these contained the essential DT property enable-active-high. Add this so that the regulator definitions are correct. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Merge tag 'renesas-fixes-for-v3.11' of ↵Arnd Bergmann2013-07-032-5/+5
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes Renesas ARM based SoC fixes for v3.11 * Correct GIO3 base addresses for EMEV2 SoC - This bug bug added when GPIO support was added for the EMEV2 SoC in v3.5 * Correct SCIFB0 resources for r8a77a4 SoC - This was a bug was added when SCIF support was added for the r8a77a4 SoC in v3.10 * tag 'renesas-fixes-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: emev2 GIO3 resource fix ARM: shmobile: r8a73a4: Fix resources for SCIFB0
| * ARM: shmobile: emev2 GIO3 resource fixMagnus Damm2013-07-021-4/+4
| | | | | | | | | | | | | | | | | | | | | | Fix GIO3 base addresses for EMEV2. This bug was introduced by 088efd9273b5076a0aead479aa31f1066d182b3e ("mach-shmobile: Emma Mobile EV2 GPIO support V3") which was included in v3.5. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Cc: stable@vger.kernel.org
| * ARM: shmobile: r8a73a4: Fix resources for SCIFB0Takanari Hayama2013-07-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix base address and IRQ resources associated with SCIFB0. This bug was introduced by e481a528901d0cd18b5b5fcbdc55207ea3b6ef68 ("ARM: shmobile: r8a73a4 SCIF support V3") which was included in v3.10. Signed-off-by: Takanari Hayama <taki@igel.co.jp> Acked-by: Magnus Damm <damm@opensource.se> [ horms+renesas@verge.net.au: Add information about commit and version this bug was added in ] Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Cc: stable@vger.kernel.org
* | ARM: Make multi_v7_defconfig usable on hardwareOlof Johansson2013-07-021-28/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This updates multi_v7_defconfig to boot on at least Tegra2 Seaboard and Panda ES. I lack working hardware for most of the platforms that were enabled to compare with, so I could only verify those two for now. Still, I enabled all of the available ones for build coverage purposes. Beyond base platforms, things like PRINTK_TIME, filesystems, MMC, USB, INET and UNIX networking was enabled. I'm sure we'll keep adding more over time, but this gets us off the ground for semi-regular boot testing. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* | Merge tag 'late-for-linus' of ↵Linus Torvalds2013-07-0295-790/+4798
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC late changes from Arnd Bergmann: "These are changes that arrived a little late before the merge window or that have multiple dependencies on previous branches so they did not fit into one of the earlier ones. There are 10 branches merged here, a total of 39 non-merge commits. Contents are a mixed bag for the above reasons: * Two new SoC platforms: ST microelectronics stixxxx and the TI 'Nspire' graphing calculator. These should have been in the 'soc' branch but were a little late * Support for the Exynos 5420 variant in mach-exynos, which is based on the other exynos branches to avoid conflicts. * Various small changes for sh-mobile, ux500 and davinci * Common clk support for MSM" * tag 'late-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (39 commits) ARM: ux500: bail out on alien cpus ARM: davinci: da850: adopt to pinctrl-single change for configuring multiple pins serial: sh-sci: Initialise variables before access in sci_set_termios() ARM: stih41x: Add B2020 board support ARM: stih41x: Add B2000 board support ARM: sti: Add DEBUG_LL console support ARM: sti: Add STiH416 SOC support ARM: sti: Add STiH415 SOC support ARM: msm: Migrate to common clock framework ARM: msm: Make proc_comm clock control into a platform driver ARM: msm: Prepare clk_get() users in mach-msm for clock-pcom driver ARM: msm: Remove clock-7x30.h include file ARM: msm: Remove custom clk_set_{max,min}_rate() API ARM: msm: Remove custom clk_set_flags() API msm: iommu: Use clk_set_rate() instead of clk_set_min_rate() msm: iommu: Convert to clk_prepare/unprepare msm_sdcc: Convert to clk_prepare/unprepare usb: otg: msm: Convert to clk_prepare/unprepare msm_serial: Use devm_clk_get() and properly return errors msm_serial: Convert to clk_prepare/unprepare ...
| * \ Merge tag 'msm-clock-for-3.11b' of ↵Olof Johansson2013-06-2724-659/+243
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm into next/late From David Brown: MSM clock updates for 3.11. Per Stephen Boyd's coverletter: Resending to collect higher level maintainer acks per Olof's request. The plan is to push this patchset through MSM to the arm-soc tree. This patchset moves the existing MSM clock code and affected drivers to the common clock framework. A prerequisite of moving to the common clock framework is to use clk_prepare() and clk_enable() so the first few patches migrate drivers to that call (clk_prepare() is a no-op on MSM right now). It also removes some custom clock APIs that MSM provides and finally moves the proc_comm clock code to the common struct clk. This patch series will be used as the foundation of the MSM 8660/8960 clock code that I plan to send out after this series. * tag 'msm-clock-for-3.11b' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm: ARM: msm: Migrate to common clock framework ARM: msm: Make proc_comm clock control into a platform driver ARM: msm: Prepare clk_get() users in mach-msm for clock-pcom driver ARM: msm: Remove clock-7x30.h include file ARM: msm: Remove custom clk_set_{max,min}_rate() API ARM: msm: Remove custom clk_set_flags() API msm: iommu: Use clk_set_rate() instead of clk_set_min_rate() msm: iommu: Convert to clk_prepare/unprepare msm_sdcc: Convert to clk_prepare/unprepare usb: otg: msm: Convert to clk_prepare/unprepare msm_serial: Use devm_clk_get() and properly return errors msm_serial: Convert to clk_prepare/unprepare Acked-by: Chris Ball <cjb@laptop.org> # for msm_sdcc.c Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | ARM: msm: Migrate to common clock frameworkStephen Boyd2013-06-2410-364/+108
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the existing clock code in mach-msm to the common clock framework. We lose our capability to set the rate of and enable a clock through debugfs. This is ok though because the debugfs features are mainly used for testing and development of new clock code. To maintain compatibility with the original MSM clock code we make a wrapper for clk_reset() that calls the struct msm_clk specific reset function. This is necessary for the usb and sdcc devices on MSM until a better suited API is made available. Cc: Saravana Kannan <skannan@codeaurora.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| | * | ARM: msm: Make proc_comm clock control into a platform driverStephen Boyd2013-06-2413-31/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To move closer to the generic struct clock framework move the proc_comm based clock code to a platform driver. The data describing the struct clks still live in the devices-$ARCH file, but the clock initialization is done at driver binding time. Cc: Saravana Kannan <skannan@codeaurora.org> Reviewed-by: Pankaj Jangra <jangra.pankaj9@gmail.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| | * | ARM: msm: Prepare clk_get() users in mach-msm for clock-pcom driverStephen Boyd2013-06-243-18/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the near future we'll be moving clock-pcom to a platform driver, in which case these two users of clk_get() in mach-msm need to be updated. Have board-trout-panel.c make the proc_comm call directly so that we don't have to port this board specific code to the driver right now and reorder the initcall order of dma.c so that it initializes after the clock driver probes but before any drivers use dma APIs. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| | * | ARM: msm: Remove clock-7x30.h include fileStephen Boyd2013-06-242-158/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This file is not used outside of the two users in the clock-7x30 array. Those two clocks are virtual "source" clocks that don't really need to exist outside of the clock driver. Let's remove them from the array, since they're not doing anything anyway, and then remove the clock-7x30.h include file along with it. Cc: Saravana Kannan <skannan@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| | * | ARM: msm: Remove custom clk_set_{max,min}_rate() APIStephen Boyd2013-06-243-26/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are no users of this API anymore so let's just remove it. If a need arises in the future we can extend the common clock API to handle it. Acked-by: Saravana Kannan <skannan@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| | * | ARM: msm: Remove custom clk_set_flags() APIStephen Boyd2013-06-244-27/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Nobody is using this API upstream and it's just contributing cruft. Remove it so the MSM clock API is closer to the generic struct clock API. Acked-by: Saravana Kannan <skannan@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| | * | msm: iommu: Use clk_set_rate() instead of clk_set_min_rate()Stephen Boyd2013-06-241-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Calling clk_set_min_rate() is no better than just calling clk_set_rate() because MSM clock code already takes care of calling the min_rate ops if the clock really needs clk_set_min_rate() called on it. Cc: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Joerg Roedel <joro@8bytes.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| | * | msm: iommu: Convert to clk_prepare/unprepareStephen Boyd2013-06-241-7/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add calls to clk_prepare and unprepare so that MSM can migrate to the common clock framework. We never unprepare the clocks until driver remove because the clocks are enabled and disabled in irq context. Finer grained power management is possible in the future via runtime power management techniques. Cc: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Joerg Roedel <joro@8bytes.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| | * | msm_sdcc: Convert to clk_prepare/unprepareStephen Boyd2013-06-241-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add calls to clk_prepare and unprepare so that MSM can migrate to the common clock framework. Cc: Chris Ball <cjb@laptop.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| | * | usb: otg: msm: Convert to clk_prepare/unprepareStephen Boyd2013-06-241-19/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add calls to clk_prepare and unprepare so that MSM can migrate to the common clock framework. Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| | * | msm_serial: Use devm_clk_get() and properly return errorsStephen Boyd2013-06-241-9/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clocks are not clk_put() in this driver's error paths during probe. The code that checks for clock errors also fails to properly return the error code from the pclk member if it turns out to be the failing clock, leading to potentially confusing error values if the clk member is not an error pointer. Fix these problems with devm_clk_get() and proper error checking. Removing the clk_put() in msm_serial_remove() also points out that msm_port is unused. Furthermore, msm_port is the wrong type and so the clk_put() would be using the wrong pointer. Replace it with the proper type and call uart_remove_one_port() to do the proper cleanup. Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| | * | msm_serial: Convert to clk_prepare/unprepareStephen Boyd2013-06-241-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add calls to clk_prepare and unprepare so that MSM can migrate to the common clock framework. Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: David Brown <davidb@codeaurora.org>
| * | | Merge branch 'msm/fixes' into next/lateOlof Johansson2013-06-275-5/+6
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | Merging in msm/fixes to avoid silly conflicts at top level. Signed-off-by: Olof Johansson <olof@lixom.net>
| * \ \ \ Merge tag 'davinci-for-v3.11/dt' of ↵Arnd Bergmann2013-06-273-4/+4
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/late From Sekhar Nori: Device Tree updates for DaVinci This patch set updates da850 DTS files to enable use of C pre-processor. Also updates pinctrl-single DT data to go with changes done in that module to enable a single register to service configuration of multiple pins. * tag 'davinci-for-v3.11/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci: ARM: davinci: da850: adopt to pinctrl-single change for configuring multiple pins ARM: davinci: da850: Use #include for all device trees Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | | | ARM: davinci: da850: adopt to pinctrl-single change for configuring multiple ↵Manjunathappa, Prakash2013-06-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pins function-mask DT property is now a mask for a pin at each pin offset inside a given pincontrol register. Fix DA850 DT data to reflect this change. Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com> [nsekhar@ti.com: reword commit message for clarity] Signed-off-by: Sekhar Nori <nsekhar@ti.com>
| | * | | | ARM: davinci: da850: Use #include for all device treesPhilip Avinash2013-06-203-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace /include/ by #include for da850 device tree files, in order to use the C pre-processor, making use of #define features possible. Signed-off-by: Philip Avinash <avinashphilip@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
| * | | | | ARM: ux500: bail out on alien cpusLinus Walleij2013-06-271-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This makes the l2x0 initialization fail gracefully on non-ux500 systems. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | | | Merge tag 'renesas-sh-sci-for-v3.11' of ↵Arnd Bergmann2013-06-274-14/+121
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/late Renesas sh-sci updates for v3.11 HSCIF support by Ulrich Hecht. * tag 'renesas-sh-sci-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: serial: sh-sci: Initialise variables before access in sci_set_termios() ARM: shmobile: r8a7790: don't use external clock for SCIFs ARM: shmobile: r8a7790: HSCIF support serial: sh-sci: HSCIF support Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | | | | serial: sh-sci: Initialise variables before access in sci_set_termios()Simon Horman2013-06-261-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change addresses two warnings that are flagged by gcc relating to potential access to the ssr and cks variables while they are uninitialised. I have addressed this by initialising the values to the defaults present in sci_baud_calc_hscif(). It is my analysis that cks is always initialised if used but that without this change ssr may be accessed while uninitialised. The code altered by this patch was introduced by commit f303b364b41d3fc5bf879799128958400b7859aa ("serial: sh-sci: HSCIF support"). Reported-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | | ARM: shmobile: r8a7790: don't use external clock for SCIFsUlrich Hecht2013-06-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is an external component and may or may not be there, while the internal clock always works. Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | | ARM: shmobile: r8a7790: HSCIF supportUlrich Hecht2013-06-171-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds support for HSCIF0 and HSCIF1 on the r8a7790. Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com> [ horms+renesas@verge.net.au this is the setup-r8a7790.c which I somehow miss-applied as part of another patch. The clock-r8a7790.c portion of this patch has already been merged. ] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | | | serial: sh-sci: HSCIF supportUlrich Hecht2013-06-173-11/+106
| | | |_|_|/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds support for "High Speed Serial Communications Interface with FIFO", essentially a SCIF with 128-byte FIFOs and more accurate baud rate generator. Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com> Acked-by: Paul Mundt <lethal@linux-sh.org> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | | | Merge branch 'renesas/boards2' into next/lateArnd Bergmann2013-06-2712-77/+490
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/mach-shmobile/setup-r8a7778.c This is a dependency for the Renesas sh-sci updates. Signedf-off-by: Arnd Bergmann <arnd@arndb.de>
| * \ \ \ \ \ Merge branch 'sti/soc' into next/lateOlof Johansson2013-06-2529-0/+1521
| |\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From Srinivas Kandagatla <srinivas.kandagatla@st.com>: This patch-set adds basic support for STMicroelectronics STi series SOCs which includes STiH415 and STiH416 with B2000 and B2020 board support. STiH415 and STiH416 are dual-core ARM Cortex-A9 CPU, designed for use in Set-top-boxes. The SOC support is available in mach-sti which contains support code for STiH415, STiH416 SOCs including the generic board support. The reason for adding two SOCs at this patch set is to show that no new C code is required for second SOC(STiH416) support. * sti/soc: ARM: stih41x: Add B2020 board support ARM: stih41x: Add B2000 board support ARM: sti: Add DEBUG_LL console support ARM: sti: Add STiH416 SOC support ARM: sti: Add STiH415 SOC support Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | | ARM: stih41x: Add B2020 board supportSrinivas Kandagatla2013-06-254-1/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | B2020 ADI board is reference board for STIH415/416 SOCs, it has 2 x UART, 4x USB, 1 x Ethernet, 1 x SATA, 1 x PCIe, and 2GB RAM with standard set-top box IPs. This patch adds initial support to B2020 with STiH415/416 with SBC_UART1 as console and a heard beat LED. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> CC: Stephen Gallimore <stephen.gallimore@st.com> CC: Stuart Menefy <stuart.menefy@st.com> CC: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | | ARM: stih41x: Add B2000 board supportSrinivas Kandagatla2013-06-254-0/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | B2000 board is reference board for STIH415/416 SOCs, it has 2 x UART, 4x USB, 2 x Ethernet, 1 x SATA, 1 x PCIe, and 1GB RAM. This patch add initial support to b2000 with STiH415/416 with UART2 as console and a heard beat LED. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> CC: Stephen Gallimore <stephen.gallimore@st.com> CC: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | | ARM: sti: Add DEBUG_LL console supportSrinivas Kandagatla2013-06-252-0/+96
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds low level debug uart support to sti based SOCs. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> CC: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | | ARM: sti: Add STiH416 SOC supportSrinivas Kandagatla2013-06-256-1/+455
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The STiH416 is advanced HD AVC processor with 3D graphics acceleration and 1.2-GHz ARM Cortex-A9 SMP CPU. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> CC: Stephen Gallimore <stephen.gallimore@st.com> CC: Stuart Menefy <stuart.menefy@st.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | | ARM: sti: Add STiH415 SOC supportSrinivas Kandagatla2013-06-2516-0/+822
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The STiH415 is the next generation of HD, AVC set-top box processors for satellite, cable, terrestrial and IP-STB markets. It is an ARM Cortex-A9 1.0 GHz, dual-core CPU. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> CC: Stephen Gallimore <stephen.gallimore@st.com> CC: Stuart Menefy <stuart.menefy@st.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | | | | | Merge branch 'nspire/soc' into next/lateOlof Johansson2013-06-2519-0/+775
| |\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From Daniel Tang <dt.tangr@gmail.com> This is the initial platform code for the TI-Nspire graphing calculators. The platform support is rather unspectacular, but still contains platform data for the LCD panel, which will get removed once there is a DT binding for the AMBA CLCD driver. * nspire/soc: arm: Add Initial TI-Nspire support arm: Add device trees for TI-Nspire hardware Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | | | arm: Add Initial TI-Nspire supportDaniel Tang2013-06-2111-0/+307
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the TI-Nspire platform. Changes between v1 and v2: * Added GENERIC_IRQ_CHIP to platform Kconfig Signed-off-by: Daniel Tang <dt.tangr@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | | | | | | arm: Add device trees for TI-Nspire hardwareDaniel Tang2013-06-218-0/+468
| | | |_|_|/ / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds device trees for describing the TI-Nspire hardware. Changes between v1 and v2: * Change "keymap" binding to the standard "linux,keymap" binding. Signed-off-by: Daniel Tang <dt.tangr@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | | | | | Merge tag 'soc-exynos5420-2' of ↵Olof Johansson2013-06-256-0/+847
| |\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/late From Kukjin Kim, this adds pinctrl support for Exynos 5420. * tag 'soc-exynos5420-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: pinctrl: exynos: add exynos5420 SoC specific data ARM: dts: add pinctrl support to EXYNOS5420 Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | | | pinctrl: exynos: add exynos5420 SoC specific dataLeela Krishna Amudala2013-06-194-0/+122
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Samsung EXYNOS5420 SoC specific data to enable pinctrl support for all platforms based on EXYNOS5420. Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com> Reviewed-by: Doug Anderson <dianders@chromium.org> Acked-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Tested-by : Sunil Joshi <joshi@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | | | | | ARM: dts: add pinctrl support to EXYNOS5420Leela Krishna Amudala2013-06-192-0/+725
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the required pin configuration support to EXYNOS5420 using pinctrl interface. Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com> Reviewed-by: Doug Anderson <dianders@chromium.org> Acked-by: Tomasz Figa <t.figa@samsung.com> Tested-by : Sunil Joshi <joshi@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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