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* drm/scheduler: remove sched field from the entityNayan Deshmukh2018-07-256-19/+16
| | | | | | | | | | | | The scheduler of the entity is decided by the run queue on which it is queued. This patch avoids us the effort required to maintain a sync between rq and sched field when we start shifting entites among different rqs. Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/scheduler: modify API to avoid redundancyNayan Deshmukh2018-07-2513-42/+30
| | | | | | | | | | entity has a scheduler field and we don't need the sched argument in any of the functions where entity is provided. Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: reduce the number of placements for a BOChristian König2018-07-252-1/+4
| | | | | | | | Make struct amdgpu_bo a bit smaller. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: consistenly name amdgpu_bo_ functionsChristian König2018-07-2510-38/+39
| | | | | | | | Just rename functions, no functional change. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* MAINTAINERS: add entry for AMD PP codeChristian König2018-07-251-0/+8
| | | | | | | | | | Add separate entry for the power managent code on AMD GPUs. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Rex Zhu <rezhu@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* MAINTAINERS: Add separate section for DCChristian König2018-07-251-0/+8
| | | | | | | | | | Note that Harry and Leo Li are maintainers for that stuff. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* MAINTAINERS: add new TTM maintainersChristian König2018-07-251-1/+2
| | | | | | | | | Roger unfortunately doesn't work for AMD any longer. So add Rui and Jerry as co-maintainer as well. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: expose only the first UVD instance for nowChristian König2018-07-252-15/+7
| | | | | | | | | | Going to completely rework the context to ring mapping with Nayan's GSoC work, but for now just stopping to expose the second UVD instance should do it. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: clean up coding style a bitChristian König2018-07-251-10/+10
| | | | | | | | No need to bitcast a boolean and even if we should use "!!" instead. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: DC 3.1.58Harry Wentland2018-07-241-1/+1
| | | | | | | Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: separate dc_debug into dc_debug_options and dc_debug dataJun Lei2018-07-246-15/+18
| | | | | | | | | | [why] confusing as to which part of debug is informational, and which part causes behavioral change Signed-off-by: Jun Lei <Jun.Lei@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Decouple aux from i2cBhawanpreet Lakha2018-07-2414-14/+1549
| | | | | | | | | | | | | | | [Why] Aux engine is created from i2caux layer. We want to remove this layer and use the engine directly. [How] Decouple aux engine from i2caux. Move aux engine related code to dce folder and use dc resource pool to manage the engine. And use the engine functions directly Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: DPP CM ICSC AYCRCB8888 format supportvikrant mhaske2018-07-242-1/+5
| | | | | | | | | | | | | | | | [why] Diags has POR to run the video workload using AYCRCB8888 through DCN; capture it through DWB and send it to VCN hardware to encode [how] added the code to support this format so that DPP ICSC will be able to convert it from YUV444 to internal RGB and DWB OCSC will be able to convert from internal RGB to YUV420 Signed-off-by: vikrant mhaske <vikrant.mhaske@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: On dce100, set clocks to 0 on suspendDavid Francis2018-07-241-3/+16
| | | | | | | | | | | | | | | | | [Why] When a dce100 asic was suspended, the clocks were not set to 0. Upon resume, the new clock was compared to the existing clock, they were found to be the same, and so the clock was not set. This resulted in a pernicious blackscreen. [How] In atomic commit, check to see if there are any active pipes. If no, set clocks to 0 Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: allow diags to skip initial link trainingTony Cheng2018-07-244-3/+9
| | | | | | | | | | | | | | | | | | [why] diag specify what the full config and is only concerned about pass/fail at the end having inter-op code like verifiying we can actually train at reported link rate slows down diag test and add complexity we don't need [how] add dc_debug option to skip capability link trianing also remove hbr in function name as verify is not specific to hbr Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Ken Chalmers <ken.chalmers@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Remove unnecessary warningMikita Lipski2018-07-241-4/+0
| | | | | | | | | | | | | | [why] The warning message floods the dmesg log on Tonga even though it is expected to have a pix_clk set to zero, when the pipe is not active. [how] remove the assert Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: move the amdgpu_fbdev_set_suspend() further upShirish S2018-07-241-3/+3
| | | | | | | | | | | | This patch moves amdgpu_fbdev_set_suspend() to the beginning of suspend sequence. This is to ensure fbcon does not to write to the VRAM after GPU is powerd down. Signed-off-by: Shirish S <shirish.s@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Don't warn on destroying a pinned BOMichel Dänzer2018-07-241-1/+1
| | | | | | | | | | | | | The warning turned out to be not so useful, as BO destruction tends to be deferred to a workqueue. Also, we should be preventing any damage from this now, so not really important anymore to fix code doing this. Acked-by: Alex Deucher <alexander.deucher@amd.com> Tested-by: Mike Lothian <mike@fireburn.co.uk> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: allow slow switch only if NBPState enabled v2Evan Quan2018-07-242-2/+4
| | | | | | | | | | Otherwise there may be potential SMU performance issues. v2: fix commit description and coding style Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Rex Zhu <rex.zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: correct the argument for PPSMC_MSG_SetUclkFastSwitchEvan Quan2018-07-242-2/+2
| | | | | | | | | The argument was set wrongly. Fast/slow switch was asked when there is actually a slow/fast switch needed. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Rex Zhu <rex.zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: slow UCLK switch when multiple displays not in syncEvan Quan2018-07-241-1/+2
| | | | | | | | | Slow switch for UCLK when there is multiple displays and they are not in sync. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Rex Zhu <rex.zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Fix RLC safe mode test in gfx_v9_0_enter_rlc_safe_modeMichel Dänzer2018-07-241-1/+1
| | | | | | | | | | | | | | | | We were testing the register offset, instead of the value stored in the register, therefore always timing out the loop. This reduces suspend time of the system in the bug report below by ~600 ms. Cc: stable@vger.kernel.org Bugzilla: https://bugs.freedesktop.org/107277 Tested-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: rework suspend and resume to deal with atomic changesAlex Deucher2018-07-201-41/+45
| | | | | | | | | | | | | | | Use the newly split ip suspend functions to do suspend displays first (to deal with atomic so that FBs can be unpinned before attempting to evict vram), then evict vram, then suspend the other IPs. Also move the non-DC pinning code to only be called in the non-DC cases since atomic should take care of DC. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107065 Fixes: e00fb85 drm: Stop updating plane->crtc/fb/old_fb on atomic drivers Acked-by: Harry Wentland <harry.wentland@amd.com> Reviewed-and-tested-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: split ip suspend into 2 phasesAlex Deucher2018-07-201-2/+76
| | | | | | | | | | We need to do some IPs earlier to deal with ordering issues similar to how resume is split into two phases. Do DCE first to deal with atomic, then do the rest. Acked-by: Harry Wentland <harry.wentland@amd.com> Reviewed-and-tested-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/acpi: skip backlight events for DCAlex Deucher2018-07-201-1/+3
| | | | | | | No change in behavior, just bail sooner. Reviewed-by: Jim Qu <Jim.Qu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/apci: don't call sbios request function if it's not supportedAlex Deucher2018-07-201-25/+28
| | | | | | | | Check the supported functions mask before calling the bios requests method. Reviewed-by: Jim Qu <Jim.Qu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Fix warning in dma_fence_is_later on resume from S3.Andrey Grodzovsky2018-07-201-0/+2
| | | | | | | | | | | | | | | | Problem: amdgpu_ttm_set_buffer_funcs_status destroys adev->mman.entity on suspend without releasing adev->mman.bdev.man[TTM_PL_VRAM].move fence so on resume the new drm_sched_entity.fence_context causes the warning against the old fence context which is different. Fix: When destroying sched_entity in amdgpu_ttm_set_buffer_funcs_status release man->move and set the pointer to NULL. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: use drm_fb helper for console_(un)lockShirish S2018-07-202-8/+4
| | | | | | | | | | | This patch removes the usage of console_(un)lock by replacing drm_fb_helper_set_suspend() to drm_fb_helper_set_suspend_unlocked() which locks and unlocks the console instead of locking ourselves. Signed-off-by: Shirish S <shirish.s@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Convert 10kHz clks from PPLib into kHzRex Zhu2018-07-201-2/+2
| | | | | | | | | | | Except special naming as *_in_khz, The default clock unit in powerplay is in 10KHz. so need to * 10 as expecting clock frequency in display is in kHz. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pp: Set Max clock level to display by defaultRex Zhu2018-07-201-2/+7
| | | | | | | | | | | avoid the error in dmesg: [drm:dm_pp_get_static_clocks] *ERROR* DM_PPLIB: invalid powerlevel state: 0! Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pp: Update clk with od setting when set power stateRex Zhu2018-07-201-0/+15
| | | | | | | | | This can fix the issue resume from S3, the user's OD setting were reverted to default. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pp: Read vbios vddc limit before use themRex Zhu2018-07-201-3/+8
| | | | | | | | Use the vddc limit before read them from vbios Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: lock and unlock console only for amdgpu_fbdev_set_suspend [V5]Shirish S2018-07-201-15/+7
| | | | | | | | | | | | | | | | | | | | | | | | [Why] While the console_lock is held, console output will be buffered, till its unlocked it wont be emitted, hence its ideal to unlock sooner to enable debugging/detecting/fixing of any issue in the remaining sequence of events in resume path. The concern here is about consoles other than fbcon on the device, e.g. a serial console [How] This patch restructures the console_lock, console_unlock around amdgpu_fbdev_set_suspend() and moves this new block appropriately. V2: Kept amdgpu_fbdev_set_suspend after pci_set_power_state V3: Updated the commit message to clarify the real concern that this patch addresses. V4: code clean-up. V5: fixed return value Signed-off-by: Shirish S <shirish.s@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Honor pplib stutter mask for all ASICs in DCHarry Wentland2018-07-201-4/+3
| | | | | | | | | | | | | | | | | | | | | | [Why] We were only setting this mask for DCN, but should really use it universally for all ASICs. [How] Move the assignment out of the Raven switch statement for all ASICs other than Stoney and Carrizo. v2: Keep stutter always on for Carrizo and Stoney (Alex) Cc: Rex.Zhu@amd.com Cc: Feifei.Xu@amd.com Cc: Kenneth.Feng@amd.com Cc: Evan.Quan@amd.com Cc: Bhawanpreet.Lakha@amd.com Cc: Jordan.Lazare@amd.com Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Drop unused backlight functions in DMHarry Wentland2018-07-201-16/+2
| | | | | | | | These are only ever called for non-DC code. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: fix spelling mistake "successed" -> "succeeded"Colin Ian King2018-07-201-5/+5
| | | | | | | Trivial fix to spelling mistake in dev_err error message. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* Merge branch 'drm-next-4.19' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie2018-07-20189-2272/+3650
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-next More features for 4.19: - Map processes to vmids for debugging GPUVM faults - Raven gfxoff fixes - Initial gfxoff support for vega12 - Use defines for interrupt sources rather than magic numbers - DC aux fixes - Finish DC logging TODO - Add more DC debugfs interfaces for conformance testing - Add CRC support for DCN - Scheduler rework in preparation for load balancing - Unify common smu9 code - Clean up UVD instancing support - ttm cleanups - Misc fixes and cleanups Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180719194001.3488-1-alexander.deucher@amd.com
| * drm/amdgpu: clean up UVD instance handling v2Christian König2018-07-192-67/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The whole handle, filp and entity handling is superfluous here. We should have reviewed that more thoughtfully. It looks like somebody just made the code instance aware without knowing the background. v2: fix one more missed case in amdgpu_uvd_suspend Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: remove superflous UVD encode entityChristian König2018-07-193-27/+0
| | | | | | | | | | | | | | | | | | Not sure what that was every used for, but now it is completely unused. Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu/display: Replace CONFIG_DRM_AMD_DC_DCN1_0 with CONFIG_X86Michel Dänzer2018-07-1926-64/+56
| | | | | | | | | | | | | | | | | | Allowing CONFIG_DRM_AMD_DC_DCN1_0 to be disabled on X86 was an opportunity for display with Raven Ridge accidentally not working. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/powerplay: fixed uninitialized valueEvan Quan2018-07-191-1/+1
| | | | | | | | | | | | | | | | | | | | The 'result' is not initialized correctly. It causes the API return an error code even on success. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| * drm/amdgpu/powerplay: use irq source defines for smu7 sourcesAlex Deucher2018-07-191-3/+4
| | | | | | | | | | | | | | | | | | Use the newly added irq source defines rather than magic numbers for smu7 thermal interrupts. Rewiewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Rex Zhu <rezhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu/pm: Remove VLA usageKees Cook2018-07-181-58/+42
| | | | | | | | | | | | | | | | | | | | | | In the quest to remove all stack VLA usage from the kernel[1], this uses the maximum sane buffer size and removes copy/paste code. [1] https://lkml.kernel.org/r/CA+55aFzCG-zNmZwX4A2FQpadafLfEzK6CC=qPXydAacU1RqZWA@mail.gmail.com Reviewed-by: Rex Zhu <rezhu@amd.com> Signed-off-by: Kees Cook <keescook@chromium.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: simplify the bo reference on amdgpu_bo_updateHuang Rui2018-07-181-4/+3
| | | | | | | | | | | | | | | | | | | | | | BO ptr already be initialized at definition, we needn't use the complicated reference. v2: fix typo at subject line Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: remove internal/unused kernel module parametersSonny Jiang2018-07-182-15/+0
| | | | | | | | | | | | | | | | Remove internal/unused kernel module parameters Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: change ring priority after pushing the job (v2)Christian König2018-07-182-3/+11
| | | | | | | | | | | | | | | | | | | | | | Pushing a job can change the ring assignment of an entity. v2: squash in: "drm/amdgpu: fix job priority handling" (Christian) Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: allow for more flexible priority handlingChristian König2018-07-181-1/+2
| | | | | | | | | | | | | | | | | | Allow to call amdgpu_ring_priority_get() after pushing the ring to the scheduler. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu/gfx9: Update golden settings for vg10.Feifei Xu2018-07-181-1/+12
| | | | | | | | | | | | | | | | Add some UTCL registers' golden settings. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Tested-by: Kevin Wang <Kevin1.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: minor cleanup in amdgpu_job.cChristian König2018-07-171-7/+4
| | | | | | | | | | | | | | | | | | | | Remove superflous NULL check, fix coding style a bit, shorten error messages. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: remove job->adev (v2)Christian König2018-07-172-8/+11
| | | | | | | | | | | | | | | | | | | | | | We can get that from the ring. v2: squash in "drm/amdgpu: always initialize job->base.sched" (Alex) Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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