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| * drm/i915/sdvo: Include YRPB as an additional TV output typeChris Wilson2012-04-091-3/+6
| * drm/i915: disallow gem init ioctl on ilkDaniel Vetter2012-04-091-0/+4
| * drm/i915: refuse to load on gen6+ without kmsDaniel Vetter2012-04-091-1/+9
| * drm/i915: extract gt interrupt handlerDaniel Vetter2012-04-091-29/+37
| * drm/i915: use render gen to switch ring irq functionsDaniel Vetter2012-04-091-2/+2
| * drm/i915: rip out old HWSTAM missed irq WA for vlvDaniel Vetter2012-04-091-12/+0
| * drm/i915: open code gen6+ ring irqsBen Widawsky2012-04-092-46/+17
| * drm/i915: ring irq cleanupsBen Widawsky2012-04-093-38/+30
| * drm/i915: add SFUSE_STRAP registers for digital port detectionEugeni Dodonov2012-04-091-0/+7
| * drm/i915: add WM_LINETIME registersEugeni Dodonov2012-04-091-0/+10
| * drm/i915: add WRPLL clocksEugeni Dodonov2012-04-091-0/+8
| * drm/i915: add LCPLL control registersEugeni Dodonov2012-04-091-0/+7
| * drm/i915: add SSC offsets for SBI accessEugeni Dodonov2012-04-091-0/+15
| * drm/i915: add port clock selection support for HSWEugeni Dodonov2012-04-091-0/+23
| * drm/i915: add S PLL controlEugeni Dodonov2012-04-091-0/+8
| * drm/i915: add PIXCLK_GATE registerEugeni Dodonov2012-04-091-0/+6
| * drm/i915: add SBI registersEugeni Dodonov2012-04-091-0/+12
| * drm/i915: add definition of DDI buffer translations regsEugeni Dodonov2012-04-091-0/+7
| * drm/i915: add definitions for DDI_BUF_CTL registersEugeni Dodonov2012-04-091-0/+23
| * drm/i915: add DP_TP_STATUS registersEugeni Dodonov2012-04-091-0/+8
| * drm/i915: add DP_TP_CTL registersEugeni Dodonov2012-04-091-0/+16
| * drm/i915: add DDI registersEugeni Dodonov2012-04-091-0/+26
| * drm/i915: add enumeration for DDI portsEugeni Dodonov2012-04-092-0/+12
| * drm/i915: add support for power wellsEugeni Dodonov2012-04-091-0/+13
| * drm/i915: add support for LynxPoint PCHEugeni Dodonov2012-04-092-0/+6
| * drm/i915: add Haswell devices and their PCI IDsEugeni Dodonov2012-04-094-0/+45
| * drm/i915: transform HAS_PCH_SPLIT in a feature checkEugeni Dodonov2012-04-092-1/+8
| * drm/i915: check for disabled interrupts on ValleyViewJesse Barnes2012-03-291-0/+2
| * drm/i915: ValleyView IRQ supportJesse Barnes2012-03-294-6/+383
| * drm/i915: interrupt bit definitions for VLVJesse Barnes2012-03-291-0/+41
| * drm/i915: add ValleyView specific force wake get/put functionsJesse Barnes2012-03-294-1/+34
| * agp/intel: add ValleyView AGP driverJesse Barnes2012-03-293-0/+29
| * agp/intel: map more registers for use by the GTT codeJesse Barnes2012-03-291-1/+5
| * drm/i915: Enable HDMI on ValleyViewShobhit Kumar2012-03-292-1/+52
| * drm/i915: program drain latency regs on ValleyViewGajanan Bhat2012-03-282-0/+93
| * drm/i915: add ValleyView clock gating initJesse Barnes2012-03-282-0/+68
| * drm/i915: add DPIO supportJesse Barnes2012-03-285-0/+182
| * drm/i915: PLL defines for VLVJesse Barnes2012-03-282-1/+13
| * drm/i915: ValleyView watermark supportJesse Barnes2012-03-282-0/+71
| * drm/i915: add ValleyView driver structs and IS_VALLEYVIEW macroJesse Barnes2012-03-282-0/+20
| * drm/i915: split PLL update code out of i9xx_crtc_mode_setDaniel Vetter2012-03-281-117/+179
| * drm/i915: split LVDS update code out of i9xx_crtc_mode_setDaniel Vetter2012-03-281-48/+58
| * drm/i915: Initialise GTT MTRR to -1Chris Wilson2012-03-281-0/+2
| * drm/i915/intel_i2c: allocate gmbus array as part of drm_i915_privateDaniel Kurtz2012-03-282-11/+1
| * drm/i915/intel_i2c: gmbus disabled and reserved ports are invalidDaniel Kurtz2012-03-283-46/+29
| * drm/i915/intel_i2c: refactor using intel_gmbus_get_adapterDaniel Kurtz2012-03-289-22/+45
| * drm/i915/intel_i2c: use i2c pre/post_xfer functions to setup gpio xfersDaniel Kurtz2012-03-281-26/+34
| * drm/i915/intel_i2c: assign HDMI port D to pin pair 6Daniel Kurtz2012-03-282-5/+5
| * drm/i915/intel_i2c: cleanup error messages and commentsDaniel Kurtz2012-03-281-4/+7
| * drm/i915/intel_i2c: refactor gmbus_xferDaniel Kurtz2012-03-281-59/+92
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