diff options
Diffstat (limited to 'include/linux')
35 files changed, 1122 insertions, 119 deletions
diff --git a/include/linux/bio.h b/include/linux/bio.h index 5a645769f020..d2633ee099d9 100644 --- a/include/linux/bio.h +++ b/include/linux/bio.h @@ -186,6 +186,15 @@ static inline void *bio_data(struct bio *bio) #define BIOVEC_SEG_BOUNDARY(q, b1, b2) \ __BIO_SEG_BOUNDARY(bvec_to_phys((b1)), bvec_to_phys((b2)) + (b2)->bv_len, queue_segment_boundary((q))) +/* + * Check if adding a bio_vec after bprv with offset would create a gap in + * the SG list. Most drivers don't care about this, but some do. + */ +static inline bool bvec_gap_to_prev(struct bio_vec *bprv, unsigned int offset) +{ + return offset || ((bprv->bv_offset + bprv->bv_len) & (PAGE_SIZE - 1)); +} + #define bio_io_error(bio) bio_endio((bio), -EIO) /* @@ -644,10 +653,6 @@ struct biovec_slab { #if defined(CONFIG_BLK_DEV_INTEGRITY) - - -#define bip_vec_idx(bip, idx) (&(bip->bip_vec[(idx)])) - #define bip_for_each_vec(bvl, bip, iter) \ for_each_bvec(bvl, (bip)->bip_vec, iter, (bip)->bip_iter) diff --git a/include/linux/blk-mq.h b/include/linux/blk-mq.h index a002cf191427..eb726b9c5762 100644 --- a/include/linux/blk-mq.h +++ b/include/linux/blk-mq.h @@ -42,7 +42,7 @@ struct blk_mq_hw_ctx { unsigned int nr_ctx; struct blk_mq_ctx **ctxs; - unsigned int wait_index; + atomic_t wait_index; struct blk_mq_tags *tags; diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h index 31e11051f1ba..8699bcf5f099 100644 --- a/include/linux/blkdev.h +++ b/include/linux/blkdev.h @@ -512,6 +512,7 @@ struct request_queue { #define QUEUE_FLAG_DEAD 19 /* queue tear-down finished */ #define QUEUE_FLAG_INIT_DONE 20 /* queue is initialized */ #define QUEUE_FLAG_NO_SG_MERGE 21 /* don't attempt to merge SG segments*/ +#define QUEUE_FLAG_SG_GAPS 22 /* queue doesn't support SG gaps */ #define QUEUE_FLAG_DEFAULT ((1 << QUEUE_FLAG_IO_STAT) | \ (1 << QUEUE_FLAG_STACKABLE) | \ @@ -920,7 +921,7 @@ static inline unsigned int blk_max_size_offset(struct request_queue *q, sector_t offset) { if (!q->limits.chunk_sectors) - return q->limits.max_hw_sectors; + return q->limits.max_sectors; return q->limits.chunk_sectors - (offset & (q->limits.chunk_sectors - 1)); diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h index ec4112d257bc..8f8ae95c6e27 100644 --- a/include/linux/cpufreq.h +++ b/include/linux/cpufreq.h @@ -482,8 +482,8 @@ extern struct cpufreq_governor cpufreq_gov_conservative; *********************************************************************/ /* Special Values of .frequency field */ -#define CPUFREQ_ENTRY_INVALID ~0 -#define CPUFREQ_TABLE_END ~1 +#define CPUFREQ_ENTRY_INVALID ~0u +#define CPUFREQ_TABLE_END ~1u /* Special Values of .flags field */ #define CPUFREQ_BOOST_FREQ (1 << 0) diff --git a/include/linux/elevator.h b/include/linux/elevator.h index 4ff262e2bf37..45a91474487d 100644 --- a/include/linux/elevator.h +++ b/include/linux/elevator.h @@ -133,7 +133,6 @@ extern struct request *elv_latter_request(struct request_queue *, struct request extern int elv_register_queue(struct request_queue *q); extern void elv_unregister_queue(struct request_queue *q); extern int elv_may_queue(struct request_queue *, int); -extern void elv_abort_queue(struct request_queue *); extern void elv_completed_request(struct request_queue *, struct request *); extern int elv_set_request(struct request_queue *q, struct request *rq, struct bio *bio, gfp_t gfp_mask); @@ -144,7 +143,7 @@ extern void elv_drain_elevator(struct request_queue *); * io scheduler registration */ extern void __init load_default_elevator_module(void); -extern int __init elv_register(struct elevator_type *); +extern int elv_register(struct elevator_type *); extern void elv_unregister(struct elevator_type *); /* diff --git a/include/linux/fs.h b/include/linux/fs.h index 338e6f758c6d..e11d60cc867b 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -1921,6 +1921,12 @@ static inline int break_lease(struct inode *inode, unsigned int mode) static inline int break_deleg(struct inode *inode, unsigned int mode) { + /* + * Since this check is lockless, we must ensure that any refcounts + * taken are done before checking inode->i_flock. Otherwise, we could + * end up racing with tasks trying to set a new lease on this file. + */ + smp_mb(); if (inode->i_flock) return __break_lease(inode, mode, FL_DELEG); return 0; diff --git a/include/linux/hugetlb.h b/include/linux/hugetlb.h index 255cd5cc0754..a23c096b3080 100644 --- a/include/linux/hugetlb.h +++ b/include/linux/hugetlb.h @@ -80,6 +80,7 @@ int dequeue_hwpoisoned_huge_page(struct page *page); bool isolate_huge_page(struct page *page, struct list_head *list); void putback_active_hugepage(struct page *page); bool is_hugepage_active(struct page *page); +void free_huge_page(struct page *page); #ifdef CONFIG_ARCH_WANT_HUGE_PMD_SHARE pte_t *huge_pmd_share(struct mm_struct *mm, unsigned long addr, pud_t *pud); diff --git a/include/linux/kernfs.h b/include/linux/kernfs.h index 17aa1cce6f8e..30faf797c2c3 100644 --- a/include/linux/kernfs.h +++ b/include/linux/kernfs.h @@ -91,6 +91,7 @@ struct kernfs_elem_attr { const struct kernfs_ops *ops; struct kernfs_open_node *open; loff_t size; + struct kernfs_node *notify_next; /* for kernfs_notify() */ }; /* @@ -304,6 +305,7 @@ struct dentry *kernfs_mount_ns(struct file_system_type *fs_type, int flags, struct kernfs_root *root, unsigned long magic, bool *new_sb_created, const void *ns); void kernfs_kill_sb(struct super_block *sb); +struct super_block *kernfs_pin_sb(struct kernfs_root *root, const void *ns); void kernfs_init(void); diff --git a/include/linux/libata.h b/include/linux/libata.h index 5ab4e3a76721..92abb497ab14 100644 --- a/include/linux/libata.h +++ b/include/linux/libata.h @@ -593,6 +593,7 @@ struct ata_host { struct device *dev; void __iomem * const *iomap; unsigned int n_ports; + unsigned int n_tags; /* nr of NCQ tags */ void *private_data; struct ata_port_operations *ops; unsigned long flags; diff --git a/include/linux/mfd/max77693-private.h b/include/linux/mfd/max77693-private.h index 3e050b933dd0..c466ff3e16b8 100644 --- a/include/linux/mfd/max77693-private.h +++ b/include/linux/mfd/max77693-private.h @@ -262,6 +262,41 @@ enum max77693_irq_source { MAX77693_IRQ_GROUP_NR, }; +#define LED_IRQ_FLED2_OPEN BIT(0) +#define LED_IRQ_FLED2_SHORT BIT(1) +#define LED_IRQ_FLED1_OPEN BIT(2) +#define LED_IRQ_FLED1_SHORT BIT(3) +#define LED_IRQ_MAX_FLASH BIT(4) + +#define TOPSYS_IRQ_T120C_INT BIT(0) +#define TOPSYS_IRQ_T140C_INT BIT(1) +#define TOPSYS_IRQ_LOWSYS_INT BIT(3) + +#define CHG_IRQ_BYP_I BIT(0) +#define CHG_IRQ_THM_I BIT(2) +#define CHG_IRQ_BAT_I BIT(3) +#define CHG_IRQ_CHG_I BIT(4) +#define CHG_IRQ_CHGIN_I BIT(6) + +#define MUIC_IRQ_INT1_ADC BIT(0) +#define MUIC_IRQ_INT1_ADC_LOW BIT(1) +#define MUIC_IRQ_INT1_ADC_ERR BIT(2) +#define MUIC_IRQ_INT1_ADC1K BIT(3) + +#define MUIC_IRQ_INT2_CHGTYP BIT(0) +#define MUIC_IRQ_INT2_CHGDETREUN BIT(1) +#define MUIC_IRQ_INT2_DCDTMR BIT(2) +#define MUIC_IRQ_INT2_DXOVP BIT(3) +#define MUIC_IRQ_INT2_VBVOLT BIT(4) +#define MUIC_IRQ_INT2_VIDRM BIT(5) + +#define MUIC_IRQ_INT3_EOC BIT(0) +#define MUIC_IRQ_INT3_CGMBC BIT(1) +#define MUIC_IRQ_INT3_OVP BIT(2) +#define MUIC_IRQ_INT3_MBCCHG_ERR BIT(3) +#define MUIC_IRQ_INT3_CHG_ENABLED BIT(4) +#define MUIC_IRQ_INT3_BAT_DET BIT(5) + enum max77693_irq { /* PMIC - FLASH */ MAX77693_LED_IRQ_FLED2_OPEN, @@ -282,6 +317,10 @@ enum max77693_irq { MAX77693_CHG_IRQ_CHG_I, MAX77693_CHG_IRQ_CHGIN_I, + MAX77693_IRQ_NR, +}; + +enum max77693_irq_muic { /* MUIC INT1 */ MAX77693_MUIC_IRQ_INT1_ADC, MAX77693_MUIC_IRQ_INT1_ADC_LOW, @@ -304,7 +343,7 @@ enum max77693_irq { MAX77693_MUIC_IRQ_INT3_CHG_ENABLED, MAX77693_MUIC_IRQ_INT3_BAT_DET, - MAX77693_IRQ_NR, + MAX77693_MUIC_IRQ_NR, }; struct max77693_dev { @@ -319,7 +358,10 @@ struct max77693_dev { struct regmap *regmap_muic; struct regmap *regmap_haptic; - struct irq_domain *irq_domain; + struct regmap_irq_chip_data *irq_data_led; + struct regmap_irq_chip_data *irq_data_topsys; + struct regmap_irq_chip_data *irq_data_charger; + struct regmap_irq_chip_data *irq_data_muic; int irq; int irq_gpio; @@ -332,14 +374,6 @@ enum max77693_types { TYPE_MAX77693, }; -extern int max77693_read_reg(struct regmap *map, u8 reg, u8 *dest); -extern int max77693_bulk_read(struct regmap *map, u8 reg, int count, - u8 *buf); -extern int max77693_write_reg(struct regmap *map, u8 reg, u8 value); -extern int max77693_bulk_write(struct regmap *map, u8 reg, int count, - u8 *buf); -extern int max77693_update_reg(struct regmap *map, u8 reg, u8 val, u8 mask); - extern int max77693_irq_init(struct max77693_dev *max77686); extern void max77693_irq_exit(struct max77693_dev *max77686); extern int max77693_irq_resume(struct max77693_dev *max77686); diff --git a/include/linux/mfd/palmas.h b/include/linux/mfd/palmas.h index 3420e09e2e20..fb0390a1a498 100644 --- a/include/linux/mfd/palmas.h +++ b/include/linux/mfd/palmas.h @@ -30,6 +30,8 @@ #define PALMAS_CHIP_ID 0xC035 #define PALMAS_CHIP_CHARGER_ID 0xC036 +#define TPS65917_RESERVED -1 + #define is_palmas(a) (((a) == PALMAS_CHIP_OLD_ID) || \ ((a) == PALMAS_CHIP_ID)) #define is_palmas_charger(a) ((a) == PALMAS_CHIP_CHARGER_ID) @@ -51,6 +53,8 @@ struct palmas_pmic; struct palmas_gpadc; struct palmas_resource; struct palmas_usb; +struct palmas_pmic_driver_data; +struct palmas_pmic_platform_data; enum palmas_usb_state { PALMAS_USB_STATE_DISCONNECT, @@ -74,6 +78,8 @@ struct palmas { struct mutex irq_lock; struct regmap_irq_chip_data *irq_data; + struct palmas_pmic_driver_data *pmic_ddata; + /* Child Devices */ struct palmas_pmic *pmic; struct palmas_gpadc *gpadc; @@ -86,6 +92,46 @@ struct palmas { u8 pwm_muxed; }; +#define PALMAS_EXT_REQ (PALMAS_EXT_CONTROL_ENABLE1 | \ + PALMAS_EXT_CONTROL_ENABLE2 | \ + PALMAS_EXT_CONTROL_NSLEEP) + +struct palmas_sleep_requestor_info { + int id; + int reg_offset; + int bit_pos; +}; + +struct palmas_regs_info { + char *name; + char *sname; + u8 vsel_addr; + u8 ctrl_addr; + u8 tstep_addr; + int sleep_id; +}; + +struct palmas_pmic_driver_data { + int smps_start; + int smps_end; + int ldo_begin; + int ldo_end; + int max_reg; + struct palmas_regs_info *palmas_regs_info; + struct of_regulator_match *palmas_matches; + struct palmas_sleep_requestor_info *sleep_req_info; + int (*smps_register)(struct palmas_pmic *pmic, + struct palmas_pmic_driver_data *ddata, + struct palmas_pmic_platform_data *pdata, + const char *pdev_name, + struct regulator_config config); + int (*ldo_register)(struct palmas_pmic *pmic, + struct palmas_pmic_driver_data *ddata, + struct palmas_pmic_platform_data *pdata, + const char *pdev_name, + struct regulator_config config); +}; + struct palmas_gpadc_platform_data { /* Channel 3 current source is only enabled during conversion */ int ch3_current; @@ -184,6 +230,27 @@ enum palmas_regulators { PALMAS_NUM_REGS, }; +enum tps65917_regulators { + /* SMPS regulators */ + TPS65917_REG_SMPS1, + TPS65917_REG_SMPS2, + TPS65917_REG_SMPS3, + TPS65917_REG_SMPS4, + TPS65917_REG_SMPS5, + /* LDO regulators */ + TPS65917_REG_LDO1, + TPS65917_REG_LDO2, + TPS65917_REG_LDO3, + TPS65917_REG_LDO4, + TPS65917_REG_LDO5, + TPS65917_REG_REGEN1, + TPS65917_REG_REGEN2, + TPS65917_REG_REGEN3, + + /* Total number of regulators */ + TPS65917_NUM_REGS, +}; + /* External controll signal name */ enum { PALMAS_EXT_CONTROL_ENABLE1 = 0x1, @@ -228,6 +295,24 @@ enum palmas_external_requestor_id { PALMAS_EXTERNAL_REQSTR_ID_MAX, }; +enum tps65917_external_requestor_id { + TPS65917_EXTERNAL_REQSTR_ID_REGEN1, + TPS65917_EXTERNAL_REQSTR_ID_REGEN2, + TPS65917_EXTERNAL_REQSTR_ID_REGEN3, + TPS65917_EXTERNAL_REQSTR_ID_SMPS1, + TPS65917_EXTERNAL_REQSTR_ID_SMPS2, + TPS65917_EXTERNAL_REQSTR_ID_SMPS3, + TPS65917_EXTERNAL_REQSTR_ID_SMPS4, + TPS65917_EXTERNAL_REQSTR_ID_SMPS5, + TPS65917_EXTERNAL_REQSTR_ID_LDO1, + TPS65917_EXTERNAL_REQSTR_ID_LDO2, + TPS65917_EXTERNAL_REQSTR_ID_LDO3, + TPS65917_EXTERNAL_REQSTR_ID_LDO4, + TPS65917_EXTERNAL_REQSTR_ID_LDO5, + /* Last entry */ + TPS65917_EXTERNAL_REQSTR_ID_MAX, +}; + struct palmas_pmic_platform_data { /* An array of pointers to regulator init data indexed by regulator * ID @@ -349,6 +434,48 @@ struct palmas_gpadc_result { #define PALMAS_MAX_CHANNELS 16 +/* Define the tps65917 IRQ numbers */ +enum tps65917_irqs { + /* INT1 registers */ + TPS65917_RESERVED1, + TPS65917_PWRON_IRQ, + TPS65917_LONG_PRESS_KEY_IRQ, + TPS65917_RESERVED2, + TPS65917_PWRDOWN_IRQ, + TPS65917_HOTDIE_IRQ, + TPS65917_VSYS_MON_IRQ, + TPS65917_RESERVED3, + /* INT2 registers */ + TPS65917_RESERVED4, + TPS65917_OTP_ERROR_IRQ, + TPS65917_WDT_IRQ, + TPS65917_RESERVED5, + TPS65917_RESET_IN_IRQ, + TPS65917_FSD_IRQ, + TPS65917_SHORT_IRQ, + TPS65917_RESERVED6, + /* INT3 registers */ + TPS65917_GPADC_AUTO_0_IRQ, + TPS65917_GPADC_AUTO_1_IRQ, + TPS65917_GPADC_EOC_SW_IRQ, + TPS65917_RESREVED6, + TPS65917_RESERVED7, + TPS65917_RESERVED8, + TPS65917_RESERVED9, + TPS65917_VBUS_IRQ, + /* INT4 registers */ + TPS65917_GPIO_0_IRQ, + TPS65917_GPIO_1_IRQ, + TPS65917_GPIO_2_IRQ, + TPS65917_GPIO_3_IRQ, + TPS65917_GPIO_4_IRQ, + TPS65917_GPIO_5_IRQ, + TPS65917_GPIO_6_IRQ, + TPS65917_RESERVED10, + /* Total Number IRQs */ + TPS65917_NUM_IRQ, +}; + /* Define the palmas IRQ numbers */ enum palmas_irqs { /* INT1 registers */ @@ -400,6 +527,7 @@ struct palmas_pmic { int smps123; int smps457; + int smps12; int range[PALMAS_REG_SMPS10_OUT1]; unsigned int ramp_delay[PALMAS_REG_SMPS10_OUT1]; @@ -2871,6 +2999,715 @@ enum usb_irq_events { #define PALMAS_GPADC_TRIM15 0x0E #define PALMAS_GPADC_TRIM16 0x0F +/* TPS65917 Interrupt registers */ + +/* Registers for function INTERRUPT */ +#define TPS65917_INT1_STATUS 0x00 +#define TPS65917_INT1_MASK 0x01 +#define TPS65917_INT1_LINE_STATE 0x02 +#define TPS65917_INT2_STATUS 0x05 +#define TPS65917_INT2_MASK 0x06 +#define TPS65917_INT2_LINE_STATE 0x07 +#define TPS65917_INT3_STATUS 0x0A +#define TPS65917_INT3_MASK 0x0B +#define TPS65917_INT3_LINE_STATE 0x0C +#define TPS65917_INT4_STATUS 0x0F +#define TPS65917_INT4_MASK 0x10 +#define TPS65917_INT4_LINE_STATE 0x11 +#define TPS65917_INT4_EDGE_DETECT1 0x12 +#define TPS65917_INT4_EDGE_DETECT2 0x13 +#define TPS65917_INT_CTRL 0x14 + +/* Bit definitions for INT1_STATUS */ +#define TPS65917_INT1_STATUS_VSYS_MON 0x40 +#define TPS65917_INT1_STATUS_VSYS_MON_SHIFT 0x06 +#define TPS65917_INT1_STATUS_HOTDIE 0x20 +#define TPS65917_INT1_STATUS_HOTDIE_SHIFT 0x05 +#define TPS65917_INT1_STATUS_PWRDOWN 0x10 +#define TPS65917_INT1_STATUS_PWRDOWN_SHIFT 0x04 +#define TPS65917_INT1_STATUS_LONG_PRESS_KEY 0x04 +#define TPS65917_INT1_STATUS_LONG_PRESS_KEY_SHIFT 0x02 +#define TPS65917_INT1_STATUS_PWRON 0x02 +#define TPS65917_INT1_STATUS_PWRON_SHIFT 0x01 + +/* Bit definitions for INT1_MASK */ +#define TPS65917_INT1_MASK_VSYS_MON 0x40 +#define TPS65917_INT1_MASK_VSYS_MON_SHIFT 0x06 +#define TPS65917_INT1_MASK_HOTDIE 0x20 +#define TPS65917_INT1_MASK_HOTDIE_SHIFT 0x05 +#define TPS65917_INT1_MASK_PWRDOWN 0x10 +#define TPS65917_INT1_MASK_PWRDOWN_SHIFT 0x04 +#define TPS65917_INT1_MASK_LONG_PRESS_KEY 0x04 +#define TPS65917_INT1_MASK_LONG_PRESS_KEY_SHIFT 0x02 +#define TPS65917_INT1_MASK_PWRON 0x02 +#define TPS65917_INT1_MASK_PWRON_SHIFT 0x01 + +/* Bit definitions for INT1_LINE_STATE */ +#define TPS65917_INT1_LINE_STATE_VSYS_MON 0x40 +#define TPS65917_INT1_LINE_STATE_VSYS_MON_SHIFT 0x06 +#define TPS65917_INT1_LINE_STATE_HOTDIE 0x20 +#define TPS65917_INT1_LINE_STATE_HOTDIE_SHIFT 0x05 +#define TPS65917_INT1_LINE_STATE_PWRDOWN 0x10 +#define TPS65917_INT1_LINE_STATE_PWRDOWN_SHIFT 0x04 +#define TPS65917_INT1_LINE_STATE_LONG_PRESS_KEY 0x04 +#define TPS65917_INT1_LINE_STATE_LONG_PRESS_KEY_SHIFT 0x02 +#define TPS65917_INT1_LINE_STATE_PWRON 0x02 +#define TPS65917_INT1_LINE_STATE_PWRON_SHIFT 0x01 + +/* Bit definitions for INT2_STATUS */ +#define TPS65917_INT2_STATUS_SHORT 0x40 +#define TPS65917_INT2_STATUS_SHORT_SHIFT 0x06 +#define TPS65917_INT2_STATUS_FSD 0x20 +#define TPS65917_INT2_STATUS_FSD_SHIFT 0x05 +#define TPS65917_INT2_STATUS_RESET_IN 0x10 +#define TPS65917_INT2_STATUS_RESET_IN_SHIFT 0x04 +#define TPS65917_INT2_STATUS_WDT 0x04 +#define TPS65917_INT2_STATUS_WDT_SHIFT 0x02 +#define TPS65917_INT2_STATUS_OTP_ERROR 0x02 +#define TPS65917_INT2_STATUS_OTP_ERROR_SHIFT 0x01 + +/* Bit definitions for INT2_MASK */ +#define TPS65917_INT2_MASK_SHORT 0x40 +#define TPS65917_INT2_MASK_SHORT_SHIFT 0x06 +#define TPS65917_INT2_MASK_FSD 0x20 +#define TPS65917_INT2_MASK_FSD_SHIFT 0x05 +#define TPS65917_INT2_MASK_RESET_IN 0x10 +#define TPS65917_INT2_MASK_RESET_IN_SHIFT 0x04 +#define TPS65917_INT2_MASK_WDT 0x04 +#define TPS65917_INT2_MASK_WDT_SHIFT 0x02 +#define TPS65917_INT2_MASK_OTP_ERROR_TIMER 0x02 +#define TPS65917_INT2_MASK_OTP_ERROR_SHIFT 0x01 + +/* Bit definitions for INT2_LINE_STATE */ +#define TPS65917_INT2_LINE_STATE_SHORT 0x40 +#define TPS65917_INT2_LINE_STATE_SHORT_SHIFT 0x06 +#define TPS65917_INT2_LINE_STATE_FSD 0x20 +#define TPS65917_INT2_LINE_STATE_FSD_SHIFT 0x05 +#define TPS65917_INT2_LINE_STATE_RESET_IN 0x10 +#define TPS65917_INT2_LINE_STATE_RESET_IN_SHIFT 0x04 +#define TPS65917_INT2_LINE_STATE_WDT 0x04 +#define TPS65917_INT2_LINE_STATE_WDT_SHIFT 0x02 +#define TPS65917_INT2_LINE_STATE_OTP_ERROR 0x02 +#define TPS65917_INT2_LINE_STATE_OTP_ERROR_SHIFT 0x01 + +/* Bit definitions for INT3_STATUS */ +#define TPS65917_INT3_STATUS_VBUS 0x80 +#define TPS65917_INT3_STATUS_VBUS_SHIFT 0x07 +#define TPS65917_INT3_STATUS_GPADC_EOC_SW 0x04 +#define TPS65917_INT3_STATUS_GPADC_EOC_SW_SHIFT 0x02 +#define TPS65917_INT3_STATUS_GPADC_AUTO_1 0x02 +#define TPS65917_INT3_STATUS_GPADC_AUTO_1_SHIFT 0x01 +#define TPS65917_INT3_STATUS_GPADC_AUTO_0 0x01 +#define TPS65917_INT3_STATUS_GPADC_AUTO_0_SHIFT 0x00 + +/* Bit definitions for INT3_MASK */ +#define TPS65917_INT3_MASK_VBUS 0x80 +#define TPS65917_INT3_MASK_VBUS_SHIFT 0x07 +#define TPS65917_INT3_MASK_GPADC_EOC_SW 0x04 +#define TPS65917_INT3_MASK_GPADC_EOC_SW_SHIFT 0x02 +#define TPS65917_INT3_MASK_GPADC_AUTO_1 0x02 +#define TPS65917_INT3_MASK_GPADC_AUTO_1_SHIFT 0x01 +#define TPS65917_INT3_MASK_GPADC_AUTO_0 0x01 +#define TPS65917_INT3_MASK_GPADC_AUTO_0_SHIFT 0x00 + +/* Bit definitions for INT3_LINE_STATE */ +#define TPS65917_INT3_LINE_STATE_VBUS 0x80 +#define TPS65917_INT3_LINE_STATE_VBUS_SHIFT 0x07 +#define TPS65917_INT3_LINE_STATE_GPADC_EOC_SW 0x04 +#define TPS65917_INT3_LINE_STATE_GPADC_EOC_SW_SHIFT 0x02 +#define TPS65917_INT3_LINE_STATE_GPADC_AUTO_1 0x02 +#define TPS65917_INT3_LINE_STATE_GPADC_AUTO_1_SHIFT 0x01 +#define TPS65917_INT3_LINE_STATE_GPADC_AUTO_0 0x01 +#define TPS65917_INT3_LINE_STATE_GPADC_AUTO_0_SHIFT 0x00 + +/* Bit definitions for INT4_STATUS */ +#define TPS65917_INT4_STATUS_GPIO_6 0x40 +#define TPS65917_INT4_STATUS_GPIO_6_SHIFT 0x06 +#define TPS65917_INT4_STATUS_GPIO_5 0x20 +#define TPS65917_INT4_STATUS_GPIO_5_SHIFT 0x05 +#define TPS65917_INT4_STATUS_GPIO_4 0x10 +#define TPS65917_INT4_STATUS_GPIO_4_SHIFT 0x04 +#define TPS65917_INT4_STATUS_GPIO_3 0x08 +#define TPS65917_INT4_STATUS_GPIO_3_SHIFT 0x03 +#define TPS65917_INT4_STATUS_GPIO_2 0x04 +#define TPS65917_INT4_STATUS_GPIO_2_SHIFT 0x02 +#define TPS65917_INT4_STATUS_GPIO_1 0x02 +#define TPS65917_INT4_STATUS_GPIO_1_SHIFT 0x01 +#define TPS65917_INT4_STATUS_GPIO_0 0x01 +#define TPS65917_INT4_STATUS_GPIO_0_SHIFT 0x00 + +/* Bit definitions for INT4_MASK */ +#define TPS65917_INT4_MASK_GPIO_6 0x40 +#define TPS65917_INT4_MASK_GPIO_6_SHIFT 0x06 +#define TPS65917_INT4_MASK_GPIO_5 0x20 +#define TPS65917_INT4_MASK_GPIO_5_SHIFT 0x05 +#define TPS65917_INT4_MASK_GPIO_4 0x10 +#define TPS65917_INT4_MASK_GPIO_4_SHIFT 0x04 +#define TPS65917_INT4_MASK_GPIO_3 0x08 +#define TPS65917_INT4_MASK_GPIO_3_SHIFT 0x03 +#define TPS65917_INT4_MASK_GPIO_2 0x04 +#define TPS65917_INT4_MASK_GPIO_2_SHIFT 0x02 +#define TPS65917_INT4_MASK_GPIO_1 0x02 +#define TPS65917_INT4_MASK_GPIO_1_SHIFT 0x01 +#define TPS65917_INT4_MASK_GPIO_0 0x01 +#define TPS65917_INT4_MASK_GPIO_0_SHIFT 0x00 + +/* Bit definitions for INT4_LINE_STATE */ +#define TPS65917_INT4_LINE_STATE_GPIO_6 0x40 +#define TPS65917_INT4_LINE_STATE_GPIO_6_SHIFT 0x06 +#define TPS65917_INT4_LINE_STATE_GPIO_5 0x20 +#define TPS65917_INT4_LINE_STATE_GPIO_5_SHIFT 0x05 +#define TPS65917_INT4_LINE_STATE_GPIO_4 0x10 +#define TPS65917_INT4_LINE_STATE_GPIO_4_SHIFT 0x04 +#define TPS65917_INT4_LINE_STATE_GPIO_3 0x08 +#define TPS65917_INT4_LINE_STATE_GPIO_3_SHIFT 0x03 +#define TPS65917_INT4_LINE_STATE_GPIO_2 0x04 +#define TPS65917_INT4_LINE_STATE_GPIO_2_SHIFT 0x02 +#define TPS65917_INT4_LINE_STATE_GPIO_1 0x02 +#define TPS65917_INT4_LINE_STATE_GPIO_1_SHIFT 0x01 +#define TPS65917_INT4_LINE_STATE_GPIO_0 0x01 +#define TPS65917_INT4_LINE_STATE_GPIO_0_SHIFT 0x00 + +/* Bit definitions for INT4_EDGE_DETECT1 */ +#define TPS65917_INT4_EDGE_DETECT1_GPIO_3_RISING 0x80 +#define TPS65917_INT4_EDGE_DETECT1_GPIO_3_RISING_SHIFT 0x07 +#define TPS65917_INT4_EDGE_DETECT1_GPIO_3_FALLING 0x40 +#define TPS65917_INT4_EDGE_DETECT1_GPIO_3_FALLING_SHIFT 0x06 +#define TPS65917_INT4_EDGE_DETECT1_GPIO_2_RISING 0x20 +#define TPS65917_INT4_EDGE_DETECT1_GPIO_2_RISING_SHIFT 0x05 +#define TPS65917_INT4_EDGE_DETECT1_GPIO_2_FALLING 0x10 +#define TPS65917_INT4_EDGE_DETECT1_GPIO_2_FALLING_SHIFT 0x04 +#define TPS65917_INT4_EDGE_DETECT1_GPIO_1_RISING 0x08 +#define TPS65917_INT4_EDGE_DETECT1_GPIO_1_RISING_SHIFT 0x03 +#define TPS65917_INT4_EDGE_DETECT1_GPIO_1_FALLING 0x04 +#define TPS65917_INT4_EDGE_DETECT1_GPIO_1_FALLING_SHIFT 0x02 +#define TPS65917_INT4_EDGE_DETECT1_GPIO_0_RISING 0x02 +#define TPS65917_INT4_EDGE_DETECT1_GPIO_0_RISING_SHIFT 0x01 +#define TPS65917_INT4_EDGE_DETECT1_GPIO_0_FALLING 0x01 +#define TPS65917_INT4_EDGE_DETECT1_GPIO_0_FALLING_SHIFT 0x00 + +/* Bit definitions for INT4_EDGE_DETECT2 */ +#define TPS65917_INT4_EDGE_DETECT2_GPIO_6_RISING 0x20 +#define TPS65917_INT4_EDGE_DETECT2_GPIO_6_RISING_SHIFT 0x05 +#define TPS65917_INT4_EDGE_DETECT2_GPIO_6_FALLING 0x10 +#define TPS65917_INT4_EDGE_DETECT2_GPIO_6_FALLING_SHIFT 0x04 +#define TPS65917_INT4_EDGE_DETECT2_GPIO_5_RISING 0x08 +#define TPS65917_INT4_EDGE_DETECT2_GPIO_5_RISING_SHIFT 0x03 +#define TPS65917_INT4_EDGE_DETECT2_GPIO_5_FALLING 0x04 +#define TPS65917_INT4_EDGE_DETECT2_GPIO_5_FALLING_SHIFT 0x02 +#define TPS65917_INT4_EDGE_DETECT2_GPIO_4_RISING 0x02 +#define TPS65917_INT4_EDGE_DETECT2_GPIO_4_RISING_SHIFT 0x01 +#define TPS65917_INT4_EDGE_DETECT2_GPIO_4_FALLING 0x01 +#define TPS65917_INT4_EDGE_DETECT2_GPIO_4_FALLING_SHIFT 0x00 + +/* Bit definitions for INT_CTRL */ +#define TPS65917_INT_CTRL_INT_PENDING 0x04 +#define TPS65917_INT_CTRL_INT_PENDING_SHIFT 0x02 +#define TPS65917_INT_CTRL_INT_CLEAR 0x01 +#define TPS65917_INT_CTRL_INT_CLEAR_SHIFT 0x00 + +/* TPS65917 SMPS Registers */ + +/* Registers for function SMPS */ +#define TPS65917_SMPS1_CTRL 0x00 +#define TPS65917_SMPS1_FORCE 0x02 +#define TPS65917_SMPS1_VOLTAGE 0x03 +#define TPS65917_SMPS2_CTRL 0x04 +#define TPS65917_SMPS2_FORCE 0x06 +#define TPS65917_SMPS2_VOLTAGE 0x07 +#define TPS65917_SMPS3_CTRL 0x0C +#define TPS65917_SMPS3_FORCE 0x0E +#define TPS65917_SMPS3_VOLTAGE 0x0F +#define TPS65917_SMPS4_CTRL 0x10 +#define TPS65917_SMPS4_VOLTAGE 0x13 +#define TPS65917_SMPS5_CTRL 0x18 +#define TPS65917_SMPS5_VOLTAGE 0x1B +#define TPS65917_SMPS_CTRL 0x24 +#define TPS65917_SMPS_PD_CTRL 0x25 +#define TPS65917_SMPS_THERMAL_EN 0x27 +#define TPS65917_SMPS_THERMAL_STATUS 0x28 +#define TPS65917_SMPS_SHORT_STATUS 0x29 +#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN 0x2A +#define TPS65917_SMPS_POWERGOOD_MASK1 0x2B +#define TPS65917_SMPS_POWERGOOD_MASK2 0x2C + +/* Bit definitions for SMPS1_CTRL */ +#define TPS65917_SMPS1_CTRL_WR_S 0x80 +#define TPS65917_SMPS1_CTRL_WR_S_SHIFT 0x07 +#define TPS65917_SMPS1_CTRL_ROOF_FLOOR_EN 0x40 +#define TPS65917_SMPS1_CTRL_ROOF_FLOOR_EN_SHIFT 0x06 +#define TPS65917_SMPS1_CTRL_STATUS_MASK 0x30 +#define TPS65917_SMPS1_CTRL_STATUS_SHIFT 0x04 +#define TPS65917_SMPS1_CTRL_MODE_SLEEP_MASK 0x0C +#define TPS65917_SMPS1_CTRL_MODE_SLEEP_SHIFT 0x02 +#define TPS65917_SMPS1_CTRL_MODE_ACTIVE_MASK 0x03 +#define TPS65917_SMPS1_CTRL_MODE_ACTIVE_SHIFT 0x00 + +/* Bit definitions for SMPS1_FORCE */ +#define TPS65917_SMPS1_FORCE_CMD 0x80 +#define TPS65917_SMPS1_FORCE_CMD_SHIFT 0x07 +#define TPS65917_SMPS1_FORCE_VSEL_MASK 0x7F +#define TPS65917_SMPS1_FORCE_VSEL_SHIFT 0x00 + +/* Bit definitions for SMPS1_VOLTAGE */ +#define TPS65917_SMPS1_VOLTAGE_RANGE 0x80 +#define TPS65917_SMPS1_VOLTAGE_RANGE_SHIFT 0x07 +#define TPS65917_SMPS1_VOLTAGE_VSEL_MASK 0x7F +#define TPS65917_SMPS1_VOLTAGE_VSEL_SHIFT 0x00 + +/* Bit definitions for SMPS2_CTRL */ +#define TPS65917_SMPS2_CTRL_WR_S 0x80 +#define TPS65917_SMPS2_CTRL_WR_S_SHIFT 0x07 +#define TPS65917_SMPS2_CTRL_ROOF_FLOOR_EN 0x40 +#define TPS65917_SMPS2_CTRL_ROOF_FLOOR_EN_SHIFT 0x06 +#define TPS65917_SMPS2_CTRL_STATUS_MASK 0x30 +#define TPS65917_SMPS2_CTRL_STATUS_SHIFT 0x04 +#define TPS65917_SMPS2_CTRL_MODE_SLEEP_MASK 0x0C +#define TPS65917_SMPS2_CTRL_MODE_SLEEP_SHIFT 0x02 +#define TPS65917_SMPS2_CTRL_MODE_ACTIVE_MASK 0x03 +#define TPS65917_SMPS2_CTRL_MODE_ACTIVE_SHIFT 0x00 + +/* Bit definitions for SMPS2_FORCE */ +#define TPS65917_SMPS2_FORCE_CMD 0x80 +#define TPS65917_SMPS2_FORCE_CMD_SHIFT 0x07 +#define TPS65917_SMPS2_FORCE_VSEL_MASK 0x7F +#define TPS65917_SMPS2_FORCE_VSEL_SHIFT 0x00 + +/* Bit definitions for SMPS2_VOLTAGE */ +#define TPS65917_SMPS2_VOLTAGE_RANGE 0x80 +#define TPS65917_SMPS2_VOLTAGE_RANGE_SHIFT 0x07 +#define TPS65917_SMPS2_VOLTAGE_VSEL_MASK 0x7F +#define TPS65917_SMPS2_VOLTAGE_VSEL_SHIFT 0x00 + +/* Bit definitions for SMPS3_CTRL */ +#define TPS65917_SMPS3_CTRL_WR_S 0x80 +#define TPS65917_SMPS3_CTRL_WR_S_SHIFT 0x07 +#define TPS65917_SMPS3_CTRL_ROOF_FLOOR_EN 0x40 +#define TPS65917_SMPS3_CTRL_ROOF_FLOOR_EN_SHIFT 0x06 +#define TPS65917_SMPS3_CTRL_STATUS_MASK 0x30 +#define TPS65917_SMPS3_CTRL_STATUS_SHIFT 0x04 +#define TPS65917_SMPS3_CTRL_MODE_SLEEP_MASK 0x0C +#define TPS65917_SMPS3_CTRL_MODE_SLEEP_SHIFT 0x02 +#define TPS65917_SMPS3_CTRL_MODE_ACTIVE_MASK 0x03 +#define TPS65917_SMPS3_CTRL_MODE_ACTIVE_SHIFT 0x00 + +/* Bit definitions for SMPS3_FORCE */ +#define TPS65917_SMPS3_FORCE_CMD 0x80 +#define TPS65917_SMPS3_FORCE_CMD_SHIFT 0x07 +#define TPS65917_SMPS3_FORCE_VSEL_MASK 0x7F +#define TPS65917_SMPS3_FORCE_VSEL_SHIFT 0x00 + +/* Bit definitions for SMPS3_VOLTAGE */ +#define TPS65917_SMPS3_VOLTAGE_RANGE 0x80 +#define TPS65917_SMPS3_VOLTAGE_RANGE_SHIFT 0x07 +#define TPS65917_SMPS3_VOLTAGE_VSEL_MASK 0x7F +#define TPS65917_SMPS3_VOLTAGE_VSEL_SHIFT 0x00 + +/* Bit definitions for SMPS4_CTRL */ +#define TPS65917_SMPS4_CTRL_WR_S 0x80 +#define TPS65917_SMPS4_CTRL_WR_S_SHIFT 0x07 +#define TPS65917_SMPS4_CTRL_ROOF_FLOOR_EN 0x40 +#define TPS65917_SMPS4_CTRL_ROOF_FLOOR_EN_SHIFT 0x06 +#define TPS65917_SMPS4_CTRL_STATUS_MASK 0x30 +#define TPS65917_SMPS4_CTRL_STATUS_SHIFT 0x04 +#define TPS65917_SMPS4_CTRL_MODE_SLEEP_MASK 0x0C +#define TPS65917_SMPS4_CTRL_MODE_SLEEP_SHIFT 0x02 +#define TPS65917_SMPS4_CTRL_MODE_ACTIVE_MASK 0x03 +#define TPS65917_SMPS4_CTRL_MODE_ACTIVE_SHIFT 0x00 + +/* Bit definitions for SMPS4_VOLTAGE */ +#define TPS65917_SMPS4_VOLTAGE_RANGE 0x80 +#define TPS65917_SMPS4_VOLTAGE_RANGE_SHIFT 0x07 +#define TPS65917_SMPS4_VOLTAGE_VSEL_MASK 0x7F +#define TPS65917_SMPS4_VOLTAGE_VSEL_SHIFT 0x00 + +/* Bit definitions for SMPS5_CTRL */ +#define TPS65917_SMPS5_CTRL_WR_S 0x80 +#define TPS65917_SMPS5_CTRL_WR_S_SHIFT 0x07 +#define TPS65917_SMPS5_CTRL_ROOF_FLOOR_EN 0x40 +#define TPS65917_SMPS5_CTRL_ROOF_FLOOR_EN_SHIFT 0x06 +#define TPS65917_SMPS5_CTRL_STATUS_MASK 0x30 +#define TPS65917_SMPS5_CTRL_STATUS_SHIFT 0x04 +#define TPS65917_SMPS5_CTRL_MODE_SLEEP_MASK 0x0C +#define TPS65917_SMPS5_CTRL_MODE_SLEEP_SHIFT 0x02 +#define TPS65917_SMPS5_CTRL_MODE_ACTIVE_MASK 0x03 +#define TPS65917_SMPS5_CTRL_MODE_ACTIVE_SHIFT 0x00 + +/* Bit definitions for SMPS5_VOLTAGE */ +#define TPS65917_SMPS5_VOLTAGE_RANGE 0x80 +#define TPS65917_SMPS5_VOLTAGE_RANGE_SHIFT 0x07 +#define TPS65917_SMPS5_VOLTAGE_VSEL_MASK 0x7F +#define TPS65917_SMPS5_VOLTAGE_VSEL_SHIFT 0x00 + +/* Bit definitions for SMPS_CTRL */ +#define TPS65917_SMPS_CTRL_SMPS1_SMPS12_EN 0x10 +#define TPS65917_SMPS_CTRL_SMPS1_SMPS12_EN_SHIFT 0x04 +#define TPS65917_SMPS_CTRL_SMPS12_PHASE_CTRL 0x03 +#define TPS65917_SMPS_CTRL_SMPS12_PHASE_CTRL_SHIFT 0x00 + +/* Bit definitions for SMPS_PD_CTRL */ +#define TPS65917_SMPS_PD_CTRL_SMPS5 0x40 +#define TPS65917_SMPS_PD_CTRL_SMPS5_SHIFT 0x06 +#define TPS65917_SMPS_PD_CTRL_SMPS4 0x10 +#define TPS65917_SMPS_PD_CTRL_SMPS4_SHIFT 0x04 +#define TPS65917_SMPS_PD_CTRL_SMPS3 0x08 +#define TPS65917_SMPS_PD_CTRL_SMPS3_SHIFT 0x03 +#define TPS65917_SMPS_PD_CTRL_SMPS2 0x02 +#define TPS65917_SMPS_PD_CTRL_SMPS2_SHIFT 0x01 +#define TPS65917_SMPS_PD_CTRL_SMPS1 0x01 +#define TPS65917_SMPS_PD_CTRL_SMPS1_SHIFT 0x00 + +/* Bit definitions for SMPS_THERMAL_EN */ +#define TPS65917_SMPS_THERMAL_EN_SMPS5 0x40 +#define TPS65917_SMPS_THERMAL_EN_SMPS5_SHIFT 0x06 +#define TPS65917_SMPS_THERMAL_EN_SMPS3 0x08 +#define TPS65917_SMPS_THERMAL_EN_SMPS3_SHIFT 0x03 +#define TPS65917_SMPS_THERMAL_EN_SMPS12 0x01 +#define TPS65917_SMPS_THERMAL_EN_SMPS12_SHIFT 0x00 + +/* Bit definitions for SMPS_THERMAL_STATUS */ +#define TPS65917_SMPS_THERMAL_STATUS_SMPS5 0x40 +#define TPS65917_SMPS_THERMAL_STATUS_SMPS5_SHIFT 0x06 +#define TPS65917_SMPS_THERMAL_STATUS_SMPS3 0x08 +#define TPS65917_SMPS_THERMAL_STATUS_SMPS3_SHIFT 0x03 +#define TPS65917_SMPS_THERMAL_STATUS_SMPS12 0x01 +#define TPS65917_SMPS_THERMAL_STATUS_SMPS12_SHIFT 0x00 + +/* Bit definitions for SMPS_SHORT_STATUS */ +#define TPS65917_SMPS_SHORT_STATUS_SMPS5 0x40 +#define TPS65917_SMPS_SHORT_STATUS_SMPS5_SHIFT 0x06 +#define TPS65917_SMPS_SHORT_STATUS_SMPS4 0x10 +#define TPS65917_SMPS_SHORT_STATUS_SMPS4_SHIFT 0x04 +#define TPS65917_SMPS_SHORT_STATUS_SMPS3 0x08 +#define TPS65917_SMPS_SHORT_STATUS_SMPS3_SHIFT 0x03 +#define TPS65917_SMPS_SHORT_STATUS_SMPS2 0x02 +#define TPS65917_SMPS_SHORT_STATUS_SMPS2_SHIFT 0x01 +#define TPS65917_SMPS_SHORT_STATUS_SMPS1 0x01 +#define TPS65917_SMPS_SHORT_STATUS_SMPS1_SHIFT 0x00 + +/* Bit definitions for SMPS_NEGATIVE_CURRENT_LIMIT_EN */ +#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS5 0x40 +#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS5_SHIFT 0x06 +#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS4 0x10 +#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS4_SHIFT 0x04 +#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS3 0x08 +#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS3_SHIFT 0x03 +#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS2 0x02 +#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS2_SHIFT 0x01 +#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS1 0x01 +#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS1_SHIFT 0x00 + +/* Bit definitions for SMPS_POWERGOOD_MASK1 */ +#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS5 0x40 +#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS5_SHIFT 0x06 +#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS4 0x10 +#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS4_SHIFT 0x04 +#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS3 0x08 +#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS3_SHIFT 0x03 +#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS2 0x02 +#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS2_SHIFT 0x01 +#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS1 0x01 +#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS1_SHIFT 0x00 + +/* Bit definitions for SMPS_POWERGOOD_MASK2 */ +#define TPS65917_SMPS_POWERGOOD_MASK2_POWERGOOD_TYPE_SELECT 0x80 +#define TPS65917_SMPS_POWERGOOD_MASK2_POWERGOOD_TYPE_SELECT_SHIFT 0x07 +#define TPS65917_SMPS_POWERGOOD_MASK2_OVC_ALARM_SHIFT 0x10 +#define TPS65917_SMPS_POWERGOOD_MASK2_OVC_ALARM 0x04 + +/* Bit definitions for SMPS_PLL_CTRL */ + +#define TPS65917_SMPS_PLL_CTRL_PLL_EN_PLL_BYPASS_SHIFT 0x08 +#define TPS65917_SMPS_PLL_CTRL_PLL_PLL_EN_BYPASS 0x03 +#define TPS65917_SMPS_PLL_CTRL_PLL_PLL_BYPASS_CLK_SHIFT 0x04 +#define TPS65917_SMPS_PLL_CTRL_PLL_PLL_BYPASS_CLK 0x02 + +/* Registers for function LDO */ +#define TPS65917_LDO1_CTRL 0x00 +#define TPS65917_LDO1_VOLTAGE 0x01 +#define TPS65917_LDO2_CTRL 0x02 +#define TPS65917_LDO2_VOLTAGE 0x03 +#define TPS65917_LDO3_CTRL 0x04 +#define TPS65917_LDO3_VOLTAGE 0x05 +#define TPS65917_LDO4_CTRL 0x0E +#define TPS65917_LDO4_VOLTAGE 0x0F +#define TPS65917_LDO5_CTRL 0x12 +#define TPS65917_LDO5_VOLTAGE 0x13 +#define TPS65917_LDO_PD_CTRL1 0x1B +#define TPS65917_LDO_PD_CTRL2 0x1C +#define TPS65917_LDO_SHORT_STATUS1 0x1D +#define TPS65917_LDO_SHORT_STATUS2 0x1E +#define TPS65917_LDO_PD_CTRL3 0x2D +#define TPS65917_LDO_SHORT_STATUS3 0x2E + +/* Bit definitions for LDO1_CTRL */ +#define TPS65917_LDO1_CTRL_WR_S 0x80 +#define TPS65917_LDO1_CTRL_WR_S_SHIFT 0x07 +#define TPS65917_LDO1_CTRL_BYPASS_EN 0x40 +#define TPS65917_LDO1_CTRL_BYPASS_EN_SHIFT 0x06 +#define TPS65917_LDO1_CTRL_STATUS 0x10 +#define TPS65917_LDO1_CTRL_STATUS_SHIFT 0x04 +#define TPS65917_LDO1_CTRL_MODE_SLEEP 0x04 +#define TPS65917_LDO1_CTRL_MODE_SLEEP_SHIFT 0x02 +#define TPS65917_LDO1_CTRL_MODE_ACTIVE 0x01 +#define TPS65917_LDO1_CTRL_MODE_ACTIVE_SHIFT 0x00 + +/* Bit definitions for LDO1_VOLTAGE */ +#define TPS65917_LDO1_VOLTAGE_VSEL_MASK 0x2F +#define TPS65917_LDO1_VOLTAGE_VSEL_SHIFT 0x00 + +/* Bit definitions for LDO2_CTRL */ +#define TPS65917_LDO2_CTRL_WR_S 0x80 +#define TPS65917_LDO2_CTRL_WR_S_SHIFT 0x07 +#define TPS65917_LDO2_CTRL_BYPASS_EN 0x40 +#define TPS65917_LDO2_CTRL_BYPASS_EN_SHIFT 0x06 +#define TPS65917_LDO2_CTRL_STATUS 0x10 +#define TPS65917_LDO2_CTRL_STATUS_SHIFT 0x04 +#define TPS65917_LDO2_CTRL_MODE_SLEEP 0x04 +#define TPS65917_LDO2_CTRL_MODE_SLEEP_SHIFT 0x02 +#define TPS65917_LDO2_CTRL_MODE_ACTIVE 0x01 +#define TPS65917_LDO2_CTRL_MODE_ACTIVE_SHIFT 0x00 + +/* Bit definitions for LDO2_VOLTAGE */ +#define TPS65917_LDO2_VOLTAGE_VSEL_MASK 0x2F +#define TPS65917_LDO2_VOLTAGE_VSEL_SHIFT 0x00 + +/* Bit definitions for LDO3_CTRL */ +#define TPS65917_LDO3_CTRL_WR_S 0x80 +#define TPS65917_LDO3_CTRL_WR_S_SHIFT 0x07 +#define TPS65917_LDO3_CTRL_STATUS 0x10 +#define TPS65917_LDO3_CTRL_STATUS_SHIFT 0x04 +#define TPS65917_LDO3_CTRL_MODE_SLEEP 0x04 +#define TPS65917_LDO3_CTRL_MODE_SLEEP_SHIFT 0x02 +#define TPS65917_LDO3_CTRL_MODE_ACTIVE 0x01 +#define TPS65917_LDO3_CTRL_MODE_ACTIVE_SHIFT 0x00 + +/* Bit definitions for LDO3_VOLTAGE */ +#define TPS65917_LDO3_VOLTAGE_VSEL_MASK 0x2F +#define TPS65917_LDO3_VOLTAGE_VSEL_SHIFT 0x00 + +/* Bit definitions for LDO4_CTRL */ +#define TPS65917_LDO4_CTRL_WR_S 0x80 +#define TPS65917_LDO4_CTRL_WR_S_SHIFT 0x07 +#define TPS65917_LDO4_CTRL_STATUS 0x10 +#define TPS65917_LDO4_CTRL_STATUS_SHIFT 0x04 +#define TPS65917_LDO4_CTRL_MODE_SLEEP 0x04 +#define TPS65917_LDO4_CTRL_MODE_SLEEP_SHIFT 0x02 +#define TPS65917_LDO4_CTRL_MODE_ACTIVE 0x01 +#define TPS65917_LDO4_CTRL_MODE_ACTIVE_SHIFT 0x00 + +/* Bit definitions for LDO4_VOLTAGE */ +#define TPS65917_LDO4_VOLTAGE_VSEL_MASK 0x2F +#define TPS65917_LDO4_VOLTAGE_VSEL_SHIFT 0x00 + +/* Bit definitions for LDO5_CTRL */ +#define TPS65917_LDO5_CTRL_WR_S 0x80 +#define TPS65917_LDO5_CTRL_WR_S_SHIFT 0x07 +#define TPS65917_LDO5_CTRL_STATUS 0x10 +#define TPS65917_LDO5_CTRL_STATUS_SHIFT 0x04 +#define TPS65917_LDO5_CTRL_MODE_SLEEP 0x04 +#define TPS65917_LDO5_CTRL_MODE_SLEEP_SHIFT 0x02 +#define TPS65917_LDO5_CTRL_MODE_ACTIVE 0x01 +#define TPS65917_LDO5_CTRL_MODE_ACTIVE_SHIFT 0x00 + +/* Bit definitions for LDO5_VOLTAGE */ +#define TPS65917_LDO5_VOLTAGE_VSEL_MASK 0x2F +#define TPS65917_LDO5_VOLTAGE_VSEL_SHIFT 0x00 + +/* Bit definitions for LDO_PD_CTRL1 */ +#define TPS65917_LDO_PD_CTRL1_LDO4 0x80 +#define TPS65917_LDO_PD_CTRL1_LDO4_SHIFT 0x07 +#define TPS65917_LDO_PD_CTRL1_LDO2 0x02 +#define TPS65917_LDO_PD_CTRL1_LDO2_SHIFT 0x01 +#define TPS65917_LDO_PD_CTRL1_LDO1 0x01 +#define TPS65917_LDO_PD_CTRL1_LDO1_SHIFT 0x00 + +/* Bit definitions for LDO_PD_CTRL2 */ +#define TPS65917_LDO_PD_CTRL2_LDO3 0x04 +#define TPS65917_LDO_PD_CTRL2_LDO3_SHIFT 0x02 +#define TPS65917_LDO_PD_CTRL2_LDO5 0x02 +#define TPS65917_LDO_PD_CTRL2_LDO5_SHIFT 0x01 + +/* Bit definitions for LDO_PD_CTRL3 */ +#define TPS65917_LDO_PD_CTRL2_LDOVANA 0x80 +#define TPS65917_LDO_PD_CTRL2_LDOVANA_SHIFT 0x07 + +/* Bit definitions for LDO_SHORT_STATUS1 */ +#define TPS65917_LDO_SHORT_STATUS1_LDO4 0x80 +#define TPS65917_LDO_SHORT_STATUS1_LDO4_SHIFT 0x07 +#define TPS65917_LDO_SHORT_STATUS1_LDO2 0x02 +#define TPS65917_LDO_SHORT_STATUS1_LDO2_SHIFT 0x01 +#define TPS65917_LDO_SHORT_STATUS1_LDO1 0x01 +#define TPS65917_LDO_SHORT_STATUS1_LDO1_SHIFT 0x00 + +/* Bit definitions for LDO_SHORT_STATUS2 */ +#define TPS65917_LDO_SHORT_STATUS2_LDO3 0x04 +#define TPS65917_LDO_SHORT_STATUS2_LDO3_SHIFT 0x02 +#define TPS65917_LDO_SHORT_STATUS2_LDO5 0x02 +#define TPS65917_LDO_SHORT_STATUS2_LDO5_SHIFT 0x01 + +/* Bit definitions for LDO_SHORT_STATUS2 */ +#define TPS65917_LDO_SHORT_STATUS2_LDOVANA 0x80 +#define TPS65917_LDO_SHORT_STATUS2_LDOVANA_SHIFT 0x07 + +/* Bit definitions for REGEN1_CTRL */ +#define TPS65917_REGEN1_CTRL_STATUS 0x10 +#define TPS65917_REGEN1_CTRL_STATUS_SHIFT 0x04 +#define TPS65917_REGEN1_CTRL_MODE_SLEEP 0x04 +#define TPS65917_REGEN1_CTRL_MODE_SLEEP_SHIFT 0x02 +#define TPS65917_REGEN1_CTRL_MODE_ACTIVE 0x01 +#define TPS65917_REGEN1_CTRL_MODE_ACTIVE_SHIFT 0x00 + +/* Bit definitions for PLLEN_CTRL */ +#define TPS65917_PLLEN_CTRL_STATUS 0x10 +#define TPS65917_PLLEN_CTRL_STATUS_SHIFT 0x04 +#define TPS65917_PLLEN_CTRL_MODE_SLEEP 0x04 +#define TPS65917_PLLEN_CTRL_MODE_SLEEP_SHIFT 0x02 +#define TPS65917_PLLEN_CTRL_MODE_ACTIVE 0x01 +#define TPS65917_PLLEN_CTRL_MODE_ACTIVE_SHIFT 0x00 + +/* Bit definitions for REGEN2_CTRL */ +#define TPS65917_REGEN2_CTRL_STATUS 0x10 +#define TPS65917_REGEN2_CTRL_STATUS_SHIFT 0x04 +#define TPS65917_REGEN2_CTRL_MODE_SLEEP 0x04 +#define TPS65917_REGEN2_CTRL_MODE_SLEEP_SHIFT 0x02 +#define TPS65917_REGEN2_CTRL_MODE_ACTIVE 0x01 +#define TPS65917_REGEN2_CTRL_MODE_ACTIVE_SHIFT 0x00 + +/* Bit definitions for NSLEEP_RES_ASSIGN */ +#define TPS65917_NSLEEP_RES_ASSIGN_PLL_EN 0x08 +#define TPS65917_NSLEEP_RES_ASSIGN_PLL_EN_SHIFT 0x03 +#define TPS65917_NSLEEP_RES_ASSIGN_REGEN3 0x04 +#define TPS65917_NSLEEP_RES_ASSIGN_REGEN3_SHIFT 0x02 +#define TPS65917_NSLEEP_RES_ASSIGN_REGEN2 0x02 +#define TPS65917_NSLEEP_RES_ASSIGN_REGEN2_SHIFT 0x01 +#define TPS65917_NSLEEP_RES_ASSIGN_REGEN1 0x01 +#define TPS65917_NSLEEP_RES_ASSIGN_REGEN1_SHIFT 0x00 + +/* Bit definitions for NSLEEP_SMPS_ASSIGN */ +#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS5 0x40 +#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS5_SHIFT 0x06 +#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS4 0x10 +#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS4_SHIFT 0x04 +#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS3 0x08 +#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS3_SHIFT 0x03 +#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS2 0x02 +#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS2_SHIFT 0x01 +#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS1 0x01 +#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS1_SHIFT 0x00 + +/* Bit definitions for NSLEEP_LDO_ASSIGN1 */ +#define TPS65917_NSLEEP_LDO_ASSIGN1_LDO4 0x80 +#define TPS65917_NSLEEP_LDO_ASSIGN1_LDO4_SHIFT 0x07 +#define TPS65917_NSLEEP_LDO_ASSIGN1_LDO2 0x02 +#define TPS65917_NSLEEP_LDO_ASSIGN1_LDO2_SHIFT 0x01 +#define TPS65917_NSLEEP_LDO_ASSIGN1_LDO1 0x01 +#define TPS65917_NSLEEP_LDO_ASSIGN1_LDO1_SHIFT 0x00 + +/* Bit definitions for NSLEEP_LDO_ASSIGN2 */ +#define TPS65917_NSLEEP_LDO_ASSIGN2_LDO3 0x04 +#define TPS65917_NSLEEP_LDO_ASSIGN2_LDO3_SHIFT 0x02 +#define TPS65917_NSLEEP_LDO_ASSIGN2_LDO5 0x02 +#define TPS65917_NSLEEP_LDO_ASSIGN2_LDO5_SHIFT 0x01 + +/* Bit definitions for ENABLE1_RES_ASSIGN */ +#define TPS65917_ENABLE1_RES_ASSIGN_PLLEN 0x08 +#define TPS65917_ENABLE1_RES_ASSIGN_PLLEN_SHIFT 0x03 +#define TPS65917_ENABLE1_RES_ASSIGN_REGEN3 0x04 +#define TPS65917_ENABLE1_RES_ASSIGN_REGEN3_SHIFT 0x02 +#define TPS65917_ENABLE1_RES_ASSIGN_REGEN2 0x02 +#define TPS65917_ENABLE1_RES_ASSIGN_REGEN2_SHIFT 0x01 +#define TPS65917_ENABLE1_RES_ASSIGN_REGEN1 0x01 +#define TPS65917_ENABLE1_RES_ASSIGN_REGEN1_SHIFT 0x00 + +/* Bit definitions for ENABLE1_SMPS_ASSIGN */ +#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS5 0x40 +#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS5_SHIFT 0x06 +#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS4 0x10 +#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS4_SHIFT 0x04 +#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS3 0x08 +#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS3_SHIFT 0x03 +#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS2 0x02 +#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS2_SHIFT 0x01 +#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS1 0x01 +#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS1_SHIFT 0x00 + +/* Bit definitions for ENABLE1_LDO_ASSIGN1 */ +#define TPS65917_ENABLE1_LDO_ASSIGN1_LDO4 0x80 +#define TPS65917_ENABLE1_LDO_ASSIGN1_LDO4_SHIFT 0x07 +#define TPS65917_ENABLE1_LDO_ASSIGN1_LDO2 0x02 +#define TPS65917_ENABLE1_LDO_ASSIGN1_LDO2_SHIFT 0x01 +#define TPS65917_ENABLE1_LDO_ASSIGN1_LDO1 0x01 +#define TPS65917_ENABLE1_LDO_ASSIGN1_LDO1_SHIFT 0x00 + +/* Bit definitions for ENABLE1_LDO_ASSIGN2 */ +#define TPS65917_ENABLE1_LDO_ASSIGN2_LDO3 0x04 +#define TPS65917_ENABLE1_LDO_ASSIGN2_LDO3_SHIFT 0x02 +#define TPS65917_ENABLE1_LDO_ASSIGN2_LDO5 0x02 +#define TPS65917_ENABLE1_LDO_ASSIGN2_LDO5_SHIFT 0x01 + +/* Bit definitions for ENABLE2_RES_ASSIGN */ +#define TPS65917_ENABLE2_RES_ASSIGN_PLLEN 0x08 +#define TPS65917_ENABLE2_RES_ASSIGN_PLLEN_SHIFT 0x03 +#define TPS65917_ENABLE2_RES_ASSIGN_REGEN3 0x04 +#define TPS65917_ENABLE2_RES_ASSIGN_REGEN3_SHIFT 0x02 +#define TPS65917_ENABLE2_RES_ASSIGN_REGEN2 0x02 +#define TPS65917_ENABLE2_RES_ASSIGN_REGEN2_SHIFT 0x01 +#define TPS65917_ENABLE2_RES_ASSIGN_REGEN1 0x01 +#define TPS65917_ENABLE2_RES_ASSIGN_REGEN1_SHIFT 0x00 + +/* Bit definitions for ENABLE2_SMPS_ASSIGN */ +#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS5 0x40 +#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS5_SHIFT 0x06 +#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS4 0x10 +#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS4_SHIFT 0x04 +#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS3 0x08 +#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS3_SHIFT 0x03 +#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS2 0x02 +#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS2_SHIFT 0x01 +#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS1 0x01 +#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS1_SHIFT 0x00 + +/* Bit definitions for ENABLE2_LDO_ASSIGN1 */ +#define TPS65917_ENABLE2_LDO_ASSIGN1_LDO4 0x80 +#define TPS65917_ENABLE2_LDO_ASSIGN1_LDO4_SHIFT 0x07 +#define TPS65917_ENABLE2_LDO_ASSIGN1_LDO2 0x02 +#define TPS65917_ENABLE2_LDO_ASSIGN1_LDO2_SHIFT 0x01 +#define TPS65917_ENABLE2_LDO_ASSIGN1_LDO1 0x01 +#define TPS65917_ENABLE2_LDO_ASSIGN1_LDO1_SHIFT 0x00 + +/* Bit definitions for ENABLE2_LDO_ASSIGN2 */ +#define TPS65917_ENABLE2_LDO_ASSIGN2_LDO3 0x04 +#define TPS65917_ENABLE2_LDO_ASSIGN2_LDO3_SHIFT 0x02 +#define TPS65917_ENABLE2_LDO_ASSIGN2_LDO5 0x02 +#define TPS65917_ENABLE2_LDO_ASSIGN2_LDO5_SHIFT 0x01 + +/* Bit definitions for REGEN3_CTRL */ +#define TPS65917_REGEN3_CTRL_STATUS 0x10 +#define TPS65917_REGEN3_CTRL_STATUS_SHIFT 0x04 +#define TPS65917_REGEN3_CTRL_MODE_SLEEP 0x04 +#define TPS65917_REGEN3_CTRL_MODE_SLEEP_SHIFT 0x02 +#define TPS65917_REGEN3_CTRL_MODE_ACTIVE 0x01 +#define TPS65917_REGEN3_CTRL_MODE_ACTIVE_SHIFT 0x00 + +/* Registers for function RESOURCE */ +#define TPS65917_REGEN1_CTRL 0x2 +#define TPS65917_PLLEN_CTRL 0x3 +#define TPS65917_NSLEEP_RES_ASSIGN 0x6 +#define TPS65917_NSLEEP_SMPS_ASSIGN 0x7 +#define TPS65917_NSLEEP_LDO_ASSIGN1 0x8 +#define TPS65917_NSLEEP_LDO_ASSIGN2 0x9 +#define TPS65917_ENABLE1_RES_ASSIGN 0xA +#define TPS65917_ENABLE1_SMPS_ASSIGN 0xB +#define TPS65917_ENABLE1_LDO_ASSIGN1 0xC +#define TPS65917_ENABLE1_LDO_ASSIGN2 0xD +#define TPS65917_ENABLE2_RES_ASSIGN 0xE +#define TPS65917_ENABLE2_SMPS_ASSIGN 0xF +#define TPS65917_ENABLE2_LDO_ASSIGN1 0x10 +#define TPS65917_ENABLE2_LDO_ASSIGN2 0x11 +#define TPS65917_REGEN2_CTRL 0x12 +#define TPS65917_REGEN3_CTRL 0x13 + static inline int palmas_read(struct palmas *palmas, unsigned int base, unsigned int reg, unsigned int *val) { diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h index b12f4bbd064c..35b51e7af886 100644 --- a/include/linux/mlx4/device.h +++ b/include/linux/mlx4/device.h @@ -578,8 +578,6 @@ struct mlx4_cq { u32 cons_index; u16 irq; - bool irq_affinity_change; - __be32 *set_ci_db; __be32 *arm_db; int arm_sn; @@ -1167,6 +1165,8 @@ int mlx4_assign_eq(struct mlx4_dev *dev, char *name, struct cpu_rmap *rmap, int *vector); void mlx4_release_eq(struct mlx4_dev *dev, int vec); +int mlx4_eq_get_irq(struct mlx4_dev *dev, int vec); + int mlx4_get_phys_port_id(struct mlx4_dev *dev); int mlx4_wol_read(struct mlx4_dev *dev, u64 *config, int port); int mlx4_wol_write(struct mlx4_dev *dev, u64 config, int port); diff --git a/include/linux/mutex.h b/include/linux/mutex.h index 11692dea18aa..42aa9b9ecd5f 100644 --- a/include/linux/mutex.h +++ b/include/linux/mutex.h @@ -17,6 +17,7 @@ #include <linux/lockdep.h> #include <linux/atomic.h> #include <asm/processor.h> +#include <linux/osq_lock.h> /* * Simple, straightforward mutexes with strict semantics: @@ -46,7 +47,6 @@ * - detects multi-task circular deadlocks and prints out all affected * locks and tasks (and only those tasks) */ -struct optimistic_spin_queue; struct mutex { /* 1: unlocked, 0: locked, negative: locked, possible waiters */ atomic_t count; @@ -56,7 +56,7 @@ struct mutex { struct task_struct *owner; #endif #ifdef CONFIG_MUTEX_SPIN_ON_OWNER - struct optimistic_spin_queue *osq; /* Spinner MCS lock */ + struct optimistic_spin_queue osq; /* Spinner MCS lock */ #endif #ifdef CONFIG_DEBUG_MUTEXES const char *name; diff --git a/include/linux/nmi.h b/include/linux/nmi.h index 6a45fb583ff1..447775ee2c4b 100644 --- a/include/linux/nmi.h +++ b/include/linux/nmi.h @@ -32,15 +32,24 @@ static inline void touch_nmi_watchdog(void) #ifdef arch_trigger_all_cpu_backtrace static inline bool trigger_all_cpu_backtrace(void) { - arch_trigger_all_cpu_backtrace(); + arch_trigger_all_cpu_backtrace(true); return true; } +static inline bool trigger_allbutself_cpu_backtrace(void) +{ + arch_trigger_all_cpu_backtrace(false); + return true; +} #else static inline bool trigger_all_cpu_backtrace(void) { return false; } +static inline bool trigger_allbutself_cpu_backtrace(void) +{ + return false; +} #endif #ifdef CONFIG_LOCKUP_DETECTOR @@ -48,6 +57,7 @@ int hw_nmi_is_cpu_stuck(struct pt_regs *); u64 hw_nmi_get_sample_period(int watchdog_thresh); extern int watchdog_user_enabled; extern int watchdog_thresh; +extern int sysctl_softlockup_all_cpu_backtrace; struct ctl_table; extern int proc_dowatchdog(struct ctl_table *, int , void __user *, size_t *, loff_t *); diff --git a/include/linux/of_fdt.h b/include/linux/of_fdt.h index 05117899fcb4..0ff360d5b3b3 100644 --- a/include/linux/of_fdt.h +++ b/include/linux/of_fdt.h @@ -73,6 +73,8 @@ extern int early_init_dt_scan_root(unsigned long node, const char *uname, int depth, void *data); extern bool early_init_dt_scan(void *params); +extern bool early_init_dt_verify(void *params); +extern void early_init_dt_scan_nodes(void); extern const char *of_flat_dt_get_machine_name(void); extern const void *of_flat_dt_match_machine(const void *default_match, @@ -84,6 +86,7 @@ extern void unflatten_and_copy_device_tree(void); extern void early_init_devtree(void *); extern void early_get_first_memblock_info(void *, phys_addr_t *); extern u64 fdt_translate_address(const void *blob, int node_offset); +extern void of_fdt_limit_memory(int limit); #else /* CONFIG_OF_FLATTREE */ static inline void early_init_fdt_scan_reserved_mem(void) {} static inline const char *of_flat_dt_get_machine_name(void) { return NULL; } diff --git a/include/linux/of_mdio.h b/include/linux/of_mdio.h index a70c9493d55a..d449018d0726 100644 --- a/include/linux/of_mdio.h +++ b/include/linux/of_mdio.h @@ -25,9 +25,6 @@ struct phy_device *of_phy_attach(struct net_device *dev, extern struct mii_bus *of_mdio_find_bus(struct device_node *mdio_np); -extern void of_mdiobus_link_phydev(struct mii_bus *mdio, - struct phy_device *phydev); - #else /* CONFIG_OF */ static inline int of_mdiobus_register(struct mii_bus *mdio, struct device_node *np) { @@ -63,11 +60,6 @@ static inline struct mii_bus *of_mdio_find_bus(struct device_node *mdio_np) { return NULL; } - -static inline void of_mdiobus_link_phydev(struct mii_bus *mdio, - struct phy_device *phydev) -{ -} #endif /* CONFIG_OF */ #if defined(CONFIG_OF) && defined(CONFIG_FIXED_PHY) diff --git a/include/linux/osq_lock.h b/include/linux/osq_lock.h new file mode 100644 index 000000000000..90230d5811c5 --- /dev/null +++ b/include/linux/osq_lock.h @@ -0,0 +1,27 @@ +#ifndef __LINUX_OSQ_LOCK_H +#define __LINUX_OSQ_LOCK_H + +/* + * An MCS like lock especially tailored for optimistic spinning for sleeping + * lock implementations (mutex, rwsem, etc). + */ + +#define OSQ_UNLOCKED_VAL (0) + +struct optimistic_spin_queue { + /* + * Stores an encoded value of the CPU # of the tail node in the queue. + * If the queue is empty, then it's set to OSQ_UNLOCKED_VAL. + */ + atomic_t tail; +}; + +/* Init macro and function. */ +#define OSQ_LOCK_UNLOCKED { ATOMIC_INIT(OSQ_UNLOCKED_VAL) } + +static inline void osq_lock_init(struct optimistic_spin_queue *lock) +{ + atomic_set(&lock->tail, OSQ_UNLOCKED_VAL); +} + +#endif diff --git a/include/linux/page-flags.h b/include/linux/page-flags.h index 3c545b48aeab..8304959ad336 100644 --- a/include/linux/page-flags.h +++ b/include/linux/page-flags.h @@ -360,6 +360,9 @@ static inline void ClearPageCompound(struct page *page) ClearPageHead(page); } #endif + +#define PG_head_mask ((1L << PG_head)) + #else /* * Reduce page flag use as much as possible by overlapping diff --git a/include/linux/pagemap.h b/include/linux/pagemap.h index 0a97b583ee8d..e1474ae18c88 100644 --- a/include/linux/pagemap.h +++ b/include/linux/pagemap.h @@ -399,6 +399,18 @@ static inline struct page *read_mapping_page(struct address_space *mapping, } /* + * Get the offset in PAGE_SIZE. + * (TODO: hugepage should have ->index in PAGE_SIZE) + */ +static inline pgoff_t page_to_pgoff(struct page *page) +{ + if (unlikely(PageHeadHuge(page))) + return page->index << compound_order(page); + else + return page->index << (PAGE_CACHE_SHIFT - PAGE_SHIFT); +} + +/* * Return byte-offset into filesystem object for page. */ static inline loff_t page_offset(struct page *page) diff --git a/include/linux/percpu-defs.h b/include/linux/percpu-defs.h index a5fc7d01aad6..dec01d6c3f80 100644 --- a/include/linux/percpu-defs.h +++ b/include/linux/percpu-defs.h @@ -146,10 +146,10 @@ * Declaration/definition used for per-CPU variables that must be read mostly. */ #define DECLARE_PER_CPU_READ_MOSTLY(type, name) \ - DECLARE_PER_CPU_SECTION(type, name, "..readmostly") + DECLARE_PER_CPU_SECTION(type, name, "..read_mostly") #define DEFINE_PER_CPU_READ_MOSTLY(type, name) \ - DEFINE_PER_CPU_SECTION(type, name, "..readmostly") + DEFINE_PER_CPU_SECTION(type, name, "..read_mostly") /* * Intermodule exports for per-CPU variables. sparse forgets about diff --git a/include/linux/phy.h b/include/linux/phy.h index 864ddafad8cc..68041446c450 100644 --- a/include/linux/phy.h +++ b/include/linux/phy.h @@ -536,6 +536,15 @@ struct phy_driver { /* See set_wol, but for checking whether Wake on LAN is enabled. */ void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); + /* + * Called to inform a PHY device driver when the core is about to + * change the link state. This callback is supposed to be used as + * fixup hook for drivers that need to take action when the link + * state changes. Drivers are by no means allowed to mess with the + * PHY device structure in their implementations. + */ + void (*link_change_notify)(struct phy_device *dev); + struct device_driver driver; }; #define to_phy_driver(d) container_of(d, struct phy_driver, driver) diff --git a/include/linux/profile.h b/include/linux/profile.h index aaad3861beb8..b537a25ffa17 100644 --- a/include/linux/profile.h +++ b/include/linux/profile.h @@ -44,6 +44,7 @@ extern int prof_on __read_mostly; int profile_init(void); int profile_setup(char *str); void profile_tick(int type); +int setup_profiling_timer(unsigned int multiplier); /* * Add multiple profiler hits to a given address: diff --git a/include/linux/ptrace.h b/include/linux/ptrace.h index 077904c8b70d..cc79eff4a1ad 100644 --- a/include/linux/ptrace.h +++ b/include/linux/ptrace.h @@ -334,6 +334,9 @@ static inline void user_single_step_siginfo(struct task_struct *tsk, * calling arch_ptrace_stop() when it would be superfluous. For example, * if the thread has not been back to user mode since the last stop, the * thread state might indicate that nothing needs to be done. + * + * This is guaranteed to be invoked once before a task stops for ptrace and + * may include arch-specific operations necessary prior to a ptrace stop. */ #define arch_ptrace_stop_needed(code, info) (0) #endif diff --git a/include/linux/rcupdate.h b/include/linux/rcupdate.h index 5a75d19aa661..6a94cc8b1ca0 100644 --- a/include/linux/rcupdate.h +++ b/include/linux/rcupdate.h @@ -44,7 +44,6 @@ #include <linux/debugobjects.h> #include <linux/bug.h> #include <linux/compiler.h> -#include <linux/percpu.h> #include <asm/barrier.h> extern int rcu_expedited; /* for sysctl */ @@ -300,41 +299,6 @@ bool __rcu_is_watching(void); #endif /* #if defined(CONFIG_DEBUG_LOCK_ALLOC) || defined(CONFIG_RCU_TRACE) || defined(CONFIG_SMP) */ /* - * Hooks for cond_resched() and friends to avoid RCU CPU stall warnings. - */ - -#define RCU_COND_RESCHED_LIM 256 /* ms vs. 100s of ms. */ -DECLARE_PER_CPU(int, rcu_cond_resched_count); -void rcu_resched(void); - -/* - * Is it time to report RCU quiescent states? - * - * Note unsynchronized access to rcu_cond_resched_count. Yes, we might - * increment some random CPU's count, and possibly also load the result from - * yet another CPU's count. We might even clobber some other CPU's attempt - * to zero its counter. This is all OK because the goal is not precision, - * but rather reasonable amortization of rcu_note_context_switch() overhead - * and extremely high probability of avoiding RCU CPU stall warnings. - * Note that this function has to be preempted in just the wrong place, - * many thousands of times in a row, for anything bad to happen. - */ -static inline bool rcu_should_resched(void) -{ - return raw_cpu_inc_return(rcu_cond_resched_count) >= - RCU_COND_RESCHED_LIM; -} - -/* - * Report quiscent states to RCU if it is time to do so. - */ -static inline void rcu_cond_resched(void) -{ - if (unlikely(rcu_should_resched())) - rcu_resched(); -} - -/* * Infrastructure to implement the synchronize_() primitives in * TREE_RCU and rcu_barrier_() primitives in TINY_RCU. */ @@ -358,9 +322,19 @@ void wait_rcu_gp(call_rcu_func_t crf); * initialization. */ #ifdef CONFIG_DEBUG_OBJECTS_RCU_HEAD +void init_rcu_head(struct rcu_head *head); +void destroy_rcu_head(struct rcu_head *head); void init_rcu_head_on_stack(struct rcu_head *head); void destroy_rcu_head_on_stack(struct rcu_head *head); #else /* !CONFIG_DEBUG_OBJECTS_RCU_HEAD */ +static inline void init_rcu_head(struct rcu_head *head) +{ +} + +static inline void destroy_rcu_head(struct rcu_head *head) +{ +} + static inline void init_rcu_head_on_stack(struct rcu_head *head) { } diff --git a/include/linux/regulator/ab8500.h b/include/linux/regulator/ab8500.h index 75307447cef9..d8ecefaf63ca 100644 --- a/include/linux/regulator/ab8500.h +++ b/include/linux/regulator/ab8500.h @@ -322,18 +322,4 @@ struct ab8500_regulator_platform_data { struct regulator_init_data *ext_regulator; }; -#ifdef CONFIG_REGULATOR_AB8500_DEBUG -int ab8500_regulator_debug_init(struct platform_device *pdev); -int ab8500_regulator_debug_exit(struct platform_device *pdev); -#else -static inline int ab8500_regulator_debug_init(struct platform_device *pdev) -{ - return 0; -} -static inline int ab8500_regulator_debug_exit(struct platform_device *pdev) -{ - return 0; -} -#endif - #endif diff --git a/include/linux/regulator/act8865.h b/include/linux/regulator/act8865.h index 49206c1b4905..b6c4909b33af 100644 --- a/include/linux/regulator/act8865.h +++ b/include/linux/regulator/act8865.h @@ -1,5 +1,5 @@ /* - * act8865.h -- Voltage regulation for the active-semi act8865 + * act8865.h -- Voltage regulation for active-semi act88xx PMUs * * Copyright (C) 2013 Atmel Corporation. * @@ -29,6 +29,27 @@ enum { ACT8865_REG_NUM, }; +enum { + ACT8846_ID_REG1, + ACT8846_ID_REG2, + ACT8846_ID_REG3, + ACT8846_ID_REG4, + ACT8846_ID_REG5, + ACT8846_ID_REG6, + ACT8846_ID_REG7, + ACT8846_ID_REG8, + ACT8846_ID_REG9, + ACT8846_ID_REG10, + ACT8846_ID_REG11, + ACT8846_ID_REG12, + ACT8846_REG_NUM, +}; + +enum { + ACT8865, + ACT8846, +}; + /** * act8865_regulator_data - regulator data * @id: regulator id diff --git a/include/linux/regulator/consumer.h b/include/linux/regulator/consumer.h index a2d9d81038d1..f8a8733068a7 100644 --- a/include/linux/regulator/consumer.h +++ b/include/linux/regulator/consumer.h @@ -37,6 +37,7 @@ struct device; struct notifier_block; +struct regmap; /* * Regulator operating modes. @@ -215,6 +216,13 @@ int regulator_set_optimum_mode(struct regulator *regulator, int load_uA); int regulator_allow_bypass(struct regulator *regulator, bool allow); +struct regmap *regulator_get_regmap(struct regulator *regulator); +int regulator_get_hardware_vsel_register(struct regulator *regulator, + unsigned *vsel_reg, + unsigned *vsel_mask); +int regulator_list_hardware_vsel(struct regulator *regulator, + unsigned selector); + /* regulator notifier block */ int regulator_register_notifier(struct regulator *regulator, struct notifier_block *nb); @@ -395,6 +403,11 @@ static inline void regulator_bulk_free(int num_consumers, { } +static inline int regulator_can_change_voltage(struct regulator *regulator) +{ + return 0; +} + static inline int regulator_set_voltage(struct regulator *regulator, int min_uV, int max_uV) { @@ -452,6 +465,24 @@ static inline int regulator_allow_bypass(struct regulator *regulator, return 0; } +static inline struct regmap *regulator_get_regmap(struct regulator *regulator) +{ + return ERR_PTR(-EOPNOTSUPP); +} + +static inline int regulator_get_hardware_vsel_register(struct regulator *regulator, + unsigned *vsel_reg, + unsigned *vsel_mask) +{ + return -EOPNOTSUPP; +} + +static inline int regulator_list_hardware_vsel(struct regulator *regulator, + unsigned selector) +{ + return -EOPNOTSUPP; +} + static inline int regulator_register_notifier(struct regulator *regulator, struct notifier_block *nb) { diff --git a/include/linux/regulator/da9211.h b/include/linux/regulator/da9211.h new file mode 100644 index 000000000000..0981ce0e72cc --- /dev/null +++ b/include/linux/regulator/da9211.h @@ -0,0 +1,32 @@ +/* + * da9211.h - Regulator device driver for DA9211 + * Copyright (C) 2014 Dialog Semiconductor Ltd. + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Library General Public License for more details. + */ + +#ifndef __LINUX_REGULATOR_DA9211_H +#define __LINUX_REGULATOR_DA9211_H + +#include <linux/regulator/machine.h> + +#define DA9211_MAX_REGULATORS 2 + +struct da9211_pdata { + /* + * Number of buck + * 1 : 4 phase 1 buck + * 2 : 2 phase 2 buck + */ + int num_buck; + struct regulator_init_data *init_data; +}; +#endif diff --git a/include/linux/rwsem-spinlock.h b/include/linux/rwsem-spinlock.h index d5b13bc07a0b..561e8615528d 100644 --- a/include/linux/rwsem-spinlock.h +++ b/include/linux/rwsem-spinlock.h @@ -15,13 +15,13 @@ #ifdef __KERNEL__ /* * the rw-semaphore definition - * - if activity is 0 then there are no active readers or writers - * - if activity is +ve then that is the number of active readers - * - if activity is -1 then there is one active writer + * - if count is 0 then there are no active readers or writers + * - if count is +ve then that is the number of active readers + * - if count is -1 then there is one active writer * - if wait_list is not empty, then there are processes waiting for the semaphore */ struct rw_semaphore { - __s32 activity; + __s32 count; raw_spinlock_t wait_lock; struct list_head wait_list; #ifdef CONFIG_DEBUG_LOCK_ALLOC diff --git a/include/linux/rwsem.h b/include/linux/rwsem.h index 8d79708146aa..035d3c57fc8a 100644 --- a/include/linux/rwsem.h +++ b/include/linux/rwsem.h @@ -13,10 +13,11 @@ #include <linux/kernel.h> #include <linux/list.h> #include <linux/spinlock.h> - #include <linux/atomic.h> +#ifdef CONFIG_RWSEM_SPIN_ON_OWNER +#include <linux/osq_lock.h> +#endif -struct optimistic_spin_queue; struct rw_semaphore; #ifdef CONFIG_RWSEM_GENERIC_SPINLOCK @@ -25,15 +26,15 @@ struct rw_semaphore; /* All arch specific implementations share the same struct */ struct rw_semaphore { long count; - raw_spinlock_t wait_lock; struct list_head wait_list; -#ifdef CONFIG_SMP + raw_spinlock_t wait_lock; +#ifdef CONFIG_RWSEM_SPIN_ON_OWNER + struct optimistic_spin_queue osq; /* spinner MCS lock */ /* * Write owner. Used as a speculative check to see * if the owner is running on the cpu. */ struct task_struct *owner; - struct optimistic_spin_queue *osq; /* spinner MCS lock */ #endif #ifdef CONFIG_DEBUG_LOCK_ALLOC struct lockdep_map dep_map; @@ -64,22 +65,19 @@ static inline int rwsem_is_locked(struct rw_semaphore *sem) # define __RWSEM_DEP_MAP_INIT(lockname) #endif -#if defined(CONFIG_SMP) && !defined(CONFIG_RWSEM_GENERIC_SPINLOCK) -#define __RWSEM_INITIALIZER(name) \ - { RWSEM_UNLOCKED_VALUE, \ - __RAW_SPIN_LOCK_UNLOCKED(name.wait_lock), \ - LIST_HEAD_INIT((name).wait_list), \ - NULL, /* owner */ \ - NULL /* mcs lock */ \ - __RWSEM_DEP_MAP_INIT(name) } +#ifdef CONFIG_RWSEM_SPIN_ON_OWNER +#define __RWSEM_OPT_INIT(lockname) , .osq = OSQ_LOCK_UNLOCKED, .owner = NULL #else -#define __RWSEM_INITIALIZER(name) \ - { RWSEM_UNLOCKED_VALUE, \ - __RAW_SPIN_LOCK_UNLOCKED(name.wait_lock), \ - LIST_HEAD_INIT((name).wait_list) \ - __RWSEM_DEP_MAP_INIT(name) } +#define __RWSEM_OPT_INIT(lockname) #endif +#define __RWSEM_INITIALIZER(name) \ + { .count = RWSEM_UNLOCKED_VALUE, \ + .wait_list = LIST_HEAD_INIT((name).wait_list), \ + .wait_lock = __RAW_SPIN_LOCK_UNLOCKED(name.wait_lock) \ + __RWSEM_OPT_INIT(name) \ + __RWSEM_DEP_MAP_INIT(name) } + #define DECLARE_RWSEM(name) \ struct rw_semaphore name = __RWSEM_INITIALIZER(name) diff --git a/include/linux/sched.h b/include/linux/sched.h index 306f4f0c987a..0376b054a0d0 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -872,21 +872,21 @@ enum cpu_idle_type { #define SD_NUMA 0x4000 /* cross-node balancing */ #ifdef CONFIG_SCHED_SMT -static inline const int cpu_smt_flags(void) +static inline int cpu_smt_flags(void) { return SD_SHARE_CPUCAPACITY | SD_SHARE_PKG_RESOURCES; } #endif #ifdef CONFIG_SCHED_MC -static inline const int cpu_core_flags(void) +static inline int cpu_core_flags(void) { return SD_SHARE_PKG_RESOURCES; } #endif #ifdef CONFIG_NUMA -static inline const int cpu_numa_flags(void) +static inline int cpu_numa_flags(void) { return SD_NUMA; } @@ -999,7 +999,7 @@ void free_sched_domains(cpumask_var_t doms[], unsigned int ndoms); bool cpus_share_cache(int this_cpu, int that_cpu); typedef const struct cpumask *(*sched_domain_mask_f)(int cpu); -typedef const int (*sched_domain_flags_f)(void); +typedef int (*sched_domain_flags_f)(void); #define SDTL_OVERLAP 0x01 diff --git a/include/linux/socket.h b/include/linux/socket.h index 8e98297f1388..ec538fc287a6 100644 --- a/include/linux/socket.h +++ b/include/linux/socket.h @@ -305,8 +305,6 @@ struct ucred { /* IPX options */ #define IPX_TYPE 1 -extern int memcpy_fromiovecend(unsigned char *kdata, const struct iovec *iov, - int offset, int len); extern int csum_partial_copy_fromiovecend(unsigned char *kdata, struct iovec *iov, int offset, @@ -315,8 +313,6 @@ extern unsigned long iov_pages(const struct iovec *iov, int offset, unsigned long nr_segs); extern int verify_iovec(struct msghdr *m, struct iovec *iov, struct sockaddr_storage *address, int mode); -extern int memcpy_toiovecend(const struct iovec *v, unsigned char *kdata, - int offset, int len); extern int move_addr_to_kernel(void __user *uaddr, int ulen, struct sockaddr_storage *kaddr); extern int put_cmsg(struct msghdr*, int level, int type, int len, void *data); diff --git a/include/linux/suspend.h b/include/linux/suspend.h index f76994b9396c..519064e0c943 100644 --- a/include/linux/suspend.h +++ b/include/linux/suspend.h @@ -327,6 +327,7 @@ extern unsigned long get_safe_page(gfp_t gfp_mask); extern void hibernation_set_ops(const struct platform_hibernation_ops *ops); extern int hibernate(void); extern bool system_entering_hibernation(void); +extern bool hibernation_available(void); asmlinkage int swsusp_save(void); extern struct pbe *restore_pblist; #else /* CONFIG_HIBERNATION */ @@ -339,6 +340,7 @@ static inline void swsusp_unset_page_free(struct page *p) {} static inline void hibernation_set_ops(const struct platform_hibernation_ops *ops) {} static inline int hibernate(void) { return -ENOSYS; } static inline bool system_entering_hibernation(void) { return false; } +static inline bool hibernation_available(void) { return false; } #endif /* CONFIG_HIBERNATION */ /* Hibernation and suspend events */ diff --git a/include/linux/uio.h b/include/linux/uio.h index e2231e47cec1..09a7cffc224e 100644 --- a/include/linux/uio.h +++ b/include/linux/uio.h @@ -94,8 +94,20 @@ static inline size_t iov_iter_count(struct iov_iter *i) return i->count; } -static inline void iov_iter_truncate(struct iov_iter *i, size_t count) +/* + * Cap the iov_iter by given limit; note that the second argument is + * *not* the new size - it's upper limit for such. Passing it a value + * greater than the amount of data in iov_iter is fine - it'll just do + * nothing in that case. + */ +static inline void iov_iter_truncate(struct iov_iter *i, u64 count) { + /* + * count doesn't have to fit in size_t - comparison extends both + * operands to u64 here and any value that would be truncated by + * conversion in assignement is by definition greater than all + * values of size_t, including old i->count. + */ if (i->count > count) i->count = count; } @@ -111,6 +123,9 @@ static inline void iov_iter_reexpand(struct iov_iter *i, size_t count) int memcpy_fromiovec(unsigned char *kdata, struct iovec *iov, int len); int memcpy_toiovec(struct iovec *iov, unsigned char *kdata, int len); - +int memcpy_fromiovecend(unsigned char *kdata, const struct iovec *iov, + int offset, int len); +int memcpy_toiovecend(const struct iovec *v, unsigned char *kdata, + int offset, int len); #endif diff --git a/include/linux/usb_usual.h b/include/linux/usb_usual.h index 1a64b26046ed..9b7de1b46437 100644 --- a/include/linux/usb_usual.h +++ b/include/linux/usb_usual.h @@ -70,7 +70,9 @@ US_FLAG(NEEDS_CAP16, 0x00400000) \ /* cannot handle READ_CAPACITY_10 */ \ US_FLAG(IGNORE_UAS, 0x00800000) \ - /* Device advertises UAS but it is broken */ + /* Device advertises UAS but it is broken */ \ + US_FLAG(BROKEN_FUA, 0x01000000) \ + /* Cannot handle FUA in WRITE or READ CDBs */ \ #define US_FLAG(name, value) US_FL_##name = value , enum { US_DO_ALL_FLAGS }; |
