diff options
Diffstat (limited to 'include/linux/mfd')
| -rw-r--r-- | include/linux/mfd/abx500.h | 1 | ||||
| -rw-r--r-- | include/linux/mfd/abx500/ab8500-bm.h | 2 | ||||
| -rw-r--r-- | include/linux/mfd/abx500/ux500_chargalg.h | 4 | ||||
| -rw-r--r-- | include/linux/mfd/arizona/pdata.h | 3 | ||||
| -rw-r--r-- | include/linux/mfd/as3711.h | 4 | ||||
| -rw-r--r-- | include/linux/mfd/axp20x.h | 10 | ||||
| -rw-r--r-- | include/linux/mfd/bd9571mwv.h | 5 | ||||
| -rw-r--r-- | include/linux/mfd/cros_ec.h | 20 | ||||
| -rw-r--r-- | include/linux/mfd/lp8788.h | 16 | ||||
| -rw-r--r-- | include/linux/mfd/rave-sp.h | 1 | ||||
| -rw-r--r-- | include/linux/mfd/samsung/core.h | 4 | ||||
| -rw-r--r-- | include/linux/mfd/stm32-timers.h | 70 | ||||
| -rw-r--r-- | include/linux/mfd/syscon/exynos4-pmu.h | 21 | ||||
| -rw-r--r-- | include/linux/mfd/syscon/exynos5-pmu.h | 19 | ||||
| -rw-r--r-- | include/linux/mfd/tps65090.h | 8 | ||||
| -rw-r--r-- | include/linux/mfd/tps65218.h | 4 | ||||
| -rw-r--r-- | include/linux/mfd/tps6586x.h | 1 | ||||
| -rw-r--r-- | include/linux/mfd/tps68470.h | 17 |
18 files changed, 101 insertions, 109 deletions
diff --git a/include/linux/mfd/abx500.h b/include/linux/mfd/abx500.h index 44412c9d26e1..aa09414756db 100644 --- a/include/linux/mfd/abx500.h +++ b/include/linux/mfd/abx500.h @@ -271,7 +271,6 @@ struct abx500_bm_data { bool autopower_cfg; bool ac_enabled; bool usb_enabled; - bool usb_power_path; bool no_maintenance; bool capacity_scaling; bool chg_unknown_bat; diff --git a/include/linux/mfd/abx500/ab8500-bm.h b/include/linux/mfd/abx500/ab8500-bm.h index e63681eb6c62..c06daf3d490a 100644 --- a/include/linux/mfd/abx500/ab8500-bm.h +++ b/include/linux/mfd/abx500/ab8500-bm.h @@ -248,8 +248,6 @@ enum bup_vch_sel { #define BAT_CTRL_20U_ENA 0x02 #define BAT_CTRL_18U_ENA 0x01 #define BAT_CTRL_16U_ENA 0x02 -#define BAT_CTRL_60U_ENA 0x01 -#define BAT_CTRL_120U_ENA 0x02 #define BAT_CTRL_CMP_ENA 0x04 #define FORCE_BAT_CTRL_CMP_HIGH 0x08 #define BAT_CTRL_PULL_UP_ENA 0x10 diff --git a/include/linux/mfd/abx500/ux500_chargalg.h b/include/linux/mfd/abx500/ux500_chargalg.h index 67703f23e7ba..669894f434f5 100644 --- a/include/linux/mfd/abx500/ux500_chargalg.h +++ b/include/linux/mfd/abx500/ux500_chargalg.h @@ -25,8 +25,6 @@ struct ux500_charger_ops { int (*check_enable) (struct ux500_charger *, int, int); int (*kick_wd) (struct ux500_charger *); int (*update_curr) (struct ux500_charger *, int); - int (*pp_enable) (struct ux500_charger *, bool); - int (*pre_chg_enable) (struct ux500_charger *, bool); }; /** @@ -37,7 +35,6 @@ struct ux500_charger_ops { * @max_out_curr maximum output charger current in mA * @enabled indicates if this charger is used or not * @external external charger unit (pm2xxx) - * @power_path USB power path support */ struct ux500_charger { struct power_supply *psy; @@ -47,7 +44,6 @@ struct ux500_charger { int wdt_refresh; bool enabled; bool external; - bool power_path; }; extern struct blocking_notifier_head charger_notifier_list; diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index f72dc53848d7..0013075d4cda 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -56,6 +56,7 @@ #define ARIZONA_MAX_PDM_SPK 2 struct regulator_init_data; +struct gpio_desc; struct arizona_micbias { int mV; /** Regulated voltage */ @@ -77,7 +78,7 @@ struct arizona_micd_range { }; struct arizona_pdata { - int reset; /** GPIO controlling /RESET, if any */ + struct gpio_desc *reset; /** GPIO controlling /RESET, if any */ /** Regulator configuration for MICVDD */ struct arizona_micsupp_pdata micvdd; diff --git a/include/linux/mfd/as3711.h b/include/linux/mfd/as3711.h index 34cc85864be5..ddd0b953323b 100644 --- a/include/linux/mfd/as3711.h +++ b/include/linux/mfd/as3711.h @@ -108,9 +108,9 @@ struct as3711_regulator_pdata { }; struct as3711_bl_pdata { - const char *su1_fb; + bool su1_fb; int su1_max_uA; - const char *su2_fb; + bool su2_fb; int su2_max_uA; enum as3711_su2_feedback su2_feedback; enum as3711_su2_fbprot su2_fbprot; diff --git a/include/linux/mfd/axp20x.h b/include/linux/mfd/axp20x.h index 82bf7747b312..517e60eecbcb 100644 --- a/include/linux/mfd/axp20x.h +++ b/include/linux/mfd/axp20x.h @@ -592,11 +592,11 @@ enum axp806_irqs { AXP806_IRQ_DCDCC_V_LOW, AXP806_IRQ_DCDCD_V_LOW, AXP806_IRQ_DCDCE_V_LOW, - AXP806_IRQ_PWROK_LONG, - AXP806_IRQ_PWROK_SHORT, + AXP806_IRQ_POK_LONG, + AXP806_IRQ_POK_SHORT, AXP806_IRQ_WAKEUP, - AXP806_IRQ_PWROK_FALL, - AXP806_IRQ_PWROK_RISE, + AXP806_IRQ_POK_FALL, + AXP806_IRQ_POK_RISE, }; enum axp809_irqs { @@ -642,7 +642,7 @@ struct axp20x_dev { struct regmap_irq_chip_data *regmap_irqc; long variant; int nr_cells; - struct mfd_cell *cells; + const struct mfd_cell *cells; const struct regmap_config *regmap_cfg; const struct regmap_irq_chip *regmap_irq_chip; }; diff --git a/include/linux/mfd/bd9571mwv.h b/include/linux/mfd/bd9571mwv.h index f0708ba4cbba..eb05569f752b 100644 --- a/include/linux/mfd/bd9571mwv.h +++ b/include/linux/mfd/bd9571mwv.h @@ -33,6 +33,11 @@ #define BD9571MWV_I2C_MD2_E1_BIT_2 0x12 #define BD9571MWV_BKUP_MODE_CNT 0x20 +#define BD9571MWV_BKUP_MODE_CNT_KEEPON_MASK GENMASK(3, 0) +#define BD9571MWV_BKUP_MODE_CNT_KEEPON_DDR0 BIT(0) +#define BD9571MWV_BKUP_MODE_CNT_KEEPON_DDR1 BIT(1) +#define BD9571MWV_BKUP_MODE_CNT_KEEPON_DDR0C BIT(2) +#define BD9571MWV_BKUP_MODE_CNT_KEEPON_DDR1C BIT(3) #define BD9571MWV_BKUP_MODE_STATUS 0x21 #define BD9571MWV_BKUP_RECOVERY_CNT 0x22 #define BD9571MWV_BKUP_CTRL_TIM_CNT 0x23 diff --git a/include/linux/mfd/cros_ec.h b/include/linux/mfd/cros_ec.h index f09e9cf2e4ab..32421dfeb996 100644 --- a/include/linux/mfd/cros_ec.h +++ b/include/linux/mfd/cros_ec.h @@ -329,23 +329,7 @@ extern struct attribute_group cros_ec_vbc_attr_group; /* debugfs stuff */ int cros_ec_debugfs_init(struct cros_ec_dev *ec); void cros_ec_debugfs_remove(struct cros_ec_dev *ec); - -/* ACPI GPE handler */ -#ifdef CONFIG_ACPI - -int cros_ec_acpi_install_gpe_handler(struct device *dev); -void cros_ec_acpi_remove_gpe_handler(void); -void cros_ec_acpi_clear_gpe(void); - -#else /* CONFIG_ACPI */ - -static inline int cros_ec_acpi_install_gpe_handler(struct device *dev) -{ - return -ENODEV; -} -static inline void cros_ec_acpi_remove_gpe_handler(void) {} -static inline void cros_ec_acpi_clear_gpe(void) {} - -#endif /* CONFIG_ACPI */ +void cros_ec_debugfs_suspend(struct cros_ec_dev *ec); +void cros_ec_debugfs_resume(struct cros_ec_dev *ec); #endif /* __LINUX_MFD_CROS_EC_H */ diff --git a/include/linux/mfd/lp8788.h b/include/linux/mfd/lp8788.h index 786bf6679a28..2010e0de3e34 100644 --- a/include/linux/mfd/lp8788.h +++ b/include/linux/mfd/lp8788.h @@ -182,20 +182,6 @@ struct lp8788_buck2_dvs { }; /* - * struct lp8788_ldo_enable_pin - * - * Basically, all LDOs are enabled through the I2C commands. - * But ALDO 1 ~ 5, 7, DLDO 7, 9, 11 can be enabled by external gpio pins. - * - * @gpio : gpio number which is used for enabling ldos - * @init_state : initial gpio state (ex. GPIOF_OUT_INIT_LOW) - */ -struct lp8788_ldo_enable_pin { - int gpio; - int init_state; -}; - -/* * struct lp8788_chg_param * @addr : charging control register address (range : 0x11 ~ 0x1C) * @val : charging parameter value @@ -288,7 +274,6 @@ struct lp8788_vib_platform_data { * @aldo_data : regulator initial data for analog ldo * @buck1_dvs : gpio configurations for buck1 dvs * @buck2_dvs : gpio configurations for buck2 dvs - * @ldo_pin : gpio configurations for enabling LDOs * @chg_pdata : platform data for charger driver * @alarm_sel : rtc alarm selection (1 or 2) * @bl_pdata : configurable data for backlight driver @@ -306,7 +291,6 @@ struct lp8788_platform_data { struct regulator_init_data *aldo_data[LP8788_NUM_ALDOS]; struct lp8788_buck1_dvs *buck1_dvs; struct lp8788_buck2_dvs *buck2_dvs; - struct lp8788_ldo_enable_pin *ldo_pin[EN_LDOS_MAX]; /* charger */ struct lp8788_charger_platform_data *chg_pdata; diff --git a/include/linux/mfd/rave-sp.h b/include/linux/mfd/rave-sp.h index 796fb9794c9e..fe0ce7bc59cf 100644 --- a/include/linux/mfd/rave-sp.h +++ b/include/linux/mfd/rave-sp.h @@ -21,6 +21,7 @@ enum rave_sp_command { RAVE_SP_CMD_STATUS = 0xA0, RAVE_SP_CMD_SW_WDT = 0xA1, RAVE_SP_CMD_PET_WDT = 0xA2, + RAVE_SP_CMD_SET_BACKLIGHT = 0xA6, RAVE_SP_CMD_RESET = 0xA7, RAVE_SP_CMD_RESET_REASON = 0xA8, diff --git a/include/linux/mfd/samsung/core.h b/include/linux/mfd/samsung/core.h index 5a23dd4df432..28f4ae76271d 100644 --- a/include/linux/mfd/samsung/core.h +++ b/include/linux/mfd/samsung/core.h @@ -39,6 +39,8 @@ #define STEP_12_5_MV 12500 #define STEP_6_25_MV 6250 +struct gpio_desc; + enum sec_device_type { S5M8751X, S5M8763X, @@ -151,7 +153,7 @@ struct sec_regulator_data { int id; struct regulator_init_data *initdata; struct device_node *reg_node; - int ext_control_gpio; + struct gpio_desc *ext_control_gpiod; }; /* diff --git a/include/linux/mfd/stm32-timers.h b/include/linux/mfd/stm32-timers.h index 2aadab6f34a1..067d14655c28 100644 --- a/include/linux/mfd/stm32-timers.h +++ b/include/linux/mfd/stm32-timers.h @@ -8,6 +8,8 @@ #define _LINUX_STM32_GPTIMER_H_ #include <linux/clk.h> +#include <linux/dmaengine.h> +#include <linux/dma-mapping.h> #include <linux/regmap.h> #define TIM_CR1 0x00 /* Control Register 1 */ @@ -27,6 +29,8 @@ #define TIM_CCR3 0x3C /* Capt/Comp Register 3 */ #define TIM_CCR4 0x40 /* Capt/Comp Register 4 */ #define TIM_BDTR 0x44 /* Break and Dead-Time Reg */ +#define TIM_DCR 0x48 /* DMA control register */ +#define TIM_DMAR 0x4C /* DMA register for transfer */ #define TIM_CR1_CEN BIT(0) /* Counter Enable */ #define TIM_CR1_DIR BIT(4) /* Counter Direction */ @@ -36,17 +40,35 @@ #define TIM_SMCR_SMS (BIT(0) | BIT(1) | BIT(2)) /* Slave mode selection */ #define TIM_SMCR_TS (BIT(4) | BIT(5) | BIT(6)) /* Trigger selection */ #define TIM_DIER_UIE BIT(0) /* Update interrupt */ +#define TIM_DIER_UDE BIT(8) /* Update DMA request Enable */ +#define TIM_DIER_CC1DE BIT(9) /* CC1 DMA request Enable */ +#define TIM_DIER_CC2DE BIT(10) /* CC2 DMA request Enable */ +#define TIM_DIER_CC3DE BIT(11) /* CC3 DMA request Enable */ +#define TIM_DIER_CC4DE BIT(12) /* CC4 DMA request Enable */ +#define TIM_DIER_COMDE BIT(13) /* COM DMA request Enable */ +#define TIM_DIER_TDE BIT(14) /* Trigger DMA request Enable */ #define TIM_SR_UIF BIT(0) /* Update interrupt flag */ #define TIM_EGR_UG BIT(0) /* Update Generation */ #define TIM_CCMR_PE BIT(3) /* Channel Preload Enable */ #define TIM_CCMR_M1 (BIT(6) | BIT(5)) /* Channel PWM Mode 1 */ +#define TIM_CCMR_CC1S (BIT(0) | BIT(1)) /* Capture/compare 1 sel */ +#define TIM_CCMR_IC1PSC GENMASK(3, 2) /* Input capture 1 prescaler */ +#define TIM_CCMR_CC2S (BIT(8) | BIT(9)) /* Capture/compare 2 sel */ +#define TIM_CCMR_IC2PSC GENMASK(11, 10) /* Input capture 2 prescaler */ +#define TIM_CCMR_CC1S_TI1 BIT(0) /* IC1/IC3 selects TI1/TI3 */ +#define TIM_CCMR_CC1S_TI2 BIT(1) /* IC1/IC3 selects TI2/TI4 */ +#define TIM_CCMR_CC2S_TI2 BIT(8) /* IC2/IC4 selects TI2/TI4 */ +#define TIM_CCMR_CC2S_TI1 BIT(9) /* IC2/IC4 selects TI1/TI3 */ #define TIM_CCER_CC1E BIT(0) /* Capt/Comp 1 out Ena */ #define TIM_CCER_CC1P BIT(1) /* Capt/Comp 1 Polarity */ #define TIM_CCER_CC1NE BIT(2) /* Capt/Comp 1N out Ena */ #define TIM_CCER_CC1NP BIT(3) /* Capt/Comp 1N Polarity */ #define TIM_CCER_CC2E BIT(4) /* Capt/Comp 2 out Ena */ +#define TIM_CCER_CC2P BIT(5) /* Capt/Comp 2 Polarity */ #define TIM_CCER_CC3E BIT(8) /* Capt/Comp 3 out Ena */ +#define TIM_CCER_CC3P BIT(9) /* Capt/Comp 3 Polarity */ #define TIM_CCER_CC4E BIT(12) /* Capt/Comp 4 out Ena */ +#define TIM_CCER_CC4P BIT(13) /* Capt/Comp 4 Polarity */ #define TIM_CCER_CCXE (BIT(0) | BIT(4) | BIT(8) | BIT(12)) #define TIM_BDTR_BKE BIT(12) /* Break input enable */ #define TIM_BDTR_BKP BIT(13) /* Break input polarity */ @@ -56,8 +78,11 @@ #define TIM_BDTR_BK2F (BIT(20) | BIT(21) | BIT(22) | BIT(23)) #define TIM_BDTR_BK2E BIT(24) /* Break 2 input enable */ #define TIM_BDTR_BK2P BIT(25) /* Break 2 input polarity */ +#define TIM_DCR_DBA GENMASK(4, 0) /* DMA base addr */ +#define TIM_DCR_DBL GENMASK(12, 8) /* DMA burst len */ #define MAX_TIM_PSC 0xFFFF +#define MAX_TIM_ICPSC 0x3 #define TIM_CR2_MMS_SHIFT 4 #define TIM_CR2_MMS2_SHIFT 20 #define TIM_SMCR_TS_SHIFT 4 @@ -65,9 +90,54 @@ #define TIM_BDTR_BKF_SHIFT 16 #define TIM_BDTR_BK2F_SHIFT 20 +enum stm32_timers_dmas { + STM32_TIMERS_DMA_CH1, + STM32_TIMERS_DMA_CH2, + STM32_TIMERS_DMA_CH3, + STM32_TIMERS_DMA_CH4, + STM32_TIMERS_DMA_UP, + STM32_TIMERS_DMA_TRIG, + STM32_TIMERS_DMA_COM, + STM32_TIMERS_MAX_DMAS, +}; + +/** + * struct stm32_timers_dma - STM32 timer DMA handling. + * @completion: end of DMA transfer completion + * @phys_base: control registers physical base address + * @lock: protect DMA access + * @chan: DMA channel in use + * @chans: DMA channels available for this timer instance + */ +struct stm32_timers_dma { + struct completion completion; + phys_addr_t phys_base; + struct mutex lock; + struct dma_chan *chan; + struct dma_chan *chans[STM32_TIMERS_MAX_DMAS]; +}; + struct stm32_timers { struct clk *clk; struct regmap *regmap; u32 max_arr; + struct stm32_timers_dma dma; /* Only to be used by the parent */ }; + +#if IS_REACHABLE(CONFIG_MFD_STM32_TIMERS) +int stm32_timers_dma_burst_read(struct device *dev, u32 *buf, + enum stm32_timers_dmas id, u32 reg, + unsigned int num_reg, unsigned int bursts, + unsigned long tmo_ms); +#else +static inline int stm32_timers_dma_burst_read(struct device *dev, u32 *buf, + enum stm32_timers_dmas id, + u32 reg, + unsigned int num_reg, + unsigned int bursts, + unsigned long tmo_ms) +{ + return -ENODEV; +} +#endif #endif diff --git a/include/linux/mfd/syscon/exynos4-pmu.h b/include/linux/mfd/syscon/exynos4-pmu.h deleted file mode 100644 index 278b1b1549e9..000000000000 --- a/include/linux/mfd/syscon/exynos4-pmu.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Copyright (C) 2015 Samsung Electronics Co., Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef _LINUX_MFD_SYSCON_PMU_EXYNOS4_H_ -#define _LINUX_MFD_SYSCON_PMU_EXYNOS4_H_ - -/* Exynos4 PMU register definitions */ - -/* MIPI_PHYn_CONTROL register offset: n = 0..1 */ -#define EXYNOS4_MIPI_PHY_CONTROL(n) (0x710 + (n) * 4) -#define EXYNOS4_MIPI_PHY_ENABLE (1 << 0) -#define EXYNOS4_MIPI_PHY_SRESETN (1 << 1) -#define EXYNOS4_MIPI_PHY_MRESETN (1 << 2) -#define EXYNOS4_MIPI_PHY_RESET_MASK (3 << 1) - -#endif /* _LINUX_MFD_SYSCON_PMU_EXYNOS4_H_ */ diff --git a/include/linux/mfd/syscon/exynos5-pmu.h b/include/linux/mfd/syscon/exynos5-pmu.h deleted file mode 100644 index b4942a32b81d..000000000000 --- a/include/linux/mfd/syscon/exynos5-pmu.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * Exynos5 SoC series Power Management Unit (PMU) register offsets - * and bit definitions. - * - * Copyright (C) 2014 Samsung Electronics Co., Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef _LINUX_MFD_SYSCON_PMU_EXYNOS5_H_ -#define _LINUX_MFD_SYSCON_PMU_EXYNOS5_H_ - -#define EXYNOS5_PHY_ENABLE BIT(0) -#define EXYNOS5_MIPI_PHY_S_RESETN BIT(1) -#define EXYNOS5_MIPI_PHY_M_RESETN BIT(2) - -#endif /* _LINUX_MFD_SYSCON_PMU_EXYNOS5_H_ */ diff --git a/include/linux/mfd/tps65090.h b/include/linux/mfd/tps65090.h index 67d144b3b8f9..f05bf4a146e2 100644 --- a/include/linux/mfd/tps65090.h +++ b/include/linux/mfd/tps65090.h @@ -83,6 +83,8 @@ enum { #define TPS65090_MAX_REG TPS65090_REG_AD_OUT2 #define TPS65090_NUM_REGS (TPS65090_MAX_REG + 1) +struct gpio_desc; + struct tps65090 { struct device *dev; struct regmap *rmap; @@ -95,8 +97,8 @@ struct tps65090 { * @reg_init_data: The regulator init data. * @enable_ext_control: Enable extrenal control or not. Only available for * DCDC1, DCDC2 and DCDC3. - * @gpio: Gpio number if external control is enabled and controlled through - * gpio. + * @gpiod: Gpio descriptor if external control is enabled and controlled through + * gpio * @overcurrent_wait_valid: True if the overcurrent_wait should be applied. * @overcurrent_wait: Value to set as the overcurrent wait time. This is the * actual bitfield value, not a time in ms (valid value are 0 - 3). @@ -104,7 +106,7 @@ struct tps65090 { struct tps65090_regulator_plat_data { struct regulator_init_data *reg_init_data; bool enable_ext_control; - int gpio; + struct gpio_desc *gpiod; bool overcurrent_wait_valid; int overcurrent_wait; }; diff --git a/include/linux/mfd/tps65218.h b/include/linux/mfd/tps65218.h index f069c518c0ed..c204d9a79436 100644 --- a/include/linux/mfd/tps65218.h +++ b/include/linux/mfd/tps65218.h @@ -205,10 +205,10 @@ enum tps65218_regulator_id { TPS65218_DCDC_4, TPS65218_DCDC_5, TPS65218_DCDC_6, - /* LS's */ - TPS65218_LS_3, /* LDOs */ TPS65218_LDO_1, + /* LS's */ + TPS65218_LS_3, }; #define TPS65218_MAX_REG_ID TPS65218_LDO_1 diff --git a/include/linux/mfd/tps6586x.h b/include/linux/mfd/tps6586x.h index 2fe68e481230..b19c2801a30e 100644 --- a/include/linux/mfd/tps6586x.h +++ b/include/linux/mfd/tps6586x.h @@ -18,6 +18,7 @@ #define TPS658621A 0x15 #define TPS658621CD 0x2c #define TPS658623 0x1b +#define TPS658624 0x0a #define TPS658640 0x01 #define TPS658640v2 0x02 #define TPS658643 0x03 diff --git a/include/linux/mfd/tps68470.h b/include/linux/mfd/tps68470.h index 44f9d9f647ed..ffe81127d91c 100644 --- a/include/linux/mfd/tps68470.h +++ b/include/linux/mfd/tps68470.h @@ -1,17 +1,6 @@ -/* - * Copyright (c) 2017 Intel Corporation - * - * Functions to access TPS68470 power management chip. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright (C) 2017 Intel Corporation */ +/* Functions to access TPS68470 power management chip. */ #ifndef __LINUX_MFD_TPS68470_H #define __LINUX_MFD_TPS68470_H |
