diff options
Diffstat (limited to 'drivers/video/omap2/dss/dispc.c')
| -rw-r--r-- | drivers/video/omap2/dss/dispc.c | 103 |
1 files changed, 78 insertions, 25 deletions
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c index 77d6221618f4..f18397c33e8f 100644 --- a/drivers/video/omap2/dss/dispc.c +++ b/drivers/video/omap2/dss/dispc.c @@ -100,9 +100,9 @@ static struct { struct platform_device *pdev; void __iomem *base; - int ctx_loss_cnt; - int irq; + irq_handler_t user_handler; + void *user_data; unsigned long core_clk_rate; unsigned long tv_pclk_rate; @@ -115,6 +115,8 @@ static struct { u32 ctx[DISPC_SZ_REGS / sizeof(u32)]; const struct dispc_features *feat; + + bool is_enabled; } dispc; enum omap_color_component { @@ -143,12 +145,18 @@ enum mgr_reg_fields { DISPC_MGR_FLD_NUM, }; +struct dispc_reg_field { + u16 reg; + u8 high; + u8 low; +}; + static const struct { const char *name; u32 vsync_irq; u32 framedone_irq; u32 sync_lost_irq; - struct reg_field reg_desc[DISPC_MGR_FLD_NUM]; + struct dispc_reg_field reg_desc[DISPC_MGR_FLD_NUM]; } mgr_desc[] = { [OMAP_DSS_CHANNEL_LCD] = { .name = "LCD", @@ -240,13 +248,13 @@ static inline u32 dispc_read_reg(const u16 idx) static u32 mgr_fld_read(enum omap_channel channel, enum mgr_reg_fields regfld) { - const struct reg_field rfld = mgr_desc[channel].reg_desc[regfld]; + const struct dispc_reg_field rfld = mgr_desc[channel].reg_desc[regfld]; return REG_GET(rfld.reg, rfld.high, rfld.low); } static void mgr_fld_write(enum omap_channel channel, enum mgr_reg_fields regfld, int val) { - const struct reg_field rfld = mgr_desc[channel].reg_desc[regfld]; + const struct dispc_reg_field rfld = mgr_desc[channel].reg_desc[regfld]; REG_FLD_MOD(rfld.reg, val, rfld.high, rfld.low); } @@ -357,29 +365,20 @@ static void dispc_save_context(void) if (dss_has_feature(FEAT_CORE_CLK_DIV)) SR(DIVISOR); - dispc.ctx_loss_cnt = dss_get_ctx_loss_count(); dispc.ctx_valid = true; - DSSDBG("context saved, ctx_loss_count %d\n", dispc.ctx_loss_cnt); + DSSDBG("context saved\n"); } static void dispc_restore_context(void) { - int i, j, ctx; + int i, j; DSSDBG("dispc_restore_context\n"); if (!dispc.ctx_valid) return; - ctx = dss_get_ctx_loss_count(); - - if (ctx >= 0 && ctx == dispc.ctx_loss_cnt) - return; - - DSSDBG("ctx_loss_count: saved %d, current %d\n", - dispc.ctx_loss_cnt, ctx); - /*RR(IRQENABLE);*/ /*RR(CONTROL);*/ RR(CONFIG); @@ -2884,7 +2883,7 @@ bool dispc_mgr_timings_ok(enum omap_channel channel, timings_ok = _dispc_mgr_size_ok(timings->x_res, timings->y_res); - timings_ok &= _dispc_mgr_pclk_ok(channel, timings->pixel_clock * 1000); + timings_ok &= _dispc_mgr_pclk_ok(channel, timings->pixelclock); if (dss_mgr_is_lcd(channel)) { timings_ok &= _dispc_lcd_timings_ok(timings->hsw, timings->hfp, @@ -2979,10 +2978,10 @@ void dispc_mgr_set_timings(enum omap_channel channel, xtot = t.x_res + t.hfp + t.hsw + t.hbp; ytot = t.y_res + t.vfp + t.vsw + t.vbp; - ht = (timings->pixel_clock * 1000) / xtot; - vt = (timings->pixel_clock * 1000) / xtot / ytot; + ht = timings->pixelclock / xtot; + vt = timings->pixelclock / xtot / ytot; - DSSDBG("pck %u\n", timings->pixel_clock); + DSSDBG("pck %u\n", timings->pixelclock); DSSDBG("hsw %d hfp %d hbp %d vsw %d vfp %d vbp %d\n", t.hsw, t.hfp, t.hbp, t.vsw, t.vfp, t.vbp); DSSDBG("vsync_level %d hsync_level %d data_pclk_edge %d de_level %d sync_pclk_edge %d\n", @@ -3680,16 +3679,44 @@ static int __init dispc_init_features(struct platform_device *pdev) return 0; } +static irqreturn_t dispc_irq_handler(int irq, void *arg) +{ + if (!dispc.is_enabled) + return IRQ_NONE; + + return dispc.user_handler(irq, dispc.user_data); +} + int dispc_request_irq(irq_handler_t handler, void *dev_id) { - return devm_request_irq(&dispc.pdev->dev, dispc.irq, handler, - IRQF_SHARED, "OMAP DISPC", dev_id); + int r; + + if (dispc.user_handler != NULL) + return -EBUSY; + + dispc.user_handler = handler; + dispc.user_data = dev_id; + + /* ensure the dispc_irq_handler sees the values above */ + smp_wmb(); + + r = devm_request_irq(&dispc.pdev->dev, dispc.irq, dispc_irq_handler, + IRQF_SHARED, "OMAP DISPC", &dispc); + if (r) { + dispc.user_handler = NULL; + dispc.user_data = NULL; + } + + return r; } EXPORT_SYMBOL(dispc_request_irq); void dispc_free_irq(void *dev_id) { - devm_free_irq(&dispc.pdev->dev, dispc.irq, dev_id); + devm_free_irq(&dispc.pdev->dev, dispc.irq, &dispc); + + dispc.user_handler = NULL; + dispc.user_data = NULL; } EXPORT_SYMBOL(dispc_free_irq); @@ -3761,6 +3788,12 @@ static int __exit omap_dispchw_remove(struct platform_device *pdev) static int dispc_runtime_suspend(struct device *dev) { + dispc.is_enabled = false; + /* ensure the dispc_irq_handler sees the is_enabled value */ + smp_wmb(); + /* wait for current handler to finish before turning the DISPC off */ + synchronize_irq(dispc.irq); + dispc_save_context(); return 0; @@ -3768,9 +3801,21 @@ static int dispc_runtime_suspend(struct device *dev) static int dispc_runtime_resume(struct device *dev) { - _omap_dispc_initial_config(); + /* + * The reset value for load mode is 0 (OMAP_DSS_LOAD_CLUT_AND_FRAME) + * but we always initialize it to 2 (OMAP_DSS_LOAD_FRAME_ONLY) in + * _omap_dispc_initial_config(). We can thus use it to detect if + * we have lost register context. + */ + if (REG_GET(DISPC_CONFIG, 2, 1) != OMAP_DSS_LOAD_FRAME_ONLY) { + _omap_dispc_initial_config(); - dispc_restore_context(); + dispc_restore_context(); + } + + dispc.is_enabled = true; + /* ensure the dispc_irq_handler sees the is_enabled value */ + smp_wmb(); return 0; } @@ -3780,12 +3825,20 @@ static const struct dev_pm_ops dispc_pm_ops = { .runtime_resume = dispc_runtime_resume, }; +static const struct of_device_id dispc_of_match[] = { + { .compatible = "ti,omap2-dispc", }, + { .compatible = "ti,omap3-dispc", }, + { .compatible = "ti,omap4-dispc", }, + {}, +}; + static struct platform_driver omap_dispchw_driver = { .remove = __exit_p(omap_dispchw_remove), .driver = { .name = "omapdss_dispc", .owner = THIS_MODULE, .pm = &dispc_pm_ops, + .of_match_table = dispc_of_match, }, }; |
