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-rw-r--r--drivers/pinctrl/meson/pinctrl-meson-gxbb.c199
-rw-r--r--drivers/pinctrl/meson/pinctrl-meson.c222
-rw-r--r--drivers/pinctrl/meson/pinctrl-meson.h52
-rw-r--r--drivers/pinctrl/meson/pinctrl-meson8.c24
-rw-r--r--drivers/pinctrl/meson/pinctrl-meson8b.c24
5 files changed, 293 insertions, 228 deletions
diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
index cb4d6ad30530..c3928aa3fefa 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
@@ -156,6 +156,11 @@ static const unsigned int emmc_clk_pins[] = { PIN(BOOT_8, EE_OFF) };
static const unsigned int emmc_cmd_pins[] = { PIN(BOOT_10, EE_OFF) };
static const unsigned int emmc_ds_pins[] = { PIN(BOOT_15, EE_OFF) };
+static const unsigned int nor_d_pins[] = { PIN(BOOT_11, EE_OFF) };
+static const unsigned int nor_q_pins[] = { PIN(BOOT_12, EE_OFF) };
+static const unsigned int nor_c_pins[] = { PIN(BOOT_13, EE_OFF) };
+static const unsigned int nor_cs_pins[] = { PIN(BOOT_15, EE_OFF) };
+
static const unsigned int sdcard_d0_pins[] = { PIN(CARD_1, EE_OFF) };
static const unsigned int sdcard_d1_pins[] = { PIN(CARD_0, EE_OFF) };
static const unsigned int sdcard_d2_pins[] = { PIN(CARD_5, EE_OFF) };
@@ -163,6 +168,23 @@ static const unsigned int sdcard_d3_pins[] = { PIN(CARD_4, EE_OFF) };
static const unsigned int sdcard_cmd_pins[] = { PIN(CARD_3, EE_OFF) };
static const unsigned int sdcard_clk_pins[] = { PIN(CARD_2, EE_OFF) };
+static const unsigned int sdio_d0_pins[] = { PIN(GPIOX_0, EE_OFF) };
+static const unsigned int sdio_d1_pins[] = { PIN(GPIOX_1, EE_OFF) };
+static const unsigned int sdio_d2_pins[] = { PIN(GPIOX_2, EE_OFF) };
+static const unsigned int sdio_d3_pins[] = { PIN(GPIOX_3, EE_OFF) };
+static const unsigned int sdio_cmd_pins[] = { PIN(GPIOX_4, EE_OFF) };
+static const unsigned int sdio_clk_pins[] = { PIN(GPIOX_5, EE_OFF) };
+static const unsigned int sdio_irq_pins[] = { PIN(GPIOX_7, EE_OFF) };
+
+static const unsigned int nand_ce0_pins[] = { PIN(BOOT_8, EE_OFF) };
+static const unsigned int nand_ce1_pins[] = { PIN(BOOT_9, EE_OFF) };
+static const unsigned int nand_rb0_pins[] = { PIN(BOOT_10, EE_OFF) };
+static const unsigned int nand_ale_pins[] = { PIN(BOOT_11, EE_OFF) };
+static const unsigned int nand_cle_pins[] = { PIN(BOOT_12, EE_OFF) };
+static const unsigned int nand_wen_clk_pins[] = { PIN(BOOT_13, EE_OFF) };
+static const unsigned int nand_ren_wr_pins[] = { PIN(BOOT_14, EE_OFF) };
+static const unsigned int nand_dqs_pins[] = { PIN(BOOT_15, EE_OFF) };
+
static const unsigned int uart_tx_a_pins[] = { PIN(GPIOX_12, EE_OFF) };
static const unsigned int uart_rx_a_pins[] = { PIN(GPIOX_13, EE_OFF) };
static const unsigned int uart_cts_a_pins[] = { PIN(GPIOX_14, EE_OFF) };
@@ -178,6 +200,15 @@ static const unsigned int uart_rx_c_pins[] = { PIN(GPIOY_14, EE_OFF) };
static const unsigned int uart_cts_c_pins[] = { PIN(GPIOX_11, EE_OFF) };
static const unsigned int uart_rts_c_pins[] = { PIN(GPIOX_12, EE_OFF) };
+static const unsigned int i2c_sck_a_pins[] = { PIN(GPIODV_25, EE_OFF) };
+static const unsigned int i2c_sda_a_pins[] = { PIN(GPIODV_24, EE_OFF) };
+
+static const unsigned int i2c_sck_b_pins[] = { PIN(GPIODV_27, EE_OFF) };
+static const unsigned int i2c_sda_b_pins[] = { PIN(GPIODV_26, EE_OFF) };
+
+static const unsigned int i2c_sck_c_pins[] = { PIN(GPIODV_29, EE_OFF) };
+static const unsigned int i2c_sda_c_pins[] = { PIN(GPIODV_28, EE_OFF) };
+
static const unsigned int eth_mdio_pins[] = { PIN(GPIOZ_0, EE_OFF) };
static const unsigned int eth_mdc_pins[] = { PIN(GPIOZ_1, EE_OFF) };
static const unsigned int eth_clk_rx_clk_pins[] = { PIN(GPIOZ_2, EE_OFF) };
@@ -193,6 +224,14 @@ static const unsigned int eth_txd1_pins[] = { PIN(GPIOZ_11, EE_OFF) };
static const unsigned int eth_txd2_pins[] = { PIN(GPIOZ_12, EE_OFF) };
static const unsigned int eth_txd3_pins[] = { PIN(GPIOZ_13, EE_OFF) };
+static const unsigned int pwm_a_x_pins[] = { PIN(GPIOX_6, EE_OFF) };
+static const unsigned int pwm_a_y_pins[] = { PIN(GPIOY_16, EE_OFF) };
+static const unsigned int pwm_b_pins[] = { PIN(GPIODV_29, EE_OFF) };
+static const unsigned int pwm_d_pins[] = { PIN(GPIODV_28, EE_OFF) };
+static const unsigned int pwm_e_pins[] = { PIN(GPIOX_19, EE_OFF) };
+static const unsigned int pwm_f_x_pins[] = { PIN(GPIOX_7, EE_OFF) };
+static const unsigned int pwm_f_y_pins[] = { PIN(GPIOY_15, EE_OFF) };
+
static const struct pinctrl_pin_desc meson_gxbb_aobus_pins[] = {
MESON_PIN(GPIOAO_0, 0),
MESON_PIN(GPIOAO_1, 0),
@@ -225,6 +264,13 @@ static const unsigned int i2c_sda_ao_pins[] = {PIN(GPIOAO_5, 0) };
static const unsigned int i2c_slave_sck_ao_pins[] = {PIN(GPIOAO_4, 0) };
static const unsigned int i2c_slave_sda_ao_pins[] = {PIN(GPIOAO_5, 0) };
+static const unsigned int remote_input_ao_pins[] = {PIN(GPIOAO_7, 0) };
+
+static const unsigned int pwm_ao_a_3_pins[] = { PIN(GPIOAO_3, 0) };
+static const unsigned int pwm_ao_a_6_pins[] = { PIN(GPIOAO_6, 0) };
+static const unsigned int pwm_ao_a_12_pins[] = { PIN(GPIOAO_12, 0) };
+static const unsigned int pwm_ao_b_pins[] = { PIN(GPIOAO_13, 0) };
+
static struct meson_pmx_group meson_gxbb_periphs_groups[] = {
GPIO_GROUP(GPIOZ_0, EE_OFF),
GPIO_GROUP(GPIOZ_1, EE_OFF),
@@ -355,16 +401,28 @@ static struct meson_pmx_group meson_gxbb_periphs_groups[] = {
GPIO_GROUP(GPIO_TEST_N, EE_OFF),
/* Bank X */
+ GROUP(sdio_d0, 8, 5),
+ GROUP(sdio_d1, 8, 4),
+ GROUP(sdio_d2, 8, 3),
+ GROUP(sdio_d3, 8, 2),
+ GROUP(sdio_cmd, 8, 1),
+ GROUP(sdio_clk, 8, 0),
+ GROUP(sdio_irq, 8, 11),
GROUP(uart_tx_a, 4, 13),
GROUP(uart_rx_a, 4, 12),
GROUP(uart_cts_a, 4, 11),
GROUP(uart_rts_a, 4, 10),
+ GROUP(pwm_a_x, 3, 17),
+ GROUP(pwm_e, 2, 30),
+ GROUP(pwm_f_x, 3, 18),
/* Bank Y */
GROUP(uart_cts_c, 1, 19),
GROUP(uart_rts_c, 1, 18),
GROUP(uart_tx_c, 1, 17),
GROUP(uart_rx_c, 1, 16),
+ GROUP(pwm_a_y, 1, 21),
+ GROUP(pwm_f_y, 1, 20),
/* Bank Z */
GROUP(eth_mdio, 6, 1),
@@ -387,12 +445,32 @@ static struct meson_pmx_group meson_gxbb_periphs_groups[] = {
GROUP(uart_rx_b, 2, 28),
GROUP(uart_cts_b, 2, 27),
GROUP(uart_rts_b, 2, 26),
+ GROUP(pwm_b, 3, 21),
+ GROUP(pwm_d, 3, 20),
+ GROUP(i2c_sck_a, 7, 27),
+ GROUP(i2c_sda_a, 7, 26),
+ GROUP(i2c_sck_b, 7, 25),
+ GROUP(i2c_sda_b, 7, 24),
+ GROUP(i2c_sck_c, 7, 23),
+ GROUP(i2c_sda_c, 7, 22),
/* Bank BOOT */
GROUP(emmc_nand_d07, 4, 30),
GROUP(emmc_clk, 4, 18),
GROUP(emmc_cmd, 4, 19),
GROUP(emmc_ds, 4, 31),
+ GROUP(nor_d, 5, 1),
+ GROUP(nor_q, 5, 3),
+ GROUP(nor_c, 5, 2),
+ GROUP(nor_cs, 5, 0),
+ GROUP(nand_ce0, 4, 26),
+ GROUP(nand_ce1, 4, 27),
+ GROUP(nand_rb0, 4, 25),
+ GROUP(nand_ale, 4, 24),
+ GROUP(nand_cle, 4, 23),
+ GROUP(nand_wen_clk, 4, 22),
+ GROUP(nand_ren_wr, 4, 21),
+ GROUP(nand_dqs, 4, 20),
/* Bank CARD */
GROUP(sdcard_d1, 2, 14),
@@ -432,6 +510,11 @@ static struct meson_pmx_group meson_gxbb_aobus_groups[] = {
GROUP(i2c_sda_ao, 0, 5),
GROUP(i2c_slave_sck_ao, 0, 2),
GROUP(i2c_slave_sda_ao, 0, 1),
+ GROUP(remote_input_ao, 0, 0),
+ GROUP(pwm_ao_a_3, 0, 22),
+ GROUP(pwm_ao_a_6, 0, 18),
+ GROUP(pwm_ao_a_12, 0, 17),
+ GROUP(pwm_ao_b, 0, 3),
};
static const char * const gpio_periphs_groups[] = {
@@ -475,11 +558,25 @@ static const char * const emmc_groups[] = {
"emmc_nand_d07", "emmc_clk", "emmc_cmd", "emmc_ds",
};
+static const char * const nor_groups[] = {
+ "nor_d", "nor_q", "nor_c", "nor_cs",
+};
+
static const char * const sdcard_groups[] = {
"sdcard_d0", "sdcard_d1", "sdcard_d2", "sdcard_d3",
"sdcard_cmd", "sdcard_clk",
};
+static const char * const sdio_groups[] = {
+ "sdio_d0", "sdio_d1", "sdio_d2", "sdio_d3",
+ "sdio_cmd", "sdio_clk", "sdio_irq",
+};
+
+static const char * const nand_groups[] = {
+ "nand_ce0", "nand_ce1", "nand_rb0", "nand_ale", "nand_cle",
+ "nand_wen_clk", "nand_ren_wr", "nand_dqs",
+};
+
static const char * const uart_a_groups[] = {
"uart_tx_a", "uart_rx_a", "uart_cts_a", "uart_rts_a",
};
@@ -492,6 +589,18 @@ static const char * const uart_c_groups[] = {
"uart_tx_c", "uart_rx_c", "uart_cts_c", "uart_rts_c",
};
+static const char * const i2c_a_groups[] = {
+ "i2c_sck_a", "i2c_sda_a",
+};
+
+static const char * const i2c_b_groups[] = {
+ "i2c_sck_b", "i2c_sda_b",
+};
+
+static const char * const i2c_c_groups[] = {
+ "i2c_sck_c", "i2c_sda_c",
+};
+
static const char * const eth_groups[] = {
"eth_mdio", "eth_mdc", "eth_clk_rx_clk", "eth_rx_dv",
"eth_rxd0", "eth_rxd1", "eth_rxd2", "eth_rxd3",
@@ -499,6 +608,34 @@ static const char * const eth_groups[] = {
"eth_txd0", "eth_txd1", "eth_txd2", "eth_txd3",
};
+static const char * const pwm_a_x_groups[] = {
+ "pwm_a_x",
+};
+
+static const char * const pwm_a_y_groups[] = {
+ "pwm_a_y",
+};
+
+static const char * const pwm_b_groups[] = {
+ "pwm_b",
+};
+
+static const char * const pwm_d_groups[] = {
+ "pwm_d",
+};
+
+static const char * const pwm_e_groups[] = {
+ "pwm_e",
+};
+
+static const char * const pwm_f_x_groups[] = {
+ "pwm_f_x",
+};
+
+static const char * const pwm_f_y_groups[] = {
+ "pwm_f_y",
+};
+
static const char * const gpio_aobus_groups[] = {
"GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4",
"GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9",
@@ -521,14 +658,47 @@ static const char * const i2c_slave_ao_groups[] = {
"i2c_slave_sdk_ao", "i2c_slave_sda_ao",
};
+static const char * const remote_input_ao_groups[] = {
+ "remote_input_ao",
+};
+
+static const char * const pwm_ao_a_3_groups[] = {
+ "pwm_ao_a_3",
+};
+
+static const char * const pwm_ao_a_6_groups[] = {
+ "pwm_ao_a_6",
+};
+
+static const char * const pwm_ao_a_12_groups[] = {
+ "pwm_ao_a_12",
+};
+
+static const char * const pwm_ao_b_groups[] = {
+ "pwm_ao_b",
+};
+
static struct meson_pmx_func meson_gxbb_periphs_functions[] = {
FUNCTION(gpio_periphs),
FUNCTION(emmc),
+ FUNCTION(nor),
FUNCTION(sdcard),
+ FUNCTION(sdio),
+ FUNCTION(nand),
FUNCTION(uart_a),
FUNCTION(uart_b),
FUNCTION(uart_c),
+ FUNCTION(i2c_a),
+ FUNCTION(i2c_b),
+ FUNCTION(i2c_c),
FUNCTION(eth),
+ FUNCTION(pwm_a_x),
+ FUNCTION(pwm_a_y),
+ FUNCTION(pwm_b),
+ FUNCTION(pwm_d),
+ FUNCTION(pwm_e),
+ FUNCTION(pwm_f_x),
+ FUNCTION(pwm_f_y),
};
static struct meson_pmx_func meson_gxbb_aobus_functions[] = {
@@ -537,6 +707,11 @@ static struct meson_pmx_func meson_gxbb_aobus_functions[] = {
FUNCTION(uart_ao_b),
FUNCTION(i2c_ao),
FUNCTION(i2c_slave_ao),
+ FUNCTION(remote_input_ao),
+ FUNCTION(pwm_ao_a_3),
+ FUNCTION(pwm_ao_a_6),
+ FUNCTION(pwm_ao_a_12),
+ FUNCTION(pwm_ao_b),
};
static struct meson_bank meson_gxbb_periphs_banks[] = {
@@ -556,38 +731,28 @@ static struct meson_bank meson_gxbb_aobus_banks[] = {
BANK("AO", PIN(GPIOAO_0, 0), PIN(GPIOAO_13, 0), 0, 0, 0, 16, 0, 0, 0, 16, 1, 0),
};
-static struct meson_domain_data meson_gxbb_periphs_domain_data = {
+struct meson_pinctrl_data meson_gxbb_periphs_pinctrl_data = {
.name = "periphs-banks",
- .banks = meson_gxbb_periphs_banks,
- .num_banks = ARRAY_SIZE(meson_gxbb_periphs_banks),
.pin_base = 14,
- .num_pins = 120,
-};
-
-static struct meson_domain_data meson_gxbb_aobus_domain_data = {
- .name = "aobus-banks",
- .banks = meson_gxbb_aobus_banks,
- .num_banks = ARRAY_SIZE(meson_gxbb_aobus_banks),
- .pin_base = 0,
- .num_pins = 14,
-};
-
-struct meson_pinctrl_data meson_gxbb_periphs_pinctrl_data = {
.pins = meson_gxbb_periphs_pins,
.groups = meson_gxbb_periphs_groups,
.funcs = meson_gxbb_periphs_functions,
- .domain_data = &meson_gxbb_periphs_domain_data,
+ .banks = meson_gxbb_periphs_banks,
.num_pins = ARRAY_SIZE(meson_gxbb_periphs_pins),
.num_groups = ARRAY_SIZE(meson_gxbb_periphs_groups),
.num_funcs = ARRAY_SIZE(meson_gxbb_periphs_functions),
+ .num_banks = ARRAY_SIZE(meson_gxbb_periphs_banks),
};
struct meson_pinctrl_data meson_gxbb_aobus_pinctrl_data = {
+ .name = "aobus-banks",
+ .pin_base = 0,
.pins = meson_gxbb_aobus_pins,
.groups = meson_gxbb_aobus_groups,
.funcs = meson_gxbb_aobus_functions,
- .domain_data = &meson_gxbb_aobus_domain_data,
+ .banks = meson_gxbb_aobus_banks,
.num_pins = ARRAY_SIZE(meson_gxbb_aobus_pins),
.num_groups = ARRAY_SIZE(meson_gxbb_aobus_groups),
.num_funcs = ARRAY_SIZE(meson_gxbb_aobus_functions),
+ .num_banks = ARRAY_SIZE(meson_gxbb_aobus_banks),
};
diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c
index 44e69c963f5d..57122eda155a 100644
--- a/drivers/pinctrl/meson/pinctrl-meson.c
+++ b/drivers/pinctrl/meson/pinctrl-meson.c
@@ -21,9 +21,8 @@
* domain which can't be powered off; the bank also uses a set of
* registers different from the other banks.
*
- * For each of the two power domains (regular and always-on) there are
- * 4 different register ranges that control the following properties
- * of the pins:
+ * For each pin controller there are 4 different register ranges that
+ * control the following properties of the pins:
* 1) pin muxing
* 2) pull enable/disable
* 3) pull up/down
@@ -33,8 +32,8 @@
* direction are the same and thus there are only 3 register ranges.
*
* Every pinmux group can be enabled by a specific bit in the first
- * register range of the domain; when all groups for a given pin are
- * disabled the pin acts as a GPIO.
+ * register range; when all groups for a given pin are disabled the
+ * pin acts as a GPIO.
*
* For the pull and GPIO configuration every bank uses a contiguous
* set of bits in the register sets described above; the same register
@@ -66,21 +65,21 @@
/**
* meson_get_bank() - find the bank containing a given pin
*
- * @domain: the domain containing the pin
+ * @pc: the pinctrl instance
* @pin: the pin number
* @bank: the found bank
*
* Return: 0 on success, a negative value on error
*/
-static int meson_get_bank(struct meson_domain *domain, unsigned int pin,
+static int meson_get_bank(struct meson_pinctrl *pc, unsigned int pin,
struct meson_bank **bank)
{
int i;
- for (i = 0; i < domain->data->num_banks; i++) {
- if (pin >= domain->data->banks[i].first &&
- pin <= domain->data->banks[i].last) {
- *bank = &domain->data->banks[i];
+ for (i = 0; i < pc->data->num_banks; i++) {
+ if (pin >= pc->data->banks[i].first &&
+ pin <= pc->data->banks[i].last) {
+ *bank = &pc->data->banks[i];
return 0;
}
}
@@ -89,33 +88,6 @@ static int meson_get_bank(struct meson_domain *domain, unsigned int pin,
}
/**
- * meson_get_domain_and_bank() - find domain and bank containing a given pin
- *
- * @pc: Meson pin controller device
- * @pin: the pin number
- * @domain: the found domain
- * @bank: the found bank
- *
- * Return: 0 on success, a negative value on error
- */
-static int meson_get_domain_and_bank(struct meson_pinctrl *pc, unsigned int pin,
- struct meson_domain **domain,
- struct meson_bank **bank)
-{
- struct meson_domain *d;
-
- d = pc->domain;
-
- if (pin >= d->data->pin_base &&
- pin < d->data->pin_base + d->data->num_pins) {
- *domain = d;
- return meson_get_bank(d, pin, bank);
- }
-
- return -EINVAL;
-}
-
-/**
* meson_calc_reg_and_bit() - calculate register and bit for a pin
*
* @bank: the bank containing the pin
@@ -190,7 +162,6 @@ static void meson_pmx_disable_other_groups(struct meson_pinctrl *pc,
unsigned int pin, int sel_group)
{
struct meson_pmx_group *group;
- struct meson_domain *domain;
int i, j;
for (i = 0; i < pc->data->num_groups; i++) {
@@ -201,8 +172,7 @@ static void meson_pmx_disable_other_groups(struct meson_pinctrl *pc,
for (j = 0; j < group->num_pins; j++) {
if (group->pins[j] == pin) {
/* We have found a group using the pin */
- domain = pc->domain;
- regmap_update_bits(domain->reg_mux,
+ regmap_update_bits(pc->reg_mux,
group->reg * 4,
BIT(group->bit), 0);
}
@@ -216,7 +186,6 @@ static int meson_pmx_set_mux(struct pinctrl_dev *pcdev, unsigned func_num,
struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
struct meson_pmx_func *func = &pc->data->funcs[func_num];
struct meson_pmx_group *group = &pc->data->groups[group_num];
- struct meson_domain *domain = pc->domain;
int i, ret = 0;
dev_dbg(pc->dev, "enable function %s, group %s\n", func->name,
@@ -231,7 +200,7 @@ static int meson_pmx_set_mux(struct pinctrl_dev *pcdev, unsigned func_num,
/* Function 0 (GPIO) doesn't need any additional setting */
if (func_num)
- ret = regmap_update_bits(domain->reg_mux, group->reg * 4,
+ ret = regmap_update_bits(pc->reg_mux, group->reg * 4,
BIT(group->bit), BIT(group->bit));
return ret;
@@ -287,14 +256,13 @@ static int meson_pinconf_set(struct pinctrl_dev *pcdev, unsigned int pin,
unsigned long *configs, unsigned num_configs)
{
struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
- struct meson_domain *domain;
struct meson_bank *bank;
enum pin_config_param param;
unsigned int reg, bit;
int i, ret;
u16 arg;
- ret = meson_get_domain_and_bank(pc, pin, &domain, &bank);
+ ret = meson_get_bank(pc, pin, &bank);
if (ret)
return ret;
@@ -307,7 +275,7 @@ static int meson_pinconf_set(struct pinctrl_dev *pcdev, unsigned int pin,
dev_dbg(pc->dev, "pin %u: disable bias\n", pin);
meson_calc_reg_and_bit(bank, pin, REG_PULL, &reg, &bit);
- ret = regmap_update_bits(domain->reg_pull, reg,
+ ret = regmap_update_bits(pc->reg_pull, reg,
BIT(bit), 0);
if (ret)
return ret;
@@ -317,13 +285,13 @@ static int meson_pinconf_set(struct pinctrl_dev *pcdev, unsigned int pin,
meson_calc_reg_and_bit(bank, pin, REG_PULLEN,
&reg, &bit);
- ret = regmap_update_bits(domain->reg_pullen, reg,
+ ret = regmap_update_bits(pc->reg_pullen, reg,
BIT(bit), BIT(bit));
if (ret)
return ret;
meson_calc_reg_and_bit(bank, pin, REG_PULL, &reg, &bit);
- ret = regmap_update_bits(domain->reg_pull, reg,
+ ret = regmap_update_bits(pc->reg_pull, reg,
BIT(bit), BIT(bit));
if (ret)
return ret;
@@ -333,13 +301,13 @@ static int meson_pinconf_set(struct pinctrl_dev *pcdev, unsigned int pin,
meson_calc_reg_and_bit(bank, pin, REG_PULLEN,
&reg, &bit);
- ret = regmap_update_bits(domain->reg_pullen, reg,
+ ret = regmap_update_bits(pc->reg_pullen, reg,
BIT(bit), BIT(bit));
if (ret)
return ret;
meson_calc_reg_and_bit(bank, pin, REG_PULL, &reg, &bit);
- ret = regmap_update_bits(domain->reg_pull, reg,
+ ret = regmap_update_bits(pc->reg_pull, reg,
BIT(bit), 0);
if (ret)
return ret;
@@ -354,18 +322,17 @@ static int meson_pinconf_set(struct pinctrl_dev *pcdev, unsigned int pin,
static int meson_pinconf_get_pull(struct meson_pinctrl *pc, unsigned int pin)
{
- struct meson_domain *domain;
struct meson_bank *bank;
unsigned int reg, bit, val;
int ret, conf;
- ret = meson_get_domain_and_bank(pc, pin, &domain, &bank);
+ ret = meson_get_bank(pc, pin, &bank);
if (ret)
return ret;
meson_calc_reg_and_bit(bank, pin, REG_PULLEN, &reg, &bit);
- ret = regmap_read(domain->reg_pullen, reg, &val);
+ ret = regmap_read(pc->reg_pullen, reg, &val);
if (ret)
return ret;
@@ -374,7 +341,7 @@ static int meson_pinconf_get_pull(struct meson_pinctrl *pc, unsigned int pin)
} else {
meson_calc_reg_and_bit(bank, pin, REG_PULL, &reg, &bit);
- ret = regmap_read(domain->reg_pull, reg, &val);
+ ret = regmap_read(pc->reg_pull, reg, &val);
if (ret)
return ret;
@@ -452,82 +419,82 @@ static int meson_gpio_request(struct gpio_chip *chip, unsigned gpio)
static void meson_gpio_free(struct gpio_chip *chip, unsigned gpio)
{
- struct meson_domain *domain = gpiochip_get_data(chip);
+ struct meson_pinctrl *pc = gpiochip_get_data(chip);
- pinctrl_free_gpio(domain->data->pin_base + gpio);
+ pinctrl_free_gpio(pc->data->pin_base + gpio);
}
static int meson_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
{
- struct meson_domain *domain = gpiochip_get_data(chip);
+ struct meson_pinctrl *pc = gpiochip_get_data(chip);
unsigned int reg, bit, pin;
struct meson_bank *bank;
int ret;
- pin = domain->data->pin_base + gpio;
- ret = meson_get_bank(domain, pin, &bank);
+ pin = pc->data->pin_base + gpio;
+ ret = meson_get_bank(pc, pin, &bank);
if (ret)
return ret;
meson_calc_reg_and_bit(bank, pin, REG_DIR, &reg, &bit);
- return regmap_update_bits(domain->reg_gpio, reg, BIT(bit), BIT(bit));
+ return regmap_update_bits(pc->reg_gpio, reg, BIT(bit), BIT(bit));
}
static int meson_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
int value)
{
- struct meson_domain *domain = gpiochip_get_data(chip);
+ struct meson_pinctrl *pc = gpiochip_get_data(chip);
unsigned int reg, bit, pin;
struct meson_bank *bank;
int ret;
- pin = domain->data->pin_base + gpio;
- ret = meson_get_bank(domain, pin, &bank);
+ pin = pc->data->pin_base + gpio;
+ ret = meson_get_bank(pc, pin, &bank);
if (ret)
return ret;
meson_calc_reg_and_bit(bank, pin, REG_DIR, &reg, &bit);
- ret = regmap_update_bits(domain->reg_gpio, reg, BIT(bit), 0);
+ ret = regmap_update_bits(pc->reg_gpio, reg, BIT(bit), 0);
if (ret)
return ret;
meson_calc_reg_and_bit(bank, pin, REG_OUT, &reg, &bit);
- return regmap_update_bits(domain->reg_gpio, reg, BIT(bit),
+ return regmap_update_bits(pc->reg_gpio, reg, BIT(bit),
value ? BIT(bit) : 0);
}
static void meson_gpio_set(struct gpio_chip *chip, unsigned gpio, int value)
{
- struct meson_domain *domain = gpiochip_get_data(chip);
+ struct meson_pinctrl *pc = gpiochip_get_data(chip);
unsigned int reg, bit, pin;
struct meson_bank *bank;
int ret;
- pin = domain->data->pin_base + gpio;
- ret = meson_get_bank(domain, pin, &bank);
+ pin = pc->data->pin_base + gpio;
+ ret = meson_get_bank(pc, pin, &bank);
if (ret)
return;
meson_calc_reg_and_bit(bank, pin, REG_OUT, &reg, &bit);
- regmap_update_bits(domain->reg_gpio, reg, BIT(bit),
+ regmap_update_bits(pc->reg_gpio, reg, BIT(bit),
value ? BIT(bit) : 0);
}
static int meson_gpio_get(struct gpio_chip *chip, unsigned gpio)
{
- struct meson_domain *domain = gpiochip_get_data(chip);
+ struct meson_pinctrl *pc = gpiochip_get_data(chip);
unsigned int reg, bit, val, pin;
struct meson_bank *bank;
int ret;
- pin = domain->data->pin_base + gpio;
- ret = meson_get_bank(domain, pin, &bank);
+ pin = pc->data->pin_base + gpio;
+ ret = meson_get_bank(pc, pin, &bank);
if (ret)
return ret;
meson_calc_reg_and_bit(bank, pin, REG_IN, &reg, &bit);
- regmap_read(domain->reg_gpio, reg, &val);
+ regmap_read(pc->reg_gpio, reg, &val);
return !!(val & BIT(bit));
}
@@ -562,35 +529,32 @@ static const struct of_device_id meson_pinctrl_dt_match[] = {
static int meson_gpiolib_register(struct meson_pinctrl *pc)
{
- struct meson_domain *domain;
int ret;
- domain = pc->domain;
-
- domain->chip.label = domain->data->name;
- domain->chip.parent = pc->dev;
- domain->chip.request = meson_gpio_request;
- domain->chip.free = meson_gpio_free;
- domain->chip.direction_input = meson_gpio_direction_input;
- domain->chip.direction_output = meson_gpio_direction_output;
- domain->chip.get = meson_gpio_get;
- domain->chip.set = meson_gpio_set;
- domain->chip.base = domain->data->pin_base;
- domain->chip.ngpio = domain->data->num_pins;
- domain->chip.can_sleep = false;
- domain->chip.of_node = domain->of_node;
- domain->chip.of_gpio_n_cells = 2;
-
- ret = gpiochip_add_data(&domain->chip, domain);
+ pc->chip.label = pc->data->name;
+ pc->chip.parent = pc->dev;
+ pc->chip.request = meson_gpio_request;
+ pc->chip.free = meson_gpio_free;
+ pc->chip.direction_input = meson_gpio_direction_input;
+ pc->chip.direction_output = meson_gpio_direction_output;
+ pc->chip.get = meson_gpio_get;
+ pc->chip.set = meson_gpio_set;
+ pc->chip.base = pc->data->pin_base;
+ pc->chip.ngpio = pc->data->num_pins;
+ pc->chip.can_sleep = false;
+ pc->chip.of_node = pc->of_node;
+ pc->chip.of_gpio_n_cells = 2;
+
+ ret = gpiochip_add_data(&pc->chip, pc);
if (ret) {
dev_err(pc->dev, "can't add gpio chip %s\n",
- domain->data->name);
+ pc->data->name);
goto fail;
}
- ret = gpiochip_add_pin_range(&domain->chip, dev_name(pc->dev),
- 0, domain->data->pin_base,
- domain->chip.ngpio);
+ ret = gpiochip_add_pin_range(&pc->chip, dev_name(pc->dev),
+ 0, pc->data->pin_base,
+ pc->chip.ngpio);
if (ret) {
dev_err(pc->dev, "can't add pin range\n");
goto fail;
@@ -598,7 +562,7 @@ static int meson_gpiolib_register(struct meson_pinctrl *pc)
return 0;
fail:
- gpiochip_remove(&pc->domain->chip);
+ gpiochip_remove(&pc->chip);
return ret;
}
@@ -637,58 +601,46 @@ static struct regmap *meson_map_resource(struct meson_pinctrl *pc,
static int meson_pinctrl_parse_dt(struct meson_pinctrl *pc,
struct device_node *node)
{
- struct device_node *np;
- struct meson_domain *domain;
- int num_domains = 0;
+ struct device_node *np, *gpio_np = NULL;
for_each_child_of_node(node, np) {
if (!of_find_property(np, "gpio-controller", NULL))
continue;
- num_domains++;
+ if (gpio_np) {
+ dev_err(pc->dev, "multiple gpio nodes\n");
+ return -EINVAL;
+ }
+ gpio_np = np;
}
- if (num_domains != 1) {
- dev_err(pc->dev, "wrong number of subnodes\n");
+ if (!gpio_np) {
+ dev_err(pc->dev, "no gpio node found\n");
return -EINVAL;
}
- pc->domain = devm_kzalloc(pc->dev, sizeof(struct meson_domain), GFP_KERNEL);
- if (!pc->domain)
- return -ENOMEM;
-
- domain = pc->domain;
- domain->data = pc->data->domain_data;
-
- for_each_child_of_node(node, np) {
- if (!of_find_property(np, "gpio-controller", NULL))
- continue;
-
- domain->of_node = np;
+ pc->of_node = gpio_np;
- domain->reg_mux = meson_map_resource(pc, np, "mux");
- if (IS_ERR(domain->reg_mux)) {
- dev_err(pc->dev, "mux registers not found\n");
- return PTR_ERR(domain->reg_mux);
- }
-
- domain->reg_pull = meson_map_resource(pc, np, "pull");
- if (IS_ERR(domain->reg_pull)) {
- dev_err(pc->dev, "pull registers not found\n");
- return PTR_ERR(domain->reg_pull);
- }
+ pc->reg_mux = meson_map_resource(pc, gpio_np, "mux");
+ if (IS_ERR(pc->reg_mux)) {
+ dev_err(pc->dev, "mux registers not found\n");
+ return PTR_ERR(pc->reg_mux);
+ }
- domain->reg_pullen = meson_map_resource(pc, np, "pull-enable");
- /* Use pull region if pull-enable one is not present */
- if (IS_ERR(domain->reg_pullen))
- domain->reg_pullen = domain->reg_pull;
+ pc->reg_pull = meson_map_resource(pc, gpio_np, "pull");
+ if (IS_ERR(pc->reg_pull)) {
+ dev_err(pc->dev, "pull registers not found\n");
+ return PTR_ERR(pc->reg_pull);
+ }
- domain->reg_gpio = meson_map_resource(pc, np, "gpio");
- if (IS_ERR(domain->reg_gpio)) {
- dev_err(pc->dev, "gpio registers not found\n");
- return PTR_ERR(domain->reg_gpio);
- }
+ pc->reg_pullen = meson_map_resource(pc, gpio_np, "pull-enable");
+ /* Use pull region if pull-enable one is not present */
+ if (IS_ERR(pc->reg_pullen))
+ pc->reg_pullen = pc->reg_pull;
- break;
+ pc->reg_gpio = meson_map_resource(pc, gpio_np, "gpio");
+ if (IS_ERR(pc->reg_gpio)) {
+ dev_err(pc->dev, "gpio registers not found\n");
+ return PTR_ERR(pc->reg_gpio);
}
return 0;
diff --git a/drivers/pinctrl/meson/pinctrl-meson.h b/drivers/pinctrl/meson/pinctrl-meson.h
index d89442ea4a4d..98b5080650c1 100644
--- a/drivers/pinctrl/meson/pinctrl-meson.h
+++ b/drivers/pinctrl/meson/pinctrl-meson.h
@@ -95,54 +95,17 @@ struct meson_bank {
struct meson_reg_desc regs[NUM_REG];
};
-/**
- * struct meson_domain_data - domain platform data
- *
- * @name: name of the domain
- * @banks: set of banks belonging to the domain
- * @num_banks: number of banks in the domain
- */
-struct meson_domain_data {
- const char *name;
- struct meson_bank *banks;
- unsigned int num_banks;
- unsigned int pin_base;
- unsigned int num_pins;
-};
-
-/**
- * struct meson_domain
- *
- * @reg_mux: registers for mux settings
- * @reg_pullen: registers for pull-enable settings
- * @reg_pull: registers for pull settings
- * @reg_gpio: registers for gpio settings
- * @chip: gpio chip associated with the domain
- * @data; platform data for the domain
- * @node: device tree node for the domain
- *
- * A domain represents a set of banks controlled by the same set of
- * registers.
- */
-struct meson_domain {
- struct regmap *reg_mux;
- struct regmap *reg_pullen;
- struct regmap *reg_pull;
- struct regmap *reg_gpio;
-
- struct gpio_chip chip;
- struct meson_domain_data *data;
- struct device_node *of_node;
-};
-
struct meson_pinctrl_data {
+ const char *name;
const struct pinctrl_pin_desc *pins;
struct meson_pmx_group *groups;
struct meson_pmx_func *funcs;
- struct meson_domain_data *domain_data;
+ unsigned int pin_base;
unsigned int num_pins;
unsigned int num_groups;
unsigned int num_funcs;
+ struct meson_bank *banks;
+ unsigned int num_banks;
};
struct meson_pinctrl {
@@ -150,7 +113,12 @@ struct meson_pinctrl {
struct pinctrl_dev *pcdev;
struct pinctrl_desc desc;
struct meson_pinctrl_data *data;
- struct meson_domain *domain;
+ struct regmap *reg_mux;
+ struct regmap *reg_pullen;
+ struct regmap *reg_pull;
+ struct regmap *reg_gpio;
+ struct gpio_chip chip;
+ struct device_node *of_node;
};
#define PIN(x, b) (b + x)
diff --git a/drivers/pinctrl/meson/pinctrl-meson8.c b/drivers/pinctrl/meson/pinctrl-meson8.c
index 32de191e0807..07f1cb21c1b8 100644
--- a/drivers/pinctrl/meson/pinctrl-meson8.c
+++ b/drivers/pinctrl/meson/pinctrl-meson8.c
@@ -931,38 +931,28 @@ static struct meson_bank meson8_aobus_banks[] = {
BANK("AO", PIN(GPIOAO_0, AO_OFF), PIN(GPIO_TEST_N, AO_OFF), 0, 0, 0, 16, 0, 0, 0, 16, 1, 0),
};
-static struct meson_domain_data meson8_cbus_domain_data = {
+struct meson_pinctrl_data meson8_cbus_pinctrl_data = {
.name = "cbus-banks",
- .banks = meson8_cbus_banks,
- .num_banks = ARRAY_SIZE(meson8_cbus_banks),
.pin_base = 0,
- .num_pins = 120,
-};
-
-static struct meson_domain_data meson8_aobus_domain_data = {
- .name = "ao-bank",
- .banks = meson8_aobus_banks,
- .num_banks = ARRAY_SIZE(meson8_aobus_banks),
- .pin_base = 120,
- .num_pins = 16,
-};
-
-struct meson_pinctrl_data meson8_cbus_pinctrl_data = {
.pins = meson8_cbus_pins,
.groups = meson8_cbus_groups,
.funcs = meson8_cbus_functions,
- .domain_data = &meson8_cbus_domain_data,
+ .banks = meson8_cbus_banks,
.num_pins = ARRAY_SIZE(meson8_cbus_pins),
.num_groups = ARRAY_SIZE(meson8_cbus_groups),
.num_funcs = ARRAY_SIZE(meson8_cbus_functions),
+ .num_banks = ARRAY_SIZE(meson8_cbus_banks),
};
struct meson_pinctrl_data meson8_aobus_pinctrl_data = {
+ .name = "ao-bank",
+ .pin_base = 120,
.pins = meson8_aobus_pins,
.groups = meson8_aobus_groups,
.funcs = meson8_aobus_functions,
- .domain_data = &meson8_aobus_domain_data,
+ .banks = meson8_aobus_banks,
.num_pins = ARRAY_SIZE(meson8_aobus_pins),
.num_groups = ARRAY_SIZE(meson8_aobus_groups),
.num_funcs = ARRAY_SIZE(meson8_aobus_functions),
+ .num_banks = ARRAY_SIZE(meson8_aobus_banks),
};
diff --git a/drivers/pinctrl/meson/pinctrl-meson8b.c b/drivers/pinctrl/meson/pinctrl-meson8b.c
index 874f2edf8be3..76f077f18193 100644
--- a/drivers/pinctrl/meson/pinctrl-meson8b.c
+++ b/drivers/pinctrl/meson/pinctrl-meson8b.c
@@ -896,38 +896,28 @@ static struct meson_bank meson8b_aobus_banks[] = {
BANK("AO", PIN(GPIOAO_0, AO_OFF), PIN(GPIO_TEST_N, AO_OFF), 0, 0, 0, 16, 0, 0, 0, 16, 1, 0),
};
-static struct meson_domain_data meson8b_cbus_domain_data = {
+struct meson_pinctrl_data meson8b_cbus_pinctrl_data = {
.name = "cbus-banks",
- .banks = meson8b_cbus_banks,
- .num_banks = ARRAY_SIZE(meson8b_cbus_banks),
.pin_base = 0,
- .num_pins = 130,
-};
-
-static struct meson_domain_data meson8b_aobus_domain_data = {
- .name = "aobus-banks",
- .banks = meson8b_aobus_banks,
- .num_banks = ARRAY_SIZE(meson8b_aobus_banks),
- .pin_base = 130,
- .num_pins = 16,
-};
-
-struct meson_pinctrl_data meson8b_cbus_pinctrl_data = {
.pins = meson8b_cbus_pins,
.groups = meson8b_cbus_groups,
.funcs = meson8b_cbus_functions,
- .domain_data = &meson8b_cbus_domain_data,
+ .banks = meson8b_cbus_banks,
.num_pins = ARRAY_SIZE(meson8b_cbus_pins),
.num_groups = ARRAY_SIZE(meson8b_cbus_groups),
.num_funcs = ARRAY_SIZE(meson8b_cbus_functions),
+ .num_banks = ARRAY_SIZE(meson8b_cbus_banks),
};
struct meson_pinctrl_data meson8b_aobus_pinctrl_data = {
+ .name = "aobus-banks",
+ .pin_base = 130,
.pins = meson8b_aobus_pins,
.groups = meson8b_aobus_groups,
.funcs = meson8b_aobus_functions,
- .domain_data = &meson8b_aobus_domain_data,
+ .banks = meson8b_aobus_banks,
.num_pins = ARRAY_SIZE(meson8b_aobus_pins),
.num_groups = ARRAY_SIZE(meson8b_aobus_groups),
.num_funcs = ARRAY_SIZE(meson8b_aobus_functions),
+ .num_banks = ARRAY_SIZE(meson8b_aobus_banks),
};
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