diff options
Diffstat (limited to 'drivers/gpu/drm/sti')
| -rw-r--r-- | drivers/gpu/drm/sti/Kconfig | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/sti/Makefile | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/sti/sti_awg_utils.c | 182 | ||||
| -rw-r--r-- | drivers/gpu/drm/sti/sti_awg_utils.h | 34 | ||||
| -rw-r--r-- | drivers/gpu/drm/sti/sti_drm_crtc.c | 181 | ||||
| -rw-r--r-- | drivers/gpu/drm/sti/sti_drm_drv.c | 86 | ||||
| -rw-r--r-- | drivers/gpu/drm/sti/sti_drm_drv.h | 6 | ||||
| -rw-r--r-- | drivers/gpu/drm/sti/sti_drm_plane.c | 66 | ||||
| -rw-r--r-- | drivers/gpu/drm/sti/sti_dvo.c | 564 | ||||
| -rw-r--r-- | drivers/gpu/drm/sti/sti_gdp.c | 11 | ||||
| -rw-r--r-- | drivers/gpu/drm/sti/sti_hda.c | 17 | ||||
| -rw-r--r-- | drivers/gpu/drm/sti/sti_hdmi.c | 196 | ||||
| -rw-r--r-- | drivers/gpu/drm/sti/sti_hqvdp.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/sti/sti_tvout.c | 118 |
14 files changed, 1257 insertions, 213 deletions
diff --git a/drivers/gpu/drm/sti/Kconfig b/drivers/gpu/drm/sti/Kconfig index d6d6b705b8c1..fbccc105819b 100644 --- a/drivers/gpu/drm/sti/Kconfig +++ b/drivers/gpu/drm/sti/Kconfig @@ -1,10 +1,11 @@ config DRM_STI tristate "DRM Support for STMicroelectronics SoC stiH41x Series" - depends on DRM && (SOC_STIH415 || SOC_STIH416 || ARCH_MULTIPLATFORM) + depends on DRM && (SOC_STIH415 || SOC_STIH416 || ARCH_MULTIPLATFORM) && HAVE_DMA_ATTRS select RESET_CONTROLLER select DRM_KMS_HELPER select DRM_GEM_CMA_HELPER select DRM_KMS_CMA_HELPER + select DRM_PANEL select FW_LOADER_USER_HELPER_FALLBACK help Choose this option to enable DRM on STM stiH41x chipset diff --git a/drivers/gpu/drm/sti/Makefile b/drivers/gpu/drm/sti/Makefile index 6ba9d27c1b90..f0f1e4ee2d92 100644 --- a/drivers/gpu/drm/sti/Makefile +++ b/drivers/gpu/drm/sti/Makefile @@ -12,6 +12,9 @@ stihdmi-y := sti_hdmi.o \ sti_hdmi_tx3g0c55phy.o \ sti_hdmi_tx3g4c28phy.o \ +stidvo-y := sti_dvo.o \ + sti_awg_utils.o + obj-$(CONFIG_DRM_STI) = \ sti_vtg.o \ sti_vtac.o \ @@ -20,4 +23,5 @@ obj-$(CONFIG_DRM_STI) = \ sti_tvout.o \ sticompositor.o \ sti_hqvdp.o \ + stidvo.o \ sti_drm_drv.o diff --git a/drivers/gpu/drm/sti/sti_awg_utils.c b/drivers/gpu/drm/sti/sti_awg_utils.c new file mode 100644 index 000000000000..6029a2e3db1d --- /dev/null +++ b/drivers/gpu/drm/sti/sti_awg_utils.c @@ -0,0 +1,182 @@ +/* + * Copyright (C) STMicroelectronics SA 2014 + * Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics. + * License terms: GNU General Public License (GPL), version 2 + */ + +#include "sti_awg_utils.h" + +#define AWG_OPCODE_OFFSET 10 + +enum opcode { + SET, + RPTSET, + RPLSET, + SKIP, + STOP, + REPEAT, + REPLAY, + JUMP, + HOLD, +}; + +static int awg_generate_instr(enum opcode opcode, + long int arg, + long int mux_sel, + long int data_en, + struct awg_code_generation_params *fwparams) +{ + u32 instruction = 0; + u32 mux = (mux_sel << 8) & 0x1ff; + u32 data_enable = (data_en << 9) & 0x2ff; + long int arg_tmp = arg; + + /* skip, repeat and replay arg should not exceed 1023. + * If user wants to exceed this value, the instruction should be + * duplicate and arg should be adjust for each duplicated instruction. + */ + + while (arg_tmp > 0) { + arg = arg_tmp; + if (fwparams->instruction_offset >= AWG_MAX_INST) { + DRM_ERROR("too many number of instructions\n"); + return -EINVAL; + } + + switch (opcode) { + case SKIP: + /* leave 'arg' + 1 pixel elapsing without changing + * output bus */ + arg--; /* pixel adjustment */ + arg_tmp--; + + if (arg < 0) { + /* SKIP instruction not needed */ + return 0; + } + + if (arg == 0) { + /* SKIP 0 not permitted but we want to skip 1 + * pixel. So we transform SKIP into SET + * instruction */ + opcode = SET; + break; + } + + mux = 0; + data_enable = 0; + arg = (arg << 22) >> 22; + arg &= (0x3ff); + break; + case REPEAT: + case REPLAY: + if (arg == 0) { + /* REPEAT or REPLAY instruction not needed */ + return 0; + } + + mux = 0; + data_enable = 0; + arg = (arg << 22) >> 22; + arg &= (0x3ff); + break; + case JUMP: + mux = 0; + data_enable = 0; + arg |= 0x40; /* for jump instruction 7th bit is 1 */ + arg = (arg << 22) >> 22; + arg &= 0x3ff; + break; + case STOP: + arg = 0; + break; + case SET: + case RPTSET: + case RPLSET: + case HOLD: + arg = (arg << 24) >> 24; + arg &= (0x0ff); + break; + default: + DRM_ERROR("instruction %d does not exist\n", opcode); + return -EINVAL; + } + + arg_tmp = arg_tmp - arg; + + arg = ((arg + mux) + data_enable); + + instruction = ((opcode) << AWG_OPCODE_OFFSET) | arg; + fwparams->ram_code[fwparams->instruction_offset] = + instruction & (0x3fff); + fwparams->instruction_offset++; + } + return 0; +} + +int sti_awg_generate_code_data_enable_mode( + struct awg_code_generation_params *fwparams, + struct awg_timing *timing) +{ + long int val; + long int data_en; + int ret = 0; + + if (timing->trailing_lines > 0) { + /* skip trailing lines */ + val = timing->blanking_level; + data_en = 0; + ret |= awg_generate_instr(RPLSET, val, 0, data_en, fwparams); + + val = timing->trailing_lines - 1; + data_en = 0; + ret |= awg_generate_instr(REPLAY, val, 0, data_en, fwparams); + } + + if (timing->trailing_pixels > 0) { + /* skip trailing pixel */ + val = timing->blanking_level; + data_en = 0; + ret |= awg_generate_instr(RPLSET, val, 0, data_en, fwparams); + + val = timing->trailing_pixels - 1; + data_en = 0; + ret |= awg_generate_instr(SKIP, val, 0, data_en, fwparams); + } + + /* set DE signal high */ + val = timing->blanking_level; + data_en = 1; + ret |= awg_generate_instr((timing->trailing_pixels > 0) ? SET : RPLSET, + val, 0, data_en, fwparams); + + if (timing->blanking_pixels > 0) { + /* skip the number of active pixel */ + val = timing->active_pixels - 1; + data_en = 1; + ret |= awg_generate_instr(SKIP, val, 0, data_en, fwparams); + + /* set DE signal low */ + val = timing->blanking_level; + data_en = 0; + ret |= awg_generate_instr(SET, val, 0, data_en, fwparams); + } + + /* replay the sequence as many active lines defined */ + val = timing->active_lines - 1; + data_en = 0; + ret |= awg_generate_instr(REPLAY, val, 0, data_en, fwparams); + + if (timing->blanking_lines > 0) { + /* skip blanking lines */ + val = timing->blanking_level; + data_en = 0; + ret |= awg_generate_instr(RPLSET, val, 0, data_en, fwparams); + + val = timing->blanking_lines - 1; + data_en = 0; + ret |= awg_generate_instr(REPLAY, val, 0, data_en, fwparams); + } + + return ret; +} diff --git a/drivers/gpu/drm/sti/sti_awg_utils.h b/drivers/gpu/drm/sti/sti_awg_utils.h new file mode 100644 index 000000000000..45d599bd570a --- /dev/null +++ b/drivers/gpu/drm/sti/sti_awg_utils.h @@ -0,0 +1,34 @@ +/* + * Copyright (C) STMicroelectronics SA 2014 + * Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics. + * License terms: GNU General Public License (GPL), version 2 + */ + +#ifndef _STI_AWG_UTILS_H_ +#define _STI_AWG_UTILS_H_ + +#include <drm/drmP.h> + +#define AWG_MAX_INST 64 + +struct awg_code_generation_params { + u32 *ram_code; + u8 instruction_offset; +}; + +struct awg_timing { + u32 total_lines; + u32 active_lines; + u32 blanking_lines; + u32 trailing_lines; + u32 total_pixels; + u32 active_pixels; + u32 blanking_pixels; + u32 trailing_pixels; + u32 blanking_level; +}; + +int sti_awg_generate_code_data_enable_mode( + struct awg_code_generation_params *fw_gen_params, + struct awg_timing *timing); +#endif diff --git a/drivers/gpu/drm/sti/sti_drm_crtc.c b/drivers/gpu/drm/sti/sti_drm_crtc.c index 4c651c200f20..6b641c5a2ec7 100644 --- a/drivers/gpu/drm/sti/sti_drm_crtc.c +++ b/drivers/gpu/drm/sti/sti_drm_crtc.c @@ -9,6 +9,8 @@ #include <linux/clk.h> #include <drm/drmP.h> +#include <drm/drm_atomic.h> +#include <drm/drm_atomic_helper.h> #include <drm/drm_crtc_helper.h> #include <drm/drm_plane_helper.h> @@ -77,22 +79,18 @@ static bool sti_drm_crtc_mode_fixup(struct drm_crtc *crtc, } static int -sti_drm_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode, int x, int y, - struct drm_framebuffer *old_fb) +sti_drm_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode) { struct sti_mixer *mixer = to_sti_mixer(crtc); struct device *dev = mixer->dev; struct sti_compositor *compo = dev_get_drvdata(dev); - struct sti_layer *layer; struct clk *clk; int rate = mode->clock * 1000; int res; - unsigned int w, h; - DRM_DEBUG_KMS("CRTC:%d (%s) fb:%d mode:%d (%s)\n", + DRM_DEBUG_KMS("CRTC:%d (%s) mode:%d (%s)\n", crtc->base.id, sti_mixer_to_str(mixer), - crtc->primary->fb->base.id, mode->base.id, mode->name); + mode->base.id, mode->name); DRM_DEBUG_KMS("%d %d %d %d %d %d %d %d %d %d 0x%x 0x%x\n", mode->vrefresh, mode->clock, @@ -122,77 +120,13 @@ sti_drm_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode, sti_vtg_set_config(mixer->id == STI_MIXER_MAIN ? compo->vtg_main : compo->vtg_aux, &crtc->mode); - /* a GDP is reserved to the CRTC FB */ - layer = to_sti_layer(crtc->primary); - if (!layer) { - DRM_ERROR("Can not find GDP0)\n"); - return -EINVAL; - } - - /* copy the mode data adjusted by mode_fixup() into crtc->mode - * so that hardware can be set to proper mode - */ - memcpy(&crtc->mode, adjusted_mode, sizeof(*adjusted_mode)); - - res = sti_mixer_set_layer_depth(mixer, layer); - if (res) { - DRM_ERROR("Can not set layer depth\n"); - return -EINVAL; - } res = sti_mixer_active_video_area(mixer, &crtc->mode); if (res) { DRM_ERROR("Can not set active video area\n"); return -EINVAL; } - w = crtc->primary->fb->width - x; - h = crtc->primary->fb->height - y; - - return sti_layer_prepare(layer, crtc, - crtc->primary->fb, &crtc->mode, - mixer->id, 0, 0, w, h, x, y, w, h); -} - -static int sti_drm_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y, - struct drm_framebuffer *old_fb) -{ - struct sti_mixer *mixer = to_sti_mixer(crtc); - struct sti_layer *layer; - unsigned int w, h; - int ret; - - DRM_DEBUG_KMS("CRTC:%d (%s) fb:%d (%d,%d)\n", - crtc->base.id, sti_mixer_to_str(mixer), - crtc->primary->fb->base.id, x, y); - - /* GDP is reserved to the CRTC FB */ - layer = to_sti_layer(crtc->primary); - if (!layer) { - DRM_ERROR("Can not find GDP0)\n"); - ret = -EINVAL; - goto out; - } - - w = crtc->primary->fb->width - crtc->x; - h = crtc->primary->fb->height - crtc->y; - - ret = sti_layer_prepare(layer, crtc, - crtc->primary->fb, &crtc->mode, - mixer->id, 0, 0, w, h, - crtc->x, crtc->y, w, h); - if (ret) { - DRM_ERROR("Can not prepare layer\n"); - goto out; - } - - sti_drm_crtc_commit(crtc); -out: - return ret; -} - -static void sti_drm_crtc_load_lut(struct drm_crtc *crtc) -{ - /* do nothing */ + return res; } static void sti_drm_crtc_disable(struct drm_crtc *crtc) @@ -200,7 +134,6 @@ static void sti_drm_crtc_disable(struct drm_crtc *crtc) struct sti_mixer *mixer = to_sti_mixer(crtc); struct device *dev = mixer->dev; struct sti_compositor *compo = dev_get_drvdata(dev); - struct sti_layer *layer; if (!mixer->enabled) return; @@ -210,24 +143,6 @@ static void sti_drm_crtc_disable(struct drm_crtc *crtc) /* Disable Background */ sti_mixer_set_background_status(mixer, false); - /* Disable GDP */ - layer = to_sti_layer(crtc->primary); - if (!layer) { - DRM_ERROR("Cannot find GDP0\n"); - return; - } - - /* Disable layer at mixer level */ - if (sti_mixer_set_layer_status(mixer, layer, false)) - DRM_ERROR("Can not disable %s layer at mixer\n", - sti_layer_to_str(layer)); - - /* Wait a while to be sure that a Vsync event is received */ - msleep(WAIT_NEXT_VSYNC_MS); - - /* Then disable layer itself */ - sti_layer_disable(layer); - drm_crtc_vblank_off(crtc); /* Disable pixel clock and compo IP clocks */ @@ -242,65 +157,44 @@ static void sti_drm_crtc_disable(struct drm_crtc *crtc) mixer->enabled = false; } -static struct drm_crtc_helper_funcs sti_crtc_helper_funcs = { - .dpms = sti_drm_crtc_dpms, - .prepare = sti_drm_crtc_prepare, - .commit = sti_drm_crtc_commit, - .mode_fixup = sti_drm_crtc_mode_fixup, - .mode_set = sti_drm_crtc_mode_set, - .mode_set_base = sti_drm_crtc_mode_set_base, - .load_lut = sti_drm_crtc_load_lut, - .disable = sti_drm_crtc_disable, -}; +static void +sti_drm_crtc_mode_set_nofb(struct drm_crtc *crtc) +{ + sti_drm_crtc_prepare(crtc); + sti_drm_crtc_mode_set(crtc, &crtc->state->adjusted_mode); +} -static int sti_drm_crtc_page_flip(struct drm_crtc *crtc, - struct drm_framebuffer *fb, - struct drm_pending_vblank_event *event, - uint32_t page_flip_flags) +static void sti_drm_atomic_begin(struct drm_crtc *crtc) { - struct drm_device *drm_dev = crtc->dev; - struct drm_framebuffer *old_fb; struct sti_mixer *mixer = to_sti_mixer(crtc); - unsigned long flags; - int ret; - DRM_DEBUG_KMS("fb %d --> fb %d\n", - crtc->primary->fb->base.id, fb->base.id); + if (crtc->state->event) { + crtc->state->event->pipe = drm_crtc_index(crtc); - mutex_lock(&drm_dev->struct_mutex); + WARN_ON(drm_crtc_vblank_get(crtc) != 0); - old_fb = crtc->primary->fb; - crtc->primary->fb = fb; - ret = sti_drm_crtc_mode_set_base(crtc, crtc->x, crtc->y, old_fb); - if (ret) { - DRM_ERROR("failed\n"); - crtc->primary->fb = old_fb; - goto out; + mixer->pending_event = crtc->state->event; + crtc->state->event = NULL; } +} - if (event) { - event->pipe = mixer->id; - - ret = drm_vblank_get(drm_dev, event->pipe); - if (ret) { - DRM_ERROR("Cannot get vblank\n"); - goto out; - } - - spin_lock_irqsave(&drm_dev->event_lock, flags); - if (mixer->pending_event) { - drm_vblank_put(drm_dev, event->pipe); - ret = -EBUSY; - } else { - mixer->pending_event = event; - } - spin_unlock_irqrestore(&drm_dev->event_lock, flags); - } -out: - mutex_unlock(&drm_dev->struct_mutex); - return ret; +static void sti_drm_atomic_flush(struct drm_crtc *crtc) +{ } +static struct drm_crtc_helper_funcs sti_crtc_helper_funcs = { + .dpms = sti_drm_crtc_dpms, + .prepare = sti_drm_crtc_prepare, + .commit = sti_drm_crtc_commit, + .mode_fixup = sti_drm_crtc_mode_fixup, + .mode_set = drm_helper_crtc_mode_set, + .mode_set_nofb = sti_drm_crtc_mode_set_nofb, + .mode_set_base = drm_helper_crtc_mode_set_base, + .disable = sti_drm_crtc_disable, + .atomic_begin = sti_drm_atomic_begin, + .atomic_flush = sti_drm_atomic_flush, +}; + static void sti_drm_crtc_destroy(struct drm_crtc *crtc) { DRM_DEBUG_KMS("\n"); @@ -386,10 +280,13 @@ void sti_drm_crtc_disable_vblank(struct drm_device *dev, int crtc) EXPORT_SYMBOL(sti_drm_crtc_disable_vblank); static struct drm_crtc_funcs sti_crtc_funcs = { - .set_config = drm_crtc_helper_set_config, - .page_flip = sti_drm_crtc_page_flip, + .set_config = drm_atomic_helper_set_config, + .page_flip = drm_atomic_helper_page_flip, .destroy = sti_drm_crtc_destroy, .set_property = sti_drm_crtc_set_property, + .reset = drm_atomic_helper_crtc_reset, + .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state, + .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, }; bool sti_drm_crtc_is_main(struct drm_crtc *crtc) diff --git a/drivers/gpu/drm/sti/sti_drm_drv.c b/drivers/gpu/drm/sti/sti_drm_drv.c index 5239fa121726..59d558b400b3 100644 --- a/drivers/gpu/drm/sti/sti_drm_drv.c +++ b/drivers/gpu/drm/sti/sti_drm_drv.c @@ -12,6 +12,8 @@ #include <linux/module.h> #include <linux/of_platform.h> +#include <drm/drm_atomic.h> +#include <drm/drm_atomic_helper.h> #include <drm/drm_crtc_helper.h> #include <drm/drm_gem_cma_helper.h> #include <drm/drm_fb_cma_helper.h> @@ -28,8 +30,87 @@ #define STI_MAX_FB_HEIGHT 4096 #define STI_MAX_FB_WIDTH 4096 +static void sti_drm_atomic_schedule(struct sti_drm_private *private, + struct drm_atomic_state *state) +{ + private->commit.state = state; + schedule_work(&private->commit.work); +} + +static void sti_drm_atomic_complete(struct sti_drm_private *private, + struct drm_atomic_state *state) +{ + struct drm_device *drm = private->drm_dev; + + /* + * Everything below can be run asynchronously without the need to grab + * any modeset locks at all under one condition: It must be guaranteed + * that the asynchronous work has either been cancelled (if the driver + * supports it, which at least requires that the framebuffers get + * cleaned up with drm_atomic_helper_cleanup_planes()) or completed + * before the new state gets committed on the software side with + * drm_atomic_helper_swap_state(). + * + * This scheme allows new atomic state updates to be prepared and + * checked in parallel to the asynchronous completion of the previous + * update. Which is important since compositors need to figure out the + * composition of the next frame right after having submitted the + * current layout. + */ + + drm_atomic_helper_commit_modeset_disables(drm, state); + drm_atomic_helper_commit_planes(drm, state); + drm_atomic_helper_commit_modeset_enables(drm, state); + + drm_atomic_helper_wait_for_vblanks(drm, state); + + drm_atomic_helper_cleanup_planes(drm, state); + drm_atomic_state_free(state); +} + +static void sti_drm_atomic_work(struct work_struct *work) +{ + struct sti_drm_private *private = container_of(work, + struct sti_drm_private, commit.work); + + sti_drm_atomic_complete(private, private->commit.state); +} + +static int sti_drm_atomic_commit(struct drm_device *drm, + struct drm_atomic_state *state, bool async) +{ + struct sti_drm_private *private = drm->dev_private; + int err; + + err = drm_atomic_helper_prepare_planes(drm, state); + if (err) + return err; + + /* serialize outstanding asynchronous commits */ + mutex_lock(&private->commit.lock); + flush_work(&private->commit.work); + + /* + * This is the point of no return - everything below never fails except + * when the hw goes bonghits. Which means we can commit the new state on + * the software side now. + */ + + drm_atomic_helper_swap_state(drm, state); + + if (async) + sti_drm_atomic_schedule(private, state); + else + sti_drm_atomic_complete(private, state); + + mutex_unlock(&private->commit.lock); + return 0; +} + static struct drm_mode_config_funcs sti_drm_mode_config_funcs = { .fb_create = drm_fb_cma_create, + .atomic_check = drm_atomic_helper_check, + .atomic_commit = sti_drm_atomic_commit, }; static void sti_drm_mode_config_init(struct drm_device *dev) @@ -61,6 +142,9 @@ static int sti_drm_load(struct drm_device *dev, unsigned long flags) dev->dev_private = (void *)private; private->drm_dev = dev; + mutex_init(&private->commit.lock); + INIT_WORK(&private->commit.work, sti_drm_atomic_work); + drm_mode_config_init(dev); drm_kms_helper_poll_init(dev); @@ -74,7 +158,7 @@ static int sti_drm_load(struct drm_device *dev, unsigned long flags) return ret; } - drm_helper_disable_unused_functions(dev); + drm_mode_config_reset(dev); #ifdef CONFIG_DRM_STI_FBDEV drm_fbdev_cma_init(dev, 32, diff --git a/drivers/gpu/drm/sti/sti_drm_drv.h b/drivers/gpu/drm/sti/sti_drm_drv.h index ec5e2eb8dff9..c413aa3ff402 100644 --- a/drivers/gpu/drm/sti/sti_drm_drv.h +++ b/drivers/gpu/drm/sti/sti_drm_drv.h @@ -24,6 +24,12 @@ struct sti_drm_private { struct sti_compositor *compo; struct drm_property *plane_zorder_property; struct drm_device *drm_dev; + + struct { + struct drm_atomic_state *state; + struct work_struct work; + struct mutex lock; + } commit; }; #endif diff --git a/drivers/gpu/drm/sti/sti_drm_plane.c b/drivers/gpu/drm/sti/sti_drm_plane.c index bb6a29339e10..64d4ed43dda3 100644 --- a/drivers/gpu/drm/sti/sti_drm_plane.c +++ b/drivers/gpu/drm/sti/sti_drm_plane.c @@ -6,6 +6,10 @@ * License terms: GNU General Public License (GPL), version 2 */ +#include <drm/drmP.h> +#include <drm/drm_atomic_helper.h> +#include <drm/drm_plane_helper.h> + #include "sti_compositor.h" #include "sti_drm_drv.h" #include "sti_drm_plane.h" @@ -33,9 +37,9 @@ sti_drm_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, struct sti_mixer *mixer = to_sti_mixer(crtc); int res; - DRM_DEBUG_KMS("CRTC:%d (%s) drm plane:%d (%s) drm fb:%d\n", + DRM_DEBUG_KMS("CRTC:%d (%s) drm plane:%d (%s)\n", crtc->base.id, sti_mixer_to_str(mixer), - plane->base.id, sti_layer_to_str(layer), fb->base.id); + plane->base.id, sti_layer_to_str(layer)); DRM_DEBUG_KMS("(%dx%d)@(%d,%d)\n", crtc_w, crtc_h, crtc_x, crtc_y); res = sti_mixer_set_layer_depth(mixer, layer); @@ -110,7 +114,7 @@ static void sti_drm_plane_destroy(struct drm_plane *plane) { DRM_DEBUG_DRIVER("\n"); - sti_drm_disable_plane(plane); + drm_plane_helper_disable(plane); drm_plane_cleanup(plane); } @@ -133,10 +137,58 @@ static int sti_drm_plane_set_property(struct drm_plane *plane, } static struct drm_plane_funcs sti_drm_plane_funcs = { - .update_plane = sti_drm_update_plane, - .disable_plane = sti_drm_disable_plane, + .update_plane = drm_atomic_helper_update_plane, + .disable_plane = drm_atomic_helper_disable_plane, .destroy = sti_drm_plane_destroy, .set_property = sti_drm_plane_set_property, + .reset = drm_atomic_helper_plane_reset, + .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state, + .atomic_destroy_state = drm_atomic_helper_plane_destroy_state, +}; + +static int sti_drm_plane_prepare_fb(struct drm_plane *plane, + struct drm_framebuffer *fb, + const struct drm_plane_state *new_state) +{ + return 0; +} + +static void sti_drm_plane_cleanup_fb(struct drm_plane *plane, + struct drm_framebuffer *fb, + const struct drm_plane_state *old_fb) +{ +} + +static int sti_drm_plane_atomic_check(struct drm_plane *plane, + struct drm_plane_state *state) +{ + return 0; +} + +static void sti_drm_plane_atomic_update(struct drm_plane *plane, + struct drm_plane_state *oldstate) +{ + struct drm_plane_state *state = plane->state; + + sti_drm_update_plane(plane, state->crtc, state->fb, + state->crtc_x, state->crtc_y, + state->crtc_w, state->crtc_h, + state->src_x, state->src_y, + state->src_w, state->src_h); +} + +static void sti_drm_plane_atomic_disable(struct drm_plane *plane, + struct drm_plane_state *oldstate) +{ + sti_drm_disable_plane(plane); +} + +static const struct drm_plane_helper_funcs sti_drm_plane_helpers_funcs = { + .prepare_fb = sti_drm_plane_prepare_fb, + .cleanup_fb = sti_drm_plane_cleanup_fb, + .atomic_check = sti_drm_plane_atomic_check, + .atomic_update = sti_drm_plane_atomic_update, + .atomic_disable = sti_drm_plane_atomic_disable, }; static void sti_drm_plane_attach_zorder_property(struct drm_plane *plane, @@ -178,11 +230,13 @@ struct drm_plane *sti_drm_plane_init(struct drm_device *dev, return NULL; } + drm_plane_helper_add(&layer->plane, &sti_drm_plane_helpers_funcs); + for (i = 0; i < ARRAY_SIZE(sti_layer_default_zorder); i++) if (sti_layer_default_zorder[i] == layer->desc) break; - default_zorder = i; + default_zorder = i + 1; if (type == DRM_PLANE_TYPE_OVERLAY) sti_drm_plane_attach_zorder_property(&layer->plane, diff --git a/drivers/gpu/drm/sti/sti_dvo.c b/drivers/gpu/drm/sti/sti_dvo.c new file mode 100644 index 000000000000..a9b678af85a6 --- /dev/null +++ b/drivers/gpu/drm/sti/sti_dvo.c @@ -0,0 +1,564 @@ +/* + * Copyright (C) STMicroelectronics SA 2014 + * Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics. + * License terms: GNU General Public License (GPL), version 2 + */ + +#include <linux/clk.h> +#include <linux/component.h> +#include <linux/module.h> +#include <linux/of_gpio.h> +#include <linux/platform_device.h> + +#include <drm/drmP.h> +#include <drm/drm_atomic_helper.h> +#include <drm/drm_crtc_helper.h> +#include <drm/drm_panel.h> + +#include "sti_awg_utils.h" +#include "sti_mixer.h" + +/* DVO registers */ +#define DVO_AWG_DIGSYNC_CTRL 0x0000 +#define DVO_DOF_CFG 0x0004 +#define DVO_LUT_PROG_LOW 0x0008 +#define DVO_LUT_PROG_MID 0x000C +#define DVO_LUT_PROG_HIGH 0x0010 +#define DVO_DIGSYNC_INSTR_I 0x0100 + +#define DVO_AWG_CTRL_EN BIT(0) +#define DVO_AWG_FRAME_BASED_SYNC BIT(2) + +#define DVO_DOF_EN_LOWBYTE BIT(0) +#define DVO_DOF_EN_MIDBYTE BIT(1) +#define DVO_DOF_EN_HIGHBYTE BIT(2) +#define DVO_DOF_EN BIT(6) +#define DVO_DOF_MOD_COUNT_SHIFT 8 + +#define DVO_LUT_ZERO 0 +#define DVO_LUT_Y_G 1 +#define DVO_LUT_Y_G_DEL 2 +#define DVO_LUT_CB_B 3 +#define DVO_LUT_CB_B_DEL 4 +#define DVO_LUT_CR_R 5 +#define DVO_LUT_CR_R_DEL 6 +#define DVO_LUT_HOLD 7 + +struct dvo_config { + u32 flags; + u32 lowbyte; + u32 midbyte; + u32 highbyte; + int (*awg_fwgen_fct)( + struct awg_code_generation_params *fw_gen_params, + struct awg_timing *timing); +}; + +static struct dvo_config rgb_24bit_de_cfg = { + .flags = (0L << DVO_DOF_MOD_COUNT_SHIFT), + .lowbyte = DVO_LUT_CR_R, + .midbyte = DVO_LUT_Y_G, + .highbyte = DVO_LUT_CB_B, + .awg_fwgen_fct = sti_awg_generate_code_data_enable_mode, +}; + +/** + * STI digital video output structure + * + * @dev: driver device + * @drm_dev: pointer to drm device + * @mode: current display mode selected + * @regs: dvo registers + * @clk_pix: pixel clock for dvo + * @clk: clock for dvo + * @clk_main_parent: dvo parent clock if main path used + * @clk_aux_parent: dvo parent clock if aux path used + * @panel_node: panel node reference from device tree + * @panel: reference to the panel connected to the dvo + * @enabled: true if dvo is enabled else false + * @encoder: drm_encoder it is bound + */ +struct sti_dvo { + struct device dev; + struct drm_device *drm_dev; + struct drm_display_mode mode; + void __iomem *regs; + struct clk *clk_pix; + struct clk *clk; + struct clk *clk_main_parent; + struct clk *clk_aux_parent; + struct device_node *panel_node; + struct drm_panel *panel; + struct dvo_config *config; + bool enabled; + struct drm_encoder *encoder; + struct drm_bridge *bridge; +}; + +struct sti_dvo_connector { + struct drm_connector drm_connector; + struct drm_encoder *encoder; + struct sti_dvo *dvo; +}; + +#define to_sti_dvo_connector(x) \ + container_of(x, struct sti_dvo_connector, drm_connector) + +#define BLANKING_LEVEL 16 +int dvo_awg_generate_code(struct sti_dvo *dvo, u8 *ram_size, u32 *ram_code) +{ + struct drm_display_mode *mode = &dvo->mode; + struct dvo_config *config = dvo->config; + struct awg_code_generation_params fw_gen_params; + struct awg_timing timing; + + fw_gen_params.ram_code = ram_code; + fw_gen_params.instruction_offset = 0; + + timing.total_lines = mode->vtotal; + timing.active_lines = mode->vdisplay; + timing.blanking_lines = mode->vsync_start - mode->vdisplay; + timing.trailing_lines = mode->vtotal - mode->vsync_start; + timing.total_pixels = mode->htotal; + timing.active_pixels = mode->hdisplay; + timing.blanking_pixels = mode->hsync_start - mode->hdisplay; + timing.trailing_pixels = mode->htotal - mode->hsync_start; + timing.blanking_level = BLANKING_LEVEL; + + if (config->awg_fwgen_fct(&fw_gen_params, &timing)) { + DRM_ERROR("AWG firmware not properly generated\n"); + return -EINVAL; + } + + *ram_size = fw_gen_params.instruction_offset; + + return 0; +} + +/* Configure AWG, writing instructions + * + * @dvo: pointer to DVO structure + * @awg_ram_code: pointer to AWG instructions table + * @nb: nb of AWG instructions + */ +static void dvo_awg_configure(struct sti_dvo *dvo, u32 *awg_ram_code, int nb) +{ + int i; + + DRM_DEBUG_DRIVER("\n"); + + for (i = 0; i < nb; i++) + writel(awg_ram_code[i], + dvo->regs + DVO_DIGSYNC_INSTR_I + i * 4); + for (i = nb; i < AWG_MAX_INST; i++) + writel(0, dvo->regs + DVO_DIGSYNC_INSTR_I + i * 4); + + writel(DVO_AWG_CTRL_EN, dvo->regs + DVO_AWG_DIGSYNC_CTRL); +} + +static void sti_dvo_disable(struct drm_bridge *bridge) +{ + struct sti_dvo *dvo = bridge->driver_private; + + if (!dvo->enabled) + return; + + DRM_DEBUG_DRIVER("\n"); + + if (dvo->config->awg_fwgen_fct) + writel(0x00000000, dvo->regs + DVO_AWG_DIGSYNC_CTRL); + + writel(0x00000000, dvo->regs + DVO_DOF_CFG); + + if (dvo->panel) + dvo->panel->funcs->disable(dvo->panel); + + /* Disable/unprepare dvo clock */ + clk_disable_unprepare(dvo->clk_pix); + clk_disable_unprepare(dvo->clk); + + dvo->enabled = false; +} + +static void sti_dvo_pre_enable(struct drm_bridge *bridge) +{ + struct sti_dvo *dvo = bridge->driver_private; + struct dvo_config *config = dvo->config; + u32 val; + + DRM_DEBUG_DRIVER("\n"); + + if (dvo->enabled) + return; + + /* Make sure DVO is disabled */ + writel(0x00000000, dvo->regs + DVO_DOF_CFG); + writel(0x00000000, dvo->regs + DVO_AWG_DIGSYNC_CTRL); + + if (config->awg_fwgen_fct) { + u8 nb_instr; + u32 awg_ram_code[AWG_MAX_INST]; + /* Configure AWG */ + if (!dvo_awg_generate_code(dvo, &nb_instr, awg_ram_code)) + dvo_awg_configure(dvo, awg_ram_code, nb_instr); + else + return; + } + + /* Prepare/enable clocks */ + if (clk_prepare_enable(dvo->clk_pix)) + DRM_ERROR("Failed to prepare/enable dvo_pix clk\n"); + if (clk_prepare_enable(dvo->clk)) + DRM_ERROR("Failed to prepare/enable dvo clk\n"); + + if (dvo->panel) + dvo->panel->funcs->enable(dvo->panel); + + /* Set LUT */ + writel(config->lowbyte, dvo->regs + DVO_LUT_PROG_LOW); + writel(config->midbyte, dvo->regs + DVO_LUT_PROG_MID); + writel(config->highbyte, dvo->regs + DVO_LUT_PROG_HIGH); + + /* Digital output formatter config */ + val = (config->flags | DVO_DOF_EN); + writel(val, dvo->regs + DVO_DOF_CFG); + + dvo->enabled = true; +} + +static void sti_dvo_set_mode(struct drm_bridge *bridge, + struct drm_display_mode *mode, + struct drm_display_mode *adjusted_mode) +{ + struct sti_dvo *dvo = bridge->driver_private; + struct sti_mixer *mixer = to_sti_mixer(dvo->encoder->crtc); + int rate = mode->clock * 1000; + struct clk *clkp; + int ret; + + DRM_DEBUG_DRIVER("\n"); + + memcpy(&dvo->mode, mode, sizeof(struct drm_display_mode)); + + /* According to the path used (main or aux), the dvo clocks should + * have a different parent clock. */ + if (mixer->id == STI_MIXER_MAIN) + clkp = dvo->clk_main_parent; + else + clkp = dvo->clk_aux_parent; + + if (clkp) { + clk_set_parent(dvo->clk_pix, clkp); + clk_set_parent(dvo->clk, clkp); + } + + /* DVO clocks = compositor clock */ + ret = clk_set_rate(dvo->clk_pix, rate); + if (ret < 0) { + DRM_ERROR("Cannot set rate (%dHz) for dvo_pix clk\n", rate); + return; + } + + ret = clk_set_rate(dvo->clk, rate); + if (ret < 0) { + DRM_ERROR("Cannot set rate (%dHz) for dvo clk\n", rate); + return; + } + + /* For now, we only support 24bit data enable (DE) synchro format */ + dvo->config = &rgb_24bit_de_cfg; +} + +static void sti_dvo_bridge_nope(struct drm_bridge *bridge) +{ + /* do nothing */ +} + +static const struct drm_bridge_funcs sti_dvo_bridge_funcs = { + .pre_enable = sti_dvo_pre_enable, + .enable = sti_dvo_bridge_nope, + .disable = sti_dvo_disable, + .post_disable = sti_dvo_bridge_nope, + .mode_set = sti_dvo_set_mode, +}; + +static int sti_dvo_connector_get_modes(struct drm_connector *connector) +{ + struct sti_dvo_connector *dvo_connector + = to_sti_dvo_connector(connector); + struct sti_dvo *dvo = dvo_connector->dvo; + + if (dvo->panel) + return dvo->panel->funcs->get_modes(dvo->panel); + + return 0; +} + +#define CLK_TOLERANCE_HZ 50 + +static int sti_dvo_connector_mode_valid(struct drm_connector *connector, + struct drm_display_mode *mode) +{ + int target = mode->clock * 1000; + int target_min = target - CLK_TOLERANCE_HZ; + int target_max = target + CLK_TOLERANCE_HZ; + int result; + struct sti_dvo_connector *dvo_connector + = to_sti_dvo_connector(connector); + struct sti_dvo *dvo = dvo_connector->dvo; + + result = clk_round_rate(dvo->clk_pix, target); + + DRM_DEBUG_DRIVER("target rate = %d => available rate = %d\n", + target, result); + + if ((result < target_min) || (result > target_max)) { + DRM_DEBUG_DRIVER("dvo pixclk=%d not supported\n", target); + return MODE_BAD; + } + + return MODE_OK; +} + +struct drm_encoder *sti_dvo_best_encoder(struct drm_connector *connector) +{ + struct sti_dvo_connector *dvo_connector + = to_sti_dvo_connector(connector); + + /* Best encoder is the one associated during connector creation */ + return dvo_connector->encoder; +} + +static struct drm_connector_helper_funcs sti_dvo_connector_helper_funcs = { + .get_modes = sti_dvo_connector_get_modes, + .mode_valid = sti_dvo_connector_mode_valid, + .best_encoder = sti_dvo_best_encoder, +}; + +static enum drm_connector_status +sti_dvo_connector_detect(struct drm_connector *connector, bool force) +{ + struct sti_dvo_connector *dvo_connector + = to_sti_dvo_connector(connector); + struct sti_dvo *dvo = dvo_connector->dvo; + + DRM_DEBUG_DRIVER("\n"); + + if (!dvo->panel) + dvo->panel = of_drm_find_panel(dvo->panel_node); + + if (dvo->panel) + if (!drm_panel_attach(dvo->panel, connector)) + return connector_status_connected; + + return connector_status_disconnected; +} + +static void sti_dvo_connector_destroy(struct drm_connector *connector) +{ + struct sti_dvo_connector *dvo_connector + = to_sti_dvo_connector(connector); + + drm_connector_unregister(connector); + drm_connector_cleanup(connector); + kfree(dvo_connector); +} + +static struct drm_connector_funcs sti_dvo_connector_funcs = { + .dpms = drm_atomic_helper_connector_dpms, + .fill_modes = drm_helper_probe_single_connector_modes, + .detect = sti_dvo_connector_detect, + .destroy = sti_dvo_connector_destroy, + .reset = drm_atomic_helper_connector_reset, + .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, + .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, +}; + +static struct drm_encoder *sti_dvo_find_encoder(struct drm_device *dev) +{ + struct drm_encoder *encoder; + + list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { + if (encoder->encoder_type == DRM_MODE_ENCODER_LVDS) + return encoder; + } + + return NULL; +} + +static int sti_dvo_bind(struct device *dev, struct device *master, void *data) +{ + struct sti_dvo *dvo = dev_get_drvdata(dev); + struct drm_device *drm_dev = data; + struct drm_encoder *encoder; + struct sti_dvo_connector *connector; + struct drm_connector *drm_connector; + struct drm_bridge *bridge; + int err; + + /* Set the drm device handle */ + dvo->drm_dev = drm_dev; + + encoder = sti_dvo_find_encoder(drm_dev); + if (!encoder) + return -ENOMEM; + + connector = devm_kzalloc(dev, sizeof(*connector), GFP_KERNEL); + if (!connector) + return -ENOMEM; + + connector->dvo = dvo; + + bridge = devm_kzalloc(dev, sizeof(*bridge), GFP_KERNEL); + if (!bridge) + return -ENOMEM; + + bridge->driver_private = dvo; + bridge->funcs = &sti_dvo_bridge_funcs; + bridge->of_node = dvo->dev.of_node; + err = drm_bridge_add(bridge); + if (err) { + DRM_ERROR("Failed to add bridge\n"); + return err; + } + + err = drm_bridge_attach(drm_dev, bridge); + if (err) { + DRM_ERROR("Failed to attach bridge\n"); + return err; + } + + dvo->bridge = bridge; + encoder->bridge = bridge; + connector->encoder = encoder; + dvo->encoder = encoder; + + drm_connector = (struct drm_connector *)connector; + + drm_connector->polled = DRM_CONNECTOR_POLL_HPD; + + drm_connector_init(drm_dev, drm_connector, + &sti_dvo_connector_funcs, DRM_MODE_CONNECTOR_LVDS); + drm_connector_helper_add(drm_connector, + &sti_dvo_connector_helper_funcs); + + err = drm_connector_register(drm_connector); + if (err) + goto err_connector; + + err = drm_mode_connector_attach_encoder(drm_connector, encoder); + if (err) { + DRM_ERROR("Failed to attach a connector to a encoder\n"); + goto err_sysfs; + } + + return 0; + +err_sysfs: + drm_connector_unregister(drm_connector); +err_connector: + drm_bridge_remove(bridge); + drm_connector_cleanup(drm_connector); + return -EINVAL; +} + +static void sti_dvo_unbind(struct device *dev, + struct device *master, void *data) +{ + struct sti_dvo *dvo = dev_get_drvdata(dev); + + drm_bridge_remove(dvo->bridge); +} + +static const struct component_ops sti_dvo_ops = { + .bind = sti_dvo_bind, + .unbind = sti_dvo_unbind, +}; + +static int sti_dvo_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct sti_dvo *dvo; + struct resource *res; + struct device_node *np = dev->of_node; + + DRM_INFO("%s\n", __func__); + + dvo = devm_kzalloc(dev, sizeof(*dvo), GFP_KERNEL); + if (!dvo) { + DRM_ERROR("Failed to allocate memory for DVO\n"); + return -ENOMEM; + } + + dvo->dev = pdev->dev; + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dvo-reg"); + if (!res) { + DRM_ERROR("Invalid dvo resource\n"); + return -ENOMEM; + } + dvo->regs = devm_ioremap_nocache(dev, res->start, + resource_size(res)); + if (IS_ERR(dvo->regs)) + return PTR_ERR(dvo->regs); + + dvo->clk_pix = devm_clk_get(dev, "dvo_pix"); + if (IS_ERR(dvo->clk_pix)) { + DRM_ERROR("Cannot get dvo_pix clock\n"); + return PTR_ERR(dvo->clk_pix); + } + + dvo->clk = devm_clk_get(dev, "dvo"); + if (IS_ERR(dvo->clk)) { + DRM_ERROR("Cannot get dvo clock\n"); + return PTR_ERR(dvo->clk); + } + + dvo->clk_main_parent = devm_clk_get(dev, "main_parent"); + if (IS_ERR(dvo->clk_main_parent)) { + DRM_DEBUG_DRIVER("Cannot get main_parent clock\n"); + dvo->clk_main_parent = NULL; + } + + dvo->clk_aux_parent = devm_clk_get(dev, "aux_parent"); + if (IS_ERR(dvo->clk_aux_parent)) { + DRM_DEBUG_DRIVER("Cannot get aux_parent clock\n"); + dvo->clk_aux_parent = NULL; + } + + dvo->panel_node = of_parse_phandle(np, "sti,panel", 0); + if (!dvo->panel_node) + DRM_ERROR("No panel associated to the dvo output\n"); + + platform_set_drvdata(pdev, dvo); + + return component_add(&pdev->dev, &sti_dvo_ops); +} + +static int sti_dvo_remove(struct platform_device *pdev) +{ + component_del(&pdev->dev, &sti_dvo_ops); + return 0; +} + +static struct of_device_id dvo_of_match[] = { + { .compatible = "st,stih407-dvo", }, + { /* end node */ } +}; +MODULE_DEVICE_TABLE(of, dvo_of_match); + +struct platform_driver sti_dvo_driver = { + .driver = { + .name = "sti-dvo", + .owner = THIS_MODULE, + .of_match_table = dvo_of_match, + }, + .probe = sti_dvo_probe, + .remove = sti_dvo_remove, +}; + +module_platform_driver(sti_dvo_driver); + +MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>"); +MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/gpu/drm/sti/sti_gdp.c b/drivers/gpu/drm/sti/sti_gdp.c index 32448d1d1e8f..087906fd8846 100644 --- a/drivers/gpu/drm/sti/sti_gdp.c +++ b/drivers/gpu/drm/sti/sti_gdp.c @@ -14,15 +14,19 @@ #include "sti_layer.h" #include "sti_vtg.h" +#define ALPHASWITCH BIT(6) #define ENA_COLOR_FILL BIT(8) +#define BIGNOTLITTLE BIT(23) #define WAIT_NEXT_VSYNC BIT(31) /* GDP color formats */ #define GDP_RGB565 0x00 #define GDP_RGB888 0x01 #define GDP_RGB888_32 0x02 +#define GDP_XBGR8888 (GDP_RGB888_32 | BIGNOTLITTLE | ALPHASWITCH) #define GDP_ARGB8565 0x04 #define GDP_ARGB8888 0x05 +#define GDP_ABGR8888 (GDP_ARGB8888 | BIGNOTLITTLE | ALPHASWITCH) #define GDP_ARGB1555 0x06 #define GDP_ARGB4444 0x07 #define GDP_CLUT8 0x0B @@ -103,7 +107,9 @@ struct sti_gdp { static const uint32_t gdp_supported_formats[] = { DRM_FORMAT_XRGB8888, + DRM_FORMAT_XBGR8888, DRM_FORMAT_ARGB8888, + DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB4444, DRM_FORMAT_ARGB1555, DRM_FORMAT_RGB565, @@ -129,8 +135,12 @@ static int sti_gdp_fourcc2format(int fourcc) switch (fourcc) { case DRM_FORMAT_XRGB8888: return GDP_RGB888_32; + case DRM_FORMAT_XBGR8888: + return GDP_XBGR8888; case DRM_FORMAT_ARGB8888: return GDP_ARGB8888; + case DRM_FORMAT_ABGR8888: + return GDP_ABGR8888; case DRM_FORMAT_ARGB4444: return GDP_ARGB4444; case DRM_FORMAT_ARGB1555: @@ -157,6 +167,7 @@ static int sti_gdp_get_alpharange(int format) case GDP_ARGB8565: case GDP_ARGB8888: case GDP_AYCBR8888: + case GDP_ABGR8888: return GAM_GDP_ALPHARANGE_255; } return 0; diff --git a/drivers/gpu/drm/sti/sti_hda.c b/drivers/gpu/drm/sti/sti_hda.c index 2ae9a9b73666..598cd78b0b16 100644 --- a/drivers/gpu/drm/sti/sti_hda.c +++ b/drivers/gpu/drm/sti/sti_hda.c @@ -10,6 +10,7 @@ #include <linux/platform_device.h> #include <drm/drmP.h> +#include <drm/drm_atomic_helper.h> #include <drm/drm_crtc_helper.h> /* HDformatter registers */ @@ -508,19 +509,12 @@ static void sti_hda_bridge_nope(struct drm_bridge *bridge) /* do nothing */ } -static void sti_hda_brigde_destroy(struct drm_bridge *bridge) -{ - drm_bridge_cleanup(bridge); - kfree(bridge); -} - static const struct drm_bridge_funcs sti_hda_bridge_funcs = { .pre_enable = sti_hda_pre_enable, .enable = sti_hda_bridge_nope, .disable = sti_hda_disable, .post_disable = sti_hda_bridge_nope, .mode_set = sti_hda_set_mode, - .destroy = sti_hda_brigde_destroy, }; static int sti_hda_connector_get_modes(struct drm_connector *connector) @@ -618,10 +612,13 @@ static void sti_hda_connector_destroy(struct drm_connector *connector) } static struct drm_connector_funcs sti_hda_connector_funcs = { - .dpms = drm_helper_connector_dpms, + .dpms = drm_atomic_helper_connector_dpms, .fill_modes = drm_helper_probe_single_connector_modes, .detect = sti_hda_connector_detect, .destroy = sti_hda_connector_destroy, + .reset = drm_atomic_helper_connector_reset, + .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, + .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, }; static struct drm_encoder *sti_hda_find_encoder(struct drm_device *dev) @@ -664,7 +661,8 @@ static int sti_hda_bind(struct device *dev, struct device *master, void *data) return -ENOMEM; bridge->driver_private = hda; - drm_bridge_init(drm_dev, bridge, &sti_hda_bridge_funcs); + bridge->funcs = &sti_hda_bridge_funcs; + drm_bridge_attach(drm_dev, bridge); encoder->bridge = bridge; connector->encoder = encoder; @@ -693,7 +691,6 @@ static int sti_hda_bind(struct device *dev, struct device *master, void *data) err_sysfs: drm_connector_unregister(drm_connector); err_connector: - drm_bridge_cleanup(bridge); drm_connector_cleanup(drm_connector); return -EINVAL; } diff --git a/drivers/gpu/drm/sti/sti_hdmi.c b/drivers/gpu/drm/sti/sti_hdmi.c index d032e024b0b8..ae5424bd6b4c 100644 --- a/drivers/gpu/drm/sti/sti_hdmi.c +++ b/drivers/gpu/drm/sti/sti_hdmi.c @@ -13,6 +13,7 @@ #include <linux/reset.h> #include <drm/drmP.h> +#include <drm/drm_atomic_helper.h> #include <drm/drm_crtc_helper.h> #include <drm/drm_edid.h> @@ -42,8 +43,17 @@ #define HDMI_SW_DI_1_PKT_WORD5 0x0228 #define HDMI_SW_DI_1_PKT_WORD6 0x022C #define HDMI_SW_DI_CFG 0x0230 +#define HDMI_SW_DI_2_HEAD_WORD 0x0600 +#define HDMI_SW_DI_2_PKT_WORD0 0x0604 +#define HDMI_SW_DI_2_PKT_WORD1 0x0608 +#define HDMI_SW_DI_2_PKT_WORD2 0x060C +#define HDMI_SW_DI_2_PKT_WORD3 0x0610 +#define HDMI_SW_DI_2_PKT_WORD4 0x0614 +#define HDMI_SW_DI_2_PKT_WORD5 0x0618 +#define HDMI_SW_DI_2_PKT_WORD6 0x061C #define HDMI_IFRAME_SLOT_AVI 1 +#define HDMI_IFRAME_SLOT_AUDIO 2 #define XCAT(prefix, x, suffix) prefix ## x ## suffix #define HDMI_SW_DI_N_HEAD_WORD(x) XCAT(HDMI_SW_DI_, x, _HEAD_WORD) @@ -99,6 +109,10 @@ #define HDMI_STA_SW_RST BIT(1) +#define HDMI_INFOFRAME_HEADER_TYPE(x) (((x) & 0xff) << 0) +#define HDMI_INFOFRAME_HEADER_VERSION(x) (((x) & 0xff) << 8) +#define HDMI_INFOFRAME_HEADER_LEN(x) (((x) & 0x0f) << 16) + struct sti_hdmi_connector { struct drm_connector drm_connector; struct drm_encoder *encoder; @@ -228,6 +242,90 @@ static void hdmi_config(struct sti_hdmi *hdmi) } /** + * Helper to concatenate infoframe in 32 bits word + * + * @ptr: pointer on the hdmi internal structure + * @data: infoframe to write + * @size: size to write + */ +static inline unsigned int hdmi_infoframe_subpack(const u8 *ptr, size_t size) +{ + unsigned long value = 0; + size_t i; + + for (i = size; i > 0; i--) + value = (value << 8) | ptr[i - 1]; + + return value; +} + +/** + * Helper to write info frame + * + * @hdmi: pointer on the hdmi internal structure + * @data: infoframe to write + * @size: size to write + */ +static void hdmi_infoframe_write_infopack(struct sti_hdmi *hdmi, const u8 *data) +{ + const u8 *ptr = data; + u32 val, slot, mode, i; + u32 head_offset, pack_offset; + size_t size; + + switch (*ptr) { + case HDMI_INFOFRAME_TYPE_AVI: + slot = HDMI_IFRAME_SLOT_AVI; + mode = HDMI_IFRAME_FIELD; + head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AVI); + pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AVI); + size = HDMI_AVI_INFOFRAME_SIZE; + break; + + case HDMI_INFOFRAME_TYPE_AUDIO: + slot = HDMI_IFRAME_SLOT_AUDIO; + mode = HDMI_IFRAME_FRAME; + head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AUDIO); + pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AUDIO); + size = HDMI_AUDIO_INFOFRAME_SIZE; + break; + + default: + DRM_ERROR("unsupported infoframe type: %#x\n", *ptr); + return; + } + + /* Disable transmission slot for updated infoframe */ + val = hdmi_read(hdmi, HDMI_SW_DI_CFG); + val &= ~HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, slot); + hdmi_write(hdmi, val, HDMI_SW_DI_CFG); + + val = HDMI_INFOFRAME_HEADER_TYPE(*ptr++); + val |= HDMI_INFOFRAME_HEADER_VERSION(*ptr++); + val |= HDMI_INFOFRAME_HEADER_LEN(*ptr++); + writel(val, hdmi->regs + head_offset); + + /* + * Each subpack contains 4 bytes + * The First Bytes of the first subpacket must contain the checksum + * Packet size in increase by one. + */ + for (i = 0; i < size; i += sizeof(u32)) { + size_t num; + + num = min_t(size_t, size - i, sizeof(u32)); + val = hdmi_infoframe_subpack(ptr, num); + ptr += sizeof(u32); + writel(val, hdmi->regs + pack_offset + i); + } + + /* Enable transmission slot for updated infoframe */ + val = hdmi_read(hdmi, HDMI_SW_DI_CFG); + val |= HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_FIELD, slot); + hdmi_write(hdmi, val, HDMI_SW_DI_CFG); +} + +/** * Prepare and configure the AVI infoframe * * AVI infoframe are transmitted at least once per two video field and @@ -243,8 +341,6 @@ static int hdmi_avi_infoframe_config(struct sti_hdmi *hdmi) struct drm_display_mode *mode = &hdmi->mode; struct hdmi_avi_infoframe infoframe; u8 buffer[HDMI_INFOFRAME_SIZE(AVI)]; - u8 *frame = buffer + HDMI_INFOFRAME_HEADER_SIZE; - u32 val; int ret; DRM_DEBUG_DRIVER("\n"); @@ -266,47 +362,43 @@ static int hdmi_avi_infoframe_config(struct sti_hdmi *hdmi) return ret; } - /* Disable transmission slot for AVI infoframe */ - val = hdmi_read(hdmi, HDMI_SW_DI_CFG); - val &= ~HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, HDMI_IFRAME_SLOT_AVI); - hdmi_write(hdmi, val, HDMI_SW_DI_CFG); + hdmi_infoframe_write_infopack(hdmi, buffer); - /* Infoframe header */ - val = buffer[0]; - val |= buffer[1] << 8; - val |= buffer[2] << 16; - hdmi_write(hdmi, val, HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AVI)); - - /* Infoframe packet bytes */ - val = buffer[3]; - val |= *(frame++) << 8; - val |= *(frame++) << 16; - val |= *(frame++) << 24; - hdmi_write(hdmi, val, HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AVI)); - - val = *(frame++); - val |= *(frame++) << 8; - val |= *(frame++) << 16; - val |= *(frame++) << 24; - hdmi_write(hdmi, val, HDMI_SW_DI_N_PKT_WORD1(HDMI_IFRAME_SLOT_AVI)); - - val = *(frame++); - val |= *(frame++) << 8; - val |= *(frame++) << 16; - val |= *(frame++) << 24; - hdmi_write(hdmi, val, HDMI_SW_DI_N_PKT_WORD2(HDMI_IFRAME_SLOT_AVI)); - - val = *(frame++); - val |= *(frame) << 8; - hdmi_write(hdmi, val, HDMI_SW_DI_N_PKT_WORD3(HDMI_IFRAME_SLOT_AVI)); - - /* Enable transmission slot for AVI infoframe - * According to the hdmi specification, AVI infoframe should be - * transmitted at least once per two video fields - */ - val = hdmi_read(hdmi, HDMI_SW_DI_CFG); - val |= HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_FIELD, HDMI_IFRAME_SLOT_AVI); - hdmi_write(hdmi, val, HDMI_SW_DI_CFG); + return 0; +} + +/** + * Prepare and configure the AUDIO infoframe + * + * AUDIO infoframe are transmitted once per frame and + * contains information about HDMI transmission mode such as audio codec, + * sample size, ... + * + * @hdmi: pointer on the hdmi internal structure + * + * Return negative value if error occurs + */ +static int hdmi_audio_infoframe_config(struct sti_hdmi *hdmi) +{ + struct hdmi_audio_infoframe infofame; + u8 buffer[HDMI_INFOFRAME_SIZE(AUDIO)]; + int ret; + + ret = hdmi_audio_infoframe_init(&infofame); + if (ret < 0) { + DRM_ERROR("failed to setup audio infoframe: %d\n", ret); + return ret; + } + + infofame.channels = 2; + + ret = hdmi_audio_infoframe_pack(&infofame, buffer, sizeof(buffer)); + if (ret < 0) { + DRM_ERROR("failed to pack audio infoframe: %d\n", ret); + return ret; + } + + hdmi_infoframe_write_infopack(hdmi, buffer); return 0; } @@ -427,6 +519,10 @@ static void sti_hdmi_pre_enable(struct drm_bridge *bridge) if (hdmi_avi_infoframe_config(hdmi)) DRM_ERROR("Unable to configure AVI infoframe\n"); + /* Program AUDIO infoframe */ + if (hdmi_audio_infoframe_config(hdmi)) + DRM_ERROR("Unable to configure AUDIO infoframe\n"); + /* Sw reset */ hdmi_swreset(hdmi); } @@ -463,19 +559,12 @@ static void sti_hdmi_bridge_nope(struct drm_bridge *bridge) /* do nothing */ } -static void sti_hdmi_brigde_destroy(struct drm_bridge *bridge) -{ - drm_bridge_cleanup(bridge); - kfree(bridge); -} - static const struct drm_bridge_funcs sti_hdmi_bridge_funcs = { .pre_enable = sti_hdmi_pre_enable, .enable = sti_hdmi_bridge_nope, .disable = sti_hdmi_disable, .post_disable = sti_hdmi_bridge_nope, .mode_set = sti_hdmi_set_mode, - .destroy = sti_hdmi_brigde_destroy, }; static int sti_hdmi_connector_get_modes(struct drm_connector *connector) @@ -575,10 +664,13 @@ static void sti_hdmi_connector_destroy(struct drm_connector *connector) } static struct drm_connector_funcs sti_hdmi_connector_funcs = { - .dpms = drm_helper_connector_dpms, + .dpms = drm_atomic_helper_connector_dpms, .fill_modes = drm_helper_probe_single_connector_modes, .detect = sti_hdmi_connector_detect, .destroy = sti_hdmi_connector_destroy, + .reset = drm_atomic_helper_connector_reset, + .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, + .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, }; static struct drm_encoder *sti_hdmi_find_encoder(struct drm_device *dev) @@ -635,7 +727,8 @@ static int sti_hdmi_bind(struct device *dev, struct device *master, void *data) goto err_adapt; bridge->driver_private = hdmi; - drm_bridge_init(drm_dev, bridge, &sti_hdmi_bridge_funcs); + bridge->funcs = &sti_hdmi_bridge_funcs; + drm_bridge_attach(drm_dev, bridge); encoder->bridge = bridge; connector->encoder = encoder; @@ -667,7 +760,6 @@ static int sti_hdmi_bind(struct device *dev, struct device *master, void *data) err_sysfs: drm_connector_unregister(drm_connector); err_connector: - drm_bridge_cleanup(bridge); drm_connector_cleanup(drm_connector); err_adapt: put_device(&hdmi->ddc_adapt->dev); diff --git a/drivers/gpu/drm/sti/sti_hqvdp.c b/drivers/gpu/drm/sti/sti_hqvdp.c index f3db05dab0ab..b0eb62de1b2e 100644 --- a/drivers/gpu/drm/sti/sti_hqvdp.c +++ b/drivers/gpu/drm/sti/sti_hqvdp.c @@ -1025,7 +1025,7 @@ static int sti_hqvdp_probe(struct platform_device *pdev) /* Get clock resources */ hqvdp->clk = devm_clk_get(dev, "hqvdp"); hqvdp->clk_pix_main = devm_clk_get(dev, "pix_main"); - if (IS_ERR(hqvdp->clk) || IS_ERR(hqvdp->clk)) { + if (IS_ERR(hqvdp->clk) || IS_ERR(hqvdp->clk_pix_main)) { DRM_ERROR("Cannot get clocks\n"); return -ENXIO; } diff --git a/drivers/gpu/drm/sti/sti_tvout.c b/drivers/gpu/drm/sti/sti_tvout.c index cb924aa2b321..5cc53116508e 100644 --- a/drivers/gpu/drm/sti/sti_tvout.c +++ b/drivers/gpu/drm/sti/sti_tvout.c @@ -48,6 +48,9 @@ #define TVO_HDMI_CLIP_VALUE_R_CR 0x514 #define TVO_HDMI_SYNC_SEL 0x518 #define TVO_HDMI_DFV_OBS 0x540 +#define TVO_VIP_DVO 0x600 +#define TVO_DVO_SYNC_SEL 0x618 +#define TVO_DVO_CONFIG 0x620 #define TVO_IN_FMT_SIGNED BIT(0) #define TVO_SYNC_EXT BIT(4) @@ -98,6 +101,9 @@ #define TVO_SYNC_HD_DCS_SHIFT 8 +#define TVO_SYNC_DVO_PAD_HSYNC_SHIFT 8 +#define TVO_SYNC_DVO_PAD_VSYNC_SHIFT 16 + #define ENCODER_CRTC_MASK (BIT(0) | BIT(1)) /* enum listing the supported output data format */ @@ -113,6 +119,7 @@ struct sti_tvout { struct reset_control *reset; struct drm_encoder *hdmi; struct drm_encoder *hda; + struct drm_encoder *dvo; }; struct sti_tvout_encoder { @@ -262,6 +269,66 @@ static void tvout_vip_set_in_vid_fmt(struct sti_tvout *tvout, } /** + * Start VIP block for DVO output + * + * @tvout: pointer on tvout structure + * @main_path: true if main path has to be used in the vip configuration + * else aux path is used. + */ +static void tvout_dvo_start(struct sti_tvout *tvout, bool main_path) +{ + struct device_node *node = tvout->dev->of_node; + bool sel_input_logic_inverted = false; + u32 tvo_in_vid_format; + int val; + + dev_dbg(tvout->dev, "%s\n", __func__); + + if (main_path) { + DRM_DEBUG_DRIVER("main vip for DVO\n"); + /* Select the input sync for dvo = VTG set 4 */ + val = TVO_SYNC_MAIN_VTG_SET_4 << TVO_SYNC_DVO_PAD_VSYNC_SHIFT; + val |= TVO_SYNC_MAIN_VTG_SET_4 << TVO_SYNC_DVO_PAD_HSYNC_SHIFT; + val |= TVO_SYNC_MAIN_VTG_SET_4; + tvout_write(tvout, val, TVO_DVO_SYNC_SEL); + tvo_in_vid_format = TVO_MAIN_IN_VID_FORMAT; + } else { + DRM_DEBUG_DRIVER("aux vip for DVO\n"); + /* Select the input sync for dvo = VTG set 4 */ + val = TVO_SYNC_AUX_VTG_SET_4 << TVO_SYNC_DVO_PAD_VSYNC_SHIFT; + val |= TVO_SYNC_AUX_VTG_SET_4 << TVO_SYNC_DVO_PAD_HSYNC_SHIFT; + val |= TVO_SYNC_AUX_VTG_SET_4; + tvout_write(tvout, val, TVO_DVO_SYNC_SEL); + tvo_in_vid_format = TVO_AUX_IN_VID_FORMAT; + } + + /* Set color channel order */ + tvout_vip_set_color_order(tvout, TVO_VIP_DVO, + TVO_VIP_REORDER_CR_R_SEL, + TVO_VIP_REORDER_Y_G_SEL, + TVO_VIP_REORDER_CB_B_SEL); + + /* Set clipping mode (Limited range RGB/Y) */ + tvout_vip_set_clip_mode(tvout, TVO_VIP_DVO, + TVO_VIP_CLIP_LIMITED_RANGE_RGB_Y); + + /* Set round mode (rounded to 8-bit per component) */ + tvout_vip_set_rnd(tvout, TVO_VIP_DVO, TVO_VIP_RND_8BIT_ROUNDED); + + if (of_device_is_compatible(node, "st,stih407-tvout")) { + /* Set input video format */ + tvout_vip_set_in_vid_fmt(tvout, tvo_in_vid_format, + TVO_IN_FMT_SIGNED); + sel_input_logic_inverted = true; + } + + /* Input selection */ + tvout_vip_set_sel_input(tvout, TVO_VIP_DVO, main_path, + sel_input_logic_inverted, + STI_TVOUT_VIDEO_OUT_RGB); +} + +/** * Start VIP block for HDMI output * * @tvout: pointer on tvout structure @@ -402,6 +469,56 @@ static const struct drm_encoder_funcs sti_tvout_encoder_funcs = { .destroy = sti_tvout_encoder_destroy, }; +static void sti_dvo_encoder_commit(struct drm_encoder *encoder) +{ + struct sti_tvout *tvout = to_sti_tvout(encoder); + + tvout_dvo_start(tvout, sti_drm_crtc_is_main(encoder->crtc)); +} + +static void sti_dvo_encoder_disable(struct drm_encoder *encoder) +{ + struct sti_tvout *tvout = to_sti_tvout(encoder); + + /* Reset VIP register */ + tvout_write(tvout, 0x0, TVO_VIP_DVO); +} + +static const struct drm_encoder_helper_funcs sti_dvo_encoder_helper_funcs = { + .dpms = sti_tvout_encoder_dpms, + .mode_fixup = sti_tvout_encoder_mode_fixup, + .mode_set = sti_tvout_encoder_mode_set, + .prepare = sti_tvout_encoder_prepare, + .commit = sti_dvo_encoder_commit, + .disable = sti_dvo_encoder_disable, +}; + +static struct drm_encoder * +sti_tvout_create_dvo_encoder(struct drm_device *dev, + struct sti_tvout *tvout) +{ + struct sti_tvout_encoder *encoder; + struct drm_encoder *drm_encoder; + + encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL); + if (!encoder) + return NULL; + + encoder->tvout = tvout; + + drm_encoder = (struct drm_encoder *)encoder; + + drm_encoder->possible_crtcs = ENCODER_CRTC_MASK; + drm_encoder->possible_clones = 1 << 0; + + drm_encoder_init(dev, drm_encoder, + &sti_tvout_encoder_funcs, DRM_MODE_ENCODER_LVDS); + + drm_encoder_helper_add(drm_encoder, &sti_dvo_encoder_helper_funcs); + + return drm_encoder; +} + static void sti_hda_encoder_commit(struct drm_encoder *encoder) { struct sti_tvout *tvout = to_sti_tvout(encoder); @@ -508,6 +625,7 @@ static void sti_tvout_create_encoders(struct drm_device *dev, { tvout->hdmi = sti_tvout_create_hdmi_encoder(dev, tvout); tvout->hda = sti_tvout_create_hda_encoder(dev, tvout); + tvout->dvo = sti_tvout_create_dvo_encoder(dev, tvout); } static void sti_tvout_destroy_encoders(struct sti_tvout *tvout) |
