diff options
Diffstat (limited to 'arch')
365 files changed, 4786 insertions, 6073 deletions
diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index cfa84178eb26..ba232d79fa81 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c @@ -293,8 +293,7 @@ static struct mc13xxx_platform_data mc13783_pdata = { .num_regulators = ARRAY_SIZE(mx27_3ds_regulators), }, - .flags = MC13783_USE_REGULATOR | MC13783_USE_TOUCHSCREEN | - MC13783_USE_RTC, + .flags = MC13XXX_USE_TOUCHSCREEN | MC13XXX_USE_RTC, }; /* SPI */ diff --git a/arch/arm/mach-imx/mach-mx31_3ds.c b/arch/arm/mach-imx/mach-mx31_3ds.c index 60f1fda6ce97..b8c54b840185 100644 --- a/arch/arm/mach-imx/mach-mx31_3ds.c +++ b/arch/arm/mach-imx/mach-mx31_3ds.c @@ -492,7 +492,7 @@ static struct mc13xxx_platform_data mc13783_pdata = { .regulators = mx31_3ds_regulators, .num_regulators = ARRAY_SIZE(mx31_3ds_regulators), }, - .flags = MC13783_USE_REGULATOR | MC13783_USE_TOUCHSCREEN, + .flags = MC13XXX_USE_TOUCHSCREEN, }; /* SPI */ diff --git a/arch/arm/mach-imx/mach-mx31lite.c b/arch/arm/mach-imx/mach-mx31lite.c index c97c26d814ed..05f1c71ba409 100644 --- a/arch/arm/mach-imx/mach-mx31lite.c +++ b/arch/arm/mach-imx/mach-mx31lite.c @@ -112,8 +112,7 @@ static const struct spi_imx_master spi1_pdata __initconst = { }; static struct mc13xxx_platform_data mc13783_pdata __initdata = { - .flags = MC13XXX_USE_RTC | - MC13XXX_USE_REGULATOR, + .flags = MC13XXX_USE_RTC, }; static struct spi_board_info mc13783_spi_dev __initdata = { diff --git a/arch/arm/mach-imx/mach-mx31moboard.c b/arch/arm/mach-imx/mach-mx31moboard.c index fff7791b7e7c..07034f44466a 100644 --- a/arch/arm/mach-imx/mach-mx31moboard.c +++ b/arch/arm/mach-imx/mach-mx31moboard.c @@ -31,6 +31,7 @@ #include <linux/clk.h> #include <linux/io.h> #include <linux/err.h> +#include <linux/input.h> #include <linux/usb/otg.h> #include <linux/usb/ulpi.h> @@ -225,7 +226,7 @@ static struct mc13xxx_regulator_init_data moboard_regulators[] = { }, }; -static struct mc13783_led_platform_data moboard_led[] = { +static struct mc13xxx_led_platform_data moboard_led[] = { { .id = MC13783_LED_R1, .name = "coreboard-led-4:red", @@ -258,7 +259,7 @@ static struct mc13783_led_platform_data moboard_led[] = { }, }; -static struct mc13783_leds_platform_data moboard_leds = { +static struct mc13xxx_leds_platform_data moboard_leds = { .num_leds = ARRAY_SIZE(moboard_led), .led = moboard_led, .flags = MC13783_LED_SLEWLIMTC, @@ -267,14 +268,20 @@ static struct mc13783_leds_platform_data moboard_leds = { .tc2_period = MC13783_LED_PERIOD_10MS, }; +static struct mc13xxx_buttons_platform_data moboard_buttons = { + .b1on_flags = MC13783_BUTTON_DBNC_750MS | MC13783_BUTTON_ENABLE | + MC13783_BUTTON_POL_INVERT, + .b1on_key = KEY_POWER, +}; + static struct mc13xxx_platform_data moboard_pmic = { .regulators = { .regulators = moboard_regulators, .num_regulators = ARRAY_SIZE(moboard_regulators), }, .leds = &moboard_leds, - .flags = MC13XXX_USE_REGULATOR | MC13XXX_USE_RTC | - MC13XXX_USE_ADC | MC13XXX_USE_LED, + .buttons = &moboard_buttons, + .flags = MC13XXX_USE_RTC | MC13XXX_USE_ADC, }; static struct spi_board_info moboard_spi_board_info[] __initdata = { diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c index 100bc733ce93..a17e9c7dfca0 100644 --- a/arch/arm/mach-imx/mach-pcm038.c +++ b/arch/arm/mach-imx/mach-pcm038.c @@ -268,8 +268,7 @@ static struct mc13xxx_platform_data pcm038_pmic = { .regulators = pcm038_regulators, .num_regulators = ARRAY_SIZE(pcm038_regulators), }, - .flags = MC13783_USE_ADC | MC13783_USE_REGULATOR | - MC13783_USE_TOUCHSCREEN, + .flags = MC13XXX_USE_ADC | MC13XXX_USE_TOUCHSCREEN, }; static struct spi_board_info pcm038_spi_board_info[] __initdata = { diff --git a/arch/arm/mach-mx5/mx51_efika.c b/arch/arm/mach-mx5/mx51_efika.c index b004e178417d..ec6ca91b299b 100644 --- a/arch/arm/mach-mx5/mx51_efika.c +++ b/arch/arm/mach-mx5/mx51_efika.c @@ -565,7 +565,7 @@ static struct mc13xxx_regulator_init_data mx51_efika_regulators[] = { }; static struct mc13xxx_platform_data mx51_efika_mc13892_data = { - .flags = MC13XXX_USE_RTC | MC13XXX_USE_REGULATOR, + .flags = MC13XXX_USE_RTC, .regulators = { .num_regulators = ARRAY_SIZE(mx51_efika_regulators), .regulators = mx51_efika_regulators, diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 497e9dc27958..503414718905 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -14,7 +14,6 @@ config ARCH_OMAP2PLUS_TYPICAL select SERIAL_OMAP_CONSOLE select I2C select I2C_OMAP - select MFD_SUPPORT select MENELAUS if ARCH_OMAP2 select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4 select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4 diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index 70261bcda3f9..4a71cb7e42d4 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c @@ -378,7 +378,8 @@ static struct i2c_board_info __initdata beagle_i2c_eeprom[] = { static int __init omap3_beagle_i2c_init(void) { omap3_pmic_get_config(&beagle_twldata, - TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC | + TWL_COMMON_PDATA_AUDIO, TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); beagle_twldata.vpll2->constraints.name = "VDVI"; @@ -444,9 +445,15 @@ static struct platform_device keys_gpio = { }, }; +static struct platform_device madc_hwmon = { + .name = "twl4030_madc_hwmon", + .id = -1, +}; + static struct platform_device *omap3_beagle_devices[] __initdata = { &leds_gpio, &keys_gpio, + &madc_hwmon, }; static const struct usbhs_omap_board_data usbhs_bdata __initconst = { diff --git a/arch/arm/mach-omap2/hwspinlock.c b/arch/arm/mach-omap2/hwspinlock.c index 36e21091b06a..454dfce125ca 100644 --- a/arch/arm/mach-omap2/hwspinlock.c +++ b/arch/arm/mach-omap2/hwspinlock.c @@ -19,10 +19,15 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/err.h> +#include <linux/hwspinlock.h> #include <plat/omap_hwmod.h> #include <plat/omap_device.h> +static struct hwspinlock_pdata omap_hwspinlock_pdata __initdata = { + .base_id = 0, +}; + int __init hwspinlocks_init(void) { int retval = 0; @@ -40,7 +45,9 @@ int __init hwspinlocks_init(void) if (oh == NULL) return -EINVAL; - pdev = omap_device_build(dev_name, 0, oh, NULL, 0, NULL, 0, false); + pdev = omap_device_build(dev_name, 0, oh, &omap_hwspinlock_pdata, + sizeof(struct hwspinlock_pdata), + NULL, 0, false); if (IS_ERR(pdev)) { pr_err("Can't build omap_device for %s:%s\n", dev_name, oh_name); diff --git a/arch/arm/mach-u300/i2c.c b/arch/arm/mach-u300/i2c.c index f0394baa11fa..5140deeddf7b 100644 --- a/arch/arm/mach-u300/i2c.c +++ b/arch/arm/mach-u300/i2c.c @@ -256,57 +256,8 @@ static struct ab3100_platform_data ab3100_plf_data = { }; #endif -#ifdef CONFIG_AB3550_CORE -static struct abx500_init_settings ab3550_init_settings[] = { - { - .bank = 0, - .reg = AB3550_IMR1, - .setting = 0xff - }, - { - .bank = 0, - .reg = AB3550_IMR2, - .setting = 0xff - }, - { - .bank = 0, - .reg = AB3550_IMR3, - .setting = 0xff - }, - { - .bank = 0, - .reg = AB3550_IMR4, - .setting = 0xff - }, - { - .bank = 0, - .reg = AB3550_IMR5, - /* The two most significant bits are not used */ - .setting = 0x3f - }, -}; - -static struct ab3550_platform_data ab3550_plf_data = { - .irq = { - .base = IRQ_AB3550_BASE, - .count = (IRQ_AB3550_END - IRQ_AB3550_BASE + 1), - }, - .dev_data = { - }, - .init_settings = ab3550_init_settings, - .init_settings_sz = ARRAY_SIZE(ab3550_init_settings), -}; -#endif - static struct i2c_board_info __initdata bus0_i2c_board_info[] = { -#if defined(CONFIG_AB3550_CORE) - { - .type = "ab3550", - .addr = 0x4A, - .irq = IRQ_U300_IRQ0_EXT, - .platform_data = &ab3550_plf_data, - }, -#elif defined(CONFIG_AB3100_CORE) +#ifdef CONFIG_AB3100_CORE { .type = "ab3100", .addr = 0x48, diff --git a/arch/arm/mach-u300/include/mach/irqs.h b/arch/arm/mach-u300/include/mach/irqs.h index d270fea32926..db3fbfa1d6e9 100644 --- a/arch/arm/mach-u300/include/mach/irqs.h +++ b/arch/arm/mach-u300/include/mach/irqs.h @@ -117,14 +117,6 @@ #define IRQ_U300_GPIO_END (U300_VIC_IRQS_END) #endif -/* Optional AB3550 mixsig chip */ -#ifdef CONFIG_AB3550_CORE -#define IRQ_AB3550_BASE (IRQ_U300_GPIO_END) -#define IRQ_AB3550_END (IRQ_AB3550_BASE + 38) -#else -#define IRQ_AB3550_END (IRQ_U300_GPIO_END) -#endif - -#define NR_IRQS (IRQ_AB3550_END) +#define NR_IRQS (IRQ_U300_GPIO_END) #endif diff --git a/arch/arm/mach-ux500/board-u5500.c b/arch/arm/mach-ux500/board-u5500.c index e014aa749b03..82025ba70c03 100644 --- a/arch/arm/mach-ux500/board-u5500.c +++ b/arch/arm/mach-ux500/board-u5500.c @@ -10,6 +10,7 @@ #include <linux/amba/bus.h> #include <linux/irq.h> #include <linux/i2c.h> +#include <linux/mfd/ab5500/ab5500.h> #include <asm/mach/arch.h> #include <asm/mach-types.h> @@ -87,7 +88,6 @@ static struct lm3530_platform_data u5500_als_platform_data = { .brt_val = 0x7F, /* Max brightness */ }; - static struct i2c_board_info __initdata u5500_i2c2_devices[] = { { /* Backlight */ @@ -101,6 +101,30 @@ static void __init u5500_i2c_init(void) db5500_add_i2c2(&u5500_i2c2_data); i2c_register_board_info(2, ARRAY_AND_SIZE(u5500_i2c2_devices)); } + +static struct ab5500_platform_data ab5500_plf_data = { + .irq = { + .base = 0, + .count = 0, + }, + .init_settings = NULL, + .init_settings_sz = 0, + .pm_power_off = false, +}; + +static struct platform_device ab5500_device = { + .name = "ab5500-core", + .id = 0, + .dev = { + .platform_data = &ab5500_plf_data, + }, + .num_resources = 0, +}; + +static struct platform_device *u5500_platform_devices[] __initdata = { + &ab5500_device, +}; + static void __init u5500_uart_init(void) { db5500_add_uart0(NULL); @@ -115,6 +139,9 @@ static void __init u5500_init_machine(void) u5500_i2c_init(); u5500_sdi_init(); u5500_uart_init(); + + platform_add_devices(u5500_platform_devices, + ARRAY_SIZE(u5500_platform_devices)); } MACHINE_START(U5500, "ST-Ericsson U5500 Platform") diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c index 1405d0eb7edb..f41857494375 100644 --- a/arch/arm/mach-ux500/cpu.c +++ b/arch/arm/mach-ux500/cpu.c @@ -47,6 +47,6 @@ void __init ux500_init_irq(void) if (cpu_is_u5500()) db5500_prcmu_early_init(); if (cpu_is_u8500()) - prcmu_early_init(); + db8500_prcmu_early_init(); clk_init(); } diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig index 3ff7785b3beb..27489b6dd533 100644 --- a/arch/ia64/Kconfig +++ b/arch/ia64/Kconfig @@ -92,7 +92,7 @@ config HAVE_SETUP_PER_CPU_AREA def_bool y config GENERIC_GPIO - def_bool y + bool config DMI bool diff --git a/arch/ia64/configs/generic_defconfig b/arch/ia64/configs/generic_defconfig index 43ab1cd097a5..954d81e2e837 100644 --- a/arch/ia64/configs/generic_defconfig +++ b/arch/ia64/configs/generic_defconfig @@ -87,6 +87,7 @@ CONFIG_NET_ETHERNET=y CONFIG_NET_TULIP=y CONFIG_TULIP=m CONFIG_NET_PCI=y +CONFIG_NET_VENDOR_INTEL=y CONFIG_E100=m CONFIG_E1000=y CONFIG_IGB=y diff --git a/arch/ia64/configs/gensparse_defconfig b/arch/ia64/configs/gensparse_defconfig index b11fa880e4b6..91c41ecfa6d9 100644 --- a/arch/ia64/configs/gensparse_defconfig +++ b/arch/ia64/configs/gensparse_defconfig @@ -75,6 +75,7 @@ CONFIG_NET_ETHERNET=y CONFIG_NET_TULIP=y CONFIG_TULIP=m CONFIG_NET_PCI=y +CONFIG_NET_VENDOR_INTEL=y CONFIG_E100=m CONFIG_E1000=y CONFIG_TIGON3=y diff --git a/arch/ia64/configs/tiger_defconfig b/arch/ia64/configs/tiger_defconfig index 137a453dd508..a5a9e02e60a0 100644 --- a/arch/ia64/configs/tiger_defconfig +++ b/arch/ia64/configs/tiger_defconfig @@ -77,6 +77,7 @@ CONFIG_NET_ETHERNET=y CONFIG_NET_TULIP=y CONFIG_TULIP=m CONFIG_NET_PCI=y +CONFIG_NET_VENDOR_INTEL=y CONFIG_E100=m CONFIG_E1000=y CONFIG_TIGON3=y diff --git a/arch/ia64/configs/xen_domu_defconfig b/arch/ia64/configs/xen_domu_defconfig index 2bf76e418bc5..37b9b422caad 100644 --- a/arch/ia64/configs/xen_domu_defconfig +++ b/arch/ia64/configs/xen_domu_defconfig @@ -80,6 +80,7 @@ CONFIG_NET_ETHERNET=y CONFIG_NET_TULIP=y CONFIG_TULIP=m CONFIG_NET_PCI=y +CONFIG_NET_VENDOR_INTEL=y CONFIG_E100=m CONFIG_E1000=y CONFIG_TIGON3=y diff --git a/arch/ia64/configs/zx1_defconfig b/arch/ia64/configs/zx1_defconfig index 1d42827f9fa4..fc7aba07c2b4 100644 --- a/arch/ia64/configs/zx1_defconfig +++ b/arch/ia64/configs/zx1_defconfig @@ -57,6 +57,7 @@ CONFIG_TULIP_MMIO=y CONFIG_TULIP_NAPI=y CONFIG_TULIP_NAPI_HW_MITIGATION=y CONFIG_NET_PCI=y +CONFIG_NET_VENDOR_INTEL=y CONFIG_E100=y CONFIG_E1000=y CONFIG_TIGON3=y diff --git a/arch/ia64/sn/kernel/sn2/sn_hwperf.c b/arch/ia64/sn/kernel/sn2/sn_hwperf.c index 30862c0358cd..2de41d44266e 100644 --- a/arch/ia64/sn/kernel/sn2/sn_hwperf.c +++ b/arch/ia64/sn/kernel/sn2/sn_hwperf.c @@ -615,11 +615,15 @@ static int sn_hwperf_op_cpu(struct sn_hwperf_op_info *op_info) } } - if (cpu == SN_HWPERF_ARG_ANY_CPU || cpu == get_cpu()) { - /* don't care, or already on correct cpu */ + if (cpu == SN_HWPERF_ARG_ANY_CPU) { + /* don't care which cpu */ sn_hwperf_call_sal(op_info); - } - else { + } else if (cpu == get_cpu()) { + /* already on correct cpu */ + sn_hwperf_call_sal(op_info); + put_cpu(); + } else { + put_cpu(); if (use_ipi) { /* use an interprocessor interrupt to call SAL */ smp_call_function_single(cpu, sn_hwperf_call_sal, diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 4cbc6d8de210..62b9677c39a1 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -47,6 +47,8 @@ config MIPS_ALCHEMY select GENERIC_GPIO select ARCH_WANT_OPTIONAL_GPIOLIB select SYS_SUPPORTS_ZBOOT + select USB_ARCH_HAS_OHCI + select USB_ARCH_HAS_EHCI config AR7 bool "Texas Instruments AR7" @@ -206,6 +208,7 @@ config MACH_JZ4740 select SYS_HAS_EARLY_PRINTK select HAVE_PWM select HAVE_CLK + select GENERIC_IRQ_CHIP config LANTIQ bool "Lantiq based platforms" @@ -2092,7 +2095,7 @@ config NODES_SHIFT config HW_PERF_EVENTS bool "Enable hardware performance counter support for perf events" - depends on PERF_EVENTS && !MIPS_MT_SMTC && OPROFILE=n && CPU_MIPS32 + depends on PERF_EVENTS && !MIPS_MT_SMTC && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON) default y help Enable hardware performance counter support for perf events. If diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 53e3514ba10e..9b4cb00407d7 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -226,7 +226,7 @@ LDFLAGS += -m $(ld-emul) ifdef CONFIG_MIPS CHECKFLAGS += $(shell $(CC) $(KBUILD_CFLAGS) -dM -E -xc /dev/null | \ egrep -vw '__GNUC_(|MINOR_|PATCHLEVEL_)_' | \ - sed -e 's/^\#define /-D/' -e "s/ /='/" -e "s/$$/'/") + sed -e "s/^\#define /-D'/" -e "s/ /'='/" -e "s/$$/'/") ifdef CONFIG_64BIT CHECKFLAGS += -m64 endif @@ -295,7 +295,9 @@ endif install: $(Q)install -D -m 755 vmlinux $(INSTALL_PATH)/vmlinux-$(KERNELRELEASE) +ifdef CONFIG_SYS_SUPPORTS_ZBOOT $(Q)install -D -m 755 vmlinuz $(INSTALL_PATH)/vmlinuz-$(KERNELRELEASE) +endif $(Q)install -D -m 644 .config $(INSTALL_PATH)/config-$(KERNELRELEASE) $(Q)install -D -m 644 System.map $(INSTALL_PATH)/System.map-$(KERNELRELEASE) diff --git a/arch/mips/alchemy/Kconfig b/arch/mips/alchemy/Kconfig index 2ccfd4a135bc..2a68be6a1b97 100644 --- a/arch/mips/alchemy/Kconfig +++ b/arch/mips/alchemy/Kconfig @@ -18,20 +18,20 @@ config MIPS_MTX1 bool "4G Systems MTX-1 board" select DMA_NONCOHERENT select HW_HAS_PCI - select SOC_AU1500 + select ALCHEMY_GPIOINT_AU1000 select SYS_SUPPORTS_LITTLE_ENDIAN select SYS_HAS_EARLY_PRINTK config MIPS_BOSPORUS bool "Alchemy Bosporus board" - select SOC_AU1500 + select ALCHEMY_GPIOINT_AU1000 select DMA_NONCOHERENT select SYS_SUPPORTS_LITTLE_ENDIAN select SYS_HAS_EARLY_PRINTK config MIPS_DB1000 bool "Alchemy DB1000 board" - select SOC_AU1000 + select ALCHEMY_GPIOINT_AU1000 select DMA_NONCOHERENT select HW_HAS_PCI select SYS_SUPPORTS_LITTLE_ENDIAN @@ -39,14 +39,14 @@ config MIPS_DB1000 config MIPS_DB1100 bool "Alchemy DB1100 board" - select SOC_AU1100 + select ALCHEMY_GPIOINT_AU1000 select DMA_NONCOHERENT select SYS_SUPPORTS_LITTLE_ENDIAN select SYS_HAS_EARLY_PRINTK config MIPS_DB1200 bool "Alchemy DB1200 board" - select SOC_AU1200 + select ALCHEMY_GPIOINT_AU1000 select DMA_COHERENT select MIPS_DISABLE_OBSOLETE_IDE select SYS_SUPPORTS_LITTLE_ENDIAN @@ -54,7 +54,7 @@ config MIPS_DB1200 config MIPS_DB1500 bool "Alchemy DB1500 board" - select SOC_AU1500 + select ALCHEMY_GPIOINT_AU1000 select DMA_NONCOHERENT select HW_HAS_PCI select MIPS_DISABLE_OBSOLETE_IDE @@ -64,7 +64,7 @@ config MIPS_DB1500 config MIPS_DB1550 bool "Alchemy DB1550 board" - select SOC_AU1550 + select ALCHEMY_GPIOINT_AU1000 select HW_HAS_PCI select DMA_NONCOHERENT select MIPS_DISABLE_OBSOLETE_IDE @@ -74,13 +74,13 @@ config MIPS_DB1550 config MIPS_MIRAGE bool "Alchemy Mirage board" select DMA_NONCOHERENT - select SOC_AU1500 + select ALCHEMY_GPIOINT_AU1000 select SYS_SUPPORTS_LITTLE_ENDIAN select SYS_HAS_EARLY_PRINTK config MIPS_PB1000 bool "Alchemy PB1000 board" - select SOC_AU1000 + select ALCHEMY_GPIOINT_AU1000 select DMA_NONCOHERENT select HW_HAS_PCI select SWAP_IO_SPACE @@ -89,7 +89,7 @@ config MIPS_PB1000 config MIPS_PB1100 bool "Alchemy PB1100 board" - select SOC_AU1100 + select ALCHEMY_GPIOINT_AU1000 select DMA_NONCOHERENT select HW_HAS_PCI select SWAP_IO_SPACE @@ -98,7 +98,7 @@ config MIPS_PB1100 config MIPS_PB1200 bool "Alchemy PB1200 board" - select SOC_AU1200 + select ALCHEMY_GPIOINT_AU1000 select DMA_NONCOHERENT select MIPS_DISABLE_OBSOLETE_IDE select SYS_SUPPORTS_LITTLE_ENDIAN @@ -106,7 +106,7 @@ config MIPS_PB1200 config MIPS_PB1500 bool "Alchemy PB1500 board" - select SOC_AU1500 + select ALCHEMY_GPIOINT_AU1000 select DMA_NONCOHERENT select HW_HAS_PCI select SYS_SUPPORTS_LITTLE_ENDIAN @@ -114,7 +114,7 @@ config MIPS_PB1500 config MIPS_PB1550 bool "Alchemy PB1550 board" - select SOC_AU1550 + select ALCHEMY_GPIOINT_AU1000 select DMA_NONCOHERENT select HW_HAS_PCI select MIPS_DISABLE_OBSOLETE_IDE @@ -124,13 +124,13 @@ config MIPS_PB1550 config MIPS_XXS1500 bool "MyCable XXS1500 board" select DMA_NONCOHERENT - select SOC_AU1500 + select ALCHEMY_GPIOINT_AU1000 select SYS_SUPPORTS_LITTLE_ENDIAN select SYS_HAS_EARLY_PRINTK config MIPS_GPR bool "Trapeze ITS GPR board" - select SOC_AU1550 + select ALCHEMY_GPIOINT_AU1000 select HW_HAS_PCI select DMA_NONCOHERENT select MIPS_DISABLE_OBSOLETE_IDE @@ -138,23 +138,3 @@ config MIPS_GPR select SYS_HAS_EARLY_PRINTK endchoice - -config SOC_AU1000 - bool - select ALCHEMY_GPIOINT_AU1000 - -config SOC_AU1100 - bool - select ALCHEMY_GPIOINT_AU1000 - -config SOC_AU1500 - bool - select ALCHEMY_GPIOINT_AU1000 - -config SOC_AU1550 - bool - select ALCHEMY_GPIOINT_AU1000 - -config SOC_AU1200 - bool - select ALCHEMY_GPIOINT_AU1000 diff --git a/arch/mips/alchemy/common/Makefile b/arch/mips/alchemy/common/Makefile index 27811fe341d6..811ece7b22e3 100644 --- a/arch/mips/alchemy/common/Makefile +++ b/arch/mips/alchemy/common/Makefile @@ -12,9 +12,5 @@ obj-$(CONFIG_ALCHEMY_GPIOINT_AU1000) += irq.o # optional gpiolib support ifeq ($(CONFIG_ALCHEMY_GPIO_INDIRECT),) - ifeq ($(CONFIG_GPIOLIB),y) - obj-$(CONFIG_ALCHEMY_GPIOINT_AU1000) += gpiolib-au1000.o - endif + obj-$(CONFIG_GPIOLIB) += gpiolib.o endif - -obj-$(CONFIG_PCI) += pci.o diff --git a/arch/mips/alchemy/common/dbdma.c b/arch/mips/alchemy/common/dbdma.c index 3a5abb54d505..0e63ee487d6d 100644 --- a/arch/mips/alchemy/common/dbdma.c +++ b/arch/mips/alchemy/common/dbdma.c @@ -40,8 +40,6 @@ #include <asm/mach-au1x00/au1000.h> #include <asm/mach-au1x00/au1xxx_dbdma.h> -#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200) - /* * The Descriptor Based DMA supports up to 16 channels. * @@ -62,120 +60,96 @@ static dbdma_global_t *dbdma_gptr = (dbdma_global_t *)KSEG1ADDR(AU1550_DBDMA_CONF_PHYS_ADDR); static int dbdma_initialized; -static dbdev_tab_t dbdev_tab[] = { -#ifdef CONFIG_SOC_AU1550 +static dbdev_tab_t *dbdev_tab; + +static dbdev_tab_t au1550_dbdev_tab[] __initdata = { /* UARTS */ - { DSCR_CMD0_UART0_TX, DEV_FLAGS_OUT, 0, 8, 0x11100004, 0, 0 }, - { DSCR_CMD0_UART0_RX, DEV_FLAGS_IN, 0, 8, 0x11100000, 0, 0 }, - { DSCR_CMD0_UART3_TX, DEV_FLAGS_OUT, 0, 8, 0x11400004, 0, 0 }, - { DSCR_CMD0_UART3_RX, DEV_FLAGS_IN, 0, 8, 0x11400000, 0, 0 }, + { AU1550_DSCR_CMD0_UART0_TX, DEV_FLAGS_OUT, 0, 8, 0x11100004, 0, 0 }, + { AU1550_DSCR_CMD0_UART0_RX, DEV_FLAGS_IN, 0, 8, 0x11100000, 0, 0 }, + { AU1550_DSCR_CMD0_UART3_TX, DEV_FLAGS_OUT, 0, 8, 0x11400004, 0, 0 }, + { AU1550_DSCR_CMD0_UART3_RX, DEV_FLAGS_IN, 0, 8, 0x11400000, 0, 0 }, /* EXT DMA */ - { DSCR_CMD0_DMA_REQ0, 0, 0, 0, 0x00000000, 0, 0 }, - { DSCR_CMD0_DMA_REQ1, 0, 0, 0, 0x00000000, 0, 0 }, - { DSCR_CMD0_DMA_REQ2, 0, 0, 0, 0x00000000, 0, 0 }, - { DSCR_CMD0_DMA_REQ3, 0, 0, 0, 0x00000000, 0, 0 }, + { AU1550_DSCR_CMD0_DMA_REQ0, 0, 0, 0, 0x00000000, 0, 0 }, + { AU1550_DSCR_CMD0_DMA_REQ1, 0, 0, 0, 0x00000000, 0, 0 }, + { AU1550_DSCR_CMD0_DMA_REQ2, 0, 0, 0, 0x00000000, 0, 0 }, + { AU1550_DSCR_CMD0_DMA_REQ3, 0, 0, 0, 0x00000000, 0, 0 }, /* USB DEV */ - { DSCR_CMD0_USBDEV_RX0, DEV_FLAGS_IN, 4, 8, 0x10200000, 0, 0 }, - { DSCR_CMD0_USBDEV_TX0, DEV_FLAGS_OUT, 4, 8, 0x10200004, 0, 0 }, - { DSCR_CMD0_USBDEV_TX1, DEV_FLAGS_OUT, 4, 8, 0x10200008, 0, 0 }, - { DSCR_CMD0_USBDEV_TX2, DEV_FLAGS_OUT, 4, 8, 0x1020000c, 0, 0 }, - { DSCR_CMD0_USBDEV_RX3, DEV_FLAGS_IN, 4, 8, 0x10200010, 0, 0 }, - { DSCR_CMD0_USBDEV_RX4, DEV_FLAGS_IN, 4, 8, 0x10200014, 0, 0 }, - - /* PSC 0 */ - { DSCR_CMD0_PSC0_TX, DEV_FLAGS_OUT, 0, 0, 0x11a0001c, 0, 0 }, - { DSCR_CMD0_PSC0_RX, DEV_FLAGS_IN, 0, 0, 0x11a0001c, 0, 0 }, - - /* PSC 1 */ - { DSCR_CMD0_PSC1_TX, DEV_FLAGS_OUT, 0, 0, 0x11b0001c, 0, 0 }, - { DSCR_CMD0_PSC1_RX, DEV_FLAGS_IN, 0, 0, 0x11b0001c, 0, 0 }, - - /* PSC 2 */ - { DSCR_CMD0_PSC2_TX, DEV_FLAGS_OUT, 0, 0, 0x10a0001c, 0, 0 }, - { DSCR_CMD0_PSC2_RX, DEV_FLAGS_IN, 0, 0, 0x10a0001c, 0, 0 }, - - /* PSC 3 */ - { DSCR_CMD0_PSC3_TX, DEV_FLAGS_OUT, 0, 0, 0x10b0001c, 0, 0 }, - { DSCR_CMD0_PSC3_RX, DEV_FLAGS_IN, 0, 0, 0x10b0001c, 0, 0 }, - - { DSCR_CMD0_PCI_WRITE, 0, 0, 0, 0x00000000, 0, 0 }, /* PCI */ - { DSCR_CMD0_NAND_FLASH, 0, 0, 0, 0x00000000, 0, 0 }, /* NAND */ + { AU1550_DSCR_CMD0_USBDEV_RX0, DEV_FLAGS_IN, 4, 8, 0x10200000, 0, 0 }, + { AU1550_DSCR_CMD0_USBDEV_TX0, DEV_FLAGS_OUT, 4, 8, 0x10200004, 0, 0 }, + { AU1550_DSCR_CMD0_USBDEV_TX1, DEV_FLAGS_OUT, 4, 8, 0x10200008, 0, 0 }, + { AU1550_DSCR_CMD0_USBDEV_TX2, DEV_FLAGS_OUT, 4, 8, 0x1020000c, 0, 0 }, + { AU1550_DSCR_CMD0_USBDEV_RX3, DEV_FLAGS_IN, 4, 8, 0x10200010, 0, 0 }, + { AU1550_DSCR_CMD0_USBDEV_RX4, DEV_FLAGS_IN, 4, 8, 0x10200014, 0, 0 }, + + /* PSCs */ + { AU1550_DSCR_CMD0_PSC0_TX, DEV_FLAGS_OUT, 0, 0, 0x11a0001c, 0, 0 }, + { AU1550_DSCR_CMD0_PSC0_RX, DEV_FLAGS_IN, 0, 0, 0x11a0001c, 0, 0 }, + { AU1550_DSCR_CMD0_PSC1_TX, DEV_FLAGS_OUT, 0, 0, 0x11b0001c, 0, 0 }, + { AU1550_DSCR_CMD0_PSC1_RX, DEV_FLAGS_IN, 0, 0, 0x11b0001c, 0, 0 }, + { AU1550_DSCR_CMD0_PSC2_TX, DEV_FLAGS_OUT, 0, 0, 0x10a0001c, 0, 0 }, + { AU1550_DSCR_CMD0_PSC2_RX, DEV_FLAGS_IN, 0, 0, 0x10a0001c, 0, 0 }, + { AU1550_DSCR_CMD0_PSC3_TX, DEV_FLAGS_OUT, 0, 0, 0x10b0001c, 0, 0 }, + { AU1550_DSCR_CMD0_PSC3_RX, DEV_FLAGS_IN, 0, 0, 0x10b0001c, 0, 0 }, + + { AU1550_DSCR_CMD0_PCI_WRITE, 0, 0, 0, 0x00000000, 0, 0 }, /* PCI */ + { AU1550_DSCR_CMD0_NAND_FLASH, 0, 0, 0, 0x00000000, 0, 0 }, /* NAND */ /* MAC 0 */ - { DSCR_CMD0_MAC0_RX, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 }, - { DSCR_CMD0_MAC0_TX, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 }, + { AU1550_DSCR_CMD0_MAC0_RX, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 }, + { AU1550_DSCR_CMD0_MAC0_TX, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 }, /* MAC 1 */ - { DSCR_CMD0_MAC1_RX, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 }, - { DSCR_CMD0_MAC1_TX, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 }, - -#endif /* CONFIG_SOC_AU1550 */ + { AU1550_DSCR_CMD0_MAC1_RX, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 }, + { AU1550_DSCR_CMD0_MAC1_TX, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 }, -#ifdef CONFIG_SOC_AU1200 - { DSCR_CMD0_UART0_TX, DEV_FLAGS_OUT, 0, 8, 0x11100004, 0, 0 }, - { DSCR_CMD0_UART0_RX, DEV_FLAGS_IN, 0, 8, 0x11100000, 0, 0 }, - { DSCR_CMD0_UART1_TX, DEV_FLAGS_OUT, 0, 8, 0x11200004, 0, 0 }, - { DSCR_CMD0_UART1_RX, DEV_FLAGS_IN, 0, 8, 0x11200000, 0, 0 }, - - { DSCR_CMD0_DMA_REQ0, 0, 0, 0, 0x00000000, 0, 0 }, - { DSCR_CMD0_DMA_REQ1, 0, 0, 0, 0x00000000, 0, 0 }, + { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, + { DSCR_CMD0_ALWAYS, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, +}; - { DSCR_CMD0_MAE_BE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, - { DSCR_CMD0_MAE_FE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, - { DSCR_CMD0_MAE_BOTH, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, - { DSCR_CMD0_LCD, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, +static dbdev_tab_t au1200_dbdev_tab[] __initdata = { + { AU1200_DSCR_CMD0_UART0_TX, DEV_FLAGS_OUT, 0, 8, 0x11100004, 0, 0 }, + { AU1200_DSCR_CMD0_UART0_RX, DEV_FLAGS_IN, 0, 8, 0x11100000, 0, 0 }, + { AU1200_DSCR_CMD0_UART1_TX, DEV_FLAGS_OUT, 0, 8, 0x11200004, 0, 0 }, + { AU1200_DSCR_CMD0_UART1_RX, DEV_FLAGS_IN, 0, 8, 0x11200000, 0, 0 }, - { DSCR_CMD0_SDMS_TX0, DEV_FLAGS_OUT, 4, 8, 0x10600000, 0, 0 }, - { DSCR_CMD0_SDMS_RX0, DEV_FLAGS_IN, 4, 8, 0x10600004, 0, 0 }, - { DSCR_CMD0_SDMS_TX1, DEV_FLAGS_OUT, 4, 8, 0x10680000, 0, 0 }, - { DSCR_CMD0_SDMS_RX1, DEV_FLAGS_IN, 4, 8, 0x10680004, 0, 0 }, + { AU1200_DSCR_CMD0_DMA_REQ0, 0, 0, 0, 0x00000000, 0, 0 }, + { AU1200_DSCR_CMD0_DMA_REQ1, 0, 0, 0, 0x00000000, 0, 0 }, - { DSCR_CMD0_AES_RX, DEV_FLAGS_IN , 4, 32, 0x10300008, 0, 0 }, - { DSCR_CMD0_AES_TX, DEV_FLAGS_OUT, 4, 32, 0x10300004, 0, 0 }, + { AU1200_DSCR_CMD0_MAE_BE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, + { AU1200_DSCR_CMD0_MAE_FE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, + { AU1200_DSCR_CMD0_MAE_BOTH, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, + { AU1200_DSCR_CMD0_LCD, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, - { DSCR_CMD0_PSC0_TX, DEV_FLAGS_OUT, 0, 16, 0x11a0001c, 0, 0 }, - { DSCR_CMD0_PSC0_RX, DEV_FLAGS_IN, 0, 16, 0x11a0001c, 0, 0 }, - { DSCR_CMD0_PSC0_SYNC, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, + { AU1200_DSCR_CMD0_SDMS_TX0, DEV_FLAGS_OUT, 4, 8, 0x10600000, 0, 0 }, + { AU1200_DSCR_CMD0_SDMS_RX0, DEV_FLAGS_IN, 4, 8, 0x10600004, 0, 0 }, + { AU1200_DSCR_CMD0_SDMS_TX1, DEV_FLAGS_OUT, 4, 8, 0x10680000, 0, 0 }, + { AU1200_DSCR_CMD0_SDMS_RX1, DEV_FLAGS_IN, 4, 8, 0x10680004, 0, 0 }, - { DSCR_CMD0_PSC1_TX, DEV_FLAGS_OUT, 0, 16, 0x11b0001c, 0, 0 }, - { DSCR_CMD0_PSC1_RX, DEV_FLAGS_IN, 0, 16, 0x11b0001c, 0, 0 }, - { DSCR_CMD0_PSC1_SYNC, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, + { AU1200_DSCR_CMD0_AES_RX, DEV_FLAGS_IN , 4, 32, 0x10300008, 0, 0 }, + { AU1200_DSCR_CMD0_AES_TX, DEV_FLAGS_OUT, 4, 32, 0x10300004, 0, 0 }, - { DSCR_CMD0_CIM_RXA, DEV_FLAGS_IN, 0, 32, 0x14004020, 0, 0 }, - { DSCR_CMD0_CIM_RXB, DEV_FLAGS_IN, 0, 32, 0x14004040, 0, 0 }, - { DSCR_CMD0_CIM_RXC, DEV_FLAGS_IN, 0, 32, 0x14004060, 0, 0 }, - { DSCR_CMD0_CIM_SYNC, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, + { AU1200_DSCR_CMD0_PSC0_TX, DEV_FLAGS_OUT, 0, 16, 0x11a0001c, 0, 0 }, + { AU1200_DSCR_CMD0_PSC0_RX, DEV_FLAGS_IN, 0, 16, 0x11a0001c, 0, 0 }, + { AU1200_DSCR_CMD0_PSC0_SYNC, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, + { AU1200_DSCR_CMD0_PSC1_TX, DEV_FLAGS_OUT, 0, 16, 0x11b0001c, 0, 0 }, + { AU1200_DSCR_CMD0_PSC1_RX, DEV_FLAGS_IN, 0, 16, 0x11b0001c, 0, 0 }, + { AU1200_DSCR_CMD0_PSC1_SYNC, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, - { DSCR_CMD0_NAND_FLASH, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 }, + { AU1200_DSCR_CMD0_CIM_RXA, DEV_FLAGS_IN, 0, 32, 0x14004020, 0, 0 }, + { AU1200_DSCR_CMD0_CIM_RXB, DEV_FLAGS_IN, 0, 32, 0x14004040, 0, 0 }, + { AU1200_DSCR_CMD0_CIM_RXC, DEV_FLAGS_IN, 0, 32, 0x14004060, 0, 0 }, + { AU1200_DSCR_CMD0_CIM_SYNC, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, -#endif /* CONFIG_SOC_AU1200 */ + { AU1200_DSCR_CMD0_NAND_FLASH, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 }, { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, - { DSCR_CMD0_ALWAYS, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, - - /* Provide 16 user definable device types */ - { ~0, 0, 0, 0, 0, 0, 0 }, - { ~0, 0, 0, 0, 0, 0, 0 }, - { ~0, 0, 0, 0, 0, 0, 0 }, - { ~0, 0, 0, 0, 0, 0, 0 }, - { ~0, 0, 0, 0, 0, 0, 0 }, - { ~0, 0, 0, 0, 0, 0, 0 }, - { ~0, 0, 0, 0, 0, 0, 0 }, - { ~0, 0, 0, 0, 0, 0, 0 }, - { ~0, 0, 0, 0, 0, 0, 0 }, - { ~0, 0, 0, 0, 0, 0, 0 }, - { ~0, 0, 0, 0, 0, 0, 0 }, - { ~0, 0, 0, 0, 0, 0, 0 }, - { ~0, 0, 0, 0, 0, 0, 0 }, - { ~0, 0, 0, 0, 0, 0, 0 }, - { ~0, 0, 0, 0, 0, 0, 0 }, - { ~0, 0, 0, 0, 0, 0, 0 }, + { DSCR_CMD0_ALWAYS, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, }; -#define DBDEV_TAB_SIZE ARRAY_SIZE(dbdev_tab) - +/* 32 predefined plus 32 custom */ +#define DBDEV_TAB_SIZE 64 static chan_tab_t *chan_tab_ptr[NUM_DBDMA_CHANS]; @@ -1028,38 +1002,43 @@ static struct syscore_ops alchemy_dbdma_syscore_ops = { .resume = alchemy_dbdma_resume, }; -static int __init au1xxx_dbdma_init(void) +static int __init dbdma_setup(unsigned int irq, dbdev_tab_t *idtable) { - int irq_nr, ret; + int ret; + + dbdev_tab = kzalloc(sizeof(dbdev_tab_t) * DBDEV_TAB_SIZE, GFP_KERNEL); + if (!dbdev_tab) + return -ENOMEM; + + memcpy(dbdev_tab, idtable, 32 * sizeof(dbdev_tab_t)); + for (ret = 32; ret < DBDEV_TAB_SIZE; ret++) + dbdev_tab[ret].dev_id = ~0; dbdma_gptr->ddma_config = 0; dbdma_gptr->ddma_throttle = 0; dbdma_gptr->ddma_inten = 0xffff; au_sync(); - switch (alchemy_get_cputype()) { - case ALCHEMY_CPU_AU1550: - irq_nr = AU1550_DDMA_INT; - break; - case ALCHEMY_CPU_AU1200: - irq_nr = AU1200_DDMA_INT; - break; - default: - return -ENODEV; - } - - ret = request_irq(irq_nr, dbdma_interrupt, IRQF_DISABLED, - "Au1xxx dbdma", (void *)dbdma_gptr); + ret = request_irq(irq, dbdma_interrupt, IRQF_DISABLED, "dbdma", + (void *)dbdma_gptr); if (ret) printk(KERN_ERR "Cannot grab DBDMA interrupt!\n"); else { dbdma_initialized = 1; - printk(KERN_INFO "Alchemy DBDMA initialized\n"); register_syscore_ops(&alchemy_dbdma_syscore_ops); } return ret; } -subsys_initcall(au1xxx_dbdma_init); -#endif /* defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200) */ +static int __init alchemy_dbdma_init(void) +{ + switch (alchemy_get_cputype()) { + case ALCHEMY_CPU_AU1550: + return dbdma_setup(AU1550_DDMA_INT, au1550_dbdev_tab); + case ALCHEMY_CPU_AU1200: + return dbdma_setup(AU1200_DDMA_INT, au1200_dbdev_tab); + } + return 0; +} +subsys_initcall(alchemy_dbdma_init); diff --git a/arch/mips/alchemy/common/dma.c b/arch/mips/alchemy/common/dma.c index 347980e79a89..9b624e2c0fcf 100644 --- a/arch/mips/alchemy/common/dma.c +++ b/arch/mips/alchemy/common/dma.c @@ -40,8 +40,6 @@ #include <asm/mach-au1x00/au1000.h> #include <asm/mach-au1x00/au1000_dma.h> -#if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1500) || \ - defined(CONFIG_SOC_AU1100) /* * A note on resource allocation: * @@ -88,12 +86,12 @@ static const struct dma_dev { { AU1000_AC97_PHYS_ADDR + 0x08, DMA_DW16 | DMA_DR }, /* AC97 RX c */ { AU1000_UART3_PHYS_ADDR + 0x04, DMA_DW8 | DMA_NC }, /* UART3_TX */ { AU1000_UART3_PHYS_ADDR + 0x00, DMA_DW8 | DMA_NC | DMA_DR }, /* UART3_RX */ - { AU1000_USBD_PHYS_ADDR + 0x00, DMA_DW8 | DMA_NC | DMA_DR }, /* EP0RD */ - { AU1000_USBD_PHYS_ADDR + 0x04, DMA_DW8 | DMA_NC }, /* EP0WR */ - { AU1000_USBD_PHYS_ADDR + 0x08, DMA_DW8 | DMA_NC }, /* EP2WR */ - { AU1000_USBD_PHYS_ADDR + 0x0c, DMA_DW8 | DMA_NC }, /* EP3WR */ - { AU1000_USBD_PHYS_ADDR + 0x10, DMA_DW8 | DMA_NC | DMA_DR }, /* EP4RD */ - { AU1000_USBD_PHYS_ADDR + 0x14, DMA_DW8 | DMA_NC | DMA_DR }, /* EP5RD */ + { AU1000_USB_UDC_PHYS_ADDR + 0x00, DMA_DW8 | DMA_NC | DMA_DR }, /* EP0RD */ + { AU1000_USB_UDC_PHYS_ADDR + 0x04, DMA_DW8 | DMA_NC }, /* EP0WR */ + { AU1000_USB_UDC_PHYS_ADDR + 0x08, DMA_DW8 | DMA_NC }, /* EP2WR */ + { AU1000_USB_UDC_PHYS_ADDR + 0x0c, DMA_DW8 | DMA_NC }, /* EP3WR */ + { AU1000_USB_UDC_PHYS_ADDR + 0x10, DMA_DW8 | DMA_NC | DMA_DR }, /* EP4RD */ + { AU1000_USB_UDC_PHYS_ADDR + 0x14, DMA_DW8 | DMA_NC | DMA_DR }, /* EP5RD */ /* on Au1500, these 2 are DMA_REQ2/3 (GPIO208/209) instead! */ { AU1000_I2S_PHYS_ADDR + 0x00, DMA_DW32 | DMA_NC}, /* I2S TX */ { AU1000_I2S_PHYS_ADDR + 0x00, DMA_DW32 | DMA_NC | DMA_DR}, /* I2S RX */ @@ -170,13 +168,13 @@ int request_au1000_dma(int dev_id, const char *dev_str, const struct dma_dev *dev; int i, ret; -#if defined(CONFIG_SOC_AU1100) - if (dev_id < 0 || dev_id >= (DMA_NUM_DEV + DMA_NUM_DEV_BANK2)) - return -EINVAL; -#else - if (dev_id < 0 || dev_id >= DMA_NUM_DEV) - return -EINVAL; -#endif + if (alchemy_get_cputype() == ALCHEMY_CPU_AU1100) { + if (dev_id < 0 || dev_id >= (DMA_NUM_DEV + DMA_NUM_DEV_BANK2)) + return -EINVAL; + } else { + if (dev_id < 0 || dev_id >= DMA_NUM_DEV) + return -EINVAL; + } for (i = 0; i < NUM_AU1000_DMA_CHANNELS; i++) if (au1000_dma_table[i].dev_id < 0) @@ -239,30 +237,28 @@ EXPORT_SYMBOL(free_au1000_dma); static int __init au1000_dma_init(void) { - int base, i; - - switch (alchemy_get_cputype()) { - case ALCHEMY_CPU_AU1000: - base = AU1000_DMA_INT_BASE; - break; - case ALCHEMY_CPU_AU1500: - base = AU1500_DMA_INT_BASE; - break; - case ALCHEMY_CPU_AU1100: - base = AU1100_DMA_INT_BASE; - break; - default: - goto out; - } - - for (i = 0; i < NUM_AU1000_DMA_CHANNELS; i++) - au1000_dma_table[i].irq = base + i; - - printk(KERN_INFO "Alchemy DMA initialized\n"); + int base, i; + + switch (alchemy_get_cputype()) { + case ALCHEMY_CPU_AU1000: + base = AU1000_DMA_INT_BASE; + break; + case ALCHEMY_CPU_AU1500: + base = AU1500_DMA_INT_BASE; + break; + case ALCHEMY_CPU_AU1100: + base = AU1100_DMA_INT_BASE; + break; + default: + goto out; + } + + for (i = 0; i < NUM_AU1000_DMA_CHANNELS; i++) + au1000_dma_table[i].irq = base + i; + + printk(KERN_INFO "Alchemy DMA initialized\n"); out: - return 0; + return 0; } arch_initcall(au1000_dma_init); - -#endif /* AU1000 AU1500 AU1100 */ diff --git a/arch/mips/alchemy/common/gpiolib-au1000.c b/arch/mips/alchemy/common/gpiolib.c index c8e1a94d4a95..91fb4d9e30fd 100644 --- a/arch/mips/alchemy/common/gpiolib-au1000.c +++ b/arch/mips/alchemy/common/gpiolib.c @@ -1,6 +1,6 @@ /* * Copyright (C) 2007-2009, OpenWrt.org, Florian Fainelli <florian@openwrt.org> - * GPIOLIB support for Au1000, Au1500, Au1100, Au1550 and Au12x0. + * GPIOLIB support for Alchemy chips. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -23,18 +23,18 @@ * 675 Mass Ave, Cambridge, MA 02139, USA. * * Notes : - * au1000 SoC have only one GPIO block : GPIO1 - * Au1100, Au15x0, Au12x0 have a second one : GPIO2 + * This file must ONLY be built when CONFIG_GPIOLIB=y and + * CONFIG_ALCHEMY_GPIO_INDIRECT=n, otherwise compilation will fail! + * au1000 SoC have only one GPIO block : GPIO1 + * Au1100, Au15x0, Au12x0 have a second one : GPIO2 */ +#include <linux/init.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/types.h> -#include <linux/platform_device.h> #include <linux/gpio.h> - -#include <asm/mach-au1x00/au1000.h> -#include <asm/mach-au1x00/gpio.h> +#include <asm/mach-au1x00/gpio-au1000.h> static int gpio2_get(struct gpio_chip *chip, unsigned offset) { @@ -115,12 +115,19 @@ struct gpio_chip alchemy_gpio_chip[] = { }, }; -static int __init alchemy_gpiolib_init(void) +static int __init alchemy_gpiochip_init(void) { - gpiochip_add(&alchemy_gpio_chip[0]); - if (alchemy_get_cputype() != ALCHEMY_CPU_AU1000) - gpiochip_add(&alchemy_gpio_chip[1]); - - return 0; + int ret = 0; + + switch (alchemy_get_cputype()) { + case ALCHEMY_CPU_AU1000: + ret = gpiochip_add(&alchemy_gpio_chip[0]); + break; + case ALCHEMY_CPU_AU1500...ALCHEMY_CPU_AU1200: + ret = gpiochip_add(&alchemy_gpio_chip[0]); + ret |= gpiochip_add(&alchemy_gpio_chip[1]); + break; + } + return ret; } -arch_initcall(alchemy_gpiolib_init); +arch_initcall(alchemy_gpiochip_init); diff --git a/arch/mips/alchemy/common/pci.c b/arch/mips/alchemy/common/pci.c deleted file mode 100644 index 7866cf50cf99..000000000000 --- a/arch/mips/alchemy/common/pci.c +++ /dev/null @@ -1,104 +0,0 @@ -/* - * BRIEF MODULE DESCRIPTION - * Alchemy/AMD Au1x00 PCI support. - * - * Copyright 2001-2003, 2007-2008 MontaVista Software Inc. - * Author: MontaVista Software, Inc. <source@mvista.com> - * - * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org) - * - * Support for all devices (greater than 16) added by David Gathright. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#include <linux/pci.h> -#include <linux/kernel.h> -#include <linux/init.h> - -#include <asm/mach-au1x00/au1000.h> - -/* TBD */ -static struct resource pci_io_resource = { - .start = PCI_IO_START, - .end = PCI_IO_END, - .name = "PCI IO space", - .flags = IORESOURCE_IO -}; - -static struct resource pci_mem_resource = { - .start = PCI_MEM_START, - .end = PCI_MEM_END, - .name = "PCI memory space", - .flags = IORESOURCE_MEM -}; - -extern struct pci_ops au1x_pci_ops; - -static struct pci_controller au1x_controller = { - .pci_ops = &au1x_pci_ops, - .io_resource = &pci_io_resource, - .mem_resource = &pci_mem_resource, -}; - -#if defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550) -static unsigned long virt_io_addr; -#endif - -static int __init au1x_pci_setup(void) -{ - extern void au1x_pci_cfg_init(void); - -#if defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550) - virt_io_addr = (unsigned long)ioremap(Au1500_PCI_IO_START, - Au1500_PCI_IO_END - Au1500_PCI_IO_START + 1); - - if (!virt_io_addr) { - printk(KERN_ERR "Unable to ioremap pci space\n"); - return 1; - } - au1x_controller.io_map_base = virt_io_addr; - -#ifdef CONFIG_DMA_NONCOHERENT - { - /* - * Set the NC bit in controller for Au1500 pre-AC silicon - */ - u32 prid = read_c0_prid(); - - if ((prid & 0xFF000000) == 0x01000000 && prid < 0x01030202) { - au_writel((1 << 16) | au_readl(Au1500_PCI_CFG), - Au1500_PCI_CFG); - printk(KERN_INFO "Non-coherent PCI accesses enabled\n"); - } - } -#endif - - set_io_port_base(virt_io_addr); -#endif - - au1x_pci_cfg_init(); - - register_pci_controller(&au1x_controller); - return 0; -} - -arch_initcall(au1x_pci_setup); diff --git a/arch/mips/alchemy/common/platform.c b/arch/mips/alchemy/common/platform.c index f72c48d4804c..c8e5d72a5826 100644 --- a/arch/mips/alchemy/common/platform.c +++ b/arch/mips/alchemy/common/platform.c @@ -18,7 +18,7 @@ #include <linux/serial_8250.h> #include <linux/slab.h> -#include <asm/mach-au1x00/au1xxx.h> +#include <asm/mach-au1x00/au1000.h> #include <asm/mach-au1x00/au1xxx_dbdma.h> #include <asm/mach-au1x00/au1100_mmc.h> #include <asm/mach-au1x00/au1xxx_eth.h> @@ -111,270 +111,87 @@ static void __init alchemy_setup_uarts(int ctype) printk(KERN_INFO "Alchemy: failed to register UARTs\n"); } -/* OHCI (USB full speed host controller) */ -static struct resource au1xxx_usb_ohci_resources[] = { - [0] = { - .start = USB_OHCI_BASE, - .end = USB_OHCI_BASE + USB_OHCI_LEN - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = FOR_PLATFORM_C_USB_HOST_INT, - .end = FOR_PLATFORM_C_USB_HOST_INT, - .flags = IORESOURCE_IRQ, - }, -}; - -/* The dmamask must be set for OHCI to work */ -static u64 ohci_dmamask = DMA_BIT_MASK(32); - -static struct platform_device au1xxx_usb_ohci_device = { - .name = "au1xxx-ohci", - .id = 0, - .dev = { - .dma_mask = &ohci_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .num_resources = ARRAY_SIZE(au1xxx_usb_ohci_resources), - .resource = au1xxx_usb_ohci_resources, -}; - -/*** AU1100 LCD controller ***/ - -#ifdef CONFIG_FB_AU1100 -static struct resource au1100_lcd_resources[] = { - [0] = { - .start = LCD_PHYS_ADDR, - .end = LCD_PHYS_ADDR + 0x800 - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AU1100_LCD_INT, - .end = AU1100_LCD_INT, - .flags = IORESOURCE_IRQ, - } -}; - -static u64 au1100_lcd_dmamask = DMA_BIT_MASK(32); - -static struct platform_device au1100_lcd_device = { - .name = "au1100-lcd", - .id = 0, - .dev = { - .dma_mask = &au1100_lcd_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .num_resources = ARRAY_SIZE(au1100_lcd_resources), - .resource = au1100_lcd_resources, -}; -#endif - -#ifdef CONFIG_SOC_AU1200 -/* EHCI (USB high speed host controller) */ -static struct resource au1xxx_usb_ehci_resources[] = { - [0] = { - .start = USB_EHCI_BASE, - .end = USB_EHCI_BASE + USB_EHCI_LEN - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AU1200_USB_INT, - .end = AU1200_USB_INT, - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 ehci_dmamask = DMA_BIT_MASK(32); - -static struct platform_device au1xxx_usb_ehci_device = { - .name = "au1xxx-ehci", - .id = 0, - .dev = { - .dma_mask = &ehci_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .num_resources = ARRAY_SIZE(au1xxx_usb_ehci_resources), - .resource = au1xxx_usb_ehci_resources, -}; - -/* Au1200 UDC (USB gadget controller) */ -static struct resource au1xxx_usb_gdt_resources[] = { - [0] = { - .start = USB_UDC_BASE, - .end = USB_UDC_BASE + USB_UDC_LEN - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AU1200_USB_INT, - .end = AU1200_USB_INT, - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 udc_dmamask = DMA_BIT_MASK(32); -static struct platform_device au1xxx_usb_gdt_device = { - .name = "au1xxx-udc", - .id = 0, - .dev = { - .dma_mask = &udc_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .num_resources = ARRAY_SIZE(au1xxx_usb_gdt_resources), - .resource = au1xxx_usb_gdt_resources, -}; +/* The dmamask must be set for OHCI/EHCI to work */ +static u64 alchemy_ohci_dmamask = DMA_BIT_MASK(32); +static u64 __maybe_unused alchemy_ehci_dmamask = DMA_BIT_MASK(32); -/* Au1200 UOC (USB OTG controller) */ -static struct resource au1xxx_usb_otg_resources[] = { - [0] = { - .start = USB_UOC_BASE, - .end = USB_UOC_BASE + USB_UOC_LEN - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AU1200_USB_INT, - .end = AU1200_USB_INT, - .flags = IORESOURCE_IRQ, - }, +static unsigned long alchemy_ohci_data[][2] __initdata = { + [ALCHEMY_CPU_AU1000] = { AU1000_USB_OHCI_PHYS_ADDR, AU1000_USB_HOST_INT }, + [ALCHEMY_CPU_AU1500] = { AU1000_USB_OHCI_PHYS_ADDR, AU1500_USB_HOST_INT }, + [ALCHEMY_CPU_AU1100] = { AU1000_USB_OHCI_PHYS_ADDR, AU1100_USB_HOST_INT }, + [ALCHEMY_CPU_AU1550] = { AU1550_USB_OHCI_PHYS_ADDR, AU1550_USB_HOST_INT }, + [ALCHEMY_CPU_AU1200] = { AU1200_USB_OHCI_PHYS_ADDR, AU1200_USB_INT }, }; -static u64 uoc_dmamask = DMA_BIT_MASK(32); - -static struct platform_device au1xxx_usb_otg_device = { - .name = "au1xxx-uoc", - .id = 0, - .dev = { - .dma_mask = &uoc_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .num_resources = ARRAY_SIZE(au1xxx_usb_otg_resources), - .resource = au1xxx_usb_otg_resources, +static unsigned long alchemy_ehci_data[][2] __initdata = { + [ALCHEMY_CPU_AU1200] = { AU1200_USB_EHCI_PHYS_ADDR, AU1200_USB_INT }, }; -static struct resource au1200_lcd_resources[] = { - [0] = { - .start = LCD_PHYS_ADDR, - .end = LCD_PHYS_ADDR + 0x800 - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AU1200_LCD_INT, - .end = AU1200_LCD_INT, - .flags = IORESOURCE_IRQ, +static int __init _new_usbres(struct resource **r, struct platform_device **d) +{ + *r = kzalloc(sizeof(struct resource) * 2, GFP_KERNEL); + if (!*r) + return -ENOMEM; + *d = kzalloc(sizeof(struct platform_device), GFP_KERNEL); + if (!*d) { + kfree(*r); + return -ENOMEM; } -}; - -static u64 au1200_lcd_dmamask = DMA_BIT_MASK(32); - -static struct platform_device au1200_lcd_device = { - .name = "au1200-lcd", - .id = 0, - .dev = { - .dma_mask = &au1200_lcd_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .num_resources = ARRAY_SIZE(au1200_lcd_resources), - .resource = au1200_lcd_resources, -}; -static u64 au1xxx_mmc_dmamask = DMA_BIT_MASK(32); + (*d)->dev.coherent_dma_mask = DMA_BIT_MASK(32); + (*d)->num_resources = 2; + (*d)->resource = *r; -extern struct au1xmmc_platform_data au1xmmc_platdata[2]; + return 0; +} -static struct resource au1200_mmc0_resources[] = { - [0] = { - .start = AU1100_SD0_PHYS_ADDR, - .end = AU1100_SD0_PHYS_ADDR + 0xfff, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AU1200_SD_INT, - .end = AU1200_SD_INT, - .flags = IORESOURCE_IRQ, - }, - [2] = { - .start = DSCR_CMD0_SDMS_TX0, - .end = DSCR_CMD0_SDMS_TX0, - .flags = IORESOURCE_DMA, - }, - [3] = { - .start = DSCR_CMD0_SDMS_RX0, - .end = DSCR_CMD0_SDMS_RX0, - .flags = IORESOURCE_DMA, - } -}; +static void __init alchemy_setup_usb(int ctype) +{ + struct resource *res; + struct platform_device *pdev; -static struct platform_device au1200_mmc0_device = { - .name = "au1xxx-mmc", - .id = 0, - .dev = { - .dma_mask = &au1xxx_mmc_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &au1xmmc_platdata[0], - }, - .num_resources = ARRAY_SIZE(au1200_mmc0_resources), - .resource = au1200_mmc0_resources, -}; + /* setup OHCI0. Every variant has one */ + if (_new_usbres(&res, &pdev)) + return; -#ifndef CONFIG_MIPS_DB1200 -static struct resource au1200_mmc1_resources[] = { - [0] = { - .start = AU1100_SD1_PHYS_ADDR, - .end = AU1100_SD1_PHYS_ADDR + 0xfff, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AU1200_SD_INT, - .end = AU1200_SD_INT, - .flags = IORESOURCE_IRQ, - }, - [2] = { - .start = DSCR_CMD0_SDMS_TX1, - .end = DSCR_CMD0_SDMS_TX1, - .flags = IORESOURCE_DMA, - }, - [3] = { - .start = DSCR_CMD0_SDMS_RX1, - .end = DSCR_CMD0_SDMS_RX1, - .flags = IORESOURCE_DMA, + res[0].start = alchemy_ohci_data[ctype][0]; + res[0].end = res[0].start + 0x100 - 1; + res[0].flags = IORESOURCE_MEM; + res[1].start = alchemy_ohci_data[ctype][1]; + res[1].end = res[1].start; + res[1].flags = IORESOURCE_IRQ; + pdev->name = "au1xxx-ohci"; + pdev->id = 0; + pdev->dev.dma_mask = &alchemy_ohci_dmamask; + + if (platform_device_register(pdev)) + printk(KERN_INFO "Alchemy USB: cannot add OHCI0\n"); + + + /* setup EHCI0: Au1200 */ + if (ctype == ALCHEMY_CPU_AU1200) { + if (_new_usbres(&res, &pdev)) + return; + + res[0].start = alchemy_ehci_data[ctype][0]; + res[0].end = res[0].start + 0x100 - 1; + res[0].flags = IORESOURCE_MEM; + res[1].start = alchemy_ehci_data[ctype][1]; + res[1].end = res[1].start; + res[1].flags = IORESOURCE_IRQ; + pdev->name = "au1xxx-ehci"; + pdev->id = 0; + pdev->dev.dma_mask = &alchemy_ehci_dmamask; + + if (platform_device_register(pdev)) + printk(KERN_INFO "Alchemy USB: cannot add EHCI0\n"); } -}; - -static struct platform_device au1200_mmc1_device = { - .name = "au1xxx-mmc", - .id = 1, - .dev = { - .dma_mask = &au1xxx_mmc_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &au1xmmc_platdata[1], - }, - .num_resources = ARRAY_SIZE(au1200_mmc1_resources), - .resource = au1200_mmc1_resources, -}; -#endif /* #ifndef CONFIG_MIPS_DB1200 */ -#endif /* #ifdef CONFIG_SOC_AU1200 */ - -/* All Alchemy demoboards with I2C have this #define in their headers */ -#ifdef SMBUS_PSC_BASE -static struct resource pbdb_smbus_resources[] = { - { - .start = CPHYSADDR(SMBUS_PSC_BASE), - .end = CPHYSADDR(SMBUS_PSC_BASE + 0xfffff), - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device pbdb_smbus_device = { - .name = "au1xpsc_smbus", - .id = 0, /* bus number */ - .num_resources = ARRAY_SIZE(pbdb_smbus_resources), - .resource = pbdb_smbus_resources, -}; -#endif +} /* Macro to help defining the Ethernet MAC resources */ -#define MAC_RES_COUNT 3 /* MAC regs base, MAC enable reg, MAC INT */ -#define MAC_RES(_base, _enable, _irq) \ +#define MAC_RES_COUNT 4 /* MAC regs, MAC en, MAC INT, MACDMA regs */ +#define MAC_RES(_base, _enable, _irq, _macdma) \ { \ .start = _base, \ .end = _base + 0xffff, \ @@ -389,28 +206,37 @@ static struct platform_device pbdb_smbus_device = { .start = _irq, \ .end = _irq, \ .flags = IORESOURCE_IRQ \ + }, \ + { \ + .start = _macdma, \ + .end = _macdma + 0x1ff, \ + .flags = IORESOURCE_MEM, \ } static struct resource au1xxx_eth0_resources[][MAC_RES_COUNT] __initdata = { [ALCHEMY_CPU_AU1000] = { MAC_RES(AU1000_MAC0_PHYS_ADDR, AU1000_MACEN_PHYS_ADDR, - AU1000_MAC0_DMA_INT) + AU1000_MAC0_DMA_INT, + AU1000_MACDMA0_PHYS_ADDR) }, [ALCHEMY_CPU_AU1500] = { MAC_RES(AU1500_MAC0_PHYS_ADDR, AU1500_MACEN_PHYS_ADDR, - AU1500_MAC0_DMA_INT) + AU1500_MAC0_DMA_INT, + AU1000_MACDMA0_PHYS_ADDR) }, [ALCHEMY_CPU_AU1100] = { MAC_RES(AU1000_MAC0_PHYS_ADDR, AU1000_MACEN_PHYS_ADDR, - AU1100_MAC0_DMA_INT) + AU1100_MAC0_DMA_INT, + AU1000_MACDMA0_PHYS_ADDR) }, [ALCHEMY_CPU_AU1550] = { MAC_RES(AU1000_MAC0_PHYS_ADDR, AU1000_MACEN_PHYS_ADDR, - AU1550_MAC0_DMA_INT) + AU1550_MAC0_DMA_INT, + AU1000_MACDMA0_PHYS_ADDR) }, }; @@ -429,17 +255,20 @@ static struct resource au1xxx_eth1_resources[][MAC_RES_COUNT] __initdata = { [ALCHEMY_CPU_AU1000] = { MAC_RES(AU1000_MAC1_PHYS_ADDR, AU1000_MACEN_PHYS_ADDR + 4, - AU1000_MAC1_DMA_INT) + AU1000_MAC1_DMA_INT, + AU1000_MACDMA1_PHYS_ADDR) }, [ALCHEMY_CPU_AU1500] = { MAC_RES(AU1500_MAC1_PHYS_ADDR, AU1500_MACEN_PHYS_ADDR + 4, - AU1500_MAC1_DMA_INT) + AU1500_MAC1_DMA_INT, + AU1000_MACDMA1_PHYS_ADDR) }, [ALCHEMY_CPU_AU1550] = { MAC_RES(AU1000_MAC1_PHYS_ADDR, AU1000_MACEN_PHYS_ADDR + 4, - AU1550_MAC1_DMA_INT) + AU1550_MAC1_DMA_INT, + AU1000_MACDMA1_PHYS_ADDR) }, }; @@ -521,36 +350,15 @@ static void __init alchemy_setup_macs(int ctype) } } -static struct platform_device *au1xxx_platform_devices[] __initdata = { - &au1xxx_usb_ohci_device, -#ifdef CONFIG_FB_AU1100 - &au1100_lcd_device, -#endif -#ifdef CONFIG_SOC_AU1200 - &au1xxx_usb_ehci_device, - &au1xxx_usb_gdt_device, - &au1xxx_usb_otg_device, - &au1200_lcd_device, - &au1200_mmc0_device, -#ifndef CONFIG_MIPS_DB1200 - &au1200_mmc1_device, -#endif -#endif -#ifdef SMBUS_PSC_BASE - &pbdb_smbus_device, -#endif -}; - static int __init au1xxx_platform_init(void) { - int err, ctype = alchemy_get_cputype(); + int ctype = alchemy_get_cputype(); alchemy_setup_uarts(ctype); alchemy_setup_macs(ctype); + alchemy_setup_usb(ctype); - err = platform_add_devices(au1xxx_platform_devices, - ARRAY_SIZE(au1xxx_platform_devices)); - return err; + return 0; } arch_initcall(au1xxx_platform_init); diff --git a/arch/mips/alchemy/common/power.c b/arch/mips/alchemy/common/power.c index b86324a42601..bdd6651e9a4f 100644 --- a/arch/mips/alchemy/common/power.c +++ b/arch/mips/alchemy/common/power.c @@ -37,8 +37,6 @@ #include <asm/uaccess.h> #include <asm/mach-au1x00/au1000.h> -#ifdef CONFIG_PM - /* * We need to save/restore a bunch of core registers that are * either volatile or reset to some state across a processor sleep. @@ -49,7 +47,6 @@ * We only have to save/restore registers that aren't otherwise * done as part of a driver pm_* function. */ -static unsigned int sleep_usb[2]; static unsigned int sleep_sys_clocks[5]; static unsigned int sleep_sys_pinfunc; static unsigned int sleep_static_memctlr[4][3]; @@ -57,31 +54,6 @@ static unsigned int sleep_static_memctlr[4][3]; static void save_core_regs(void) { -#ifndef CONFIG_SOC_AU1200 - /* Shutdown USB host/device. */ - sleep_usb[0] = au_readl(USB_HOST_CONFIG); - - /* There appears to be some undocumented reset register.... */ - au_writel(0, 0xb0100004); - au_sync(); - au_writel(0, USB_HOST_CONFIG); - au_sync(); - - sleep_usb[1] = au_readl(USBD_ENABLE); - au_writel(0, USBD_ENABLE); - au_sync(); - -#else /* AU1200 */ - - /* enable access to OTG mmio so we can save OTG CAP/MUX. - * FIXME: write an OTG driver and move this stuff there! - */ - au_writel(au_readl(USB_MSR_BASE + 4) | (1 << 6), USB_MSR_BASE + 4); - au_sync(); - sleep_usb[0] = au_readl(0xb4020020); /* OTG_CAP */ - sleep_usb[1] = au_readl(0xb4020024); /* OTG_MUX */ -#endif - /* Clocks and PLLs. */ sleep_sys_clocks[0] = au_readl(SYS_FREQCTRL0); sleep_sys_clocks[1] = au_readl(SYS_FREQCTRL1); @@ -125,22 +97,6 @@ static void restore_core_regs(void) au_writel(sleep_sys_pinfunc, SYS_PINFUNC); au_sync(); -#ifndef CONFIG_SOC_AU1200 - au_writel(sleep_usb[0], USB_HOST_CONFIG); - au_writel(sleep_usb[1], USBD_ENABLE); - au_sync(); -#else - /* enable access to OTG memory */ - au_writel(au_readl(USB_MSR_BASE + 4) | (1 << 6), USB_MSR_BASE + 4); - au_sync(); - - /* restore OTG caps and port mux. */ - au_writel(sleep_usb[0], 0xb4020020 + 0); /* OTG_CAP */ - au_sync(); - au_writel(sleep_usb[1], 0xb4020020 + 4); /* OTG_MUX */ - au_sync(); -#endif - /* Restore the static memory controller configuration. */ au_writel(sleep_static_memctlr[0][0], MEM_STCFG0); au_writel(sleep_static_memctlr[0][1], MEM_STTIME0); @@ -174,5 +130,3 @@ void au_sleep(void) restore_core_regs(); } - -#endif /* CONFIG_PM */ diff --git a/arch/mips/alchemy/common/setup.c b/arch/mips/alchemy/common/setup.c index 1b887c868417..37ffd997c616 100644 --- a/arch/mips/alchemy/common/setup.c +++ b/arch/mips/alchemy/common/setup.c @@ -73,8 +73,8 @@ void __init plat_mem_setup(void) /* This routine should be valid for all Au1x based boards */ phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size) { - u32 start = (u32)Au1500_PCI_MEM_START; - u32 end = (u32)Au1500_PCI_MEM_END; + unsigned long start = ALCHEMY_PCI_MEMWIN_START; + unsigned long end = ALCHEMY_PCI_MEMWIN_END; /* Don't fixup 36-bit addresses */ if ((phys_addr >> 32) != 0) @@ -82,7 +82,7 @@ phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size) /* Check for PCI memory window */ if (phys_addr >= start && (phys_addr + size - 1) <= end) - return (phys_t)((phys_addr - start) + Au1500_PCI_MEM_START); + return (phys_t)(AU1500_PCI_MEM_PHYS_ADDR + phys_addr); /* default nop */ return phys_addr; diff --git a/arch/mips/alchemy/devboards/db1200/platform.c b/arch/mips/alchemy/devboards/db1200/platform.c index dda090bf74e6..c61867c93c4a 100644 --- a/arch/mips/alchemy/devboards/db1200/platform.c +++ b/arch/mips/alchemy/devboards/db1200/platform.c @@ -213,7 +213,12 @@ static struct resource db1200_ide_res[] = { .start = DB1200_IDE_INT, .end = DB1200_IDE_INT, .flags = IORESOURCE_IRQ, - } + }, + [2] = { + .start = AU1200_DSCR_CMD0_DMA_REQ1, + .end = AU1200_DSCR_CMD0_DMA_REQ1, + .flags = IORESOURCE_DMA, + }, }; static u64 ide_dmamask = DMA_BIT_MASK(32); @@ -328,23 +333,85 @@ static struct led_classdev db1200_mmc_led = { .brightness_set = db1200_mmcled_set, }; -/* needed by arch/mips/alchemy/common/platform.c */ -struct au1xmmc_platform_data au1xmmc_platdata[] = { +static struct au1xmmc_platform_data db1200mmc_platdata = { + .cd_setup = db1200_mmc_cd_setup, + .set_power = db1200_mmc_set_power, + .card_inserted = db1200_mmc_card_inserted, + .card_readonly = db1200_mmc_card_readonly, + .led = &db1200_mmc_led, +}; + +static struct resource au1200_mmc0_resources[] = { [0] = { - .cd_setup = db1200_mmc_cd_setup, - .set_power = db1200_mmc_set_power, - .card_inserted = db1200_mmc_card_inserted, - .card_readonly = db1200_mmc_card_readonly, - .led = &db1200_mmc_led, + .start = AU1100_SD0_PHYS_ADDR, + .end = AU1100_SD0_PHYS_ADDR + 0xfff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AU1200_SD_INT, + .end = AU1200_SD_INT, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = AU1200_DSCR_CMD0_SDMS_TX0, + .end = AU1200_DSCR_CMD0_SDMS_TX0, + .flags = IORESOURCE_DMA, + }, + [3] = { + .start = AU1200_DSCR_CMD0_SDMS_RX0, + .end = AU1200_DSCR_CMD0_SDMS_RX0, + .flags = IORESOURCE_DMA, + } +}; + +static u64 au1xxx_mmc_dmamask = DMA_BIT_MASK(32); + +static struct platform_device db1200_mmc0_dev = { + .name = "au1xxx-mmc", + .id = 0, + .dev = { + .dma_mask = &au1xxx_mmc_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &db1200mmc_platdata, + }, + .num_resources = ARRAY_SIZE(au1200_mmc0_resources), + .resource = au1200_mmc0_resources, +}; + +/**********************************************************************/ + +static struct resource au1200_lcd_res[] = { + [0] = { + .start = AU1200_LCD_PHYS_ADDR, + .end = AU1200_LCD_PHYS_ADDR + 0x800 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AU1200_LCD_INT, + .end = AU1200_LCD_INT, + .flags = IORESOURCE_IRQ, + } +}; + +static u64 au1200_lcd_dmamask = DMA_BIT_MASK(32); + +static struct platform_device au1200_lcd_dev = { + .name = "au1200-lcd", + .id = 0, + .dev = { + .dma_mask = &au1200_lcd_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), }, + .num_resources = ARRAY_SIZE(au1200_lcd_res), + .resource = au1200_lcd_res, }; /**********************************************************************/ static struct resource au1200_psc0_res[] = { [0] = { - .start = PSC0_PHYS_ADDR, - .end = PSC0_PHYS_ADDR + 0x000fffff, + .start = AU1550_PSC0_PHYS_ADDR, + .end = AU1550_PSC0_PHYS_ADDR + 0xfff, .flags = IORESOURCE_MEM, }, [1] = { @@ -353,13 +420,13 @@ static struct resource au1200_psc0_res[] = { .flags = IORESOURCE_IRQ, }, [2] = { - .start = DSCR_CMD0_PSC0_TX, - .end = DSCR_CMD0_PSC0_TX, + .start = AU1200_DSCR_CMD0_PSC0_TX, + .end = AU1200_DSCR_CMD0_PSC0_TX, .flags = IORESOURCE_DMA, }, [3] = { - .start = DSCR_CMD0_PSC0_RX, - .end = DSCR_CMD0_PSC0_RX, + .start = AU1200_DSCR_CMD0_PSC0_RX, + .end = AU1200_DSCR_CMD0_PSC0_RX, .flags = IORESOURCE_DMA, }, }; @@ -401,8 +468,8 @@ static struct platform_device db1200_spi_dev = { static struct resource au1200_psc1_res[] = { [0] = { - .start = PSC1_PHYS_ADDR, - .end = PSC1_PHYS_ADDR + 0x000fffff, + .start = AU1550_PSC1_PHYS_ADDR, + .end = AU1550_PSC1_PHYS_ADDR + 0xfff, .flags = IORESOURCE_MEM, }, [1] = { @@ -411,13 +478,13 @@ static struct resource au1200_psc1_res[] = { .flags = IORESOURCE_IRQ, }, [2] = { - .start = DSCR_CMD0_PSC1_TX, - .end = DSCR_CMD0_PSC1_TX, + .start = AU1200_DSCR_CMD0_PSC1_TX, + .end = AU1200_DSCR_CMD0_PSC1_TX, .flags = IORESOURCE_DMA, }, [3] = { - .start = DSCR_CMD0_PSC1_RX, - .end = DSCR_CMD0_PSC1_RX, + .start = AU1200_DSCR_CMD0_PSC1_RX, + .end = AU1200_DSCR_CMD0_PSC1_RX, .flags = IORESOURCE_DMA, }, }; @@ -449,6 +516,8 @@ static struct platform_device db1200_audiodma_dev = { static struct platform_device *db1200_devs[] __initdata = { NULL, /* PSC0, selected by S6.8 */ &db1200_ide_dev, + &db1200_mmc0_dev, + &au1200_lcd_dev, &db1200_eth_dev, &db1200_rtc_dev, &db1200_nand_dev, @@ -526,32 +595,28 @@ static int __init db1200_dev_init(void) /* Audio PSC clock is supplied externally. (FIXME: platdata!!) */ __raw_writel(PSC_SEL_CLK_SERCLK, - (void __iomem *)KSEG1ADDR(PSC1_PHYS_ADDR) + PSC_SEL_OFFSET); + (void __iomem *)KSEG1ADDR(AU1550_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET); wmb(); - db1x_register_pcmcia_socket(PCMCIA_ATTR_PHYS_ADDR, - PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1, - PCMCIA_MEM_PHYS_ADDR, - PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1, - PCMCIA_IO_PHYS_ADDR, - PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1, - DB1200_PC0_INT, - DB1200_PC0_INSERT_INT, - /*DB1200_PC0_STSCHG_INT*/0, - DB1200_PC0_EJECT_INT, - 0); - - db1x_register_pcmcia_socket(PCMCIA_ATTR_PHYS_ADDR + 0x004000000, - PCMCIA_ATTR_PHYS_ADDR + 0x004400000 - 1, - PCMCIA_MEM_PHYS_ADDR + 0x004000000, - PCMCIA_MEM_PHYS_ADDR + 0x004400000 - 1, - PCMCIA_IO_PHYS_ADDR + 0x004000000, - PCMCIA_IO_PHYS_ADDR + 0x004010000 - 1, - DB1200_PC1_INT, - DB1200_PC1_INSERT_INT, - /*DB1200_PC1_STSCHG_INT*/0, - DB1200_PC1_EJECT_INT, - 1); + db1x_register_pcmcia_socket( + AU1000_PCMCIA_ATTR_PHYS_ADDR, + AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1, + AU1000_PCMCIA_MEM_PHYS_ADDR, + AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1, + AU1000_PCMCIA_IO_PHYS_ADDR, + AU1000_PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1, + DB1200_PC0_INT, DB1200_PC0_INSERT_INT, + /*DB1200_PC0_STSCHG_INT*/0, DB1200_PC0_EJECT_INT, 0); + + db1x_register_pcmcia_socket( + AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004000000, + AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004400000 - 1, + AU1000_PCMCIA_MEM_PHYS_ADDR + 0x004000000, + AU1000_PCMCIA_MEM_PHYS_ADDR + 0x004400000 - 1, + AU1000_PCMCIA_IO_PHYS_ADDR + 0x004000000, + AU1000_PCMCIA_IO_PHYS_ADDR + 0x004010000 - 1, + DB1200_PC1_INT, DB1200_PC1_INSERT_INT, + /*DB1200_PC1_STSCHG_INT*/0, DB1200_PC1_EJECT_INT, 1); swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1200_SWAPBOOT; db1x_register_norflash(64 << 20, 2, swapped); diff --git a/arch/mips/alchemy/devboards/db1x00/board_setup.c b/arch/mips/alchemy/devboards/db1x00/board_setup.c index 5c956fe8760f..7cd36e631f6c 100644 --- a/arch/mips/alchemy/devboards/db1x00/board_setup.c +++ b/arch/mips/alchemy/devboards/db1x00/board_setup.c @@ -40,24 +40,6 @@ #include <prom.h> -#ifdef CONFIG_MIPS_DB1500 -char irq_tab_alchemy[][5] __initdata = { - [12] = { -1, AU1500_PCI_INTA, 0xff, 0xff, 0xff }, /* IDSEL 12 - HPT371 */ - [13] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, AU1500_PCI_INTC, AU1500_PCI_INTD }, /* IDSEL 13 - PCI slot */ -}; - -#endif - - -#ifdef CONFIG_MIPS_DB1550 -char irq_tab_alchemy[][5] __initdata = { - [11] = { -1, AU1550_PCI_INTC, 0xff, 0xff, 0xff }, /* IDSEL 11 - on-board HPT371 */ - [12] = { -1, AU1550_PCI_INTB, AU1550_PCI_INTC, AU1550_PCI_INTD, AU1550_PCI_INTA }, /* IDSEL 12 - PCI slot 2 (left) */ - [13] = { -1, AU1550_PCI_INTA, AU1550_PCI_INTB, AU1550_PCI_INTC, AU1550_PCI_INTD }, /* IDSEL 13 - PCI slot 1 (right) */ -}; -#endif - - #ifdef CONFIG_MIPS_BOSPORUS char irq_tab_alchemy[][5] __initdata = { [11] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, 0xff, 0xff }, /* IDSEL 11 - miniPCI */ @@ -91,12 +73,6 @@ const char *get_system_type(void) #ifdef CONFIG_MIPS_MIRAGE -char irq_tab_alchemy[][5] __initdata = { - [11] = { -1, AU1500_PCI_INTD, 0xff, 0xff, 0xff }, /* IDSEL 11 - SMI VGX */ - [12] = { -1, 0xff, 0xff, AU1500_PCI_INTC, 0xff }, /* IDSEL 12 - PNX1300 */ - [13] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, 0xff, 0xff }, /* IDSEL 13 - miniPCI */ -}; - static void mirage_power_off(void) { alchemy_gpio_direction_output(210, 1); @@ -158,9 +134,7 @@ void __init board_setup(void) /* initialize board register space */ bcsr_init(bcsr1, bcsr2); - /* Not valid for Au1550 */ -#if defined(CONFIG_IRDA) && \ - (defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1100)) +#if defined(CONFIG_IRDA) && defined(CONFIG_AU1000_FIR) { u32 pin_func; diff --git a/arch/mips/alchemy/devboards/db1x00/platform.c b/arch/mips/alchemy/devboards/db1x00/platform.c index 7057d28f7301..9e6b3d442acd 100644 --- a/arch/mips/alchemy/devboards/db1x00/platform.c +++ b/arch/mips/alchemy/devboards/db1x00/platform.c @@ -20,14 +20,16 @@ #include <linux/init.h> #include <linux/interrupt.h> +#include <linux/dma-mapping.h> #include <linux/platform_device.h> #include <asm/mach-au1x00/au1000.h> #include <asm/mach-au1x00/au1000_dma.h> -#include <asm/mach-au1x00/au1xxx.h> #include <asm/mach-db1x00/bcsr.h> #include "../platform.h" +struct pci_dev; + /* DB1xxx PCMCIA interrupt sources: * CD0/1 GPIO0/3 * STSCHG0/1 GPIO1/4 @@ -88,6 +90,155 @@ #endif #endif +#ifdef CONFIG_PCI +#ifdef CONFIG_MIPS_DB1500 +static int db1xxx_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin) +{ + if ((slot < 12) || (slot > 13) || pin == 0) + return -1; + if (slot == 12) + return (pin == 1) ? AU1500_PCI_INTA : 0xff; + if (slot == 13) { + switch (pin) { + case 1: return AU1500_PCI_INTA; + case 2: return AU1500_PCI_INTB; + case 3: return AU1500_PCI_INTC; + case 4: return AU1500_PCI_INTD; + } + } + return -1; +} +#endif + +#ifdef CONFIG_MIPS_DB1550 +static int db1xxx_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin) +{ + if ((slot < 11) || (slot > 13) || pin == 0) + return -1; + if (slot == 11) + return (pin == 1) ? AU1550_PCI_INTC : 0xff; + if (slot == 12) { + switch (pin) { + case 1: return AU1550_PCI_INTB; + case 2: return AU1550_PCI_INTC; + case 3: return AU1550_PCI_INTD; + case 4: return AU1550_PCI_INTA; + } + } + if (slot == 13) { + switch (pin) { + case 1: return AU1550_PCI_INTA; + case 2: return AU1550_PCI_INTB; + case 3: return AU1550_PCI_INTC; + case 4: return AU1550_PCI_INTD; + } + } + return -1; +} +#endif + +#ifdef CONFIG_MIPS_BOSPORUS +static int db1xxx_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin) +{ + if ((slot < 11) || (slot > 13) || pin == 0) + return -1; + if (slot == 12) + return (pin == 1) ? AU1500_PCI_INTA : 0xff; + if (slot == 11) { + switch (pin) { + case 1: return AU1500_PCI_INTA; + case 2: return AU1500_PCI_INTB; + default: return 0xff; + } + } + if (slot == 13) { + switch (pin) { + case 1: return AU1500_PCI_INTA; + case 2: return AU1500_PCI_INTB; + case 3: return AU1500_PCI_INTC; + case 4: return AU1500_PCI_INTD; + } + } + return -1; +} +#endif + +#ifdef CONFIG_MIPS_MIRAGE +static int db1xxx_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin) +{ + if ((slot < 11) || (slot > 13) || pin == 0) + return -1; + if (slot == 11) + return (pin == 1) ? AU1500_PCI_INTD : 0xff; + if (slot == 12) + return (pin == 3) ? AU1500_PCI_INTC : 0xff; + if (slot == 13) { + switch (pin) { + case 1: return AU1500_PCI_INTA; + case 2: return AU1500_PCI_INTB; + default: return 0xff; + } + } + return -1; +} +#endif + +static struct resource alchemy_pci_host_res[] = { + [0] = { + .start = AU1500_PCI_PHYS_ADDR, + .end = AU1500_PCI_PHYS_ADDR + 0xfff, + .flags = IORESOURCE_MEM, + }, +}; + +static struct alchemy_pci_platdata db1xxx_pci_pd = { + .board_map_irq = db1xxx_map_pci_irq, +}; + +static struct platform_device db1xxx_pci_host_dev = { + .dev.platform_data = &db1xxx_pci_pd, + .name = "alchemy-pci", + .id = 0, + .num_resources = ARRAY_SIZE(alchemy_pci_host_res), + .resource = alchemy_pci_host_res, +}; + +static int __init db15x0_pci_init(void) +{ + return platform_device_register(&db1xxx_pci_host_dev); +} +/* must be arch_initcall; MIPS PCI scans busses in a subsys_initcall */ +arch_initcall(db15x0_pci_init); +#endif + +#ifdef CONFIG_MIPS_DB1100 +static struct resource au1100_lcd_resources[] = { + [0] = { + .start = AU1100_LCD_PHYS_ADDR, + .end = AU1100_LCD_PHYS_ADDR + 0x800 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AU1100_LCD_INT, + .end = AU1100_LCD_INT, + .flags = IORESOURCE_IRQ, + } +}; + +static u64 au1100_lcd_dmamask = DMA_BIT_MASK(32); + +static struct platform_device au1100_lcd_device = { + .name = "au1100-lcd", + .id = 0, + .dev = { + .dma_mask = &au1100_lcd_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .num_resources = ARRAY_SIZE(au1100_lcd_resources), + .resource = au1100_lcd_resources, +}; +#endif + static struct resource alchemy_ac97c_res[] = { [0] = { .start = AU1000_AC97_PHYS_ADDR, @@ -130,29 +281,28 @@ static struct platform_device db1x00_audio_dev = { static int __init db1xxx_dev_init(void) { #ifdef DB1XXX_HAS_PCMCIA - db1x_register_pcmcia_socket(PCMCIA_ATTR_PHYS_ADDR, - PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1, - PCMCIA_MEM_PHYS_ADDR, - PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1, - PCMCIA_IO_PHYS_ADDR, - PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1, - DB1XXX_PCMCIA_CARD0, - DB1XXX_PCMCIA_CD0, - /*DB1XXX_PCMCIA_STSCHG0*/0, - 0, - 0); - - db1x_register_pcmcia_socket(PCMCIA_ATTR_PHYS_ADDR + 0x004000000, - PCMCIA_ATTR_PHYS_ADDR + 0x004400000 - 1, - PCMCIA_MEM_PHYS_ADDR + 0x004000000, - PCMCIA_MEM_PHYS_ADDR + 0x004400000 - 1, - PCMCIA_IO_PHYS_ADDR + 0x004000000, - PCMCIA_IO_PHYS_ADDR + 0x004010000 - 1, - DB1XXX_PCMCIA_CARD1, - DB1XXX_PCMCIA_CD1, - /*DB1XXX_PCMCIA_STSCHG1*/0, - 0, - 1); + db1x_register_pcmcia_socket( + AU1000_PCMCIA_ATTR_PHYS_ADDR, + AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1, + AU1000_PCMCIA_MEM_PHYS_ADDR, + AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1, + AU1000_PCMCIA_IO_PHYS_ADDR, + AU1000_PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1, + DB1XXX_PCMCIA_CARD0, DB1XXX_PCMCIA_CD0, + /*DB1XXX_PCMCIA_STSCHG0*/0, 0, 0); + + db1x_register_pcmcia_socket( + AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004000000, + AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004400000 - 1, + AU1000_PCMCIA_MEM_PHYS_ADDR + 0x004000000, + AU1000_PCMCIA_MEM_PHYS_ADDR + 0x004400000 - 1, + AU1000_PCMCIA_IO_PHYS_ADDR + 0x004000000, + AU1000_PCMCIA_IO_PHYS_ADDR + 0x004010000 - 1, + DB1XXX_PCMCIA_CARD1, DB1XXX_PCMCIA_CD1, + /*DB1XXX_PCMCIA_STSCHG1*/0, 0, 1); +#endif +#ifdef CONFIG_MIPS_DB1100 + platform_device_register(&au1100_lcd_device); #endif db1x_register_norflash(BOARD_FLASH_SIZE, BOARD_FLASH_WIDTH, F_SWAPPED); diff --git a/arch/mips/alchemy/devboards/pb1100/platform.c b/arch/mips/alchemy/devboards/pb1100/platform.c index 2c8dc29759fd..9c57c01a68c4 100644 --- a/arch/mips/alchemy/devboards/pb1100/platform.c +++ b/arch/mips/alchemy/devboards/pb1100/platform.c @@ -19,31 +19,58 @@ */ #include <linux/init.h> +#include <linux/dma-mapping.h> +#include <linux/platform_device.h> #include <asm/mach-au1x00/au1000.h> #include <asm/mach-db1x00/bcsr.h> #include "../platform.h" +static struct resource au1100_lcd_resources[] = { + [0] = { + .start = AU1100_LCD_PHYS_ADDR, + .end = AU1100_LCD_PHYS_ADDR + 0x800 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AU1100_LCD_INT, + .end = AU1100_LCD_INT, + .flags = IORESOURCE_IRQ, + } +}; + +static u64 au1100_lcd_dmamask = DMA_BIT_MASK(32); + +static struct platform_device au1100_lcd_device = { + .name = "au1100-lcd", + .id = 0, + .dev = { + .dma_mask = &au1100_lcd_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .num_resources = ARRAY_SIZE(au1100_lcd_resources), + .resource = au1100_lcd_resources, +}; + static int __init pb1100_dev_init(void) { int swapped; /* PCMCIA. single socket, identical to Pb1500 */ - db1x_register_pcmcia_socket(PCMCIA_ATTR_PHYS_ADDR, - PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1, - PCMCIA_MEM_PHYS_ADDR, - PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1, - PCMCIA_IO_PHYS_ADDR, - PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1, - AU1100_GPIO11_INT, /* card */ - AU1100_GPIO9_INT, /* insert */ - /*AU1100_GPIO10_INT*/0, /* stschg */ - 0, /* eject */ - 0); /* id */ + db1x_register_pcmcia_socket( + AU1000_PCMCIA_ATTR_PHYS_ADDR, + AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1, + AU1000_PCMCIA_MEM_PHYS_ADDR, + AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1, + AU1000_PCMCIA_IO_PHYS_ADDR, + AU1000_PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1, + AU1100_GPIO11_INT, AU1100_GPIO9_INT, /* card / insert */ + /*AU1100_GPIO10_INT*/0, 0, 0); /* stschg / eject / id */ swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT; db1x_register_norflash(64 * 1024 * 1024, 4, swapped); + platform_device_register(&au1100_lcd_device); return 0; } diff --git a/arch/mips/alchemy/devboards/pb1200/platform.c b/arch/mips/alchemy/devboards/pb1200/platform.c index 3ef2dceeb796..54f7f7b0676e 100644 --- a/arch/mips/alchemy/devboards/pb1200/platform.c +++ b/arch/mips/alchemy/devboards/pb1200/platform.c @@ -24,9 +24,11 @@ #include <linux/platform_device.h> #include <linux/smc91x.h> -#include <asm/mach-au1x00/au1xxx.h> +#include <asm/mach-au1x00/au1000.h> #include <asm/mach-au1x00/au1100_mmc.h> +#include <asm/mach-au1x00/au1xxx_dbdma.h> #include <asm/mach-db1x00/bcsr.h> +#include <asm/mach-pb1x00/pb1200.h> #include "../platform.h" @@ -88,7 +90,7 @@ static int pb1200mmc1_card_inserted(void *mmc_host) return (bcsr_read(BCSR_SIGSTAT) & BCSR_INT_SD1INSERT) ? 1 : 0; } -const struct au1xmmc_platform_data au1xmmc_platdata[2] = { +static struct au1xmmc_platform_data pb1200mmc_platdata[2] = { [0] = { .set_power = pb1200mmc0_set_power, .card_inserted = pb1200mmc0_card_inserted, @@ -105,6 +107,79 @@ const struct au1xmmc_platform_data au1xmmc_platdata[2] = { }, }; +static u64 au1xxx_mmc_dmamask = DMA_BIT_MASK(32); + +static struct resource au1200_mmc0_res[] = { + [0] = { + .start = AU1100_SD0_PHYS_ADDR, + .end = AU1100_SD0_PHYS_ADDR + 0xfff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AU1200_SD_INT, + .end = AU1200_SD_INT, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = AU1200_DSCR_CMD0_SDMS_TX0, + .end = AU1200_DSCR_CMD0_SDMS_TX0, + .flags = IORESOURCE_DMA, + }, + [3] = { + .start = AU1200_DSCR_CMD0_SDMS_RX0, + .end = AU1200_DSCR_CMD0_SDMS_RX0, + .flags = IORESOURCE_DMA, + } +}; + +static struct platform_device pb1200_mmc0_dev = { + .name = "au1xxx-mmc", + .id = 0, + .dev = { + .dma_mask = &au1xxx_mmc_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &pb1200mmc_platdata[0], + }, + .num_resources = ARRAY_SIZE(au1200_mmc0_res), + .resource = au1200_mmc0_res, +}; + +static struct resource au1200_mmc1_res[] = { + [0] = { + .start = AU1100_SD1_PHYS_ADDR, + .end = AU1100_SD1_PHYS_ADDR + 0xfff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AU1200_SD_INT, + .end = AU1200_SD_INT, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = AU1200_DSCR_CMD0_SDMS_TX1, + .end = AU1200_DSCR_CMD0_SDMS_TX1, + .flags = IORESOURCE_DMA, + }, + [3] = { + .start = AU1200_DSCR_CMD0_SDMS_RX1, + .end = AU1200_DSCR_CMD0_SDMS_RX1, + .flags = IORESOURCE_DMA, + } +}; + +static struct platform_device pb1200_mmc1_dev = { + .name = "au1xxx-mmc", + .id = 1, + .dev = { + .dma_mask = &au1xxx_mmc_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &pb1200mmc_platdata[1], + }, + .num_resources = ARRAY_SIZE(au1200_mmc1_res), + .resource = au1200_mmc1_res, +}; + + static struct resource ide_resources[] = { [0] = { .start = IDE_PHYS_ADDR, @@ -115,7 +190,12 @@ static struct resource ide_resources[] = { .start = IDE_INT, .end = IDE_INT, .flags = IORESOURCE_IRQ - } + }, + [2] = { + .start = AU1200_DSCR_CMD0_DMA_REQ1, + .end = AU1200_DSCR_CMD0_DMA_REQ1, + .flags = IORESOURCE_DMA, + }, }; static u64 ide_dmamask = DMA_BIT_MASK(32); @@ -161,38 +241,94 @@ static struct platform_device smc91c111_device = { .resource = smc91c111_resources }; +static struct resource au1200_psc0_res[] = { + [0] = { + .start = AU1550_PSC0_PHYS_ADDR, + .end = AU1550_PSC0_PHYS_ADDR + 0xfff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AU1200_PSC0_INT, + .end = AU1200_PSC0_INT, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = AU1200_DSCR_CMD0_PSC0_TX, + .end = AU1200_DSCR_CMD0_PSC0_TX, + .flags = IORESOURCE_DMA, + }, + [3] = { + .start = AU1200_DSCR_CMD0_PSC0_RX, + .end = AU1200_DSCR_CMD0_PSC0_RX, + .flags = IORESOURCE_DMA, + }, +}; + +static struct platform_device pb1200_i2c_dev = { + .name = "au1xpsc_smbus", + .id = 0, /* bus number */ + .num_resources = ARRAY_SIZE(au1200_psc0_res), + .resource = au1200_psc0_res, +}; + +static struct resource au1200_lcd_res[] = { + [0] = { + .start = AU1200_LCD_PHYS_ADDR, + .end = AU1200_LCD_PHYS_ADDR + 0x800 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AU1200_LCD_INT, + .end = AU1200_LCD_INT, + .flags = IORESOURCE_IRQ, + } +}; + +static u64 au1200_lcd_dmamask = DMA_BIT_MASK(32); + +static struct platform_device au1200_lcd_dev = { + .name = "au1200-lcd", + .id = 0, + .dev = { + .dma_mask = &au1200_lcd_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .num_resources = ARRAY_SIZE(au1200_lcd_res), + .resource = au1200_lcd_res, +}; + static struct platform_device *board_platform_devices[] __initdata = { &ide_device, - &smc91c111_device + &smc91c111_device, + &pb1200_i2c_dev, + &pb1200_mmc0_dev, + &pb1200_mmc1_dev, + &au1200_lcd_dev, }; static int __init board_register_devices(void) { int swapped; - db1x_register_pcmcia_socket(PCMCIA_ATTR_PHYS_ADDR, - PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1, - PCMCIA_MEM_PHYS_ADDR, - PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1, - PCMCIA_IO_PHYS_ADDR, - PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1, - PB1200_PC0_INT, - PB1200_PC0_INSERT_INT, - /*PB1200_PC0_STSCHG_INT*/0, - PB1200_PC0_EJECT_INT, - 0); - - db1x_register_pcmcia_socket(PCMCIA_ATTR_PHYS_ADDR + 0x008000000, - PCMCIA_ATTR_PHYS_ADDR + 0x008400000 - 1, - PCMCIA_MEM_PHYS_ADDR + 0x008000000, - PCMCIA_MEM_PHYS_ADDR + 0x008400000 - 1, - PCMCIA_IO_PHYS_ADDR + 0x008000000, - PCMCIA_IO_PHYS_ADDR + 0x008010000 - 1, - PB1200_PC1_INT, - PB1200_PC1_INSERT_INT, - /*PB1200_PC1_STSCHG_INT*/0, - PB1200_PC1_EJECT_INT, - 1); + db1x_register_pcmcia_socket( + AU1000_PCMCIA_ATTR_PHYS_ADDR, + AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1, + AU1000_PCMCIA_MEM_PHYS_ADDR, + AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1, + AU1000_PCMCIA_IO_PHYS_ADDR, + AU1000_PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1, + PB1200_PC0_INT, PB1200_PC0_INSERT_INT, + /*PB1200_PC0_STSCHG_INT*/0, PB1200_PC0_EJECT_INT, 0); + + db1x_register_pcmcia_socket( + AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x008000000, + AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x008400000 - 1, + AU1000_PCMCIA_MEM_PHYS_ADDR + 0x008000000, + AU1000_PCMCIA_MEM_PHYS_ADDR + 0x008400000 - 1, + AU1000_PCMCIA_IO_PHYS_ADDR + 0x008000000, + AU1000_PCMCIA_IO_PHYS_ADDR + 0x008010000 - 1, + PB1200_PC1_INT, PB1200_PC1_INSERT_INT, + /*PB1200_PC1_STSCHG_INT*/0, PB1200_PC1_EJECT_INT, 1); swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1200_SWAPBOOT; db1x_register_norflash(128 * 1024 * 1024, 2, swapped); diff --git a/arch/mips/alchemy/devboards/pb1500/board_setup.c b/arch/mips/alchemy/devboards/pb1500/board_setup.c index 3b4fa3206969..37c1883b5ea9 100644 --- a/arch/mips/alchemy/devboards/pb1500/board_setup.c +++ b/arch/mips/alchemy/devboards/pb1500/board_setup.c @@ -33,13 +33,6 @@ #include <prom.h> - -char irq_tab_alchemy[][5] __initdata = { - [12] = { -1, AU1500_PCI_INTA, 0xff, 0xff, 0xff }, /* IDSEL 12 - HPT370 */ - [13] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, AU1500_PCI_INTC, AU1500_PCI_INTD }, /* IDSEL 13 - PCI slot */ -}; - - const char *get_system_type(void) { return "Alchemy Pb1500"; @@ -101,20 +94,18 @@ void __init board_setup(void) #endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */ #ifdef CONFIG_PCI - /* Setup PCI bus controller */ - au_writel(0, Au1500_PCI_CMEM); - au_writel(0x00003fff, Au1500_CFG_BASE); -#if defined(__MIPSEB__) - au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG); -#else - au_writel(0xf, Au1500_PCI_CFG); -#endif - au_writel(0xf0000000, Au1500_PCI_MWMASK_DEV); - au_writel(0, Au1500_PCI_MWBASE_REV_CCL); - au_writel(0x02a00356, Au1500_PCI_STATCMD); - au_writel(0x00003c04, Au1500_PCI_HDRTYPE); - au_writel(0x00000008, Au1500_PCI_MBAR); - au_sync(); + { + void __iomem *base = + (void __iomem *)KSEG1ADDR(AU1500_PCI_PHYS_ADDR); + /* Setup PCI bus controller */ + __raw_writel(0x00003fff, base + PCI_REG_CMEM); + __raw_writel(0xf0000000, base + PCI_REG_MWMASK_DEV); + __raw_writel(0, base + PCI_REG_MWBASE_REV_CCL); + __raw_writel(0x02a00356, base + PCI_REG_STATCMD); + __raw_writel(0x00003c04, base + PCI_REG_PARAM); + __raw_writel(0x00000008, base + PCI_REG_MBAR); + wmb(); + } #endif /* Enable sys bus clock divider when IDLE state or no bus activity. */ diff --git a/arch/mips/alchemy/devboards/pb1500/platform.c b/arch/mips/alchemy/devboards/pb1500/platform.c index d443bc7aa76e..1e52a01bac00 100644 --- a/arch/mips/alchemy/devboards/pb1500/platform.c +++ b/arch/mips/alchemy/devboards/pb1500/platform.c @@ -18,32 +18,77 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include <linux/dma-mapping.h> #include <linux/init.h> +#include <linux/platform_device.h> #include <asm/mach-au1x00/au1000.h> #include <asm/mach-db1x00/bcsr.h> #include "../platform.h" +static int pb1500_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin) +{ + if ((slot < 12) || (slot > 13) || pin == 0) + return -1; + if (slot == 12) + return (pin == 1) ? AU1500_PCI_INTA : 0xff; + if (slot == 13) { + switch (pin) { + case 1: return AU1500_PCI_INTA; + case 2: return AU1500_PCI_INTB; + case 3: return AU1500_PCI_INTC; + case 4: return AU1500_PCI_INTD; + } + } + return -1; +} + +static struct resource alchemy_pci_host_res[] = { + [0] = { + .start = AU1500_PCI_PHYS_ADDR, + .end = AU1500_PCI_PHYS_ADDR + 0xfff, + .flags = IORESOURCE_MEM, + }, +}; + +static struct alchemy_pci_platdata pb1500_pci_pd = { + .board_map_irq = pb1500_map_pci_irq, + .pci_cfg_set = PCI_CONFIG_AEN | PCI_CONFIG_R2H | PCI_CONFIG_R1H | + PCI_CONFIG_CH | +#if defined(__MIPSEB__) + PCI_CONFIG_SIC_HWA_DAT | PCI_CONFIG_SM, +#else + 0, +#endif +}; + +static struct platform_device pb1500_pci_host = { + .dev.platform_data = &pb1500_pci_pd, + .name = "alchemy-pci", + .id = 0, + .num_resources = ARRAY_SIZE(alchemy_pci_host_res), + .resource = alchemy_pci_host_res, +}; + static int __init pb1500_dev_init(void) { int swapped; - /* PCMCIA. single socket, identical to Pb1500 */ - db1x_register_pcmcia_socket(PCMCIA_ATTR_PHYS_ADDR, - PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1, - PCMCIA_MEM_PHYS_ADDR, - PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1, - PCMCIA_IO_PHYS_ADDR, - PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1, - AU1500_GPIO11_INT, /* card */ - AU1500_GPIO9_INT, /* insert */ - /*AU1500_GPIO10_INT*/0, /* stschg */ - 0, /* eject */ - 0); /* id */ + /* PCMCIA. single socket, identical to Pb1100 */ + db1x_register_pcmcia_socket( + AU1000_PCMCIA_ATTR_PHYS_ADDR, + AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1, + AU1000_PCMCIA_MEM_PHYS_ADDR, + AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1, + AU1000_PCMCIA_IO_PHYS_ADDR, + AU1000_PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1, + AU1500_GPIO11_INT, AU1500_GPIO9_INT, /* card / insert */ + /*AU1500_GPIO10_INT*/0, 0, 0); /* stschg / eject / id */ swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT; db1x_register_norflash(64 * 1024 * 1024, 4, swapped); + platform_device_register(&pb1500_pci_host); return 0; } -device_initcall(pb1500_dev_init); +arch_initcall(pb1500_dev_init); diff --git a/arch/mips/alchemy/devboards/pb1550/board_setup.c b/arch/mips/alchemy/devboards/pb1550/board_setup.c index b790213848bd..0f62d1e3df24 100644 --- a/arch/mips/alchemy/devboards/pb1550/board_setup.c +++ b/arch/mips/alchemy/devboards/pb1550/board_setup.c @@ -37,12 +37,6 @@ #include <prom.h> - -char irq_tab_alchemy[][5] __initdata = { - [12] = { -1, AU1550_PCI_INTB, AU1550_PCI_INTC, AU1550_PCI_INTD, AU1550_PCI_INTA }, /* IDSEL 12 - PCI slot 2 (left) */ - [13] = { -1, AU1550_PCI_INTA, AU1550_PCI_INTB, AU1550_PCI_INTC, AU1550_PCI_INTD }, /* IDSEL 13 - PCI slot 1 (right) */ -}; - const char *get_system_type(void) { return "Alchemy Pb1550"; diff --git a/arch/mips/alchemy/devboards/pb1550/platform.c b/arch/mips/alchemy/devboards/pb1550/platform.c index d7150d0f49c0..a4604b8a349e 100644 --- a/arch/mips/alchemy/devboards/pb1550/platform.c +++ b/arch/mips/alchemy/devboards/pb1550/platform.c @@ -18,14 +18,89 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include <linux/dma-mapping.h> #include <linux/init.h> - +#include <linux/platform_device.h> #include <asm/mach-au1x00/au1000.h> +#include <asm/mach-au1x00/au1xxx_dbdma.h> #include <asm/mach-pb1x00/pb1550.h> #include <asm/mach-db1x00/bcsr.h> #include "../platform.h" +static int pb1550_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin) +{ + if ((slot < 12) || (slot > 13) || pin == 0) + return -1; + if (slot == 12) { + switch (pin) { + case 1: return AU1500_PCI_INTB; + case 2: return AU1500_PCI_INTC; + case 3: return AU1500_PCI_INTD; + case 4: return AU1500_PCI_INTA; + } + } + if (slot == 13) { + switch (pin) { + case 1: return AU1500_PCI_INTA; + case 2: return AU1500_PCI_INTB; + case 3: return AU1500_PCI_INTC; + case 4: return AU1500_PCI_INTD; + } + } + return -1; +} + +static struct resource alchemy_pci_host_res[] = { + [0] = { + .start = AU1500_PCI_PHYS_ADDR, + .end = AU1500_PCI_PHYS_ADDR + 0xfff, + .flags = IORESOURCE_MEM, + }, +}; + +static struct alchemy_pci_platdata pb1550_pci_pd = { + .board_map_irq = pb1550_map_pci_irq, +}; + +static struct platform_device pb1550_pci_host = { + .dev.platform_data = &pb1550_pci_pd, + .name = "alchemy-pci", + .id = 0, + .num_resources = ARRAY_SIZE(alchemy_pci_host_res), + .resource = alchemy_pci_host_res, +}; + +static struct resource au1550_psc2_res[] = { + [0] = { + .start = AU1550_PSC2_PHYS_ADDR, + .end = AU1550_PSC2_PHYS_ADDR + 0xfff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AU1550_PSC2_INT, + .end = AU1550_PSC2_INT, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = AU1550_DSCR_CMD0_PSC2_TX, + .end = AU1550_DSCR_CMD0_PSC2_TX, + .flags = IORESOURCE_DMA, + }, + [3] = { + .start = AU1550_DSCR_CMD0_PSC2_RX, + .end = AU1550_DSCR_CMD0_PSC2_RX, + .flags = IORESOURCE_DMA, + }, +}; + +static struct platform_device pb1550_i2c_dev = { + .name = "au1xpsc_smbus", + .id = 0, /* bus number */ + .num_resources = ARRAY_SIZE(au1550_psc2_res), + .resource = au1550_psc2_res, +}; + static int __init pb1550_dev_init(void) { int swapped; @@ -37,33 +112,29 @@ static int __init pb1550_dev_init(void) * drivers are used to shared irqs and b) statuschange isn't really use- * ful anyway. */ - db1x_register_pcmcia_socket(PCMCIA_ATTR_PHYS_ADDR, - PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1, - PCMCIA_MEM_PHYS_ADDR, - PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1, - PCMCIA_IO_PHYS_ADDR, - PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1, - AU1550_GPIO201_205_INT, - AU1550_GPIO0_INT, - 0, - 0, - 0); + db1x_register_pcmcia_socket( + AU1000_PCMCIA_ATTR_PHYS_ADDR, + AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1, + AU1000_PCMCIA_MEM_PHYS_ADDR, + AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1, + AU1000_PCMCIA_IO_PHYS_ADDR, + AU1000_PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1, + AU1550_GPIO201_205_INT, AU1550_GPIO0_INT, 0, 0, 0); - db1x_register_pcmcia_socket(PCMCIA_ATTR_PHYS_ADDR + 0x008000000, - PCMCIA_ATTR_PHYS_ADDR + 0x008400000 - 1, - PCMCIA_MEM_PHYS_ADDR + 0x008000000, - PCMCIA_MEM_PHYS_ADDR + 0x008400000 - 1, - PCMCIA_IO_PHYS_ADDR + 0x008000000, - PCMCIA_IO_PHYS_ADDR + 0x008010000 - 1, - AU1550_GPIO201_205_INT, - AU1550_GPIO1_INT, - 0, - 0, - 1); + db1x_register_pcmcia_socket( + AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x008000000, + AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x008400000 - 1, + AU1000_PCMCIA_MEM_PHYS_ADDR + 0x008000000, + AU1000_PCMCIA_MEM_PHYS_ADDR + 0x008400000 - 1, + AU1000_PCMCIA_IO_PHYS_ADDR + 0x008000000, + AU1000_PCMCIA_IO_PHYS_ADDR + 0x008010000 - 1, + AU1550_GPIO201_205_INT, AU1550_GPIO1_INT, 0, 0, 1); swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_PB1550_SWAPBOOT; db1x_register_norflash(128 * 1024 * 1024, 4, swapped); + platform_device_register(&pb1550_pci_host); + platform_device_register(&pb1550_i2c_dev); return 0; } -device_initcall(pb1550_dev_init); +arch_initcall(pb1550_dev_init); diff --git a/arch/mips/alchemy/gpr/board_setup.c b/arch/mips/alchemy/gpr/board_setup.c index 5f8f0691ed2d..dea45c78fdcd 100644 --- a/arch/mips/alchemy/gpr/board_setup.c +++ b/arch/mips/alchemy/gpr/board_setup.c @@ -36,10 +36,6 @@ #include <prom.h> -char irq_tab_alchemy[][5] __initdata = { - [0] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, 0xff, 0xff }, -}; - static void gpr_reset(char *c) { /* switch System-LED to orange (red# and green# on) */ @@ -76,12 +72,4 @@ void __init board_setup(void) /* Take away Reset of UMTS-card */ alchemy_gpio_direction_output(215, 1); - -#ifdef CONFIG_PCI -#if defined(__MIPSEB__) - au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG); -#else - au_writel(0xf, Au1500_PCI_CFG); -#endif -#endif } diff --git a/arch/mips/alchemy/gpr/platform.c b/arch/mips/alchemy/gpr/platform.c index 14b46629cfc8..982ce85db60d 100644 --- a/arch/mips/alchemy/gpr/platform.c +++ b/arch/mips/alchemy/gpr/platform.c @@ -167,6 +167,45 @@ static struct i2c_board_info gpr_i2c_info[] __initdata = { } }; + + +static struct resource alchemy_pci_host_res[] = { + [0] = { + .start = AU1500_PCI_PHYS_ADDR, + .end = AU1500_PCI_PHYS_ADDR + 0xfff, + .flags = IORESOURCE_MEM, + }, +}; + +static int gpr_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin) +{ + if ((slot == 0) && (pin == 1)) + return AU1550_PCI_INTA; + else if ((slot == 0) && (pin == 2)) + return AU1550_PCI_INTB; + + return -1; +} + +static struct alchemy_pci_platdata gpr_pci_pd = { + .board_map_irq = gpr_map_pci_irq, + .pci_cfg_set = PCI_CONFIG_AEN | PCI_CONFIG_R2H | PCI_CONFIG_R1H | + PCI_CONFIG_CH | +#if defined(__MIPSEB__) + PCI_CONFIG_SIC_HWA_DAT | PCI_CONFIG_SM, +#else + 0, +#endif +}; + +static struct platform_device gpr_pci_host_dev = { + .dev.platform_data = &gpr_pci_pd, + .name = "alchemy-pci", + .id = 0, + .num_resources = ARRAY_SIZE(alchemy_pci_host_res), + .resource = alchemy_pci_host_res, +}; + static struct platform_device *gpr_devices[] __initdata = { &gpr_wdt_device, &gpr_mtd_device, @@ -174,6 +213,14 @@ static struct platform_device *gpr_devices[] __initdata = { &gpr_led_devices, }; +static int __init gpr_pci_init(void) +{ + return platform_device_register(&gpr_pci_host_dev); +} +/* must be arch_initcall; MIPS PCI scans busses in a subsys_initcall */ +arch_initcall(gpr_pci_init); + + static int __init gpr_dev_init(void) { i2c_register_board_info(0, gpr_i2c_info, ARRAY_SIZE(gpr_i2c_info)); diff --git a/arch/mips/alchemy/mtx-1/board_setup.c b/arch/mips/alchemy/mtx-1/board_setup.c index 3ae984cf98cf..851a5ab4c8f2 100644 --- a/arch/mips/alchemy/mtx-1/board_setup.c +++ b/arch/mips/alchemy/mtx-1/board_setup.c @@ -38,20 +38,6 @@ #include <prom.h> -char irq_tab_alchemy[][5] __initdata = { - [0] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTA, 0xff, 0xff }, /* IDSEL 00 - AdapterA-Slot0 (top) */ - [1] = { -1, AU1500_PCI_INTB, AU1500_PCI_INTA, 0xff, 0xff }, /* IDSEL 01 - AdapterA-Slot1 (bottom) */ - [2] = { -1, AU1500_PCI_INTC, AU1500_PCI_INTD, 0xff, 0xff }, /* IDSEL 02 - AdapterB-Slot0 (top) */ - [3] = { -1, AU1500_PCI_INTD, AU1500_PCI_INTC, 0xff, 0xff }, /* IDSEL 03 - AdapterB-Slot1 (bottom) */ - [4] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, 0xff, 0xff }, /* IDSEL 04 - AdapterC-Slot0 (top) */ - [5] = { -1, AU1500_PCI_INTB, AU1500_PCI_INTA, 0xff, 0xff }, /* IDSEL 05 - AdapterC-Slot1 (bottom) */ - [6] = { -1, AU1500_PCI_INTC, AU1500_PCI_INTD, 0xff, 0xff }, /* IDSEL 06 - AdapterD-Slot0 (top) */ - [7] = { -1, AU1500_PCI_INTD, AU1500_PCI_INTC, 0xff, 0xff }, /* IDSEL 07 - AdapterD-Slot1 (bottom) */ -}; - -extern int (*board_pci_idsel)(unsigned int devsel, int assert); -int mtx1_pci_idsel(unsigned int devsel, int assert); - static void mtx1_reset(char *c) { /* Jump to the reset vector */ @@ -74,15 +60,6 @@ void __init board_setup(void) alchemy_gpio_direction_output(204, 0); #endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */ -#ifdef CONFIG_PCI -#if defined(__MIPSEB__) - au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG); -#else - au_writel(0xf, Au1500_PCI_CFG); -#endif - board_pci_idsel = mtx1_pci_idsel; -#endif - /* Initialize sys_pinfunc */ au_writel(SYS_PF_NI2, SYS_PINFUNC); @@ -104,23 +81,6 @@ void __init board_setup(void) printk(KERN_INFO "4G Systems MTX-1 Board\n"); } -int -mtx1_pci_idsel(unsigned int devsel, int assert) -{ - /* This function is only necessary to support a proprietary Cardbus - * adapter on the mtx-1 "singleboard" variant. It triggers a custom - * logic chip connected to EXT_IO3 (GPIO1) to suppress IDSEL signals. - */ - if (assert && devsel != 0) - /* Suppress signal to Cardbus */ - alchemy_gpio_set_value(1, 0); /* set EXT_IO3 OFF */ - else - alchemy_gpio_set_value(1, 1); /* set EXT_IO3 ON */ - - udelay(1); - return 1; -} - static int __init mtx1_init_irq(void) { irq_set_irq_type(AU1500_GPIO204_INT, IRQF_TRIGGER_HIGH); diff --git a/arch/mips/alchemy/mtx-1/platform.c b/arch/mips/alchemy/mtx-1/platform.c index 55628e390fd7..cc47b6868ca3 100644 --- a/arch/mips/alchemy/mtx-1/platform.c +++ b/arch/mips/alchemy/mtx-1/platform.c @@ -135,7 +135,69 @@ static struct platform_device mtx1_mtd = { .resource = &mtx1_mtd_resource, }; +static struct resource alchemy_pci_host_res[] = { + [0] = { + .start = AU1500_PCI_PHYS_ADDR, + .end = AU1500_PCI_PHYS_ADDR + 0xfff, + .flags = IORESOURCE_MEM, + }, +}; + +static int mtx1_pci_idsel(unsigned int devsel, int assert) +{ + /* This function is only necessary to support a proprietary Cardbus + * adapter on the mtx-1 "singleboard" variant. It triggers a custom + * logic chip connected to EXT_IO3 (GPIO1) to suppress IDSEL signals. + */ + if (assert && devsel != 0) + /* Suppress signal to Cardbus */ + alchemy_gpio_set_value(1, 0); /* set EXT_IO3 OFF */ + else + alchemy_gpio_set_value(1, 1); /* set EXT_IO3 ON */ + + udelay(1); + return 1; +} + +static const char mtx1_irqtab[][5] = { + [0] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTA, 0xff, 0xff }, /* IDSEL 00 - AdapterA-Slot0 (top) */ + [1] = { -1, AU1500_PCI_INTB, AU1500_PCI_INTA, 0xff, 0xff }, /* IDSEL 01 - AdapterA-Slot1 (bottom) */ + [2] = { -1, AU1500_PCI_INTC, AU1500_PCI_INTD, 0xff, 0xff }, /* IDSEL 02 - AdapterB-Slot0 (top) */ + [3] = { -1, AU1500_PCI_INTD, AU1500_PCI_INTC, 0xff, 0xff }, /* IDSEL 03 - AdapterB-Slot1 (bottom) */ + [4] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, 0xff, 0xff }, /* IDSEL 04 - AdapterC-Slot0 (top) */ + [5] = { -1, AU1500_PCI_INTB, AU1500_PCI_INTA, 0xff, 0xff }, /* IDSEL 05 - AdapterC-Slot1 (bottom) */ + [6] = { -1, AU1500_PCI_INTC, AU1500_PCI_INTD, 0xff, 0xff }, /* IDSEL 06 - AdapterD-Slot0 (top) */ + [7] = { -1, AU1500_PCI_INTD, AU1500_PCI_INTC, 0xff, 0xff }, /* IDSEL 07 - AdapterD-Slot1 (bottom) */ +}; + +static int mtx1_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin) +{ + return mtx1_irqtab[slot][pin]; +} + +static struct alchemy_pci_platdata mtx1_pci_pd = { + .board_map_irq = mtx1_map_pci_irq, + .board_pci_idsel = mtx1_pci_idsel, + .pci_cfg_set = PCI_CONFIG_AEN | PCI_CONFIG_R2H | PCI_CONFIG_R1H | + PCI_CONFIG_CH | +#if defined(__MIPSEB__) + PCI_CONFIG_SIC_HWA_DAT | PCI_CONFIG_SM, +#else + 0, +#endif +}; + +static struct platform_device mtx1_pci_host = { + .dev.platform_data = &mtx1_pci_pd, + .name = "alchemy-pci", + .id = 0, + .num_resources = ARRAY_SIZE(alchemy_pci_host_res), + .resource = alchemy_pci_host_res, +}; + + static struct __initdata platform_device * mtx1_devs[] = { + &mtx1_pci_host, &mtx1_gpio_leds, &mtx1_wdt, &mtx1_button, diff --git a/arch/mips/alchemy/xxs1500/board_setup.c b/arch/mips/alchemy/xxs1500/board_setup.c index 81e57fad07ab..3fa83f72e014 100644 --- a/arch/mips/alchemy/xxs1500/board_setup.c +++ b/arch/mips/alchemy/xxs1500/board_setup.c @@ -70,14 +70,6 @@ void __init board_setup(void) /* Enable DTR (MCR bit 0) = USB power up */ __raw_writel(1, (void __iomem *)KSEG1ADDR(AU1000_UART3_PHYS_ADDR + 0x18)); wmb(); - -#ifdef CONFIG_PCI -#if defined(__MIPSEB__) - au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG); -#else - au_writel(0xf, Au1500_PCI_CFG); -#endif -#endif } static int __init xxs1500_init_irq(void) diff --git a/arch/mips/alchemy/xxs1500/platform.c b/arch/mips/alchemy/xxs1500/platform.c index e87c45cde61b..06a3a459b8aa 100644 --- a/arch/mips/alchemy/xxs1500/platform.c +++ b/arch/mips/alchemy/xxs1500/platform.c @@ -27,20 +27,20 @@ static struct resource xxs1500_pcmcia_res[] = { { .name = "pcmcia-io", .flags = IORESOURCE_MEM, - .start = PCMCIA_IO_PHYS_ADDR, - .end = PCMCIA_IO_PHYS_ADDR + 0x000400000 - 1, + .start = AU1000_PCMCIA_IO_PHYS_ADDR, + .end = AU1000_PCMCIA_IO_PHYS_ADDR + 0x000400000 - 1, }, { .name = "pcmcia-attr", .flags = IORESOURCE_MEM, - .start = PCMCIA_ATTR_PHYS_ADDR, - .end = PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1, + .start = AU1000_PCMCIA_ATTR_PHYS_ADDR, + .end = AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1, }, { .name = "pcmcia-mem", .flags = IORESOURCE_MEM, - .start = PCMCIA_MEM_PHYS_ADDR, - .end = PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1, + .start = AU1000_PCMCIA_MEM_PHYS_ADDR, + .end = AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1, }, }; diff --git a/arch/mips/include/asm/cacheflush.h b/arch/mips/include/asm/cacheflush.h index 40bb9fde205f..69468ded2828 100644 --- a/arch/mips/include/asm/cacheflush.h +++ b/arch/mips/include/asm/cacheflush.h @@ -114,4 +114,28 @@ unsigned long run_uncached(void *func); extern void *kmap_coherent(struct page *page, unsigned long addr); extern void kunmap_coherent(void); +#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE +static inline void flush_kernel_dcache_page(struct page *page) +{ + BUG_ON(cpu_has_dc_aliases && PageHighMem(page)); +} + +/* + * For now flush_kernel_vmap_range and invalidate_kernel_vmap_range both do a + * cache writeback and invalidate operation. + */ +extern void (*__flush_kernel_vmap_range)(unsigned long vaddr, int size); + +static inline void flush_kernel_vmap_range(void *vaddr, int size) +{ + if (cpu_has_dc_aliases) + __flush_kernel_vmap_range((unsigned long) vaddr, size); +} + +static inline void invalidate_kernel_vmap_range(void *vaddr, int size) +{ + if (cpu_has_dc_aliases) + __flush_kernel_vmap_range((unsigned long) vaddr, size); +} + #endif /* _ASM_CACHEFLUSH_H */ diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h index 5f95a4bfc735..2f7f41873f24 100644 --- a/arch/mips/include/asm/cpu.h +++ b/arch/mips/include/asm/cpu.h @@ -135,6 +135,9 @@ #define PRID_IMP_CAVIUM_CN50XX 0x0600 #define PRID_IMP_CAVIUM_CN52XX 0x0700 #define PRID_IMP_CAVIUM_CN63XX 0x9000 +#define PRID_IMP_CAVIUM_CN68XX 0x9100 +#define PRID_IMP_CAVIUM_CN66XX 0x9200 +#define PRID_IMP_CAVIUM_CN61XX 0x9300 /* * These are the PRID's for when 23:16 == PRID_COMP_INGENIC diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h index b04e4de5dd2e..a58f22998a86 100644 --- a/arch/mips/include/asm/io.h +++ b/arch/mips/include/asm/io.h @@ -329,14 +329,10 @@ static inline void pfx##write##bwlq(type val, \ "dsrl32 %L0, %L0, 0" "\n\t" \ "dsll32 %M0, %M0, 0" "\n\t" \ "or %L0, %L0, %M0" "\n\t" \ - ".set push" "\n\t" \ - ".set noreorder" "\n\t" \ - ".set nomacro" "\n\t" \ "sd %L0, %2" "\n\t" \ - ".set pop" "\n\t" \ ".set mips0" "\n" \ : "=r" (__tmp) \ - : "0" (__val), "R" (*__mem)); \ + : "0" (__val), "m" (*__mem)); \ if (irq) \ local_irq_restore(__flags); \ } else \ @@ -359,16 +355,12 @@ static inline type pfx##read##bwlq(const volatile void __iomem *mem) \ local_irq_save(__flags); \ __asm__ __volatile__( \ ".set mips3" "\t\t# __readq" "\n\t" \ - ".set push" "\n\t" \ - ".set noreorder" "\n\t" \ - ".set nomacro" "\n\t" \ "ld %L0, %1" "\n\t" \ - ".set pop" "\n\t" \ "dsra32 %M0, %L0, 0" "\n\t" \ "sll %L0, %L0, 0" "\n\t" \ ".set mips0" "\n" \ : "=r" (__val) \ - : "R" (*__mem)); \ + : "m" (*__mem)); \ if (irq) \ local_irq_restore(__flags); \ } else { \ diff --git a/arch/mips/include/asm/mach-au1x00/au1000.h b/arch/mips/include/asm/mach-au1x00/au1000.h index f260ebed713b..de24ec57dd2f 100644 --- a/arch/mips/include/asm/mach-au1x00/au1000.h +++ b/arch/mips/include/asm/mach-au1x00/au1000.h @@ -245,6 +245,23 @@ void alchemy_sleep_au1000(void); void alchemy_sleep_au1550(void); void au_sleep(void); +/* USB: drivers/usb/host/alchemy-common.c */ +enum alchemy_usb_block { + ALCHEMY_USB_OHCI0, + ALCHEMY_USB_UDC0, + ALCHEMY_USB_EHCI0, + ALCHEMY_USB_OTG0, +}; +int alchemy_usb_control(int block, int enable); + +/* PCI controller platform data */ +struct alchemy_pci_platdata { + int (*board_map_irq)(const struct pci_dev *d, u8 slot, u8 pin); + int (*board_pci_idsel)(unsigned int devsel, int assert); + /* bits to set/clear in PCI_CONFIG register */ + unsigned long pci_cfg_set; + unsigned long pci_cfg_clr; +}; /* SOC Interrupt numbers */ @@ -575,38 +592,95 @@ enum soc_au1200_ints { #endif /* !defined (_LANGUAGE_ASSEMBLY) */ /* - * SDRAM register offsets + * Physical base addresses for integrated peripherals + * 0..au1000 1..au1500 2..au1100 3..au1550 4..au1200 */ -#if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1500) || \ - defined(CONFIG_SOC_AU1100) -#define MEM_SDMODE0 0x0000 -#define MEM_SDMODE1 0x0004 -#define MEM_SDMODE2 0x0008 -#define MEM_SDADDR0 0x000C -#define MEM_SDADDR1 0x0010 -#define MEM_SDADDR2 0x0014 -#define MEM_SDREFCFG 0x0018 -#define MEM_SDPRECMD 0x001C -#define MEM_SDAUTOREF 0x0020 -#define MEM_SDWRMD0 0x0024 -#define MEM_SDWRMD1 0x0028 -#define MEM_SDWRMD2 0x002C -#define MEM_SDSLEEP 0x0030 -#define MEM_SDSMCKE 0x0034 -/* - * MEM_SDMODE register content definitions - */ +#define AU1000_AC97_PHYS_ADDR 0x10000000 /* 012 */ +#define AU1000_USB_OHCI_PHYS_ADDR 0x10100000 /* 012 */ +#define AU1000_USB_UDC_PHYS_ADDR 0x10200000 /* 0123 */ +#define AU1000_IRDA_PHYS_ADDR 0x10300000 /* 02 */ +#define AU1200_AES_PHYS_ADDR 0x10300000 /* 4 */ +#define AU1000_IC0_PHYS_ADDR 0x10400000 /* 01234 */ +#define AU1000_MAC0_PHYS_ADDR 0x10500000 /* 023 */ +#define AU1000_MAC1_PHYS_ADDR 0x10510000 /* 023 */ +#define AU1000_MACEN_PHYS_ADDR 0x10520000 /* 023 */ +#define AU1100_SD0_PHYS_ADDR 0x10600000 /* 24 */ +#define AU1100_SD1_PHYS_ADDR 0x10680000 /* 24 */ +#define AU1550_PSC2_PHYS_ADDR 0x10A00000 /* 3 */ +#define AU1550_PSC3_PHYS_ADDR 0x10B00000 /* 3 */ +#define AU1000_I2S_PHYS_ADDR 0x11000000 /* 02 */ +#define AU1500_MAC0_PHYS_ADDR 0x11500000 /* 1 */ +#define AU1500_MAC1_PHYS_ADDR 0x11510000 /* 1 */ +#define AU1500_MACEN_PHYS_ADDR 0x11520000 /* 1 */ +#define AU1000_UART0_PHYS_ADDR 0x11100000 /* 01234 */ +#define AU1200_SWCNT_PHYS_ADDR 0x1110010C /* 4 */ +#define AU1000_UART1_PHYS_ADDR 0x11200000 /* 0234 */ +#define AU1000_UART2_PHYS_ADDR 0x11300000 /* 0 */ +#define AU1000_UART3_PHYS_ADDR 0x11400000 /* 0123 */ +#define AU1000_SSI0_PHYS_ADDR 0x11600000 /* 02 */ +#define AU1000_SSI1_PHYS_ADDR 0x11680000 /* 02 */ +#define AU1500_GPIO2_PHYS_ADDR 0x11700000 /* 1234 */ +#define AU1000_IC1_PHYS_ADDR 0x11800000 /* 01234 */ +#define AU1000_SYS_PHYS_ADDR 0x11900000 /* 01234 */ +#define AU1550_PSC0_PHYS_ADDR 0x11A00000 /* 34 */ +#define AU1550_PSC1_PHYS_ADDR 0x11B00000 /* 34 */ +#define AU1000_MEM_PHYS_ADDR 0x14000000 /* 01234 */ +#define AU1000_STATIC_MEM_PHYS_ADDR 0x14001000 /* 01234 */ +#define AU1000_DMA_PHYS_ADDR 0x14002000 /* 012 */ +#define AU1550_DBDMA_PHYS_ADDR 0x14002000 /* 34 */ +#define AU1550_DBDMA_CONF_PHYS_ADDR 0x14003000 /* 34 */ +#define AU1000_MACDMA0_PHYS_ADDR 0x14004000 /* 0123 */ +#define AU1000_MACDMA1_PHYS_ADDR 0x14004200 /* 0123 */ +#define AU1200_CIM_PHYS_ADDR 0x14004000 /* 4 */ +#define AU1500_PCI_PHYS_ADDR 0x14005000 /* 13 */ +#define AU1550_PE_PHYS_ADDR 0x14008000 /* 3 */ +#define AU1200_MAEBE_PHYS_ADDR 0x14010000 /* 4 */ +#define AU1200_MAEFE_PHYS_ADDR 0x14012000 /* 4 */ +#define AU1550_USB_OHCI_PHYS_ADDR 0x14020000 /* 3 */ +#define AU1200_USB_CTL_PHYS_ADDR 0x14020000 /* 4 */ +#define AU1200_USB_OTG_PHYS_ADDR 0x14020020 /* 4 */ +#define AU1200_USB_OHCI_PHYS_ADDR 0x14020100 /* 4 */ +#define AU1200_USB_EHCI_PHYS_ADDR 0x14020200 /* 4 */ +#define AU1200_USB_UDC_PHYS_ADDR 0x14022000 /* 4 */ +#define AU1100_LCD_PHYS_ADDR 0x15000000 /* 2 */ +#define AU1200_LCD_PHYS_ADDR 0x15000000 /* 4 */ +#define AU1500_PCI_MEM_PHYS_ADDR 0x400000000ULL /* 13 */ +#define AU1500_PCI_IO_PHYS_ADDR 0x500000000ULL /* 13 */ +#define AU1500_PCI_CONFIG0_PHYS_ADDR 0x600000000ULL /* 13 */ +#define AU1500_PCI_CONFIG1_PHYS_ADDR 0x680000000ULL /* 13 */ +#define AU1000_PCMCIA_IO_PHYS_ADDR 0xF00000000ULL /* 01234 */ +#define AU1000_PCMCIA_ATTR_PHYS_ADDR 0xF40000000ULL /* 01234 */ +#define AU1000_PCMCIA_MEM_PHYS_ADDR 0xF80000000ULL /* 01234 */ + + +/* Au1000 SDRAM memory controller register offsets */ +#define AU1000_MEM_SDMODE0 0x0000 +#define AU1000_MEM_SDMODE1 0x0004 +#define AU1000_MEM_SDMODE2 0x0008 +#define AU1000_MEM_SDADDR0 0x000C +#define AU1000_MEM_SDADDR1 0x0010 +#define AU1000_MEM_SDADDR2 0x0014 +#define AU1000_MEM_SDREFCFG 0x0018 +#define AU1000_MEM_SDPRECMD 0x001C +#define AU1000_MEM_SDAUTOREF 0x0020 +#define AU1000_MEM_SDWRMD0 0x0024 +#define AU1000_MEM_SDWRMD1 0x0028 +#define AU1000_MEM_SDWRMD2 0x002C +#define AU1000_MEM_SDSLEEP 0x0030 +#define AU1000_MEM_SDSMCKE 0x0034 + +/* MEM_SDMODE register content definitions */ #define MEM_SDMODE_F (1 << 22) #define MEM_SDMODE_SR (1 << 21) #define MEM_SDMODE_BS (1 << 20) #define MEM_SDMODE_RS (3 << 18) #define MEM_SDMODE_CS (7 << 15) -#define MEM_SDMODE_TRAS (15 << 11) -#define MEM_SDMODE_TMRD (3 << 9) +#define MEM_SDMODE_TRAS (15 << 11) +#define MEM_SDMODE_TMRD (3 << 9) #define MEM_SDMODE_TWR (3 << 7) #define MEM_SDMODE_TRP (3 << 5) -#define MEM_SDMODE_TRCD (3 << 3) +#define MEM_SDMODE_TRCD (3 << 3) #define MEM_SDMODE_TCL (7 << 0) #define MEM_SDMODE_BS_2Bank (0 << 20) @@ -628,173 +702,43 @@ enum soc_au1200_ints { #define MEM_SDMODE_TRCD_N(N) ((N) << 3) #define MEM_SDMODE_TCL_N(N) ((N) << 0) -/* - * MEM_SDADDR register contents definitions - */ +/* MEM_SDADDR register contents definitions */ #define MEM_SDADDR_E (1 << 20) -#define MEM_SDADDR_CSBA (0x03FF << 10) +#define MEM_SDADDR_CSBA (0x03FF << 10) #define MEM_SDADDR_CSMASK (0x03FF << 0) #define MEM_SDADDR_CSBA_N(N) ((N) & (0x03FF << 22) >> 12) #define MEM_SDADDR_CSMASK_N(N) ((N)&(0x03FF << 22) >> 22) -/* - * MEM_SDREFCFG register content definitions - */ +/* MEM_SDREFCFG register content definitions */ #define MEM_SDREFCFG_TRC (15 << 28) #define MEM_SDREFCFG_TRPM (3 << 26) #define MEM_SDREFCFG_E (1 << 25) -#define MEM_SDREFCFG_RE (0x1ffffff << 0) +#define MEM_SDREFCFG_RE (0x1ffffff << 0) #define MEM_SDREFCFG_TRC_N(N) ((N) << MEM_SDREFCFG_TRC) #define MEM_SDREFCFG_TRPM_N(N) ((N) << MEM_SDREFCFG_TRPM) #define MEM_SDREFCFG_REF_N(N) (N) -#endif - -/***********************************************************************/ -/* - * Au1550 SDRAM Register Offsets - */ - -/***********************************************************************/ - -#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200) -#define MEM_SDMODE0 0x0800 -#define MEM_SDMODE1 0x0808 -#define MEM_SDMODE2 0x0810 -#define MEM_SDADDR0 0x0820 -#define MEM_SDADDR1 0x0828 -#define MEM_SDADDR2 0x0830 -#define MEM_SDCONFIGA 0x0840 -#define MEM_SDCONFIGB 0x0848 -#define MEM_SDSTAT 0x0850 -#define MEM_SDERRADDR 0x0858 -#define MEM_SDSTRIDE0 0x0860 -#define MEM_SDSTRIDE1 0x0868 -#define MEM_SDSTRIDE2 0x0870 -#define MEM_SDWRMD0 0x0880 -#define MEM_SDWRMD1 0x0888 -#define MEM_SDWRMD2 0x0890 -#define MEM_SDPRECMD 0x08C0 -#define MEM_SDAUTOREF 0x08C8 -#define MEM_SDSREF 0x08D0 -#define MEM_SDSLEEP MEM_SDSREF - -#endif - -/* - * Physical base addresses for integrated peripherals - * 0..au1000 1..au1500 2..au1100 3..au1550 4..au1200 - */ - -#define AU1000_AC97_PHYS_ADDR 0x10000000 /* 012 */ -#define AU1000_USBD_PHYS_ADDR 0x10200000 /* 0123 */ -#define AU1000_IC0_PHYS_ADDR 0x10400000 /* 01234 */ -#define AU1000_MAC0_PHYS_ADDR 0x10500000 /* 023 */ -#define AU1000_MAC1_PHYS_ADDR 0x10510000 /* 023 */ -#define AU1000_MACEN_PHYS_ADDR 0x10520000 /* 023 */ -#define AU1100_SD0_PHYS_ADDR 0x10600000 /* 24 */ -#define AU1100_SD1_PHYS_ADDR 0x10680000 /* 24 */ -#define AU1000_I2S_PHYS_ADDR 0x11000000 /* 02 */ -#define AU1500_MAC0_PHYS_ADDR 0x11500000 /* 1 */ -#define AU1500_MAC1_PHYS_ADDR 0x11510000 /* 1 */ -#define AU1500_MACEN_PHYS_ADDR 0x11520000 /* 1 */ -#define AU1000_UART0_PHYS_ADDR 0x11100000 /* 01234 */ -#define AU1000_UART1_PHYS_ADDR 0x11200000 /* 0234 */ -#define AU1000_UART2_PHYS_ADDR 0x11300000 /* 0 */ -#define AU1000_UART3_PHYS_ADDR 0x11400000 /* 0123 */ -#define AU1500_GPIO2_PHYS_ADDR 0x11700000 /* 1234 */ -#define AU1000_IC1_PHYS_ADDR 0x11800000 /* 01234 */ -#define AU1000_SYS_PHYS_ADDR 0x11900000 /* 01234 */ -#define AU1000_DMA_PHYS_ADDR 0x14002000 /* 012 */ -#define AU1550_DBDMA_PHYS_ADDR 0x14002000 /* 34 */ -#define AU1550_DBDMA_CONF_PHYS_ADDR 0x14003000 /* 34 */ -#define AU1000_MACDMA0_PHYS_ADDR 0x14004000 /* 0123 */ -#define AU1000_MACDMA1_PHYS_ADDR 0x14004200 /* 0123 */ - - -#ifdef CONFIG_SOC_AU1000 -#define MEM_PHYS_ADDR 0x14000000 -#define STATIC_MEM_PHYS_ADDR 0x14001000 -#define USBH_PHYS_ADDR 0x10100000 -#define IRDA_PHYS_ADDR 0x10300000 -#define SSI0_PHYS_ADDR 0x11600000 -#define SSI1_PHYS_ADDR 0x11680000 -#define PCMCIA_IO_PHYS_ADDR 0xF00000000ULL -#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000ULL -#define PCMCIA_MEM_PHYS_ADDR 0xF80000000ULL -#endif - -/********************************************************************/ - -#ifdef CONFIG_SOC_AU1500 -#define MEM_PHYS_ADDR 0x14000000 -#define STATIC_MEM_PHYS_ADDR 0x14001000 -#define USBH_PHYS_ADDR 0x10100000 -#define PCI_PHYS_ADDR 0x14005000 -#define PCI_MEM_PHYS_ADDR 0x400000000ULL -#define PCI_IO_PHYS_ADDR 0x500000000ULL -#define PCI_CONFIG0_PHYS_ADDR 0x600000000ULL -#define PCI_CONFIG1_PHYS_ADDR 0x680000000ULL -#define PCMCIA_IO_PHYS_ADDR 0xF00000000ULL -#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000ULL -#define PCMCIA_MEM_PHYS_ADDR 0xF80000000ULL -#endif - -/********************************************************************/ - -#ifdef CONFIG_SOC_AU1100 -#define MEM_PHYS_ADDR 0x14000000 -#define STATIC_MEM_PHYS_ADDR 0x14001000 -#define USBH_PHYS_ADDR 0x10100000 -#define IRDA_PHYS_ADDR 0x10300000 -#define SSI0_PHYS_ADDR 0x11600000 -#define SSI1_PHYS_ADDR 0x11680000 -#define LCD_PHYS_ADDR 0x15000000 -#define PCMCIA_IO_PHYS_ADDR 0xF00000000ULL -#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000ULL -#define PCMCIA_MEM_PHYS_ADDR 0xF80000000ULL -#endif - -/***********************************************************************/ - -#ifdef CONFIG_SOC_AU1550 -#define MEM_PHYS_ADDR 0x14000000 -#define STATIC_MEM_PHYS_ADDR 0x14001000 -#define USBH_PHYS_ADDR 0x14020000 -#define PCI_PHYS_ADDR 0x14005000 -#define PE_PHYS_ADDR 0x14008000 -#define PSC0_PHYS_ADDR 0x11A00000 -#define PSC1_PHYS_ADDR 0x11B00000 -#define PSC2_PHYS_ADDR 0x10A00000 -#define PSC3_PHYS_ADDR 0x10B00000 -#define PCI_MEM_PHYS_ADDR 0x400000000ULL -#define PCI_IO_PHYS_ADDR 0x500000000ULL -#define PCI_CONFIG0_PHYS_ADDR 0x600000000ULL -#define PCI_CONFIG1_PHYS_ADDR 0x680000000ULL -#define PCMCIA_IO_PHYS_ADDR 0xF00000000ULL -#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000ULL -#define PCMCIA_MEM_PHYS_ADDR 0xF80000000ULL -#endif - -/***********************************************************************/ - -#ifdef CONFIG_SOC_AU1200 -#define MEM_PHYS_ADDR 0x14000000 -#define STATIC_MEM_PHYS_ADDR 0x14001000 -#define AES_PHYS_ADDR 0x10300000 -#define CIM_PHYS_ADDR 0x14004000 -#define USBM_PHYS_ADDR 0x14020000 -#define USBH_PHYS_ADDR 0x14020100 -#define PSC0_PHYS_ADDR 0x11A00000 -#define PSC1_PHYS_ADDR 0x11B00000 -#define LCD_PHYS_ADDR 0x15000000 -#define SWCNT_PHYS_ADDR 0x1110010C -#define MAEFE_PHYS_ADDR 0x14012000 -#define MAEBE_PHYS_ADDR 0x14010000 -#define PCMCIA_IO_PHYS_ADDR 0xF00000000ULL -#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000ULL -#define PCMCIA_MEM_PHYS_ADDR 0xF80000000ULL -#endif +/* Au1550 SDRAM Register Offsets */ +#define AU1550_MEM_SDMODE0 0x0800 +#define AU1550_MEM_SDMODE1 0x0808 +#define AU1550_MEM_SDMODE2 0x0810 +#define AU1550_MEM_SDADDR0 0x0820 +#define AU1550_MEM_SDADDR1 0x0828 +#define AU1550_MEM_SDADDR2 0x0830 +#define AU1550_MEM_SDCONFIGA 0x0840 +#define AU1550_MEM_SDCONFIGB 0x0848 +#define AU1550_MEM_SDSTAT 0x0850 +#define AU1550_MEM_SDERRADDR 0x0858 +#define AU1550_MEM_SDSTRIDE0 0x0860 +#define AU1550_MEM_SDSTRIDE1 0x0868 +#define AU1550_MEM_SDSTRIDE2 0x0870 +#define AU1550_MEM_SDWRMD0 0x0880 +#define AU1550_MEM_SDWRMD1 0x0888 +#define AU1550_MEM_SDWRMD2 0x0890 +#define AU1550_MEM_SDPRECMD 0x08C0 +#define AU1550_MEM_SDAUTOREF 0x08C8 +#define AU1550_MEM_SDSREF 0x08D0 +#define AU1550_MEM_SDSLEEP MEM_SDSREF /* Static Bus Controller */ #define MEM_STCFG0 0xB4001000 @@ -813,81 +757,14 @@ enum soc_au1200_ints { #define MEM_STTIME3 0xB4001034 #define MEM_STADDR3 0xB4001038 -#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200) #define MEM_STNDCTL 0xB4001100 #define MEM_STSTAT 0xB4001104 #define MEM_STNAND_CMD 0x0 #define MEM_STNAND_ADDR 0x4 #define MEM_STNAND_DATA 0x20 -#endif - - -/* Au1000 */ -#ifdef CONFIG_SOC_AU1000 - -#define USB_OHCI_BASE 0x10100000 /* phys addr for ioremap */ -#define USB_HOST_CONFIG 0xB017FFFC -#define FOR_PLATFORM_C_USB_HOST_INT AU1000_USB_HOST_INT -#endif /* CONFIG_SOC_AU1000 */ - -/* Au1500 */ -#ifdef CONFIG_SOC_AU1500 - -#define USB_OHCI_BASE 0x10100000 /* phys addr for ioremap */ -#define USB_HOST_CONFIG 0xB017fffc -#define FOR_PLATFORM_C_USB_HOST_INT AU1500_USB_HOST_INT -#endif /* CONFIG_SOC_AU1500 */ - -/* Au1100 */ -#ifdef CONFIG_SOC_AU1100 - -#define USB_OHCI_BASE 0x10100000 /* phys addr for ioremap */ -#define USB_HOST_CONFIG 0xB017FFFC -#define FOR_PLATFORM_C_USB_HOST_INT AU1100_USB_HOST_INT -#endif /* CONFIG_SOC_AU1100 */ - -#ifdef CONFIG_SOC_AU1550 - -#define USB_OHCI_BASE 0x14020000 /* phys addr for ioremap */ -#define USB_OHCI_LEN 0x00060000 -#define USB_HOST_CONFIG 0xB4027ffc -#define FOR_PLATFORM_C_USB_HOST_INT AU1550_USB_HOST_INT -#endif /* CONFIG_SOC_AU1550 */ - - -#ifdef CONFIG_SOC_AU1200 - -#define USB_UOC_BASE 0x14020020 -#define USB_UOC_LEN 0x20 -#define USB_OHCI_BASE 0x14020100 -#define USB_OHCI_LEN 0x100 -#define USB_EHCI_BASE 0x14020200 -#define USB_EHCI_LEN 0x100 -#define USB_UDC_BASE 0x14022000 -#define USB_UDC_LEN 0x2000 -#define USB_MSR_BASE 0xB4020000 -#define USB_MSR_MCFG 4 -#define USBMSRMCFG_OMEMEN 0 -#define USBMSRMCFG_OBMEN 1 -#define USBMSRMCFG_EMEMEN 2 -#define USBMSRMCFG_EBMEN 3 -#define USBMSRMCFG_DMEMEN 4 -#define USBMSRMCFG_DBMEN 5 -#define USBMSRMCFG_GMEMEN 6 -#define USBMSRMCFG_OHCCLKEN 16 -#define USBMSRMCFG_EHCCLKEN 17 -#define USBMSRMCFG_UDCCLKEN 18 -#define USBMSRMCFG_PHYPLLEN 19 -#define USBMSRMCFG_RDCOMB 30 -#define USBMSRMCFG_PFEN 31 - -#define FOR_PLATFORM_C_USB_HOST_INT AU1200_USB_INT - -#endif /* CONFIG_SOC_AU1200 */ - /* Programmable Counters 0 and 1 */ #define SYS_BASE 0xB1900000 #define SYS_COUNTER_CNTRL (SYS_BASE + 0x14) @@ -958,56 +835,6 @@ enum soc_au1200_ints { # define I2S_CONTROL_D (1 << 1) # define I2S_CONTROL_CE (1 << 0) -/* USB Host Controller */ -#ifndef USB_OHCI_LEN -#define USB_OHCI_LEN 0x00100000 -#endif - -#ifndef CONFIG_SOC_AU1200 - -/* USB Device Controller */ -#define USBD_EP0RD 0xB0200000 -#define USBD_EP0WR 0xB0200004 -#define USBD_EP2WR 0xB0200008 -#define USBD_EP3WR 0xB020000C -#define USBD_EP4RD 0xB0200010 -#define USBD_EP5RD 0xB0200014 -#define USBD_INTEN 0xB0200018 -#define USBD_INTSTAT 0xB020001C -# define USBDEV_INT_SOF (1 << 12) -# define USBDEV_INT_HF_BIT 6 -# define USBDEV_INT_HF_MASK (0x3f << USBDEV_INT_HF_BIT) -# define USBDEV_INT_CMPLT_BIT 0 -# define USBDEV_INT_CMPLT_MASK (0x3f << USBDEV_INT_CMPLT_BIT) -#define USBD_CONFIG 0xB0200020 -#define USBD_EP0CS 0xB0200024 -#define USBD_EP2CS 0xB0200028 -#define USBD_EP3CS 0xB020002C -#define USBD_EP4CS 0xB0200030 -#define USBD_EP5CS 0xB0200034 -# define USBDEV_CS_SU (1 << 14) -# define USBDEV_CS_NAK (1 << 13) -# define USBDEV_CS_ACK (1 << 12) -# define USBDEV_CS_BUSY (1 << 11) -# define USBDEV_CS_TSIZE_BIT 1 -# define USBDEV_CS_TSIZE_MASK (0x3ff << USBDEV_CS_TSIZE_BIT) -# define USBDEV_CS_STALL (1 << 0) -#define USBD_EP0RDSTAT 0xB0200040 -#define USBD_EP0WRSTAT 0xB0200044 -#define USBD_EP2WRSTAT 0xB0200048 -#define USBD_EP3WRSTAT 0xB020004C -#define USBD_EP4RDSTAT 0xB0200050 -#define USBD_EP5RDSTAT 0xB0200054 -# define USBDEV_FSTAT_FLUSH (1 << 6) -# define USBDEV_FSTAT_UF (1 << 5) -# define USBDEV_FSTAT_OF (1 << 4) -# define USBDEV_FSTAT_FCNT_BIT 0 -# define USBDEV_FSTAT_FCNT_MASK (0x0f << USBDEV_FSTAT_FCNT_BIT) -#define USBD_ENABLE 0xB0200058 -# define USBDEV_ENABLE (1 << 1) -# define USBDEV_CE (1 << 0) - -#endif /* !CONFIG_SOC_AU1200 */ /* Ethernet Controllers */ @@ -1322,7 +1149,6 @@ enum soc_au1200_ints { # define SYS_PF_MUST_BE_SET ((1 << 5) | (1 << 2)) /* Au1200 only */ -#ifdef CONFIG_SOC_AU1200 #define SYS_PINFUNC_DMA (1 << 31) #define SYS_PINFUNC_S0A (1 << 30) #define SYS_PINFUNC_S1A (1 << 29) @@ -1350,7 +1176,6 @@ enum soc_au1200_ints { #define SYS_PINFUNC_P0B (1 << 4) #define SYS_PINFUNC_U0T (1 << 3) #define SYS_PINFUNC_S1B (1 << 2) -#endif /* Power Management */ #define SYS_SCRATCH0 0xB1900018 @@ -1406,12 +1231,12 @@ enum soc_au1200_ints { # define SYS_CS_MI2_MASK (0x7 << SYS_CS_MI2_BIT) # define SYS_CS_DI2 (1 << 16) # define SYS_CS_CI2 (1 << 15) -#ifdef CONFIG_SOC_AU1100 + # define SYS_CS_ML_BIT 7 # define SYS_CS_ML_MASK (0x7 << SYS_CS_ML_BIT) # define SYS_CS_DL (1 << 6) # define SYS_CS_CL (1 << 5) -#else + # define SYS_CS_MUH_BIT 12 # define SYS_CS_MUH_MASK (0x7 << SYS_CS_MUH_BIT) # define SYS_CS_DUH (1 << 11) @@ -1420,7 +1245,7 @@ enum soc_au1200_ints { # define SYS_CS_MUD_MASK (0x7 << SYS_CS_MUD_BIT) # define SYS_CS_DUD (1 << 6) # define SYS_CS_CUD (1 << 5) -#endif + # define SYS_CS_MIR_BIT 2 # define SYS_CS_MIR_MASK (0x7 << SYS_CS_MIR_BIT) # define SYS_CS_DIR (1 << 1) @@ -1467,58 +1292,30 @@ enum soc_au1200_ints { # define AC97C_RS (1 << 1) # define AC97C_CE (1 << 0) -#if defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550) -/* Au1500 PCI Controller */ -#define Au1500_CFG_BASE 0xB4005000 /* virtual, KSEG1 addr */ -#define Au1500_PCI_CMEM (Au1500_CFG_BASE + 0) -#define Au1500_PCI_CFG (Au1500_CFG_BASE + 4) -# define PCI_ERROR ((1 << 22) | (1 << 23) | (1 << 24) | \ - (1 << 25) | (1 << 26) | (1 << 27)) -#define Au1500_PCI_B2BMASK_CCH (Au1500_CFG_BASE + 8) -#define Au1500_PCI_B2B0_VID (Au1500_CFG_BASE + 0xC) -#define Au1500_PCI_B2B1_ID (Au1500_CFG_BASE + 0x10) -#define Au1500_PCI_MWMASK_DEV (Au1500_CFG_BASE + 0x14) -#define Au1500_PCI_MWBASE_REV_CCL (Au1500_CFG_BASE + 0x18) -#define Au1500_PCI_ERR_ADDR (Au1500_CFG_BASE + 0x1C) -#define Au1500_PCI_SPEC_INTACK (Au1500_CFG_BASE + 0x20) -#define Au1500_PCI_ID (Au1500_CFG_BASE + 0x100) -#define Au1500_PCI_STATCMD (Au1500_CFG_BASE + 0x104) -#define Au1500_PCI_CLASSREV (Au1500_CFG_BASE + 0x108) -#define Au1500_PCI_HDRTYPE (Au1500_CFG_BASE + 0x10C) -#define Au1500_PCI_MBAR (Au1500_CFG_BASE + 0x110) - -#define Au1500_PCI_HDR 0xB4005100 /* virtual, KSEG1 addr */ -/* - * All of our structures, like PCI resource, have 32-bit members. - * Drivers are expected to do an ioremap on the PCI MEM resource, but it's - * hard to store 0x4 0000 0000 in a 32-bit type. We require a small patch - * to __ioremap to check for addresses between (u32)Au1500_PCI_MEM_START and - * (u32)Au1500_PCI_MEM_END and change those to the full 36-bit PCI MEM - * addresses. For PCI I/O, it's simpler because we get to do the ioremap - * ourselves and then adjust the device's resources. +/* The PCI chip selects are outside the 32bit space, and since we can't + * just program the 36bit addresses into BARs, we have to take a chunk + * out of the 32bit space and reserve it for PCI. When these addresses + * are ioremap()ed, they'll be fixed up to the real 36bit address before + * being passed to the real ioremap function. */ -#define Au1500_EXT_CFG 0x600000000ULL -#define Au1500_EXT_CFG_TYPE1 0x680000000ULL -#define Au1500_PCI_IO_START 0x500000000ULL -#define Au1500_PCI_IO_END 0x5000FFFFFULL -#define Au1500_PCI_MEM_START 0x440000000ULL -#define Au1500_PCI_MEM_END 0x44FFFFFFFULL +#define ALCHEMY_PCI_MEMWIN_START (AU1500_PCI_MEM_PHYS_ADDR >> 4) +#define ALCHEMY_PCI_MEMWIN_END (ALCHEMY_PCI_MEMWIN_START + 0x0FFFFFFF) -#define PCI_IO_START 0x00001000 -#define PCI_IO_END 0x000FFFFF -#define PCI_MEM_START 0x40000000 -#define PCI_MEM_END 0x4FFFFFFF +/* for PCI IO it's simpler because we get to do the ioremap ourselves and then + * adjust the device's resources. + */ +#define ALCHEMY_PCI_IOWIN_START 0x00001000 +#define ALCHEMY_PCI_IOWIN_END 0x0000FFFF -#define PCI_FIRST_DEVFN (0 << 3) -#define PCI_LAST_DEVFN (19 << 3) +#ifdef CONFIG_PCI #define IOPORT_RESOURCE_START 0x00001000 /* skip legacy probing */ #define IOPORT_RESOURCE_END 0xffffffff #define IOMEM_RESOURCE_START 0x10000000 #define IOMEM_RESOURCE_END 0xfffffffffULL -#else /* Au1000 and Au1100 and Au1200 */ +#else /* Don't allow any legacy ports probing */ #define IOPORT_RESOURCE_START 0x10000000 @@ -1526,13 +1323,77 @@ enum soc_au1200_ints { #define IOMEM_RESOURCE_START 0x10000000 #define IOMEM_RESOURCE_END 0xfffffffffULL -#define PCI_IO_START 0 -#define PCI_IO_END 0 -#define PCI_MEM_START 0 -#define PCI_MEM_END 0 -#define PCI_FIRST_DEVFN 0 -#define PCI_LAST_DEVFN 0 - #endif +/* PCI controller block register offsets */ +#define PCI_REG_CMEM 0x0000 +#define PCI_REG_CONFIG 0x0004 +#define PCI_REG_B2BMASK_CCH 0x0008 +#define PCI_REG_B2BBASE0_VID 0x000C +#define PCI_REG_B2BBASE1_SID 0x0010 +#define PCI_REG_MWMASK_DEV 0x0014 +#define PCI_REG_MWBASE_REV_CCL 0x0018 +#define PCI_REG_ERR_ADDR 0x001C +#define PCI_REG_SPEC_INTACK 0x0020 +#define PCI_REG_ID 0x0100 +#define PCI_REG_STATCMD 0x0104 +#define PCI_REG_CLASSREV 0x0108 +#define PCI_REG_PARAM 0x010C +#define PCI_REG_MBAR 0x0110 +#define PCI_REG_TIMEOUT 0x0140 + +/* PCI controller block register bits */ +#define PCI_CMEM_E (1 << 28) /* enable cacheable memory */ +#define PCI_CMEM_CMBASE(x) (((x) & 0x3fff) << 14) +#define PCI_CMEM_CMMASK(x) ((x) & 0x3fff) +#define PCI_CONFIG_ERD (1 << 27) /* pci error during R/W */ +#define PCI_CONFIG_ET (1 << 26) /* error in target mode */ +#define PCI_CONFIG_EF (1 << 25) /* fatal error */ +#define PCI_CONFIG_EP (1 << 24) /* parity error */ +#define PCI_CONFIG_EM (1 << 23) /* multiple errors */ +#define PCI_CONFIG_BM (1 << 22) /* bad master error */ +#define PCI_CONFIG_PD (1 << 20) /* PCI Disable */ +#define PCI_CONFIG_BME (1 << 19) /* Byte Mask Enable for reads */ +#define PCI_CONFIG_NC (1 << 16) /* mark mem access non-coherent */ +#define PCI_CONFIG_IA (1 << 15) /* INTA# enabled (target mode) */ +#define PCI_CONFIG_IP (1 << 13) /* int on PCI_PERR# */ +#define PCI_CONFIG_IS (1 << 12) /* int on PCI_SERR# */ +#define PCI_CONFIG_IMM (1 << 11) /* int on master abort */ +#define PCI_CONFIG_ITM (1 << 10) /* int on target abort (as master) */ +#define PCI_CONFIG_ITT (1 << 9) /* int on target abort (as target) */ +#define PCI_CONFIG_IPB (1 << 8) /* int on PERR# in bus master acc */ +#define PCI_CONFIG_SIC_NO (0 << 6) /* no byte mask changes */ +#define PCI_CONFIG_SIC_BA_ADR (1 << 6) /* on byte/hw acc, invert adr bits */ +#define PCI_CONFIG_SIC_HWA_DAT (2 << 6) /* on halfword acc, swap data */ +#define PCI_CONFIG_SIC_ALL (3 << 6) /* swap data bytes on all accesses */ +#define PCI_CONFIG_ST (1 << 5) /* swap data by target transactions */ +#define PCI_CONFIG_SM (1 << 4) /* swap data from PCI ctl */ +#define PCI_CONFIG_AEN (1 << 3) /* enable internal arbiter */ +#define PCI_CONFIG_R2H (1 << 2) /* REQ2# to hi-prio arbiter */ +#define PCI_CONFIG_R1H (1 << 1) /* REQ1# to hi-prio arbiter */ +#define PCI_CONFIG_CH (1 << 0) /* PCI ctl to hi-prio arbiter */ +#define PCI_B2BMASK_B2BMASK(x) (((x) & 0xffff) << 16) +#define PCI_B2BMASK_CCH(x) ((x) & 0xffff) /* 16 upper bits of class code */ +#define PCI_B2BBASE0_VID_B0(x) (((x) & 0xffff) << 16) +#define PCI_B2BBASE0_VID_SV(x) ((x) & 0xffff) +#define PCI_B2BBASE1_SID_B1(x) (((x) & 0xffff) << 16) +#define PCI_B2BBASE1_SID_SI(x) ((x) & 0xffff) +#define PCI_MWMASKDEV_MWMASK(x) (((x) & 0xffff) << 16) +#define PCI_MWMASKDEV_DEVID(x) ((x) & 0xffff) +#define PCI_MWBASEREVCCL_BASE(x) (((x) & 0xffff) << 16) +#define PCI_MWBASEREVCCL_REV(x) (((x) & 0xff) << 8) +#define PCI_MWBASEREVCCL_CCL(x) ((x) & 0xff) +#define PCI_ID_DID(x) (((x) & 0xffff) << 16) +#define PCI_ID_VID(x) ((x) & 0xffff) +#define PCI_STATCMD_STATUS(x) (((x) & 0xffff) << 16) +#define PCI_STATCMD_CMD(x) ((x) & 0xffff) +#define PCI_CLASSREV_CLASS(x) (((x) & 0x00ffffff) << 8) +#define PCI_CLASSREV_REV(x) ((x) & 0xff) +#define PCI_PARAM_BIST(x) (((x) & 0xff) << 24) +#define PCI_PARAM_HT(x) (((x) & 0xff) << 16) +#define PCI_PARAM_LT(x) (((x) & 0xff) << 8) +#define PCI_PARAM_CLS(x) ((x) & 0xff) +#define PCI_TIMEOUT_RETRIES(x) (((x) & 0xff) << 8) /* max retries */ +#define PCI_TIMEOUT_TO(x) ((x) & 0xff) /* target ready timeout */ + #endif diff --git a/arch/mips/include/asm/mach-au1x00/au1xxx.h b/arch/mips/include/asm/mach-au1x00/au1xxx.h deleted file mode 100644 index 1b3655090ed3..000000000000 --- a/arch/mips/include/asm/mach-au1x00/au1xxx.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef _AU1XXX_H_ -#define _AU1XXX_H_ - -#include <asm/mach-au1x00/au1000.h> - -#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || \ - defined(CONFIG_MIPS_DB1500) || defined(CONFIG_MIPS_DB1550) -#include <asm/mach-db1x00/db1x00.h> - -#elif defined(CONFIG_MIPS_PB1550) -#include <asm/mach-pb1x00/pb1550.h> - -#elif defined(CONFIG_MIPS_PB1200) -#include <asm/mach-pb1x00/pb1200.h> - -#elif defined(CONFIG_MIPS_DB1200) -#include <asm/mach-db1x00/db1200.h> - -#endif - -#endif /* _AU1XXX_H_ */ diff --git a/arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h b/arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h index 2fdacfe85e23..323ce2d145f2 100644 --- a/arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h +++ b/arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h @@ -126,66 +126,62 @@ typedef volatile struct au1xxx_ddma_desc { #define SW_STATUS_INUSE (1 << 0) /* Command 0 device IDs. */ -#ifdef CONFIG_SOC_AU1550 -#define DSCR_CMD0_UART0_TX 0 -#define DSCR_CMD0_UART0_RX 1 -#define DSCR_CMD0_UART3_TX 2 -#define DSCR_CMD0_UART3_RX 3 -#define DSCR_CMD0_DMA_REQ0 4 -#define DSCR_CMD0_DMA_REQ1 5 -#define DSCR_CMD0_DMA_REQ2 6 -#define DSCR_CMD0_DMA_REQ3 7 -#define DSCR_CMD0_USBDEV_RX0 8 -#define DSCR_CMD0_USBDEV_TX0 9 -#define DSCR_CMD0_USBDEV_TX1 10 -#define DSCR_CMD0_USBDEV_TX2 11 -#define DSCR_CMD0_USBDEV_RX3 12 -#define DSCR_CMD0_USBDEV_RX4 13 -#define DSCR_CMD0_PSC0_TX 14 -#define DSCR_CMD0_PSC0_RX 15 -#define DSCR_CMD0_PSC1_TX 16 -#define DSCR_CMD0_PSC1_RX 17 -#define DSCR_CMD0_PSC2_TX 18 -#define DSCR_CMD0_PSC2_RX 19 -#define DSCR_CMD0_PSC3_TX 20 -#define DSCR_CMD0_PSC3_RX 21 -#define DSCR_CMD0_PCI_WRITE 22 -#define DSCR_CMD0_NAND_FLASH 23 -#define DSCR_CMD0_MAC0_RX 24 -#define DSCR_CMD0_MAC0_TX 25 -#define DSCR_CMD0_MAC1_RX 26 -#define DSCR_CMD0_MAC1_TX 27 -#endif /* CONFIG_SOC_AU1550 */ - -#ifdef CONFIG_SOC_AU1200 -#define DSCR_CMD0_UART0_TX 0 -#define DSCR_CMD0_UART0_RX 1 -#define DSCR_CMD0_UART1_TX 2 -#define DSCR_CMD0_UART1_RX 3 -#define DSCR_CMD0_DMA_REQ0 4 -#define DSCR_CMD0_DMA_REQ1 5 -#define DSCR_CMD0_MAE_BE 6 -#define DSCR_CMD0_MAE_FE 7 -#define DSCR_CMD0_SDMS_TX0 8 -#define DSCR_CMD0_SDMS_RX0 9 -#define DSCR_CMD0_SDMS_TX1 10 -#define DSCR_CMD0_SDMS_RX1 11 -#define DSCR_CMD0_AES_TX 13 -#define DSCR_CMD0_AES_RX 12 -#define DSCR_CMD0_PSC0_TX 14 -#define DSCR_CMD0_PSC0_RX 15 -#define DSCR_CMD0_PSC1_TX 16 -#define DSCR_CMD0_PSC1_RX 17 -#define DSCR_CMD0_CIM_RXA 18 -#define DSCR_CMD0_CIM_RXB 19 -#define DSCR_CMD0_CIM_RXC 20 -#define DSCR_CMD0_MAE_BOTH 21 -#define DSCR_CMD0_LCD 22 -#define DSCR_CMD0_NAND_FLASH 23 -#define DSCR_CMD0_PSC0_SYNC 24 -#define DSCR_CMD0_PSC1_SYNC 25 -#define DSCR_CMD0_CIM_SYNC 26 -#endif /* CONFIG_SOC_AU1200 */ +#define AU1550_DSCR_CMD0_UART0_TX 0 +#define AU1550_DSCR_CMD0_UART0_RX 1 +#define AU1550_DSCR_CMD0_UART3_TX 2 +#define AU1550_DSCR_CMD0_UART3_RX 3 +#define AU1550_DSCR_CMD0_DMA_REQ0 4 +#define AU1550_DSCR_CMD0_DMA_REQ1 5 +#define AU1550_DSCR_CMD0_DMA_REQ2 6 +#define AU1550_DSCR_CMD0_DMA_REQ3 7 +#define AU1550_DSCR_CMD0_USBDEV_RX0 8 +#define AU1550_DSCR_CMD0_USBDEV_TX0 9 +#define AU1550_DSCR_CMD0_USBDEV_TX1 10 +#define AU1550_DSCR_CMD0_USBDEV_TX2 11 +#define AU1550_DSCR_CMD0_USBDEV_RX3 12 +#define AU1550_DSCR_CMD0_USBDEV_RX4 13 +#define AU1550_DSCR_CMD0_PSC0_TX 14 +#define AU1550_DSCR_CMD0_PSC0_RX 15 +#define AU1550_DSCR_CMD0_PSC1_TX 16 +#define AU1550_DSCR_CMD0_PSC1_RX 17 +#define AU1550_DSCR_CMD0_PSC2_TX 18 +#define AU1550_DSCR_CMD0_PSC2_RX 19 +#define AU1550_DSCR_CMD0_PSC3_TX 20 +#define AU1550_DSCR_CMD0_PSC3_RX 21 +#define AU1550_DSCR_CMD0_PCI_WRITE 22 +#define AU1550_DSCR_CMD0_NAND_FLASH 23 +#define AU1550_DSCR_CMD0_MAC0_RX 24 +#define AU1550_DSCR_CMD0_MAC0_TX 25 +#define AU1550_DSCR_CMD0_MAC1_RX 26 +#define AU1550_DSCR_CMD0_MAC1_TX 27 + +#define AU1200_DSCR_CMD0_UART0_TX 0 +#define AU1200_DSCR_CMD0_UART0_RX 1 +#define AU1200_DSCR_CMD0_UART1_TX 2 +#define AU1200_DSCR_CMD0_UART1_RX 3 +#define AU1200_DSCR_CMD0_DMA_REQ0 4 +#define AU1200_DSCR_CMD0_DMA_REQ1 5 +#define AU1200_DSCR_CMD0_MAE_BE 6 +#define AU1200_DSCR_CMD0_MAE_FE 7 +#define AU1200_DSCR_CMD0_SDMS_TX0 8 +#define AU1200_DSCR_CMD0_SDMS_RX0 9 +#define AU1200_DSCR_CMD0_SDMS_TX1 10 +#define AU1200_DSCR_CMD0_SDMS_RX1 11 +#define AU1200_DSCR_CMD0_AES_TX 13 +#define AU1200_DSCR_CMD0_AES_RX 12 +#define AU1200_DSCR_CMD0_PSC0_TX 14 +#define AU1200_DSCR_CMD0_PSC0_RX 15 +#define AU1200_DSCR_CMD0_PSC1_TX 16 +#define AU1200_DSCR_CMD0_PSC1_RX 17 +#define AU1200_DSCR_CMD0_CIM_RXA 18 +#define AU1200_DSCR_CMD0_CIM_RXB 19 +#define AU1200_DSCR_CMD0_CIM_RXC 20 +#define AU1200_DSCR_CMD0_MAE_BOTH 21 +#define AU1200_DSCR_CMD0_LCD 22 +#define AU1200_DSCR_CMD0_NAND_FLASH 23 +#define AU1200_DSCR_CMD0_PSC0_SYNC 24 +#define AU1200_DSCR_CMD0_PSC1_SYNC 25 +#define AU1200_DSCR_CMD0_CIM_SYNC 26 #define DSCR_CMD0_THROTTLE 30 #define DSCR_CMD0_ALWAYS 31 diff --git a/arch/mips/include/asm/mach-au1x00/au1xxx_ide.h b/arch/mips/include/asm/mach-au1x00/au1xxx_ide.h index 5656c72de6d3..e306384b1414 100644 --- a/arch/mips/include/asm/mach-au1x00/au1xxx_ide.h +++ b/arch/mips/include/asm/mach-au1x00/au1xxx_ide.h @@ -58,6 +58,7 @@ typedef struct { #endif int irq; u32 regbase; + int ddma_id; } _auide_hwif; /******************************************************************************/ diff --git a/arch/mips/include/asm/mach-au1x00/au1xxx_psc.h b/arch/mips/include/asm/mach-au1x00/au1xxx_psc.h index 5a5cb7386427..4e3f3bc26c60 100644 --- a/arch/mips/include/asm/mach-au1x00/au1xxx_psc.h +++ b/arch/mips/include/asm/mach-au1x00/au1xxx_psc.h @@ -33,19 +33,6 @@ #ifndef _AU1000_PSC_H_ #define _AU1000_PSC_H_ -/* The PSC base addresses. */ -#ifdef CONFIG_SOC_AU1550 -#define PSC0_BASE_ADDR 0xb1a00000 -#define PSC1_BASE_ADDR 0xb1b00000 -#define PSC2_BASE_ADDR 0xb0a00000 -#define PSC3_BASE_ADDR 0xb0b00000 -#endif - -#ifdef CONFIG_SOC_AU1200 -#define PSC0_BASE_ADDR 0xb1a00000 -#define PSC1_BASE_ADDR 0xb1b00000 -#endif - /* * The PSC select and control registers are common to all protocols. */ @@ -80,19 +67,6 @@ #define PSC_AC97GPO_OFFSET 0x00000028 #define PSC_AC97GPI_OFFSET 0x0000002c -#define AC97_PSC_SEL (AC97_PSC_BASE + PSC_SEL_OFFSET) -#define AC97_PSC_CTRL (AC97_PSC_BASE + PSC_CTRL_OFFSET) -#define PSC_AC97CFG (AC97_PSC_BASE + PSC_AC97CFG_OFFSET) -#define PSC_AC97MSK (AC97_PSC_BASE + PSC_AC97MSK_OFFSET) -#define PSC_AC97PCR (AC97_PSC_BASE + PSC_AC97PCR_OFFSET) -#define PSC_AC97STAT (AC97_PSC_BASE + PSC_AC97STAT_OFFSET) -#define PSC_AC97EVNT (AC97_PSC_BASE + PSC_AC97EVNT_OFFSET) -#define PSC_AC97TXRX (AC97_PSC_BASE + PSC_AC97TXRX_OFFSET) -#define PSC_AC97CDC (AC97_PSC_BASE + PSC_AC97CDC_OFFSET) -#define PSC_AC97RST (AC97_PSC_BASE + PSC_AC97RST_OFFSET) -#define PSC_AC97GPO (AC97_PSC_BASE + PSC_AC97GPO_OFFSET) -#define PSC_AC97GPI (AC97_PSC_BASE + PSC_AC97GPI_OFFSET) - /* AC97 Config Register. */ #define PSC_AC97CFG_RT_MASK (3 << 30) #define PSC_AC97CFG_RT_FIFO1 (0 << 30) diff --git a/arch/mips/include/asm/mach-au1x00/gpio-au1000.h b/arch/mips/include/asm/mach-au1x00/gpio-au1000.h index 1f41a522906d..73853b5a2a31 100644 --- a/arch/mips/include/asm/mach-au1x00/gpio-au1000.h +++ b/arch/mips/include/asm/mach-au1x00/gpio-au1000.h @@ -347,17 +347,6 @@ static inline int alchemy_gpio2_to_irq(int gpio) /**********************************************************************/ -/* On Au1000, Au1500 and Au1100 GPIOs won't work as inputs before - * SYS_PININPUTEN is written to at least once. On Au1550/Au1200 this - * register enables use of GPIOs as wake source. - */ -static inline void alchemy_gpio1_input_enable(void) -{ - void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_SYS_PHYS_ADDR); - __raw_writel(0, base + SYS_PININPUTEN); /* the write op is key */ - wmb(); -} - /* GPIO2 shared interrupts and control */ static inline void __alchemy_gpio2_mod_int(int gpio2, int en) @@ -561,6 +550,7 @@ static inline int alchemy_irq_to_gpio(int irq) #ifndef CONFIG_GPIOLIB +#ifdef CONFIG_ALCHEMY_GPIOINT_AU1000 #ifndef CONFIG_ALCHEMY_GPIO_INDIRECT /* case (4) */ @@ -665,24 +655,7 @@ static inline void gpio_unexport(unsigned gpio) #endif /* !CONFIG_ALCHEMY_GPIO_INDIRECT */ - -#else /* CONFIG GPIOLIB */ - - - /* using gpiolib to provide up to 2 gpio_chips for on-chip gpios */ -#ifndef CONFIG_ALCHEMY_GPIO_INDIRECT /* case (2) */ - -/* get everything through gpiolib */ -#define gpio_to_irq __gpio_to_irq -#define gpio_get_value __gpio_get_value -#define gpio_set_value __gpio_set_value -#define gpio_cansleep __gpio_cansleep -#define irq_to_gpio alchemy_irq_to_gpio - -#include <asm-generic/gpio.h> - -#endif /* !CONFIG_ALCHEMY_GPIO_INDIRECT */ - +#endif /* CONFIG_ALCHEMY_GPIOINT_AU1000 */ #endif /* !CONFIG_GPIOLIB */ diff --git a/arch/mips/include/asm/mach-au1x00/gpio.h b/arch/mips/include/asm/mach-au1x00/gpio.h index c3f60cdc3203..fcdc8c4809db 100644 --- a/arch/mips/include/asm/mach-au1x00/gpio.h +++ b/arch/mips/include/asm/mach-au1x00/gpio.h @@ -1,10 +1,83 @@ +/* + * Alchemy GPIO support. + * + * With CONFIG_GPIOLIB=y different types of on-chip GPIO can be supported within + * the same kernel image. + * With CONFIG_GPIOLIB=n, your board must select ALCHEMY_GPIOINT_AU1XXX for the + * appropriate CPU type (AU1000 currently). + */ + #ifndef _ALCHEMY_GPIO_H_ #define _ALCHEMY_GPIO_H_ -#if defined(CONFIG_ALCHEMY_GPIOINT_AU1000) - +#include <asm/mach-au1x00/au1000.h> #include <asm/mach-au1x00/gpio-au1000.h> -#endif +/* On Au1000, Au1500 and Au1100 GPIOs won't work as inputs before + * SYS_PININPUTEN is written to at least once. On Au1550/Au1200/Au1300 this + * register enables use of GPIOs as wake source. + */ +static inline void alchemy_gpio1_input_enable(void) +{ + void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_SYS_PHYS_ADDR); + __raw_writel(0, base + 0x110); /* the write op is key */ + wmb(); +} + + +/* Linux gpio framework integration. +* +* 4 use cases of Alchemy GPIOS: +*(1) GPIOLIB=y, ALCHEMY_GPIO_INDIRECT=y: +* Board must register gpiochips. +*(2) GPIOLIB=y, ALCHEMY_GPIO_INDIRECT=n: +* A gpiochip for the 75 GPIOs is registered. +* +*(3) GPIOLIB=n, ALCHEMY_GPIO_INDIRECT=y: +* the boards' gpio.h must provide the linux gpio wrapper functions, +* +*(4) GPIOLIB=n, ALCHEMY_GPIO_INDIRECT=n: +* inlinable gpio functions are provided which enable access to the +* Au1300 gpios only by using the numbers straight out of the data- +* sheets. + +* Cases 1 and 3 are intended for boards which want to provide their own +* GPIO namespace and -operations (i.e. for example you have 8 GPIOs +* which are in part provided by spare Au1300 GPIO pins and in part by +* an external FPGA but you still want them to be accssible in linux +* as gpio0-7. The board can of course use the alchemy_gpioX_* functions +* as required). +*/ + +#ifdef CONFIG_GPIOLIB + +/* wraps the cpu-dependent irq_to_gpio functions */ +/* FIXME: gpiolib needs an irq_to_gpio hook */ +static inline int __au_irq_to_gpio(unsigned int irq) +{ + switch (alchemy_get_cputype()) { + case ALCHEMY_CPU_AU1000...ALCHEMY_CPU_AU1200: + return alchemy_irq_to_gpio(irq); + } + return -EINVAL; +} + + +/* using gpiolib to provide up to 2 gpio_chips for on-chip gpios */ +#ifndef CONFIG_ALCHEMY_GPIO_INDIRECT /* case (2) */ + +/* get everything through gpiolib */ +#define gpio_to_irq __gpio_to_irq +#define gpio_get_value __gpio_get_value +#define gpio_set_value __gpio_set_value +#define gpio_cansleep __gpio_cansleep +#define irq_to_gpio __au_irq_to_gpio + +#include <asm-generic/gpio.h> + +#endif /* !CONFIG_ALCHEMY_GPIO_INDIRECT */ + + +#endif /* CONFIG_GPIOLIB */ #endif /* _ALCHEMY_GPIO_H_ */ diff --git a/arch/mips/include/asm/mach-db1x00/db1200.h b/arch/mips/include/asm/mach-db1x00/db1200.h index 3404248f5094..7a39657108c4 100644 --- a/arch/mips/include/asm/mach-db1x00/db1200.h +++ b/arch/mips/include/asm/mach-db1x00/db1200.h @@ -46,8 +46,6 @@ #define IDE_PHYS_ADDR 0x18800000 #define IDE_REG_SHIFT 5 -#define IDE_DDMA_REQ DSCR_CMD0_DMA_REQ1 -#define IDE_RQSIZE 128 #define DB1200_IDE_PHYS_ADDR IDE_PHYS_ADDR #define DB1200_IDE_PHYS_LEN (16 << IDE_REG_SHIFT) diff --git a/arch/mips/include/asm/mach-db1x00/db1x00.h b/arch/mips/include/asm/mach-db1x00/db1x00.h index a919dac525a1..a5affb0568ef 100644 --- a/arch/mips/include/asm/mach-db1x00/db1x00.h +++ b/arch/mips/include/asm/mach-db1x00/db1x00.h @@ -31,15 +31,15 @@ #ifdef CONFIG_MIPS_DB1550 -#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX -#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX -#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC3_TX -#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC3_RX +#define DBDMA_AC97_TX_CHAN AU1550_DSCR_CMD0_PSC1_TX +#define DBDMA_AC97_RX_CHAN AU1550_DSCR_CMD0_PSC1_RX +#define DBDMA_I2S_TX_CHAN AU1550_DSCR_CMD0_PSC3_TX +#define DBDMA_I2S_RX_CHAN AU1550_DSCR_CMD0_PSC3_RX -#define SPI_PSC_BASE PSC0_BASE_ADDR -#define AC97_PSC_BASE PSC1_BASE_ADDR -#define SMBUS_PSC_BASE PSC2_BASE_ADDR -#define I2S_PSC_BASE PSC3_BASE_ADDR +#define SPI_PSC_BASE AU1550_PSC0_PHYS_ADDR +#define AC97_PSC_BASE AU1550_PSC1_PHYS_ADDR +#define SMBUS_PSC_BASE AU1550_PSC2_PHYS_ADDR +#define I2S_PSC_BASE AU1550_PSC3_PHYS_ADDR #define NAND_PHYS_ADDR 0x20000000 diff --git a/arch/mips/include/asm/mach-pb1x00/pb1200.h b/arch/mips/include/asm/mach-pb1x00/pb1200.h index fce4332ebb7f..374416adb65b 100644 --- a/arch/mips/include/asm/mach-pb1x00/pb1200.h +++ b/arch/mips/include/asm/mach-pb1x00/pb1200.h @@ -28,23 +28,23 @@ #include <asm/mach-au1x00/au1000.h> #include <asm/mach-au1x00/au1xxx_psc.h> -#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX -#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX -#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC1_TX -#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC1_RX +#define DBDMA_AC97_TX_CHAN AU1200_DSCR_CMD0_PSC1_TX +#define DBDMA_AC97_RX_CHAN AU1200_DSCR_CMD0_PSC1_RX +#define DBDMA_I2S_TX_CHAN AU1200_DSCR_CMD0_PSC1_TX +#define DBDMA_I2S_RX_CHAN AU1200_DSCR_CMD0_PSC1_RX /* * SPI and SMB are muxed on the Pb1200 board. * Refer to board documentation. */ -#define SPI_PSC_BASE PSC0_BASE_ADDR -#define SMBUS_PSC_BASE PSC0_BASE_ADDR +#define SPI_PSC_BASE AU1550_PSC0_PHYS_ADDR +#define SMBUS_PSC_BASE AU1550_PSC0_PHYS_ADDR /* * AC97 and I2S are muxed on the Pb1200 board. * Refer to board documentation. */ -#define AC97_PSC_BASE PSC1_BASE_ADDR -#define I2S_PSC_BASE PSC1_BASE_ADDR +#define AC97_PSC_BASE AU1550_PSC1_PHYS_ADDR +#define I2S_PSC_BASE AU1550_PSC1_PHYS_ADDR #define BCSR_SYSTEM_VDDI 0x001F @@ -76,8 +76,6 @@ #define IDE_REG_SHIFT 5 #define IDE_PHYS_LEN (16 << IDE_REG_SHIFT) #define IDE_INT PB1200_IDE_INT -#define IDE_DDMA_REQ DSCR_CMD0_DMA_REQ1 -#define IDE_RQSIZE 128 #define NAND_PHYS_ADDR 0x1C000000 diff --git a/arch/mips/include/asm/mach-pb1x00/pb1550.h b/arch/mips/include/asm/mach-pb1x00/pb1550.h index f835c88e9593..443b88adebf1 100644 --- a/arch/mips/include/asm/mach-pb1x00/pb1550.h +++ b/arch/mips/include/asm/mach-pb1x00/pb1550.h @@ -30,15 +30,15 @@ #include <linux/types.h> #include <asm/mach-au1x00/au1xxx_psc.h> -#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX -#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX -#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC3_TX -#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC3_RX +#define DBDMA_AC97_TX_CHAN AU1550_DSCR_CMD0_PSC1_TX +#define DBDMA_AC97_RX_CHAN AU1550_DSCR_CMD0_PSC1_RX +#define DBDMA_I2S_TX_CHAN AU1550_DSCR_CMD0_PSC3_TX +#define DBDMA_I2S_RX_CHAN AU1550_DSCR_CMD0_PSC3_RX -#define SPI_PSC_BASE PSC0_BASE_ADDR -#define AC97_PSC_BASE PSC1_BASE_ADDR -#define SMBUS_PSC_BASE PSC2_BASE_ADDR -#define I2S_PSC_BASE PSC3_BASE_ADDR +#define SPI_PSC_BASE AU1550_PSC0_PHYS_ADDR +#define AC97_PSC_BASE AU1550_PSC1_PHYS_ADDR +#define SMBUS_PSC_BASE AU1550_PSC2_PHYS_ADDR +#define I2S_PSC_BASE AU1550_PSC3_PHYS_ADDR /* * Timing values as described in databook, * ns value stripped of diff --git a/arch/mips/include/asm/mipsprom.h b/arch/mips/include/asm/mipsprom.h index 146d41b67adc..e93943fabeac 100644 --- a/arch/mips/include/asm/mipsprom.h +++ b/arch/mips/include/asm/mipsprom.h @@ -1,5 +1,5 @@ -#ifndef __ASM_MIPS_PROM_H -#define __ASM_MIPS_PROM_H +#ifndef __ASM_MIPSPROM_H +#define __ASM_MIPSPROM_H #define PROM_RESET 0 #define PROM_EXEC 1 @@ -73,4 +73,4 @@ extern char *prom_getenv(char *); -#endif /* __ASM_MIPS_PROM_H */ +#endif /* __ASM_MIPSPROM_H */ diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h index 6a6f8a8f542d..2ea7b817feb8 100644 --- a/arch/mips/include/asm/mipsregs.h +++ b/arch/mips/include/asm/mipsregs.h @@ -1006,18 +1006,26 @@ do { \ #define write_c0_perfctrl0(val) __write_32bit_c0_register($25, 0, val) #define read_c0_perfcntr0() __read_32bit_c0_register($25, 1) #define write_c0_perfcntr0(val) __write_32bit_c0_register($25, 1, val) +#define read_c0_perfcntr0_64() __read_64bit_c0_register($25, 1) +#define write_c0_perfcntr0_64(val) __write_64bit_c0_register($25, 1, val) #define read_c0_perfctrl1() __read_32bit_c0_register($25, 2) #define write_c0_perfctrl1(val) __write_32bit_c0_register($25, 2, val) #define read_c0_perfcntr1() __read_32bit_c0_register($25, 3) #define write_c0_perfcntr1(val) __write_32bit_c0_register($25, 3, val) +#define read_c0_perfcntr1_64() __read_64bit_c0_register($25, 3) +#define write_c0_perfcntr1_64(val) __write_64bit_c0_register($25, 3, val) #define read_c0_perfctrl2() __read_32bit_c0_register($25, 4) #define write_c0_perfctrl2(val) __write_32bit_c0_register($25, 4, val) #define read_c0_perfcntr2() __read_32bit_c0_register($25, 5) #define write_c0_perfcntr2(val) __write_32bit_c0_register($25, 5, val) +#define read_c0_perfcntr2_64() __read_64bit_c0_register($25, 5) +#define write_c0_perfcntr2_64(val) __write_64bit_c0_register($25, 5, val) #define read_c0_perfctrl3() __read_32bit_c0_register($25, 6) #define write_c0_perfctrl3(val) __write_32bit_c0_register($25, 6, val) #define read_c0_perfcntr3() __read_32bit_c0_register($25, 7) #define write_c0_perfcntr3(val) __write_32bit_c0_register($25, 7, val) +#define read_c0_perfcntr3_64() __read_64bit_c0_register($25, 7) +#define write_c0_perfcntr3_64(val) __write_64bit_c0_register($25, 7, val) /* RM9000 PerfCount performance counter register */ #define read_c0_perfcount() __read_64bit_c0_register($25, 0) diff --git a/arch/mips/include/asm/prom.h b/arch/mips/include/asm/prom.h index 857d9b7858ad..7a6e82ef449b 100644 --- a/arch/mips/include/asm/prom.h +++ b/arch/mips/include/asm/prom.h @@ -8,8 +8,8 @@ * published by the Free Software Foundation. * */ -#ifndef __ASM_MIPS_PROM_H -#define __ASM_MIPS_PROM_H +#ifndef __ASM_PROM_H +#define __ASM_PROM_H #ifdef CONFIG_OF #include <asm/bootinfo.h> @@ -25,4 +25,4 @@ extern void device_tree_init(void); static inline void device_tree_init(void) { } #endif /* CONFIG_OF */ -#endif /* _ASM_MIPS_PROM_H */ +#endif /* __ASM_PROM_H */ diff --git a/arch/mips/include/asm/regdef.h b/arch/mips/include/asm/regdef.h index 7c8ecb6b9c40..785a5189b374 100644 --- a/arch/mips/include/asm/regdef.h +++ b/arch/mips/include/asm/regdef.h @@ -6,6 +6,8 @@ * Copyright (C) 1985 MIPS Computer Systems, Inc. * Copyright (C) 1994, 95, 99, 2003 by Ralf Baechle * Copyright (C) 1990 - 1992, 1999 Silicon Graphics, Inc. + * Copyright (C) 2011 Wind River Systems, + * written by Ralf Baechle <ralf@linux-mips.org> */ #ifndef _ASM_REGDEF_H #define _ASM_REGDEF_H @@ -30,9 +32,13 @@ #define t2 $10 #define t3 $11 #define t4 $12 +#define ta0 $12 #define t5 $13 +#define ta1 $13 #define t6 $14 +#define ta2 $14 #define t7 $15 +#define ta3 $15 #define s0 $16 /* callee saved */ #define s1 $17 #define s2 $18 diff --git a/arch/mips/jz4740/gpio.c b/arch/mips/jz4740/gpio.c index 4397972949fa..e1ddb95c05e3 100644 --- a/arch/mips/jz4740/gpio.c +++ b/arch/mips/jz4740/gpio.c @@ -17,8 +17,6 @@ #include <linux/module.h> #include <linux/init.h> -#include <linux/spinlock.h> -#include <linux/syscore_ops.h> #include <linux/io.h> #include <linux/gpio.h> #include <linux/delay.h> @@ -30,6 +28,8 @@ #include <asm/mach-jz4740/base.h> +#include "irq.h" + #define JZ4740_GPIO_BASE_A (32*0) #define JZ4740_GPIO_BASE_B (32*1) #define JZ4740_GPIO_BASE_C (32*2) @@ -77,14 +77,10 @@ struct jz_gpio_chip { unsigned int irq; unsigned int irq_base; - uint32_t wakeup; - uint32_t suspend_mask; uint32_t edge_trigger_both; void __iomem *base; - spinlock_t lock; - struct gpio_chip gpio_chip; }; @@ -102,7 +98,8 @@ static inline struct jz_gpio_chip *gpio_chip_to_jz_gpio_chip(struct gpio_chip *g static inline struct jz_gpio_chip *irq_to_jz_gpio_chip(struct irq_data *data) { - return irq_data_get_irq_chip_data(data); + struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data); + return gc->private; } static inline void jz_gpio_write_bit(unsigned int gpio, unsigned int reg) @@ -304,21 +301,15 @@ static void jz_gpio_irq_demux_handler(unsigned int irq, struct irq_desc *desc) { uint32_t flag; unsigned int gpio_irq; - unsigned int gpio_bank; struct jz_gpio_chip *chip = irq_desc_get_handler_data(desc); - gpio_bank = JZ4740_IRQ_GPIO0 - irq; - flag = readl(chip->base + JZ_REG_GPIO_FLAG); - if (!flag) return; - gpio_irq = __fls(flag); + gpio_irq = chip->irq_base + __fls(flag); - jz_gpio_check_trigger_both(chip, irq); - - gpio_irq += (gpio_bank << 5) + JZ4740_IRQ_GPIO(0); + jz_gpio_check_trigger_both(chip, gpio_irq); generic_handle_irq(gpio_irq); }; @@ -329,18 +320,12 @@ static inline void jz_gpio_set_irq_bit(struct irq_data *data, unsigned int reg) writel(IRQ_TO_BIT(data->irq), chip->base + reg); } -static void jz_gpio_irq_mask(struct irq_data *data) -{ - jz_gpio_set_irq_bit(data, JZ_REG_GPIO_MASK_SET); -}; - static void jz_gpio_irq_unmask(struct irq_data *data) { struct jz_gpio_chip *chip = irq_to_jz_gpio_chip(data); jz_gpio_check_trigger_both(chip, data->irq); - - jz_gpio_set_irq_bit(data, JZ_REG_GPIO_MASK_CLEAR); + irq_gc_unmask_enable_reg(data); }; /* TODO: Check if function is gpio */ @@ -353,18 +338,13 @@ static unsigned int jz_gpio_irq_startup(struct irq_data *data) static void jz_gpio_irq_shutdown(struct irq_data *data) { - jz_gpio_irq_mask(data); + irq_gc_mask_disable_reg(data); /* Set direction to input */ jz_gpio_set_irq_bit(data, JZ_REG_GPIO_DIRECTION_CLEAR); jz_gpio_set_irq_bit(data, JZ_REG_GPIO_SELECT_CLEAR); } -static void jz_gpio_irq_ack(struct irq_data *data) -{ - jz_gpio_set_irq_bit(data, JZ_REG_GPIO_FLAG_CLEAR); -}; - static int jz_gpio_irq_set_type(struct irq_data *data, unsigned int flow_type) { struct jz_gpio_chip *chip = irq_to_jz_gpio_chip(data); @@ -408,35 +388,13 @@ static int jz_gpio_irq_set_type(struct irq_data *data, unsigned int flow_type) static int jz_gpio_irq_set_wake(struct irq_data *data, unsigned int on) { struct jz_gpio_chip *chip = irq_to_jz_gpio_chip(data); - spin_lock(&chip->lock); - if (on) - chip->wakeup |= IRQ_TO_BIT(data->irq); - else - chip->wakeup &= ~IRQ_TO_BIT(data->irq); - spin_unlock(&chip->lock); + irq_gc_set_wake(data, on); irq_set_irq_wake(chip->irq, on); + return 0; } -static struct irq_chip jz_gpio_irq_chip = { - .name = "GPIO", - .irq_mask = jz_gpio_irq_mask, - .irq_unmask = jz_gpio_irq_unmask, - .irq_ack = jz_gpio_irq_ack, - .irq_startup = jz_gpio_irq_startup, - .irq_shutdown = jz_gpio_irq_shutdown, - .irq_set_type = jz_gpio_irq_set_type, - .irq_set_wake = jz_gpio_irq_set_wake, - .flags = IRQCHIP_SET_TYPE_MASKED, -}; - -/* - * This lock class tells lockdep that GPIO irqs are in a different - * category than their parents, so it won't report false recursion. - */ -static struct lock_class_key gpio_lock_class; - #define JZ4740_GPIO_CHIP(_bank) { \ .irq_base = JZ4740_IRQ_GPIO_BASE_ ## _bank, \ .gpio_chip = { \ @@ -458,64 +416,44 @@ static struct jz_gpio_chip jz4740_gpio_chips[] = { JZ4740_GPIO_CHIP(D), }; -static void jz4740_gpio_suspend_chip(struct jz_gpio_chip *chip) -{ - chip->suspend_mask = readl(chip->base + JZ_REG_GPIO_MASK); - writel(~(chip->wakeup), chip->base + JZ_REG_GPIO_MASK_SET); - writel(chip->wakeup, chip->base + JZ_REG_GPIO_MASK_CLEAR); -} - -static int jz4740_gpio_suspend(void) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(jz4740_gpio_chips); i++) - jz4740_gpio_suspend_chip(&jz4740_gpio_chips[i]); - - return 0; -} - -static void jz4740_gpio_resume_chip(struct jz_gpio_chip *chip) +static void jz4740_gpio_chip_init(struct jz_gpio_chip *chip, unsigned int id) { - uint32_t mask = chip->suspend_mask; + struct irq_chip_generic *gc; + struct irq_chip_type *ct; - writel(~mask, chip->base + JZ_REG_GPIO_MASK_CLEAR); - writel(mask, chip->base + JZ_REG_GPIO_MASK_SET); -} + chip->base = ioremap(JZ4740_GPIO_BASE_ADDR + (id * 0x100), 0x100); -static void jz4740_gpio_resume(void) -{ - int i; + chip->irq = JZ4740_IRQ_INTC_GPIO(id); + irq_set_handler_data(chip->irq, chip); + irq_set_chained_handler(chip->irq, jz_gpio_irq_demux_handler); - for (i = ARRAY_SIZE(jz4740_gpio_chips) - 1; i >= 0 ; i--) - jz4740_gpio_resume_chip(&jz4740_gpio_chips[i]); -} + gc = irq_alloc_generic_chip(chip->gpio_chip.label, 1, chip->irq_base, + chip->base, handle_level_irq); -static struct syscore_ops jz4740_gpio_syscore_ops = { - .suspend = jz4740_gpio_suspend, - .resume = jz4740_gpio_resume, -}; + gc->wake_enabled = IRQ_MSK(chip->gpio_chip.ngpio); + gc->private = chip; -static void jz4740_gpio_chip_init(struct jz_gpio_chip *chip, unsigned int id) -{ - int irq; + ct = gc->chip_types; + ct->regs.enable = JZ_REG_GPIO_MASK_CLEAR; + ct->regs.disable = JZ_REG_GPIO_MASK_SET; + ct->regs.ack = JZ_REG_GPIO_FLAG_CLEAR; - spin_lock_init(&chip->lock); + ct->chip.name = "GPIO"; + ct->chip.irq_mask = irq_gc_mask_disable_reg; + ct->chip.irq_unmask = jz_gpio_irq_unmask; + ct->chip.irq_ack = irq_gc_ack_set_bit; + ct->chip.irq_suspend = jz4740_irq_suspend; + ct->chip.irq_resume = jz4740_irq_resume; + ct->chip.irq_startup = jz_gpio_irq_startup; + ct->chip.irq_shutdown = jz_gpio_irq_shutdown; + ct->chip.irq_set_type = jz_gpio_irq_set_type; + ct->chip.irq_set_wake = jz_gpio_irq_set_wake; + ct->chip.flags = IRQCHIP_SET_TYPE_MASKED; - chip->base = ioremap(JZ4740_GPIO_BASE_ADDR + (id * 0x100), 0x100); + irq_setup_generic_chip(gc, IRQ_MSK(chip->gpio_chip.ngpio), + IRQ_GC_INIT_NESTED_LOCK, 0, IRQ_NOPROBE | IRQ_LEVEL); gpiochip_add(&chip->gpio_chip); - - chip->irq = JZ4740_IRQ_INTC_GPIO(id); - irq_set_handler_data(chip->irq, chip); - irq_set_chained_handler(chip->irq, jz_gpio_irq_demux_handler); - - for (irq = chip->irq_base; irq < chip->irq_base + chip->gpio_chip.ngpio; ++irq) { - irq_set_lockdep_class(irq, &gpio_lock_class); - irq_set_chip_data(irq, chip); - irq_set_chip_and_handler(irq, &jz_gpio_irq_chip, - handle_level_irq); - } } static int __init jz4740_gpio_init(void) @@ -525,8 +463,6 @@ static int __init jz4740_gpio_init(void) for (i = 0; i < ARRAY_SIZE(jz4740_gpio_chips); ++i) jz4740_gpio_chip_init(&jz4740_gpio_chips[i], i); - register_syscore_ops(&jz4740_gpio_syscore_ops); - printk(KERN_INFO "JZ4740 GPIO initialized\n"); return 0; diff --git a/arch/mips/jz4740/irq.c b/arch/mips/jz4740/irq.c index d82c0c430e03..fc57ded326d8 100644 --- a/arch/mips/jz4740/irq.c +++ b/arch/mips/jz4740/irq.c @@ -32,8 +32,6 @@ #include <asm/mach-jz4740/base.h> static void __iomem *jz_intc_base; -static uint32_t jz_intc_wakeup; -static uint32_t jz_intc_saved; #define JZ_REG_INTC_STATUS 0x00 #define JZ_REG_INTC_MASK 0x04 @@ -41,51 +39,36 @@ static uint32_t jz_intc_saved; #define JZ_REG_INTC_CLEAR_MASK 0x0c #define JZ_REG_INTC_PENDING 0x10 -#define IRQ_BIT(x) BIT((x) - JZ4740_IRQ_BASE) - -static inline unsigned long intc_irq_bit(struct irq_data *data) +static irqreturn_t jz4740_cascade(int irq, void *data) { - return (unsigned long)irq_data_get_irq_chip_data(data); -} + uint32_t irq_reg; -static void intc_irq_unmask(struct irq_data *data) -{ - writel(intc_irq_bit(data), jz_intc_base + JZ_REG_INTC_CLEAR_MASK); -} + irq_reg = readl(jz_intc_base + JZ_REG_INTC_PENDING); -static void intc_irq_mask(struct irq_data *data) -{ - writel(intc_irq_bit(data), jz_intc_base + JZ_REG_INTC_SET_MASK); + if (irq_reg) + generic_handle_irq(__fls(irq_reg) + JZ4740_IRQ_BASE); + + return IRQ_HANDLED; } -static int intc_irq_set_wake(struct irq_data *data, unsigned int on) +static void jz4740_irq_set_mask(struct irq_chip_generic *gc, uint32_t mask) { - if (on) - jz_intc_wakeup |= intc_irq_bit(data); - else - jz_intc_wakeup &= ~intc_irq_bit(data); + struct irq_chip_regs *regs = &gc->chip_types->regs; - return 0; + writel(mask, gc->reg_base + regs->enable); + writel(~mask, gc->reg_base + regs->disable); } -static struct irq_chip intc_irq_type = { - .name = "INTC", - .irq_mask = intc_irq_mask, - .irq_mask_ack = intc_irq_mask, - .irq_unmask = intc_irq_unmask, - .irq_set_wake = intc_irq_set_wake, -}; - -static irqreturn_t jz4740_cascade(int irq, void *data) +void jz4740_irq_suspend(struct irq_data *data) { - uint32_t irq_reg; - - irq_reg = readl(jz_intc_base + JZ_REG_INTC_PENDING); - - if (irq_reg) - generic_handle_irq(__fls(irq_reg) + JZ4740_IRQ_BASE); + struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data); + jz4740_irq_set_mask(gc, gc->wake_active); +} - return IRQ_HANDLED; +void jz4740_irq_resume(struct irq_data *data) +{ + struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data); + jz4740_irq_set_mask(gc, gc->mask_cache); } static struct irqaction jz4740_cascade_action = { @@ -95,7 +78,9 @@ static struct irqaction jz4740_cascade_action = { void __init arch_init_irq(void) { - int i; + struct irq_chip_generic *gc; + struct irq_chip_type *ct; + mips_cpu_irq_init(); jz_intc_base = ioremap(JZ4740_INTC_BASE_ADDR, 0x14); @@ -103,10 +88,22 @@ void __init arch_init_irq(void) /* Mask all irqs */ writel(0xffffffff, jz_intc_base + JZ_REG_INTC_SET_MASK); - for (i = JZ4740_IRQ_BASE; i < JZ4740_IRQ_BASE + 32; i++) { - irq_set_chip_data(i, (void *)IRQ_BIT(i)); - irq_set_chip_and_handler(i, &intc_irq_type, handle_level_irq); - } + gc = irq_alloc_generic_chip("INTC", 1, JZ4740_IRQ_BASE, jz_intc_base, + handle_level_irq); + + gc->wake_enabled = IRQ_MSK(32); + + ct = gc->chip_types; + ct->regs.enable = JZ_REG_INTC_CLEAR_MASK; + ct->regs.disable = JZ_REG_INTC_SET_MASK; + ct->chip.irq_unmask = irq_gc_unmask_enable_reg; + ct->chip.irq_mask = irq_gc_mask_disable_reg; + ct->chip.irq_mask_ack = irq_gc_mask_disable_reg; + ct->chip.irq_set_wake = irq_gc_set_wake; + ct->chip.irq_suspend = jz4740_irq_suspend; + ct->chip.irq_resume = jz4740_irq_resume; + + irq_setup_generic_chip(gc, IRQ_MSK(32), 0, 0, IRQ_NOPROBE | IRQ_LEVEL); setup_irq(2, &jz4740_cascade_action); } @@ -122,19 +119,6 @@ asmlinkage void plat_irq_dispatch(void) spurious_interrupt(); } -void jz4740_intc_suspend(void) -{ - jz_intc_saved = readl(jz_intc_base + JZ_REG_INTC_MASK); - writel(~jz_intc_wakeup, jz_intc_base + JZ_REG_INTC_SET_MASK); - writel(jz_intc_wakeup, jz_intc_base + JZ_REG_INTC_CLEAR_MASK); -} - -void jz4740_intc_resume(void) -{ - writel(~jz_intc_saved, jz_intc_base + JZ_REG_INTC_CLEAR_MASK); - writel(jz_intc_saved, jz_intc_base + JZ_REG_INTC_SET_MASK); -} - #ifdef CONFIG_DEBUG_FS static inline void intc_seq_reg(struct seq_file *s, const char *name, diff --git a/arch/mips/jz4740/irq.h b/arch/mips/jz4740/irq.h index 56b5eadd1fa2..f75e39d62885 100644 --- a/arch/mips/jz4740/irq.h +++ b/arch/mips/jz4740/irq.h @@ -15,7 +15,9 @@ #ifndef __MIPS_JZ4740_IRQ_H__ #define __MIPS_JZ4740_IRQ_H__ -extern void jz4740_intc_suspend(void); -extern void jz4740_intc_resume(void); +#include <linux/irq.h> + +extern void jz4740_irq_suspend(struct irq_data *data); +extern void jz4740_irq_resume(struct irq_data *data); #endif diff --git a/arch/mips/jz4740/pm.c b/arch/mips/jz4740/pm.c index 902d5b50124c..6744fa723f72 100644 --- a/arch/mips/jz4740/pm.c +++ b/arch/mips/jz4740/pm.c @@ -21,11 +21,9 @@ #include <asm/mach-jz4740/clock.h> #include "clock.h" -#include "irq.h" static int jz4740_pm_enter(suspend_state_t state) { - jz4740_intc_suspend(); jz4740_clock_suspend(); jz4740_clock_set_wait_mode(JZ4740_WAIT_MODE_SLEEP); @@ -37,7 +35,6 @@ static int jz4740_pm_enter(suspend_state_t state) jz4740_clock_set_wait_mode(JZ4740_WAIT_MODE_IDLE); jz4740_clock_resume(); - jz4740_intc_resume(); return 0; } diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index 83bba332bbfc..1a966183e353 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile @@ -11,6 +11,8 @@ obj-y += cpu-probe.o branch.o entry.o genex.o irq.o process.o \ ifdef CONFIG_FUNCTION_TRACER CFLAGS_REMOVE_ftrace.o = -pg CFLAGS_REMOVE_early_printk.o = -pg +CFLAGS_REMOVE_perf_event.o = -pg +CFLAGS_REMOVE_perf_event_mipsxx.o = -pg endif obj-$(CONFIG_CEVT_BCM1480) += cevt-bcm1480.o @@ -106,7 +108,8 @@ obj-$(CONFIG_HAVE_STD_PC_SERIAL_PORT) += 8250-platform.o obj-$(CONFIG_MIPS_CPUFREQ) += cpufreq/ -obj-$(CONFIG_HW_PERF_EVENTS) += perf_event.o +obj-$(CONFIG_PERF_EVENTS) += perf_event.o +obj-$(CONFIG_HW_PERF_EVENTS) += perf_event_mipsxx.o obj-$(CONFIG_JUMP_LABEL) += jump_label.o diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index ebc0cd20b35d..aa327a755982 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -978,7 +978,10 @@ static inline void cpu_probe_cavium(struct cpuinfo_mips *c, unsigned int cpu) platform: set_elf_platform(cpu, "octeon"); break; + case PRID_IMP_CAVIUM_CN61XX: case PRID_IMP_CAVIUM_CN63XX: + case PRID_IMP_CAVIUM_CN66XX: + case PRID_IMP_CAVIUM_CN68XX: c->cputype = CPU_CAVIUM_OCTEON2; __cpu_name[cpu] = "Cavium Octeon II"; set_elf_platform(cpu, "octeon2"); diff --git a/arch/mips/kernel/perf_event.c b/arch/mips/kernel/perf_event.c index 0aee944ac380..c1cf9c6c3f77 100644 --- a/arch/mips/kernel/perf_event.c +++ b/arch/mips/kernel/perf_event.c @@ -14,533 +14,16 @@ * published by the Free Software Foundation. */ -#include <linux/cpumask.h> -#include <linux/interrupt.h> -#include <linux/smp.h> -#include <linux/kernel.h> #include <linux/perf_event.h> -#include <linux/uaccess.h> -#include <asm/irq.h> -#include <asm/irq_regs.h> #include <asm/stacktrace.h> -#include <asm/time.h> /* For perf_irq */ - -/* These are for 32bit counters. For 64bit ones, define them accordingly. */ -#define MAX_PERIOD ((1ULL << 32) - 1) -#define VALID_COUNT 0x7fffffff -#define TOTAL_BITS 32 -#define HIGHEST_BIT 31 - -#define MIPS_MAX_HWEVENTS 4 - -struct cpu_hw_events { - /* Array of events on this cpu. */ - struct perf_event *events[MIPS_MAX_HWEVENTS]; - - /* - * Set the bit (indexed by the counter number) when the counter - * is used for an event. - */ - unsigned long used_mask[BITS_TO_LONGS(MIPS_MAX_HWEVENTS)]; - - /* - * The borrowed MSB for the performance counter. A MIPS performance - * counter uses its bit 31 (for 32bit counters) or bit 63 (for 64bit - * counters) as a factor of determining whether a counter overflow - * should be signaled. So here we use a separate MSB for each - * counter to make things easy. - */ - unsigned long msbs[BITS_TO_LONGS(MIPS_MAX_HWEVENTS)]; - - /* - * Software copy of the control register for each performance counter. - * MIPS CPUs vary in performance counters. They use this differently, - * and even may not use it. - */ - unsigned int saved_ctrl[MIPS_MAX_HWEVENTS]; -}; -DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events) = { - .saved_ctrl = {0}, -}; - -/* The description of MIPS performance events. */ -struct mips_perf_event { - unsigned int event_id; - /* - * MIPS performance counters are indexed starting from 0. - * CNTR_EVEN indicates the indexes of the counters to be used are - * even numbers. - */ - unsigned int cntr_mask; - #define CNTR_EVEN 0x55555555 - #define CNTR_ODD 0xaaaaaaaa -#ifdef CONFIG_MIPS_MT_SMP - enum { - T = 0, - V = 1, - P = 2, - } range; -#else - #define T - #define V - #define P -#endif -}; - -static struct mips_perf_event raw_event; -static DEFINE_MUTEX(raw_event_mutex); - -#define UNSUPPORTED_PERF_EVENT_ID 0xffffffff -#define C(x) PERF_COUNT_HW_CACHE_##x - -struct mips_pmu { - const char *name; - int irq; - irqreturn_t (*handle_irq)(int irq, void *dev); - int (*handle_shared_irq)(void); - void (*start)(void); - void (*stop)(void); - int (*alloc_counter)(struct cpu_hw_events *cpuc, - struct hw_perf_event *hwc); - u64 (*read_counter)(unsigned int idx); - void (*write_counter)(unsigned int idx, u64 val); - void (*enable_event)(struct hw_perf_event *evt, int idx); - void (*disable_event)(int idx); - const struct mips_perf_event *(*map_raw_event)(u64 config); - const struct mips_perf_event (*general_event_map)[PERF_COUNT_HW_MAX]; - const struct mips_perf_event (*cache_event_map) - [PERF_COUNT_HW_CACHE_MAX] - [PERF_COUNT_HW_CACHE_OP_MAX] - [PERF_COUNT_HW_CACHE_RESULT_MAX]; - unsigned int num_counters; -}; - -static const struct mips_pmu *mipspmu; - -static int -mipspmu_event_set_period(struct perf_event *event, - struct hw_perf_event *hwc, - int idx) -{ - struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); - s64 left = local64_read(&hwc->period_left); - s64 period = hwc->sample_period; - int ret = 0; - u64 uleft; - unsigned long flags; - - if (unlikely(left <= -period)) { - left = period; - local64_set(&hwc->period_left, left); - hwc->last_period = period; - ret = 1; - } - - if (unlikely(left <= 0)) { - left += period; - local64_set(&hwc->period_left, left); - hwc->last_period = period; - ret = 1; - } - - if (left > (s64)MAX_PERIOD) - left = MAX_PERIOD; - - local64_set(&hwc->prev_count, (u64)-left); - - local_irq_save(flags); - uleft = (u64)(-left) & MAX_PERIOD; - uleft > VALID_COUNT ? - set_bit(idx, cpuc->msbs) : clear_bit(idx, cpuc->msbs); - mipspmu->write_counter(idx, (u64)(-left) & VALID_COUNT); - local_irq_restore(flags); - - perf_event_update_userpage(event); - - return ret; -} - -static void mipspmu_event_update(struct perf_event *event, - struct hw_perf_event *hwc, - int idx) -{ - struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); - unsigned long flags; - int shift = 64 - TOTAL_BITS; - s64 prev_raw_count, new_raw_count; - u64 delta; - -again: - prev_raw_count = local64_read(&hwc->prev_count); - local_irq_save(flags); - /* Make the counter value be a "real" one. */ - new_raw_count = mipspmu->read_counter(idx); - if (new_raw_count & (test_bit(idx, cpuc->msbs) << HIGHEST_BIT)) { - new_raw_count &= VALID_COUNT; - clear_bit(idx, cpuc->msbs); - } else - new_raw_count |= (test_bit(idx, cpuc->msbs) << HIGHEST_BIT); - local_irq_restore(flags); - - if (local64_cmpxchg(&hwc->prev_count, prev_raw_count, - new_raw_count) != prev_raw_count) - goto again; - - delta = (new_raw_count << shift) - (prev_raw_count << shift); - delta >>= shift; - - local64_add(delta, &event->count); - local64_sub(delta, &hwc->period_left); -} - -static void mipspmu_start(struct perf_event *event, int flags) -{ - struct hw_perf_event *hwc = &event->hw; - - if (!mipspmu) - return; - - if (flags & PERF_EF_RELOAD) - WARN_ON_ONCE(!(hwc->state & PERF_HES_UPTODATE)); - - hwc->state = 0; - - /* Set the period for the event. */ - mipspmu_event_set_period(event, hwc, hwc->idx); - - /* Enable the event. */ - mipspmu->enable_event(hwc, hwc->idx); -} - -static void mipspmu_stop(struct perf_event *event, int flags) -{ - struct hw_perf_event *hwc = &event->hw; - - if (!mipspmu) - return; - - if (!(hwc->state & PERF_HES_STOPPED)) { - /* We are working on a local event. */ - mipspmu->disable_event(hwc->idx); - barrier(); - mipspmu_event_update(event, hwc, hwc->idx); - hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE; - } -} - -static int mipspmu_add(struct perf_event *event, int flags) -{ - struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); - struct hw_perf_event *hwc = &event->hw; - int idx; - int err = 0; - - perf_pmu_disable(event->pmu); - - /* To look for a free counter for this event. */ - idx = mipspmu->alloc_counter(cpuc, hwc); - if (idx < 0) { - err = idx; - goto out; - } - - /* - * If there is an event in the counter we are going to use then - * make sure it is disabled. - */ - event->hw.idx = idx; - mipspmu->disable_event(idx); - cpuc->events[idx] = event; - - hwc->state = PERF_HES_STOPPED | PERF_HES_UPTODATE; - if (flags & PERF_EF_START) - mipspmu_start(event, PERF_EF_RELOAD); - - /* Propagate our changes to the userspace mapping. */ - perf_event_update_userpage(event); - -out: - perf_pmu_enable(event->pmu); - return err; -} - -static void mipspmu_del(struct perf_event *event, int flags) -{ - struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); - struct hw_perf_event *hwc = &event->hw; - int idx = hwc->idx; - - WARN_ON(idx < 0 || idx >= mipspmu->num_counters); - - mipspmu_stop(event, PERF_EF_UPDATE); - cpuc->events[idx] = NULL; - clear_bit(idx, cpuc->used_mask); - - perf_event_update_userpage(event); -} - -static void mipspmu_read(struct perf_event *event) -{ - struct hw_perf_event *hwc = &event->hw; - - /* Don't read disabled counters! */ - if (hwc->idx < 0) - return; - - mipspmu_event_update(event, hwc, hwc->idx); -} - -static void mipspmu_enable(struct pmu *pmu) -{ - if (mipspmu) - mipspmu->start(); -} - -static void mipspmu_disable(struct pmu *pmu) -{ - if (mipspmu) - mipspmu->stop(); -} - -static atomic_t active_events = ATOMIC_INIT(0); -static DEFINE_MUTEX(pmu_reserve_mutex); -static int (*save_perf_irq)(void); - -static int mipspmu_get_irq(void) -{ - int err; - - if (mipspmu->irq >= 0) { - /* Request my own irq handler. */ - err = request_irq(mipspmu->irq, mipspmu->handle_irq, - IRQF_DISABLED | IRQF_NOBALANCING, - "mips_perf_pmu", NULL); - if (err) { - pr_warning("Unable to request IRQ%d for MIPS " - "performance counters!\n", mipspmu->irq); - } - } else if (cp0_perfcount_irq < 0) { - /* - * We are sharing the irq number with the timer interrupt. - */ - save_perf_irq = perf_irq; - perf_irq = mipspmu->handle_shared_irq; - err = 0; - } else { - pr_warning("The platform hasn't properly defined its " - "interrupt controller.\n"); - err = -ENOENT; - } - - return err; -} - -static void mipspmu_free_irq(void) -{ - if (mipspmu->irq >= 0) - free_irq(mipspmu->irq, NULL); - else if (cp0_perfcount_irq < 0) - perf_irq = save_perf_irq; -} - -/* - * mipsxx/rm9000/loongson2 have different performance counters, they have - * specific low-level init routines. - */ -static void reset_counters(void *arg); -static int __hw_perf_event_init(struct perf_event *event); - -static void hw_perf_event_destroy(struct perf_event *event) -{ - if (atomic_dec_and_mutex_lock(&active_events, - &pmu_reserve_mutex)) { - /* - * We must not call the destroy function with interrupts - * disabled. - */ - on_each_cpu(reset_counters, - (void *)(long)mipspmu->num_counters, 1); - mipspmu_free_irq(); - mutex_unlock(&pmu_reserve_mutex); - } -} - -static int mipspmu_event_init(struct perf_event *event) -{ - int err = 0; - - switch (event->attr.type) { - case PERF_TYPE_RAW: - case PERF_TYPE_HARDWARE: - case PERF_TYPE_HW_CACHE: - break; - - default: - return -ENOENT; - } - - if (!mipspmu || event->cpu >= nr_cpumask_bits || - (event->cpu >= 0 && !cpu_online(event->cpu))) - return -ENODEV; - - if (!atomic_inc_not_zero(&active_events)) { - if (atomic_read(&active_events) > MIPS_MAX_HWEVENTS) { - atomic_dec(&active_events); - return -ENOSPC; - } - - mutex_lock(&pmu_reserve_mutex); - if (atomic_read(&active_events) == 0) - err = mipspmu_get_irq(); - - if (!err) - atomic_inc(&active_events); - mutex_unlock(&pmu_reserve_mutex); - } - - if (err) - return err; - - err = __hw_perf_event_init(event); - if (err) - hw_perf_event_destroy(event); - - return err; -} - -static struct pmu pmu = { - .pmu_enable = mipspmu_enable, - .pmu_disable = mipspmu_disable, - .event_init = mipspmu_event_init, - .add = mipspmu_add, - .del = mipspmu_del, - .start = mipspmu_start, - .stop = mipspmu_stop, - .read = mipspmu_read, -}; - -static inline unsigned int -mipspmu_perf_event_encode(const struct mips_perf_event *pev) -{ -/* - * Top 8 bits for range, next 16 bits for cntr_mask, lowest 8 bits for - * event_id. - */ -#ifdef CONFIG_MIPS_MT_SMP - return ((unsigned int)pev->range << 24) | - (pev->cntr_mask & 0xffff00) | - (pev->event_id & 0xff); -#else - return (pev->cntr_mask & 0xffff00) | - (pev->event_id & 0xff); -#endif -} - -static const struct mips_perf_event * -mipspmu_map_general_event(int idx) -{ - const struct mips_perf_event *pev; - - pev = ((*mipspmu->general_event_map)[idx].event_id == - UNSUPPORTED_PERF_EVENT_ID ? ERR_PTR(-EOPNOTSUPP) : - &(*mipspmu->general_event_map)[idx]); - - return pev; -} - -static const struct mips_perf_event * -mipspmu_map_cache_event(u64 config) -{ - unsigned int cache_type, cache_op, cache_result; - const struct mips_perf_event *pev; - - cache_type = (config >> 0) & 0xff; - if (cache_type >= PERF_COUNT_HW_CACHE_MAX) - return ERR_PTR(-EINVAL); - - cache_op = (config >> 8) & 0xff; - if (cache_op >= PERF_COUNT_HW_CACHE_OP_MAX) - return ERR_PTR(-EINVAL); - - cache_result = (config >> 16) & 0xff; - if (cache_result >= PERF_COUNT_HW_CACHE_RESULT_MAX) - return ERR_PTR(-EINVAL); - - pev = &((*mipspmu->cache_event_map) - [cache_type] - [cache_op] - [cache_result]); - - if (pev->event_id == UNSUPPORTED_PERF_EVENT_ID) - return ERR_PTR(-EOPNOTSUPP); - - return pev; - -} - -static int validate_event(struct cpu_hw_events *cpuc, - struct perf_event *event) -{ - struct hw_perf_event fake_hwc = event->hw; - - /* Allow mixed event group. So return 1 to pass validation. */ - if (event->pmu != &pmu || event->state <= PERF_EVENT_STATE_OFF) - return 1; - - return mipspmu->alloc_counter(cpuc, &fake_hwc) >= 0; -} - -static int validate_group(struct perf_event *event) -{ - struct perf_event *sibling, *leader = event->group_leader; - struct cpu_hw_events fake_cpuc; - - memset(&fake_cpuc, 0, sizeof(fake_cpuc)); - - if (!validate_event(&fake_cpuc, leader)) - return -ENOSPC; - - list_for_each_entry(sibling, &leader->sibling_list, group_entry) { - if (!validate_event(&fake_cpuc, sibling)) - return -ENOSPC; - } - - if (!validate_event(&fake_cpuc, event)) - return -ENOSPC; - - return 0; -} - -/* This is needed by specific irq handlers in perf_event_*.c */ -static void -handle_associated_event(struct cpu_hw_events *cpuc, - int idx, struct perf_sample_data *data, struct pt_regs *regs) -{ - struct perf_event *event = cpuc->events[idx]; - struct hw_perf_event *hwc = &event->hw; - - mipspmu_event_update(event, hwc, idx); - data->period = event->hw.last_period; - if (!mipspmu_event_set_period(event, hwc, idx)) - return; - - if (perf_event_overflow(event, data, regs)) - mipspmu->disable_event(idx); -} - -#include "perf_event_mipsxx.c" /* Callchain handling code. */ /* * Leave userspace callchain empty for now. When we find a way to trace - * the user stack callchains, we add here. + * the user stack callchains, we will add it here. */ -void perf_callchain_user(struct perf_callchain_entry *entry, - struct pt_regs *regs) -{ -} static void save_raw_perf_callchain(struct perf_callchain_entry *entry, unsigned long reg29) diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c index e5ad09a9baf7..4f2971bcf8e5 100644 --- a/arch/mips/kernel/perf_event_mipsxx.c +++ b/arch/mips/kernel/perf_event_mipsxx.c @@ -1,13 +1,112 @@ -#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) || \ - defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_SB1) +/* + * Linux performance counter support for MIPS. + * + * Copyright (C) 2010 MIPS Technologies, Inc. + * Copyright (C) 2011 Cavium Networks, Inc. + * Author: Deng-Cheng Zhu + * + * This code is based on the implementation for ARM, which is in turn + * based on the sparc64 perf event code and the x86 code. Performance + * counter access is based on the MIPS Oprofile code. And the callchain + * support references the code of MIPS stacktrace.c. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/cpumask.h> +#include <linux/interrupt.h> +#include <linux/smp.h> +#include <linux/kernel.h> +#include <linux/perf_event.h> +#include <linux/uaccess.h> + +#include <asm/irq.h> +#include <asm/irq_regs.h> +#include <asm/stacktrace.h> +#include <asm/time.h> /* For perf_irq */ + +#define MIPS_MAX_HWEVENTS 4 + +struct cpu_hw_events { + /* Array of events on this cpu. */ + struct perf_event *events[MIPS_MAX_HWEVENTS]; + + /* + * Set the bit (indexed by the counter number) when the counter + * is used for an event. + */ + unsigned long used_mask[BITS_TO_LONGS(MIPS_MAX_HWEVENTS)]; + + /* + * Software copy of the control register for each performance counter. + * MIPS CPUs vary in performance counters. They use this differently, + * and even may not use it. + */ + unsigned int saved_ctrl[MIPS_MAX_HWEVENTS]; +}; +DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events) = { + .saved_ctrl = {0}, +}; + +/* The description of MIPS performance events. */ +struct mips_perf_event { + unsigned int event_id; + /* + * MIPS performance counters are indexed starting from 0. + * CNTR_EVEN indicates the indexes of the counters to be used are + * even numbers. + */ + unsigned int cntr_mask; + #define CNTR_EVEN 0x55555555 + #define CNTR_ODD 0xaaaaaaaa + #define CNTR_ALL 0xffffffff +#ifdef CONFIG_MIPS_MT_SMP + enum { + T = 0, + V = 1, + P = 2, + } range; +#else + #define T + #define V + #define P +#endif +}; + +static struct mips_perf_event raw_event; +static DEFINE_MUTEX(raw_event_mutex); + +#define UNSUPPORTED_PERF_EVENT_ID 0xffffffff +#define C(x) PERF_COUNT_HW_CACHE_##x + +struct mips_pmu { + u64 max_period; + u64 valid_count; + u64 overflow; + const char *name; + int irq; + u64 (*read_counter)(unsigned int idx); + void (*write_counter)(unsigned int idx, u64 val); + const struct mips_perf_event *(*map_raw_event)(u64 config); + const struct mips_perf_event (*general_event_map)[PERF_COUNT_HW_MAX]; + const struct mips_perf_event (*cache_event_map) + [PERF_COUNT_HW_CACHE_MAX] + [PERF_COUNT_HW_CACHE_OP_MAX] + [PERF_COUNT_HW_CACHE_RESULT_MAX]; + unsigned int num_counters; +}; + +static struct mips_pmu mipspmu; #define M_CONFIG1_PC (1 << 4) -#define M_PERFCTL_EXL (1UL << 0) -#define M_PERFCTL_KERNEL (1UL << 1) -#define M_PERFCTL_SUPERVISOR (1UL << 2) -#define M_PERFCTL_USER (1UL << 3) -#define M_PERFCTL_INTERRUPT_ENABLE (1UL << 4) +#define M_PERFCTL_EXL (1 << 0) +#define M_PERFCTL_KERNEL (1 << 1) +#define M_PERFCTL_SUPERVISOR (1 << 2) +#define M_PERFCTL_USER (1 << 3) +#define M_PERFCTL_INTERRUPT_ENABLE (1 << 4) #define M_PERFCTL_EVENT(event) (((event) & 0x3ff) << 5) #define M_PERFCTL_VPEID(vpe) ((vpe) << 16) #define M_PERFCTL_MT_EN(filter) ((filter) << 20) @@ -15,8 +114,8 @@ #define M_TC_EN_VPE M_PERFCTL_MT_EN(1) #define M_TC_EN_TC M_PERFCTL_MT_EN(2) #define M_PERFCTL_TCID(tcid) ((tcid) << 22) -#define M_PERFCTL_WIDE (1UL << 30) -#define M_PERFCTL_MORE (1UL << 31) +#define M_PERFCTL_WIDE (1 << 30) +#define M_PERFCTL_MORE (1 << 31) #define M_PERFCTL_COUNT_EVENT_WHENEVER (M_PERFCTL_EXL | \ M_PERFCTL_KERNEL | \ @@ -31,11 +130,12 @@ #endif #define M_PERFCTL_EVENT_MASK 0xfe0 -#define M_COUNTER_OVERFLOW (1UL << 31) #ifdef CONFIG_MIPS_MT_SMP static int cpu_has_mipsmt_pertccounters; +static DEFINE_RWLOCK(pmuint_rwlock); + /* * FIXME: For VSMP, vpe_id() is redefined for Perf-events, because * cpu_data[cpuid].vpe_id reports 0 for _both_ CPUs. @@ -49,209 +149,673 @@ static int cpu_has_mipsmt_pertccounters; #endif /* Copied from op_model_mipsxx.c */ -static inline unsigned int vpe_shift(void) +static unsigned int vpe_shift(void) { if (num_possible_cpus() > 1) return 1; return 0; } -#else /* !CONFIG_MIPS_MT_SMP */ -#define vpe_id() 0 -static inline unsigned int vpe_shift(void) -{ - return 0; -} -#endif /* CONFIG_MIPS_MT_SMP */ - -static inline unsigned int -counters_total_to_per_cpu(unsigned int counters) +static unsigned int counters_total_to_per_cpu(unsigned int counters) { return counters >> vpe_shift(); } -static inline unsigned int -counters_per_cpu_to_total(unsigned int counters) +static unsigned int counters_per_cpu_to_total(unsigned int counters) { return counters << vpe_shift(); } -#define __define_perf_accessors(r, n, np) \ - \ -static inline unsigned int r_c0_ ## r ## n(void) \ -{ \ - unsigned int cpu = vpe_id(); \ - \ - switch (cpu) { \ - case 0: \ - return read_c0_ ## r ## n(); \ - case 1: \ - return read_c0_ ## r ## np(); \ - default: \ - BUG(); \ - } \ - return 0; \ -} \ - \ -static inline void w_c0_ ## r ## n(unsigned int value) \ -{ \ - unsigned int cpu = vpe_id(); \ - \ - switch (cpu) { \ - case 0: \ - write_c0_ ## r ## n(value); \ - return; \ - case 1: \ - write_c0_ ## r ## np(value); \ - return; \ - default: \ - BUG(); \ - } \ - return; \ -} \ - -__define_perf_accessors(perfcntr, 0, 2) -__define_perf_accessors(perfcntr, 1, 3) -__define_perf_accessors(perfcntr, 2, 0) -__define_perf_accessors(perfcntr, 3, 1) - -__define_perf_accessors(perfctrl, 0, 2) -__define_perf_accessors(perfctrl, 1, 3) -__define_perf_accessors(perfctrl, 2, 0) -__define_perf_accessors(perfctrl, 3, 1) - -static inline int __n_counters(void) -{ - if (!(read_c0_config1() & M_CONFIG1_PC)) - return 0; - if (!(read_c0_perfctrl0() & M_PERFCTL_MORE)) - return 1; - if (!(read_c0_perfctrl1() & M_PERFCTL_MORE)) - return 2; - if (!(read_c0_perfctrl2() & M_PERFCTL_MORE)) - return 3; +#else /* !CONFIG_MIPS_MT_SMP */ +#define vpe_id() 0 - return 4; -} +#endif /* CONFIG_MIPS_MT_SMP */ -static inline int n_counters(void) -{ - int counters; +static void resume_local_counters(void); +static void pause_local_counters(void); +static irqreturn_t mipsxx_pmu_handle_irq(int, void *); +static int mipsxx_pmu_handle_shared_irq(void); - switch (current_cpu_type()) { - case CPU_R10000: - counters = 2; - break; +static unsigned int mipsxx_pmu_swizzle_perf_idx(unsigned int idx) +{ + if (vpe_id() == 1) + idx = (idx + 2) & 3; + return idx; +} - case CPU_R12000: - case CPU_R14000: - counters = 4; - break; +static u64 mipsxx_pmu_read_counter(unsigned int idx) +{ + idx = mipsxx_pmu_swizzle_perf_idx(idx); + switch (idx) { + case 0: + /* + * The counters are unsigned, we must cast to truncate + * off the high bits. + */ + return (u32)read_c0_perfcntr0(); + case 1: + return (u32)read_c0_perfcntr1(); + case 2: + return (u32)read_c0_perfcntr2(); + case 3: + return (u32)read_c0_perfcntr3(); default: - counters = __n_counters(); + WARN_ONCE(1, "Invalid performance counter number (%d)\n", idx); + return 0; } - - return counters; } -static void reset_counters(void *arg) +static u64 mipsxx_pmu_read_counter_64(unsigned int idx) { - int counters = (int)(long)arg; - switch (counters) { - case 4: - w_c0_perfctrl3(0); - w_c0_perfcntr3(0); - case 3: - w_c0_perfctrl2(0); - w_c0_perfcntr2(0); - case 2: - w_c0_perfctrl1(0); - w_c0_perfcntr1(0); + idx = mipsxx_pmu_swizzle_perf_idx(idx); + + switch (idx) { + case 0: + return read_c0_perfcntr0_64(); case 1: - w_c0_perfctrl0(0); - w_c0_perfcntr0(0); + return read_c0_perfcntr1_64(); + case 2: + return read_c0_perfcntr2_64(); + case 3: + return read_c0_perfcntr3_64(); + default: + WARN_ONCE(1, "Invalid performance counter number (%d)\n", idx); + return 0; } } -static inline u64 -mipsxx_pmu_read_counter(unsigned int idx) +static void mipsxx_pmu_write_counter(unsigned int idx, u64 val) { + idx = mipsxx_pmu_swizzle_perf_idx(idx); + switch (idx) { case 0: - return r_c0_perfcntr0(); + write_c0_perfcntr0(val); + return; case 1: - return r_c0_perfcntr1(); + write_c0_perfcntr1(val); + return; case 2: - return r_c0_perfcntr2(); + write_c0_perfcntr2(val); + return; case 3: - return r_c0_perfcntr3(); - default: - WARN_ONCE(1, "Invalid performance counter number (%d)\n", idx); - return 0; + write_c0_perfcntr3(val); + return; } } -static inline void -mipsxx_pmu_write_counter(unsigned int idx, u64 val) +static void mipsxx_pmu_write_counter_64(unsigned int idx, u64 val) { + idx = mipsxx_pmu_swizzle_perf_idx(idx); + switch (idx) { case 0: - w_c0_perfcntr0(val); + write_c0_perfcntr0_64(val); return; case 1: - w_c0_perfcntr1(val); + write_c0_perfcntr1_64(val); return; case 2: - w_c0_perfcntr2(val); + write_c0_perfcntr2_64(val); return; case 3: - w_c0_perfcntr3(val); + write_c0_perfcntr3_64(val); return; } } -static inline unsigned int -mipsxx_pmu_read_control(unsigned int idx) +static unsigned int mipsxx_pmu_read_control(unsigned int idx) { + idx = mipsxx_pmu_swizzle_perf_idx(idx); + switch (idx) { case 0: - return r_c0_perfctrl0(); + return read_c0_perfctrl0(); case 1: - return r_c0_perfctrl1(); + return read_c0_perfctrl1(); case 2: - return r_c0_perfctrl2(); + return read_c0_perfctrl2(); case 3: - return r_c0_perfctrl3(); + return read_c0_perfctrl3(); default: WARN_ONCE(1, "Invalid performance counter number (%d)\n", idx); return 0; } } -static inline void -mipsxx_pmu_write_control(unsigned int idx, unsigned int val) +static void mipsxx_pmu_write_control(unsigned int idx, unsigned int val) { + idx = mipsxx_pmu_swizzle_perf_idx(idx); + switch (idx) { case 0: - w_c0_perfctrl0(val); + write_c0_perfctrl0(val); return; case 1: - w_c0_perfctrl1(val); + write_c0_perfctrl1(val); return; case 2: - w_c0_perfctrl2(val); + write_c0_perfctrl2(val); return; case 3: - w_c0_perfctrl3(val); + write_c0_perfctrl3(val); + return; + } +} + +static int mipsxx_pmu_alloc_counter(struct cpu_hw_events *cpuc, + struct hw_perf_event *hwc) +{ + int i; + + /* + * We only need to care the counter mask. The range has been + * checked definitely. + */ + unsigned long cntr_mask = (hwc->event_base >> 8) & 0xffff; + + for (i = mipspmu.num_counters - 1; i >= 0; i--) { + /* + * Note that some MIPS perf events can be counted by both + * even and odd counters, wheresas many other are only by + * even _or_ odd counters. This introduces an issue that + * when the former kind of event takes the counter the + * latter kind of event wants to use, then the "counter + * allocation" for the latter event will fail. In fact if + * they can be dynamically swapped, they both feel happy. + * But here we leave this issue alone for now. + */ + if (test_bit(i, &cntr_mask) && + !test_and_set_bit(i, cpuc->used_mask)) + return i; + } + + return -EAGAIN; +} + +static void mipsxx_pmu_enable_event(struct hw_perf_event *evt, int idx) +{ + struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); + + WARN_ON(idx < 0 || idx >= mipspmu.num_counters); + + cpuc->saved_ctrl[idx] = M_PERFCTL_EVENT(evt->event_base & 0xff) | + (evt->config_base & M_PERFCTL_CONFIG_MASK) | + /* Make sure interrupt enabled. */ + M_PERFCTL_INTERRUPT_ENABLE; + /* + * We do not actually let the counter run. Leave it until start(). + */ +} + +static void mipsxx_pmu_disable_event(int idx) +{ + struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); + unsigned long flags; + + WARN_ON(idx < 0 || idx >= mipspmu.num_counters); + + local_irq_save(flags); + cpuc->saved_ctrl[idx] = mipsxx_pmu_read_control(idx) & + ~M_PERFCTL_COUNT_EVENT_WHENEVER; + mipsxx_pmu_write_control(idx, cpuc->saved_ctrl[idx]); + local_irq_restore(flags); +} + +static int mipspmu_event_set_period(struct perf_event *event, + struct hw_perf_event *hwc, + int idx) +{ + u64 left = local64_read(&hwc->period_left); + u64 period = hwc->sample_period; + int ret = 0; + + if (unlikely((left + period) & (1ULL << 63))) { + /* left underflowed by more than period. */ + left = period; + local64_set(&hwc->period_left, left); + hwc->last_period = period; + ret = 1; + } else if (unlikely((left + period) <= period)) { + /* left underflowed by less than period. */ + left += period; + local64_set(&hwc->period_left, left); + hwc->last_period = period; + ret = 1; + } + + if (left > mipspmu.max_period) { + left = mipspmu.max_period; + local64_set(&hwc->period_left, left); + } + + local64_set(&hwc->prev_count, mipspmu.overflow - left); + + mipspmu.write_counter(idx, mipspmu.overflow - left); + + perf_event_update_userpage(event); + + return ret; +} + +static void mipspmu_event_update(struct perf_event *event, + struct hw_perf_event *hwc, + int idx) +{ + u64 prev_raw_count, new_raw_count; + u64 delta; + +again: + prev_raw_count = local64_read(&hwc->prev_count); + new_raw_count = mipspmu.read_counter(idx); + + if (local64_cmpxchg(&hwc->prev_count, prev_raw_count, + new_raw_count) != prev_raw_count) + goto again; + + delta = new_raw_count - prev_raw_count; + + local64_add(delta, &event->count); + local64_sub(delta, &hwc->period_left); +} + +static void mipspmu_start(struct perf_event *event, int flags) +{ + struct hw_perf_event *hwc = &event->hw; + + if (flags & PERF_EF_RELOAD) + WARN_ON_ONCE(!(hwc->state & PERF_HES_UPTODATE)); + + hwc->state = 0; + + /* Set the period for the event. */ + mipspmu_event_set_period(event, hwc, hwc->idx); + + /* Enable the event. */ + mipsxx_pmu_enable_event(hwc, hwc->idx); +} + +static void mipspmu_stop(struct perf_event *event, int flags) +{ + struct hw_perf_event *hwc = &event->hw; + + if (!(hwc->state & PERF_HES_STOPPED)) { + /* We are working on a local event. */ + mipsxx_pmu_disable_event(hwc->idx); + barrier(); + mipspmu_event_update(event, hwc, hwc->idx); + hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE; + } +} + +static int mipspmu_add(struct perf_event *event, int flags) +{ + struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); + struct hw_perf_event *hwc = &event->hw; + int idx; + int err = 0; + + perf_pmu_disable(event->pmu); + + /* To look for a free counter for this event. */ + idx = mipsxx_pmu_alloc_counter(cpuc, hwc); + if (idx < 0) { + err = idx; + goto out; + } + + /* + * If there is an event in the counter we are going to use then + * make sure it is disabled. + */ + event->hw.idx = idx; + mipsxx_pmu_disable_event(idx); + cpuc->events[idx] = event; + + hwc->state = PERF_HES_STOPPED | PERF_HES_UPTODATE; + if (flags & PERF_EF_START) + mipspmu_start(event, PERF_EF_RELOAD); + + /* Propagate our changes to the userspace mapping. */ + perf_event_update_userpage(event); + +out: + perf_pmu_enable(event->pmu); + return err; +} + +static void mipspmu_del(struct perf_event *event, int flags) +{ + struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); + struct hw_perf_event *hwc = &event->hw; + int idx = hwc->idx; + + WARN_ON(idx < 0 || idx >= mipspmu.num_counters); + + mipspmu_stop(event, PERF_EF_UPDATE); + cpuc->events[idx] = NULL; + clear_bit(idx, cpuc->used_mask); + + perf_event_update_userpage(event); +} + +static void mipspmu_read(struct perf_event *event) +{ + struct hw_perf_event *hwc = &event->hw; + + /* Don't read disabled counters! */ + if (hwc->idx < 0) return; + + mipspmu_event_update(event, hwc, hwc->idx); +} + +static void mipspmu_enable(struct pmu *pmu) +{ +#ifdef CONFIG_MIPS_MT_SMP + write_unlock(&pmuint_rwlock); +#endif + resume_local_counters(); +} + +/* + * MIPS performance counters can be per-TC. The control registers can + * not be directly accessed accross CPUs. Hence if we want to do global + * control, we need cross CPU calls. on_each_cpu() can help us, but we + * can not make sure this function is called with interrupts enabled. So + * here we pause local counters and then grab a rwlock and leave the + * counters on other CPUs alone. If any counter interrupt raises while + * we own the write lock, simply pause local counters on that CPU and + * spin in the handler. Also we know we won't be switched to another + * CPU after pausing local counters and before grabbing the lock. + */ +static void mipspmu_disable(struct pmu *pmu) +{ + pause_local_counters(); +#ifdef CONFIG_MIPS_MT_SMP + write_lock(&pmuint_rwlock); +#endif +} + +static atomic_t active_events = ATOMIC_INIT(0); +static DEFINE_MUTEX(pmu_reserve_mutex); +static int (*save_perf_irq)(void); + +static int mipspmu_get_irq(void) +{ + int err; + + if (mipspmu.irq >= 0) { + /* Request my own irq handler. */ + err = request_irq(mipspmu.irq, mipsxx_pmu_handle_irq, + IRQF_PERCPU | IRQF_NOBALANCING, + "mips_perf_pmu", NULL); + if (err) { + pr_warning("Unable to request IRQ%d for MIPS " + "performance counters!\n", mipspmu.irq); + } + } else if (cp0_perfcount_irq < 0) { + /* + * We are sharing the irq number with the timer interrupt. + */ + save_perf_irq = perf_irq; + perf_irq = mipsxx_pmu_handle_shared_irq; + err = 0; + } else { + pr_warning("The platform hasn't properly defined its " + "interrupt controller.\n"); + err = -ENOENT; } + + return err; +} + +static void mipspmu_free_irq(void) +{ + if (mipspmu.irq >= 0) + free_irq(mipspmu.irq, NULL); + else if (cp0_perfcount_irq < 0) + perf_irq = save_perf_irq; } +/* + * mipsxx/rm9000/loongson2 have different performance counters, they have + * specific low-level init routines. + */ +static void reset_counters(void *arg); +static int __hw_perf_event_init(struct perf_event *event); + +static void hw_perf_event_destroy(struct perf_event *event) +{ + if (atomic_dec_and_mutex_lock(&active_events, + &pmu_reserve_mutex)) { + /* + * We must not call the destroy function with interrupts + * disabled. + */ + on_each_cpu(reset_counters, + (void *)(long)mipspmu.num_counters, 1); + mipspmu_free_irq(); + mutex_unlock(&pmu_reserve_mutex); + } +} + +static int mipspmu_event_init(struct perf_event *event) +{ + int err = 0; + + switch (event->attr.type) { + case PERF_TYPE_RAW: + case PERF_TYPE_HARDWARE: + case PERF_TYPE_HW_CACHE: + break; + + default: + return -ENOENT; + } + + if (event->cpu >= nr_cpumask_bits || + (event->cpu >= 0 && !cpu_online(event->cpu))) + return -ENODEV; + + if (!atomic_inc_not_zero(&active_events)) { + if (atomic_read(&active_events) > MIPS_MAX_HWEVENTS) { + atomic_dec(&active_events); + return -ENOSPC; + } + + mutex_lock(&pmu_reserve_mutex); + if (atomic_read(&active_events) == 0) + err = mipspmu_get_irq(); + + if (!err) + atomic_inc(&active_events); + mutex_unlock(&pmu_reserve_mutex); + } + + if (err) + return err; + + err = __hw_perf_event_init(event); + if (err) + hw_perf_event_destroy(event); + + return err; +} + +static struct pmu pmu = { + .pmu_enable = mipspmu_enable, + .pmu_disable = mipspmu_disable, + .event_init = mipspmu_event_init, + .add = mipspmu_add, + .del = mipspmu_del, + .start = mipspmu_start, + .stop = mipspmu_stop, + .read = mipspmu_read, +}; + +static unsigned int mipspmu_perf_event_encode(const struct mips_perf_event *pev) +{ +/* + * Top 8 bits for range, next 16 bits for cntr_mask, lowest 8 bits for + * event_id. + */ #ifdef CONFIG_MIPS_MT_SMP -static DEFINE_RWLOCK(pmuint_rwlock); + return ((unsigned int)pev->range << 24) | + (pev->cntr_mask & 0xffff00) | + (pev->event_id & 0xff); +#else + return (pev->cntr_mask & 0xffff00) | + (pev->event_id & 0xff); #endif +} + +static const struct mips_perf_event *mipspmu_map_general_event(int idx) +{ + const struct mips_perf_event *pev; + + pev = ((*mipspmu.general_event_map)[idx].event_id == + UNSUPPORTED_PERF_EVENT_ID ? ERR_PTR(-EOPNOTSUPP) : + &(*mipspmu.general_event_map)[idx]); + + return pev; +} + +static const struct mips_perf_event *mipspmu_map_cache_event(u64 config) +{ + unsigned int cache_type, cache_op, cache_result; + const struct mips_perf_event *pev; + + cache_type = (config >> 0) & 0xff; + if (cache_type >= PERF_COUNT_HW_CACHE_MAX) + return ERR_PTR(-EINVAL); + + cache_op = (config >> 8) & 0xff; + if (cache_op >= PERF_COUNT_HW_CACHE_OP_MAX) + return ERR_PTR(-EINVAL); + + cache_result = (config >> 16) & 0xff; + if (cache_result >= PERF_COUNT_HW_CACHE_RESULT_MAX) + return ERR_PTR(-EINVAL); + + pev = &((*mipspmu.cache_event_map) + [cache_type] + [cache_op] + [cache_result]); + + if (pev->event_id == UNSUPPORTED_PERF_EVENT_ID) + return ERR_PTR(-EOPNOTSUPP); + + return pev; + +} + +static int validate_event(struct cpu_hw_events *cpuc, + struct perf_event *event) +{ + struct hw_perf_event fake_hwc = event->hw; + + /* Allow mixed event group. So return 1 to pass validation. */ + if (event->pmu != &pmu || event->state <= PERF_EVENT_STATE_OFF) + return 1; + + return mipsxx_pmu_alloc_counter(cpuc, &fake_hwc) >= 0; +} + +static int validate_group(struct perf_event *event) +{ + struct perf_event *sibling, *leader = event->group_leader; + struct cpu_hw_events fake_cpuc; + + memset(&fake_cpuc, 0, sizeof(fake_cpuc)); + + if (!validate_event(&fake_cpuc, leader)) + return -ENOSPC; + + list_for_each_entry(sibling, &leader->sibling_list, group_entry) { + if (!validate_event(&fake_cpuc, sibling)) + return -ENOSPC; + } + + if (!validate_event(&fake_cpuc, event)) + return -ENOSPC; + + return 0; +} + +/* This is needed by specific irq handlers in perf_event_*.c */ +static void handle_associated_event(struct cpu_hw_events *cpuc, + int idx, struct perf_sample_data *data, + struct pt_regs *regs) +{ + struct perf_event *event = cpuc->events[idx]; + struct hw_perf_event *hwc = &event->hw; + + mipspmu_event_update(event, hwc, idx); + data->period = event->hw.last_period; + if (!mipspmu_event_set_period(event, hwc, idx)) + return; + + if (perf_event_overflow(event, data, regs)) + mipsxx_pmu_disable_event(idx); +} + + +static int __n_counters(void) +{ + if (!(read_c0_config1() & M_CONFIG1_PC)) + return 0; + if (!(read_c0_perfctrl0() & M_PERFCTL_MORE)) + return 1; + if (!(read_c0_perfctrl1() & M_PERFCTL_MORE)) + return 2; + if (!(read_c0_perfctrl2() & M_PERFCTL_MORE)) + return 3; + + return 4; +} + +static int n_counters(void) +{ + int counters; + + switch (current_cpu_type()) { + case CPU_R10000: + counters = 2; + break; + + case CPU_R12000: + case CPU_R14000: + counters = 4; + break; + + default: + counters = __n_counters(); + } + + return counters; +} + +static void reset_counters(void *arg) +{ + int counters = (int)(long)arg; + switch (counters) { + case 4: + mipsxx_pmu_write_control(3, 0); + mipspmu.write_counter(3, 0); + case 3: + mipsxx_pmu_write_control(2, 0); + mipspmu.write_counter(2, 0); + case 2: + mipsxx_pmu_write_control(1, 0); + mipspmu.write_counter(1, 0); + case 1: + mipsxx_pmu_write_control(0, 0); + mipspmu.write_counter(0, 0); + } +} /* 24K/34K/1004K cores can share the same event map. */ static const struct mips_perf_event mipsxxcore_event_map @@ -277,6 +841,16 @@ static const struct mips_perf_event mipsxx74Kcore_event_map [PERF_COUNT_HW_BUS_CYCLES] = { UNSUPPORTED_PERF_EVENT_ID }, }; +static const struct mips_perf_event octeon_event_map[PERF_COUNT_HW_MAX] = { + [PERF_COUNT_HW_CPU_CYCLES] = { 0x01, CNTR_ALL }, + [PERF_COUNT_HW_INSTRUCTIONS] = { 0x03, CNTR_ALL }, + [PERF_COUNT_HW_CACHE_REFERENCES] = { 0x2b, CNTR_ALL }, + [PERF_COUNT_HW_CACHE_MISSES] = { 0x2e, CNTR_ALL }, + [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = { 0x08, CNTR_ALL }, + [PERF_COUNT_HW_BRANCH_MISSES] = { 0x09, CNTR_ALL }, + [PERF_COUNT_HW_BUS_CYCLES] = { 0x25, CNTR_ALL }, +}; + /* 24K/34K/1004K cores can share the same cache event map. */ static const struct mips_perf_event mipsxxcore_cache_map [PERF_COUNT_HW_CACHE_MAX] @@ -510,10 +1084,105 @@ static const struct mips_perf_event mipsxx74Kcore_cache_map }, }; + +static const struct mips_perf_event octeon_cache_map + [PERF_COUNT_HW_CACHE_MAX] + [PERF_COUNT_HW_CACHE_OP_MAX] + [PERF_COUNT_HW_CACHE_RESULT_MAX] = { +[C(L1D)] = { + [C(OP_READ)] = { + [C(RESULT_ACCESS)] = { 0x2b, CNTR_ALL }, + [C(RESULT_MISS)] = { 0x2e, CNTR_ALL }, + }, + [C(OP_WRITE)] = { + [C(RESULT_ACCESS)] = { 0x30, CNTR_ALL }, + [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID }, + }, + [C(OP_PREFETCH)] = { + [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID }, + [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID }, + }, +}, +[C(L1I)] = { + [C(OP_READ)] = { + [C(RESULT_ACCESS)] = { 0x18, CNTR_ALL }, + [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID }, + }, + [C(OP_WRITE)] = { + [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID }, + [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID }, + }, + [C(OP_PREFETCH)] = { + [C(RESULT_ACCESS)] = { 0x19, CNTR_ALL }, + [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID }, + }, +}, +[C(LL)] = { + [C(OP_READ)] = { + [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID }, + [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID }, + }, + [C(OP_WRITE)] = { + [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID }, + [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID }, + }, + [C(OP_PREFETCH)] = { + [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID }, + [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID }, + }, +}, +[C(DTLB)] = { + /* + * Only general DTLB misses are counted use the same event for + * read and write. + */ + [C(OP_READ)] = { + [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID }, + [C(RESULT_MISS)] = { 0x35, CNTR_ALL }, + }, + [C(OP_WRITE)] = { + [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID }, + [C(RESULT_MISS)] = { 0x35, CNTR_ALL }, + }, + [C(OP_PREFETCH)] = { + [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID }, + [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID }, + }, +}, +[C(ITLB)] = { + [C(OP_READ)] = { + [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID }, + [C(RESULT_MISS)] = { 0x37, CNTR_ALL }, + }, + [C(OP_WRITE)] = { + [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID }, + [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID }, + }, + [C(OP_PREFETCH)] = { + [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID }, + [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID }, + }, +}, +[C(BPU)] = { + /* Using the same code for *HW_BRANCH* */ + [C(OP_READ)] = { + [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID }, + [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID }, + }, + [C(OP_WRITE)] = { + [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID }, + [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID }, + }, + [C(OP_PREFETCH)] = { + [C(RESULT_ACCESS)] = { UNSUPPORTED_PERF_EVENT_ID }, + [C(RESULT_MISS)] = { UNSUPPORTED_PERF_EVENT_ID }, + }, +}, +}; + #ifdef CONFIG_MIPS_MT_SMP -static void -check_and_calc_range(struct perf_event *event, - const struct mips_perf_event *pev) +static void check_and_calc_range(struct perf_event *event, + const struct mips_perf_event *pev) { struct hw_perf_event *hwc = &event->hw; @@ -536,9 +1205,8 @@ check_and_calc_range(struct perf_event *event, hwc->config_base |= M_TC_EN_ALL; } #else -static void -check_and_calc_range(struct perf_event *event, - const struct mips_perf_event *pev) +static void check_and_calc_range(struct perf_event *event, + const struct mips_perf_event *pev) { } #endif @@ -560,7 +1228,7 @@ static int __hw_perf_event_init(struct perf_event *event) } else if (PERF_TYPE_RAW == event->attr.type) { /* We are working on the global raw event. */ mutex_lock(&raw_event_mutex); - pev = mipspmu->map_raw_event(event->attr.config); + pev = mipspmu.map_raw_event(event->attr.config); } else { /* The event type is not (yet) supported. */ return -EOPNOTSUPP; @@ -605,7 +1273,7 @@ static int __hw_perf_event_init(struct perf_event *event) hwc->config = 0; if (!hwc->sample_period) { - hwc->sample_period = MAX_PERIOD; + hwc->sample_period = mipspmu.max_period; hwc->last_period = hwc->sample_period; local64_set(&hwc->period_left, hwc->sample_period); } @@ -618,70 +1286,47 @@ static int __hw_perf_event_init(struct perf_event *event) } event->destroy = hw_perf_event_destroy; - return err; } static void pause_local_counters(void) { struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); - int counters = mipspmu->num_counters; + int ctr = mipspmu.num_counters; unsigned long flags; local_irq_save(flags); - switch (counters) { - case 4: - cpuc->saved_ctrl[3] = r_c0_perfctrl3(); - w_c0_perfctrl3(cpuc->saved_ctrl[3] & - ~M_PERFCTL_COUNT_EVENT_WHENEVER); - case 3: - cpuc->saved_ctrl[2] = r_c0_perfctrl2(); - w_c0_perfctrl2(cpuc->saved_ctrl[2] & - ~M_PERFCTL_COUNT_EVENT_WHENEVER); - case 2: - cpuc->saved_ctrl[1] = r_c0_perfctrl1(); - w_c0_perfctrl1(cpuc->saved_ctrl[1] & - ~M_PERFCTL_COUNT_EVENT_WHENEVER); - case 1: - cpuc->saved_ctrl[0] = r_c0_perfctrl0(); - w_c0_perfctrl0(cpuc->saved_ctrl[0] & - ~M_PERFCTL_COUNT_EVENT_WHENEVER); - } + do { + ctr--; + cpuc->saved_ctrl[ctr] = mipsxx_pmu_read_control(ctr); + mipsxx_pmu_write_control(ctr, cpuc->saved_ctrl[ctr] & + ~M_PERFCTL_COUNT_EVENT_WHENEVER); + } while (ctr > 0); local_irq_restore(flags); } static void resume_local_counters(void) { struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); - int counters = mipspmu->num_counters; - unsigned long flags; + int ctr = mipspmu.num_counters; - local_irq_save(flags); - switch (counters) { - case 4: - w_c0_perfctrl3(cpuc->saved_ctrl[3]); - case 3: - w_c0_perfctrl2(cpuc->saved_ctrl[2]); - case 2: - w_c0_perfctrl1(cpuc->saved_ctrl[1]); - case 1: - w_c0_perfctrl0(cpuc->saved_ctrl[0]); - } - local_irq_restore(flags); + do { + ctr--; + mipsxx_pmu_write_control(ctr, cpuc->saved_ctrl[ctr]); + } while (ctr > 0); } static int mipsxx_pmu_handle_shared_irq(void) { struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); struct perf_sample_data data; - unsigned int counters = mipspmu->num_counters; - unsigned int counter; + unsigned int counters = mipspmu.num_counters; + u64 counter; int handled = IRQ_NONE; struct pt_regs *regs; if (cpu_has_mips_r2 && !(read_c0_cause() & (1 << 26))) return handled; - /* * First we pause the local counters, so that when we are locked * here, the counters are all paused. When it gets locked due to @@ -702,13 +1347,9 @@ static int mipsxx_pmu_handle_shared_irq(void) #define HANDLE_COUNTER(n) \ case n + 1: \ if (test_bit(n, cpuc->used_mask)) { \ - counter = r_c0_perfcntr ## n(); \ - if (counter & M_COUNTER_OVERFLOW) { \ - w_c0_perfcntr ## n(counter & \ - VALID_COUNT); \ - if (test_and_change_bit(n, cpuc->msbs)) \ - handle_associated_event(cpuc, \ - n, &data, regs); \ + counter = mipspmu.read_counter(n); \ + if (counter & mipspmu.overflow) { \ + handle_associated_event(cpuc, n, &data, regs); \ handled = IRQ_HANDLED; \ } \ } @@ -733,104 +1374,11 @@ static int mipsxx_pmu_handle_shared_irq(void) return handled; } -static irqreturn_t -mipsxx_pmu_handle_irq(int irq, void *dev) +static irqreturn_t mipsxx_pmu_handle_irq(int irq, void *dev) { return mipsxx_pmu_handle_shared_irq(); } -static void mipsxx_pmu_start(void) -{ -#ifdef CONFIG_MIPS_MT_SMP - write_unlock(&pmuint_rwlock); -#endif - resume_local_counters(); -} - -/* - * MIPS performance counters can be per-TC. The control registers can - * not be directly accessed across CPUs. Hence if we want to do global - * control, we need cross CPU calls. on_each_cpu() can help us, but we - * can not make sure this function is called with interrupts enabled. So - * here we pause local counters and then grab a rwlock and leave the - * counters on other CPUs alone. If any counter interrupt raises while - * we own the write lock, simply pause local counters on that CPU and - * spin in the handler. Also we know we won't be switched to another - * CPU after pausing local counters and before grabbing the lock. - */ -static void mipsxx_pmu_stop(void) -{ - pause_local_counters(); -#ifdef CONFIG_MIPS_MT_SMP - write_lock(&pmuint_rwlock); -#endif -} - -static int -mipsxx_pmu_alloc_counter(struct cpu_hw_events *cpuc, - struct hw_perf_event *hwc) -{ - int i; - - /* - * We only need to care the counter mask. The range has been - * checked definitely. - */ - unsigned long cntr_mask = (hwc->event_base >> 8) & 0xffff; - - for (i = mipspmu->num_counters - 1; i >= 0; i--) { - /* - * Note that some MIPS perf events can be counted by both - * even and odd counters, wheresas many other are only by - * even _or_ odd counters. This introduces an issue that - * when the former kind of event takes the counter the - * latter kind of event wants to use, then the "counter - * allocation" for the latter event will fail. In fact if - * they can be dynamically swapped, they both feel happy. - * But here we leave this issue alone for now. - */ - if (test_bit(i, &cntr_mask) && - !test_and_set_bit(i, cpuc->used_mask)) - return i; - } - - return -EAGAIN; -} - -static void -mipsxx_pmu_enable_event(struct hw_perf_event *evt, int idx) -{ - struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); - unsigned long flags; - - WARN_ON(idx < 0 || idx >= mipspmu->num_counters); - - local_irq_save(flags); - cpuc->saved_ctrl[idx] = M_PERFCTL_EVENT(evt->event_base & 0xff) | - (evt->config_base & M_PERFCTL_CONFIG_MASK) | - /* Make sure interrupt enabled. */ - M_PERFCTL_INTERRUPT_ENABLE; - /* - * We do not actually let the counter run. Leave it until start(). - */ - local_irq_restore(flags); -} - -static void -mipsxx_pmu_disable_event(int idx) -{ - struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); - unsigned long flags; - - WARN_ON(idx < 0 || idx >= mipspmu->num_counters); - - local_irq_save(flags); - cpuc->saved_ctrl[idx] = mipsxx_pmu_read_control(idx) & - ~M_PERFCTL_COUNT_EVENT_WHENEVER; - mipsxx_pmu_write_control(idx, cpuc->saved_ctrl[idx]); - local_irq_restore(flags); -} - /* 24K */ #define IS_UNSUPPORTED_24K_EVENT(r, b) \ ((b) == 12 || (r) == 151 || (r) == 152 || (b) == 26 || \ @@ -892,8 +1440,7 @@ mipsxx_pmu_disable_event(int idx) * then 128 needs to be added to 15 as the input for the event config, * i.e., 143 (0x8F) to be used. */ -static const struct mips_perf_event * -mipsxx_pmu_map_raw_event(u64 config) +static const struct mips_perf_event *mipsxx_pmu_map_raw_event(u64 config) { unsigned int raw_id = config & 0xff; unsigned int base_id = raw_id & 0x7f; @@ -970,40 +1517,44 @@ mipsxx_pmu_map_raw_event(u64 config) return &raw_event; } -static struct mips_pmu mipsxxcore_pmu = { - .handle_irq = mipsxx_pmu_handle_irq, - .handle_shared_irq = mipsxx_pmu_handle_shared_irq, - .start = mipsxx_pmu_start, - .stop = mipsxx_pmu_stop, - .alloc_counter = mipsxx_pmu_alloc_counter, - .read_counter = mipsxx_pmu_read_counter, - .write_counter = mipsxx_pmu_write_counter, - .enable_event = mipsxx_pmu_enable_event, - .disable_event = mipsxx_pmu_disable_event, - .map_raw_event = mipsxx_pmu_map_raw_event, - .general_event_map = &mipsxxcore_event_map, - .cache_event_map = &mipsxxcore_cache_map, -}; +static const struct mips_perf_event *octeon_pmu_map_raw_event(u64 config) +{ + unsigned int raw_id = config & 0xff; + unsigned int base_id = raw_id & 0x7f; -static struct mips_pmu mipsxx74Kcore_pmu = { - .handle_irq = mipsxx_pmu_handle_irq, - .handle_shared_irq = mipsxx_pmu_handle_shared_irq, - .start = mipsxx_pmu_start, - .stop = mipsxx_pmu_stop, - .alloc_counter = mipsxx_pmu_alloc_counter, - .read_counter = mipsxx_pmu_read_counter, - .write_counter = mipsxx_pmu_write_counter, - .enable_event = mipsxx_pmu_enable_event, - .disable_event = mipsxx_pmu_disable_event, - .map_raw_event = mipsxx_pmu_map_raw_event, - .general_event_map = &mipsxx74Kcore_event_map, - .cache_event_map = &mipsxx74Kcore_cache_map, -}; + + raw_event.cntr_mask = CNTR_ALL; + raw_event.event_id = base_id; + + if (current_cpu_type() == CPU_CAVIUM_OCTEON2) { + if (base_id > 0x42) + return ERR_PTR(-EOPNOTSUPP); + } else { + if (base_id > 0x3a) + return ERR_PTR(-EOPNOTSUPP); + } + + switch (base_id) { + case 0x00: + case 0x0f: + case 0x1e: + case 0x1f: + case 0x2f: + case 0x34: + case 0x3b ... 0x3f: + return ERR_PTR(-EOPNOTSUPP); + default: + break; + } + + return &raw_event; +} static int __init init_hw_perf_events(void) { int counters, irq; + int counter_bits; pr_info("Performance counters: "); @@ -1035,32 +1586,36 @@ init_hw_perf_events(void) } #endif - on_each_cpu(reset_counters, (void *)(long)counters, 1); + mipspmu.map_raw_event = mipsxx_pmu_map_raw_event; switch (current_cpu_type()) { case CPU_24K: - mipsxxcore_pmu.name = "mips/24K"; - mipsxxcore_pmu.num_counters = counters; - mipsxxcore_pmu.irq = irq; - mipspmu = &mipsxxcore_pmu; + mipspmu.name = "mips/24K"; + mipspmu.general_event_map = &mipsxxcore_event_map; + mipspmu.cache_event_map = &mipsxxcore_cache_map; break; case CPU_34K: - mipsxxcore_pmu.name = "mips/34K"; - mipsxxcore_pmu.num_counters = counters; - mipsxxcore_pmu.irq = irq; - mipspmu = &mipsxxcore_pmu; + mipspmu.name = "mips/34K"; + mipspmu.general_event_map = &mipsxxcore_event_map; + mipspmu.cache_event_map = &mipsxxcore_cache_map; break; case CPU_74K: - mipsxx74Kcore_pmu.name = "mips/74K"; - mipsxx74Kcore_pmu.num_counters = counters; - mipsxx74Kcore_pmu.irq = irq; - mipspmu = &mipsxx74Kcore_pmu; + mipspmu.name = "mips/74K"; + mipspmu.general_event_map = &mipsxx74Kcore_event_map; + mipspmu.cache_event_map = &mipsxx74Kcore_cache_map; break; case CPU_1004K: - mipsxxcore_pmu.name = "mips/1004K"; - mipsxxcore_pmu.num_counters = counters; - mipsxxcore_pmu.irq = irq; - mipspmu = &mipsxxcore_pmu; + mipspmu.name = "mips/1004K"; + mipspmu.general_event_map = &mipsxxcore_event_map; + mipspmu.cache_event_map = &mipsxxcore_cache_map; + break; + case CPU_CAVIUM_OCTEON: + case CPU_CAVIUM_OCTEON_PLUS: + case CPU_CAVIUM_OCTEON2: + mipspmu.name = "octeon"; + mipspmu.general_event_map = &octeon_event_map; + mipspmu.cache_event_map = &octeon_cache_map; + mipspmu.map_raw_event = octeon_pmu_map_raw_event; break; default: pr_cont("Either hardware does not support performance " @@ -1068,15 +1623,33 @@ init_hw_perf_events(void) return -ENODEV; } - if (mipspmu) - pr_cont("%s PMU enabled, %d counters available to each " - "CPU, irq %d%s\n", mipspmu->name, counters, irq, - irq < 0 ? " (share with timer interrupt)" : ""); + mipspmu.num_counters = counters; + mipspmu.irq = irq; + + if (read_c0_perfctrl0() & M_PERFCTL_WIDE) { + mipspmu.max_period = (1ULL << 63) - 1; + mipspmu.valid_count = (1ULL << 63) - 1; + mipspmu.overflow = 1ULL << 63; + mipspmu.read_counter = mipsxx_pmu_read_counter_64; + mipspmu.write_counter = mipsxx_pmu_write_counter_64; + counter_bits = 64; + } else { + mipspmu.max_period = (1ULL << 31) - 1; + mipspmu.valid_count = (1ULL << 31) - 1; + mipspmu.overflow = 1ULL << 31; + mipspmu.read_counter = mipsxx_pmu_read_counter; + mipspmu.write_counter = mipsxx_pmu_write_counter; + counter_bits = 32; + } + + on_each_cpu(reset_counters, (void *)(long)counters, 1); + + pr_cont("%s PMU enabled, %d %d-bit counters available to each " + "CPU, irq %d%s\n", mipspmu.name, counters, counter_bits, irq, + irq < 0 ? " (share with timer interrupt)" : ""); perf_pmu_register(&pmu, "cpu", PERF_TYPE_RAW); return 0; } early_initcall(init_hw_perf_events); - -#endif /* defined(CONFIG_CPU_MIPS32)... */ diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S index 865bc7a6f5a1..47920657968d 100644 --- a/arch/mips/kernel/scall32-o32.S +++ b/arch/mips/kernel/scall32-o32.S @@ -496,7 +496,7 @@ einval: li v0, -ENOSYS sys sys_lookup_dcookie 4 sys sys_epoll_create 1 sys sys_epoll_ctl 4 - sys sys_epoll_wait 3 /* 4250 */ + sys sys_epoll_wait 4 /* 4250 */ sys sys_remap_file_pages 5 sys sys_set_tid_address 1 sys sys_restart_syscall 0 diff --git a/arch/mips/mm/c-octeon.c b/arch/mips/mm/c-octeon.c index 16c4d256b76f..daa81f7284ac 100644 --- a/arch/mips/mm/c-octeon.c +++ b/arch/mips/mm/c-octeon.c @@ -169,6 +169,10 @@ static void octeon_flush_cache_page(struct vm_area_struct *vma, octeon_flush_icache_all_cores(vma); } +static void octeon_flush_kernel_vmap_range(unsigned long vaddr, int size) +{ + BUG(); +} /** * Probe Octeon's caches @@ -273,6 +277,8 @@ void __cpuinit octeon_cache_init(void) flush_icache_range = octeon_flush_icache_range; local_flush_icache_range = local_octeon_flush_icache_range; + __flush_kernel_vmap_range = octeon_flush_kernel_vmap_range; + build_clear_page(); build_copy_page(); } diff --git a/arch/mips/mm/c-r3k.c b/arch/mips/mm/c-r3k.c index e6b0efd3f6a4..0765583d0c92 100644 --- a/arch/mips/mm/c-r3k.c +++ b/arch/mips/mm/c-r3k.c @@ -299,6 +299,11 @@ static void r3k_flush_cache_sigtramp(unsigned long addr) write_c0_status(flags); } +static void r3k_flush_kernel_vmap_range(unsigned long vaddr, int size) +{ + BUG(); +} + static void r3k_dma_cache_wback_inv(unsigned long start, unsigned long size) { /* Catch bad driver code */ @@ -323,6 +328,8 @@ void __cpuinit r3k_cache_init(void) flush_icache_range = r3k_flush_icache_range; local_flush_icache_range = r3k_flush_icache_range; + __flush_kernel_vmap_range = r3k_flush_kernel_vmap_range; + flush_cache_sigtramp = r3k_flush_cache_sigtramp; local_flush_data_cache_page = local_r3k_flush_data_cache_page; flush_data_cache_page = r3k_flush_data_cache_page; diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index b9aabb998a32..a79fe9aa7721 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -722,6 +722,39 @@ static void r4k_flush_icache_all(void) r4k_blast_icache(); } +struct flush_kernel_vmap_range_args { + unsigned long vaddr; + int size; +}; + +static inline void local_r4k_flush_kernel_vmap_range(void *args) +{ + struct flush_kernel_vmap_range_args *vmra = args; + unsigned long vaddr = vmra->vaddr; + int size = vmra->size; + + /* + * Aliases only affect the primary caches so don't bother with + * S-caches or T-caches. + */ + if (cpu_has_safe_index_cacheops && size >= dcache_size) + r4k_blast_dcache(); + else { + R4600_HIT_CACHEOP_WAR_IMPL; + blast_dcache_range(vaddr, vaddr + size); + } +} + +static void r4k_flush_kernel_vmap_range(unsigned long vaddr, int size) +{ + struct flush_kernel_vmap_range_args args; + + args.vaddr = (unsigned long) vaddr; + args.size = size; + + r4k_on_each_cpu(local_r4k_flush_kernel_vmap_range, &args); +} + static inline void rm7k_erratum31(void) { const unsigned long ic_lsize = 32; @@ -1403,6 +1436,8 @@ void __cpuinit r4k_cache_init(void) flush_cache_page = r4k_flush_cache_page; flush_cache_range = r4k_flush_cache_range; + __flush_kernel_vmap_range = r4k_flush_kernel_vmap_range; + flush_cache_sigtramp = r4k_flush_cache_sigtramp; flush_icache_all = r4k_flush_icache_all; local_flush_data_cache_page = local_r4k_flush_data_cache_page; diff --git a/arch/mips/mm/c-tx39.c b/arch/mips/mm/c-tx39.c index d352fad3e451..a43c197ccf8c 100644 --- a/arch/mips/mm/c-tx39.c +++ b/arch/mips/mm/c-tx39.c @@ -253,6 +253,11 @@ static void tx39_flush_icache_range(unsigned long start, unsigned long end) } } +static void tx39_flush_kernel_vmap_range(unsigned long vaddr, int size) +{ + BUG(); +} + static void tx39_dma_cache_wback_inv(unsigned long addr, unsigned long size) { unsigned long end; @@ -394,6 +399,8 @@ void __cpuinit tx39_cache_init(void) flush_icache_range = tx39_flush_icache_range; local_flush_icache_range = tx39_flush_icache_range; + __flush_kernel_vmap_range = tx39_flush_kernel_vmap_range; + flush_cache_sigtramp = tx39_flush_cache_sigtramp; local_flush_data_cache_page = local_tx39_flush_data_cache_page; flush_data_cache_page = tx39_flush_data_cache_page; diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c index 12af739048fa..829320c7b175 100644 --- a/arch/mips/mm/cache.c +++ b/arch/mips/mm/cache.c @@ -35,6 +35,11 @@ void (*local_flush_icache_range)(unsigned long start, unsigned long end); void (*__flush_cache_vmap)(void); void (*__flush_cache_vunmap)(void); +void (*__flush_kernel_vmap_range)(unsigned long vaddr, int size); +void (*__invalidate_kernel_vmap_range)(unsigned long vaddr, int size); + +EXPORT_SYMBOL_GPL(__flush_kernel_vmap_range); + /* MIPS specific cache operations */ void (*flush_cache_sigtramp)(unsigned long addr); void (*local_flush_data_cache_page)(void * addr); diff --git a/arch/mips/mm/tlb-r3k.c b/arch/mips/mm/tlb-r3k.c index 40424affef83..87bb85d8d537 100644 --- a/arch/mips/mm/tlb-r3k.c +++ b/arch/mips/mm/tlb-r3k.c @@ -223,8 +223,8 @@ void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte) local_irq_restore(flags); } -void __init add_wired_entry(unsigned long entrylo0, unsigned long entrylo1, - unsigned long entryhi, unsigned long pagemask) +void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1, + unsigned long entryhi, unsigned long pagemask) { unsigned long flags; unsigned long old_ctx; diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c index ba40325caea6..0d394e0e8837 100644 --- a/arch/mips/mm/tlb-r4k.c +++ b/arch/mips/mm/tlb-r4k.c @@ -337,8 +337,8 @@ void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte) EXIT_CRITICAL(flags); } -void __init add_wired_entry(unsigned long entrylo0, unsigned long entrylo1, - unsigned long entryhi, unsigned long pagemask) +void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1, + unsigned long entryhi, unsigned long pagemask) { unsigned long flags; unsigned long wired; diff --git a/arch/mips/netlogic/Platform b/arch/mips/netlogic/Platform index f87c1640abb5..b648b487fd66 100644 --- a/arch/mips/netlogic/Platform +++ b/arch/mips/netlogic/Platform @@ -5,6 +5,11 @@ cflags-$(CONFIG_NLM_COMMON) += -I$(srctree)/arch/mips/include/asm/mach-netlogic cflags-$(CONFIG_NLM_COMMON) += -I$(srctree)/arch/mips/include/asm/netlogic # +# use mips64 if xlr is not available +# +cflags-$(CONFIG_NLM_XLR) += $(call cc-option,-march=xlr,-march=mips64) + +# # NETLOGIC XLR/XLS SoC, Simulator and boards # core-$(CONFIG_NLM_XLR) += arch/mips/netlogic/xlr/ diff --git a/arch/mips/netlogic/xlr/setup.c b/arch/mips/netlogic/xlr/setup.c index 482802569e74..cee25ddd0887 100644 --- a/arch/mips/netlogic/xlr/setup.c +++ b/arch/mips/netlogic/xlr/setup.c @@ -53,7 +53,7 @@ unsigned long netlogic_io_base = (unsigned long)(DEFAULT_NETLOGIC_IO_BASE); unsigned long nlm_common_ebase = 0x0; struct psb_info nlm_prom_info; -static void nlm_early_serial_setup(void) +static void __init nlm_early_serial_setup(void) { struct uart_port s; nlm_reg_t *uart_base; @@ -101,7 +101,7 @@ void __init prom_free_prom_memory(void) /* Nothing yet */ } -static void build_arcs_cmdline(int *argv) +static void __init build_arcs_cmdline(int *argv) { int i, remain, len; char *arg; diff --git a/arch/mips/netlogic/xlr/smp.c b/arch/mips/netlogic/xlr/smp.c index d842bce5c940..080284ded508 100644 --- a/arch/mips/netlogic/xlr/smp.c +++ b/arch/mips/netlogic/xlr/smp.c @@ -158,6 +158,10 @@ void __init nlm_smp_setup(void) num_cpus = 1; for (i = 0; i < NR_CPUS; i++) { + /* + * BSP is not set in nlm_cpu_ready array, it is only for + * ASPs (goto see smpboot.S) + */ if (nlm_cpu_ready[i]) { cpu_set(i, phys_cpu_present_map); __cpu_number_map[i] = num_cpus; @@ -191,7 +195,7 @@ struct plat_smp_ops nlm_smp_ops = { unsigned long secondary_entry_point; -int nlm_wakeup_secondary_cpus(u32 wakeup_mask) +int __cpuinit nlm_wakeup_secondary_cpus(u32 wakeup_mask) { unsigned int tid, pid, ipi, i, boot_cpu; void *reset_vec; diff --git a/arch/mips/netlogic/xlr/smpboot.S b/arch/mips/netlogic/xlr/smpboot.S index b8e074402c99..8cb7889ce0cc 100644 --- a/arch/mips/netlogic/xlr/smpboot.S +++ b/arch/mips/netlogic/xlr/smpboot.S @@ -32,17 +32,19 @@ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +#include <linux/init.h> + #include <asm/asm.h> #include <asm/asm-offsets.h> #include <asm/regdef.h> #include <asm/mipsregs.h> - -/* Don't jump to linux function from Bootloader stack. Change it - * here. Kernel might allocate bootloader memory before all the CPUs are - * brought up (eg: Inode cache region) and we better don't overwrite this - * memory +/* + * Early code for secondary CPUs. This will get them out of the bootloader + * code and into linux. Needed because the bootloader area will be taken + * and initialized by linux. */ + __CPUINIT NESTED(prom_pre_boot_secondary_cpus, 16, sp) .set mips64 mfc0 t0, $15, 1 # read ebase @@ -73,7 +75,11 @@ NESTED(prom_pre_boot_secondary_cpus, 16, sp) jr t0 nop END(prom_pre_boot_secondary_cpus) + __FINIT +/* + * NMI code, used for CPU wakeup, copied to reset entry + */ NESTED(nlm_boot_smp_nmi, 0, sp) .set push .set noat diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile index 4df879937446..bb82cbdbc62a 100644 --- a/arch/mips/pci/Makefile +++ b/arch/mips/pci/Makefile @@ -18,14 +18,13 @@ obj-$(CONFIG_PCI_TX4927) += ops-tx4927.o obj-$(CONFIG_BCM47XX) += pci-bcm47xx.o obj-$(CONFIG_BCM63XX) += pci-bcm63xx.o fixup-bcm63xx.o \ ops-bcm63xx.o +obj-$(CONFIG_MIPS_ALCHEMY) += pci-alchemy.o # # These are still pretty much in the old state, watch, go blind. # obj-$(CONFIG_LASAT) += pci-lasat.o obj-$(CONFIG_MIPS_COBALT) += fixup-cobalt.o -obj-$(CONFIG_SOC_AU1500) += fixup-au1000.o ops-au1000.o -obj-$(CONFIG_SOC_AU1550) += fixup-au1000.o ops-au1000.o obj-$(CONFIG_SOC_PNX8550) += fixup-pnx8550.o ops-pnx8550.o obj-$(CONFIG_LEMOTE_FULOONG2E) += fixup-fuloong2e.o ops-loongson2.o obj-$(CONFIG_LEMOTE_MACH2F) += fixup-lemote2f.o ops-loongson2.o diff --git a/arch/mips/pci/fixup-au1000.c b/arch/mips/pci/fixup-au1000.c deleted file mode 100644 index e2ddfc49237c..000000000000 --- a/arch/mips/pci/fixup-au1000.c +++ /dev/null @@ -1,43 +0,0 @@ -/* - * BRIEF MODULE DESCRIPTION - * Board specific PCI fixups. - * - * Copyright 2001-2003, 2008 MontaVista Software Inc. - * Author: MontaVista Software, Inc. <source@mvista.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#include <linux/pci.h> -#include <linux/init.h> - -extern char irq_tab_alchemy[][5]; - -int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) -{ - return irq_tab_alchemy[slot][pin]; -} - -/* Do platform specific device initialization at pci_enable_device() time */ -int pcibios_plat_dev_init(struct pci_dev *dev) -{ - return 0; -} diff --git a/arch/mips/pci/ops-au1000.c b/arch/mips/pci/ops-au1000.c deleted file mode 100644 index 9a57c5ab91dd..000000000000 --- a/arch/mips/pci/ops-au1000.c +++ /dev/null @@ -1,308 +0,0 @@ -/* - * BRIEF MODULE DESCRIPTION - * Alchemy/AMD Au1xx0 PCI support. - * - * Copyright 2001-2003, 2007-2008 MontaVista Software Inc. - * Author: MontaVista Software, Inc. <source@mvista.com> - * - * Support for all devices (greater than 16) added by David Gathright. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#include <linux/types.h> -#include <linux/pci.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/vmalloc.h> - -#include <asm/mach-au1x00/au1000.h> - -#undef DEBUG -#ifdef DEBUG -#define DBG(x...) printk(KERN_DEBUG x) -#else -#define DBG(x...) -#endif - -#define PCI_ACCESS_READ 0 -#define PCI_ACCESS_WRITE 1 - -int (*board_pci_idsel)(unsigned int devsel, int assert); - -void mod_wired_entry(int entry, unsigned long entrylo0, - unsigned long entrylo1, unsigned long entryhi, - unsigned long pagemask) -{ - unsigned long old_pagemask; - unsigned long old_ctx; - - /* Save old context and create impossible VPN2 value */ - old_ctx = read_c0_entryhi() & 0xff; - old_pagemask = read_c0_pagemask(); - write_c0_index(entry); - write_c0_pagemask(pagemask); - write_c0_entryhi(entryhi); - write_c0_entrylo0(entrylo0); - write_c0_entrylo1(entrylo1); - tlb_write_indexed(); - write_c0_entryhi(old_ctx); - write_c0_pagemask(old_pagemask); -} - -static struct vm_struct *pci_cfg_vm; -static int pci_cfg_wired_entry; -static unsigned long last_entryLo0, last_entryLo1; - -/* - * We can't ioremap the entire pci config space because it's too large. - * Nor can we call ioremap dynamically because some device drivers use - * the PCI config routines from within interrupt handlers and that - * becomes a problem in get_vm_area(). We use one wired TLB to handle - * all config accesses for all busses. - */ -void __init au1x_pci_cfg_init(void) -{ - /* Reserve a wired entry for PCI config accesses */ - pci_cfg_vm = get_vm_area(0x2000, VM_IOREMAP); - if (!pci_cfg_vm) - panic(KERN_ERR "PCI unable to get vm area\n"); - pci_cfg_wired_entry = read_c0_wired(); - add_wired_entry(0, 0, (unsigned long)pci_cfg_vm->addr, PM_4K); - last_entryLo0 = last_entryLo1 = 0xffffffff; -} - -static int config_access(unsigned char access_type, struct pci_bus *bus, - unsigned int dev_fn, unsigned char where, u32 *data) -{ -#if defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550) - unsigned int device = PCI_SLOT(dev_fn); - unsigned int function = PCI_FUNC(dev_fn); - unsigned long offset, status; - unsigned long cfg_base; - unsigned long flags; - int error = PCIBIOS_SUCCESSFUL; - unsigned long entryLo0, entryLo1; - - if (device > 19) { - *data = 0xffffffff; - return -1; - } - - local_irq_save(flags); - au_writel(((0x2000 << 16) | (au_readl(Au1500_PCI_STATCMD) & 0xffff)), - Au1500_PCI_STATCMD); - au_sync_udelay(1); - - /* - * Allow board vendors to implement their own off-chip IDSEL. - * If it doesn't succeed, may as well bail out at this point. - */ - if (board_pci_idsel && board_pci_idsel(device, 1) == 0) { - *data = 0xffffffff; - local_irq_restore(flags); - return -1; - } - - /* Setup the config window */ - if (bus->number == 0) - cfg_base = (1 << device) << 11; - else - cfg_base = 0x80000000 | (bus->number << 16) | (device << 11); - - /* Setup the lower bits of the 36-bit address */ - offset = (function << 8) | (where & ~0x3); - /* Pick up any address that falls below the page mask */ - offset |= cfg_base & ~PAGE_MASK; - - /* Page boundary */ - cfg_base = cfg_base & PAGE_MASK; - - /* - * To improve performance, if the current device is the same as - * the last device accessed, we don't touch the TLB. - */ - entryLo0 = (6 << 26) | (cfg_base >> 6) | (2 << 3) | 7; - entryLo1 = (6 << 26) | (cfg_base >> 6) | (0x1000 >> 6) | (2 << 3) | 7; - if ((entryLo0 != last_entryLo0) || (entryLo1 != last_entryLo1)) { - mod_wired_entry(pci_cfg_wired_entry, entryLo0, entryLo1, - (unsigned long)pci_cfg_vm->addr, PM_4K); - last_entryLo0 = entryLo0; - last_entryLo1 = entryLo1; - } - - if (access_type == PCI_ACCESS_WRITE) - au_writel(*data, (int)(pci_cfg_vm->addr + offset)); - else - *data = au_readl((int)(pci_cfg_vm->addr + offset)); - - au_sync_udelay(2); - - DBG("cfg_access %d bus->number %u dev %u at %x *data %x conf %lx\n", - access_type, bus->number, device, where, *data, offset); - - /* Check master abort */ - status = au_readl(Au1500_PCI_STATCMD); - - if (status & (1 << 29)) { - *data = 0xffffffff; - error = -1; - DBG("Au1x Master Abort\n"); - } else if ((status >> 28) & 0xf) { - DBG("PCI ERR detected: device %u, status %lx\n", - device, (status >> 28) & 0xf); - - /* Clear errors */ - au_writel(status & 0xf000ffff, Au1500_PCI_STATCMD); - - *data = 0xffffffff; - error = -1; - } - - /* Take away the IDSEL. */ - if (board_pci_idsel) - (void)board_pci_idsel(device, 0); - - local_irq_restore(flags); - return error; -#endif -} - -static int read_config_byte(struct pci_bus *bus, unsigned int devfn, - int where, u8 *val) -{ - u32 data; - int ret; - - ret = config_access(PCI_ACCESS_READ, bus, devfn, where, &data); - if (where & 1) - data >>= 8; - if (where & 2) - data >>= 16; - *val = data & 0xff; - return ret; -} - -static int read_config_word(struct pci_bus *bus, unsigned int devfn, - int where, u16 *val) -{ - u32 data; - int ret; - - ret = config_access(PCI_ACCESS_READ, bus, devfn, where, &data); - if (where & 2) - data >>= 16; - *val = data & 0xffff; - return ret; -} - -static int read_config_dword(struct pci_bus *bus, unsigned int devfn, - int where, u32 *val) -{ - int ret; - - ret = config_access(PCI_ACCESS_READ, bus, devfn, where, val); - return ret; -} - -static int write_config_byte(struct pci_bus *bus, unsigned int devfn, - int where, u8 val) -{ - u32 data = 0; - - if (config_access(PCI_ACCESS_READ, bus, devfn, where, &data)) - return -1; - - data = (data & ~(0xff << ((where & 3) << 3))) | - (val << ((where & 3) << 3)); - - if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data)) - return -1; - - return PCIBIOS_SUCCESSFUL; -} - -static int write_config_word(struct pci_bus *bus, unsigned int devfn, - int where, u16 val) -{ - u32 data = 0; - - if (config_access(PCI_ACCESS_READ, bus, devfn, where, &data)) - return -1; - - data = (data & ~(0xffff << ((where & 3) << 3))) | - (val << ((where & 3) << 3)); - - if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data)) - return -1; - - return PCIBIOS_SUCCESSFUL; -} - -static int write_config_dword(struct pci_bus *bus, unsigned int devfn, - int where, u32 val) -{ - if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &val)) - return -1; - - return PCIBIOS_SUCCESSFUL; -} - -static int config_read(struct pci_bus *bus, unsigned int devfn, - int where, int size, u32 *val) -{ - switch (size) { - case 1: { - u8 _val; - int rc = read_config_byte(bus, devfn, where, &_val); - - *val = _val; - return rc; - } - case 2: { - u16 _val; - int rc = read_config_word(bus, devfn, where, &_val); - - *val = _val; - return rc; - } - default: - return read_config_dword(bus, devfn, where, val); - } -} - -static int config_write(struct pci_bus *bus, unsigned int devfn, - int where, int size, u32 val) -{ - switch (size) { - case 1: - return write_config_byte(bus, devfn, where, (u8) val); - case 2: - return write_config_word(bus, devfn, where, (u16) val); - default: - return write_config_dword(bus, devfn, where, val); - } -} - -struct pci_ops au1x_pci_ops = { - config_read, - config_write -}; diff --git a/arch/mips/pci/pci-alchemy.c b/arch/mips/pci/pci-alchemy.c new file mode 100644 index 000000000000..4ee57104e47b --- /dev/null +++ b/arch/mips/pci/pci-alchemy.c @@ -0,0 +1,516 @@ +/* + * Alchemy PCI host mode support. + * + * Copyright 2001-2003, 2007-2008 MontaVista Software Inc. + * Author: MontaVista Software, Inc. <source@mvista.com> + * + * Support for all devices (greater than 16) added by David Gathright. + */ + +#include <linux/types.h> +#include <linux/pci.h> +#include <linux/platform_device.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/vmalloc.h> + +#include <asm/mach-au1x00/au1000.h> + +#ifdef CONFIG_DEBUG_PCI +#define DBG(x...) printk(KERN_DEBUG x) +#else +#define DBG(x...) do {} while (0) +#endif + +#define PCI_ACCESS_READ 0 +#define PCI_ACCESS_WRITE 1 + +struct alchemy_pci_context { + struct pci_controller alchemy_pci_ctrl; /* leave as first member! */ + void __iomem *regs; /* ctrl base */ + /* tools for wired entry for config space access */ + unsigned long last_elo0; + unsigned long last_elo1; + int wired_entry; + struct vm_struct *pci_cfg_vm; + + unsigned long pm[12]; + + int (*board_map_irq)(const struct pci_dev *d, u8 slot, u8 pin); + int (*board_pci_idsel)(unsigned int devsel, int assert); +}; + +/* IO/MEM resources for PCI. Keep the memres in sync with __fixup_bigphys_addr + * in arch/mips/alchemy/common/setup.c + */ +static struct resource alchemy_pci_def_memres = { + .start = ALCHEMY_PCI_MEMWIN_START, + .end = ALCHEMY_PCI_MEMWIN_END, + .name = "PCI memory space", + .flags = IORESOURCE_MEM +}; + +static struct resource alchemy_pci_def_iores = { + .start = ALCHEMY_PCI_IOWIN_START, + .end = ALCHEMY_PCI_IOWIN_END, + .name = "PCI IO space", + .flags = IORESOURCE_IO +}; + +static void mod_wired_entry(int entry, unsigned long entrylo0, + unsigned long entrylo1, unsigned long entryhi, + unsigned long pagemask) +{ + unsigned long old_pagemask; + unsigned long old_ctx; + + /* Save old context and create impossible VPN2 value */ + old_ctx = read_c0_entryhi() & 0xff; + old_pagemask = read_c0_pagemask(); + write_c0_index(entry); + write_c0_pagemask(pagemask); + write_c0_entryhi(entryhi); + write_c0_entrylo0(entrylo0); + write_c0_entrylo1(entrylo1); + tlb_write_indexed(); + write_c0_entryhi(old_ctx); + write_c0_pagemask(old_pagemask); +} + +static void alchemy_pci_wired_entry(struct alchemy_pci_context *ctx) +{ + ctx->wired_entry = read_c0_wired(); + add_wired_entry(0, 0, (unsigned long)ctx->pci_cfg_vm->addr, PM_4K); + ctx->last_elo0 = ctx->last_elo1 = ~0; +} + +static int config_access(unsigned char access_type, struct pci_bus *bus, + unsigned int dev_fn, unsigned char where, u32 *data) +{ + struct alchemy_pci_context *ctx = bus->sysdata; + unsigned int device = PCI_SLOT(dev_fn); + unsigned int function = PCI_FUNC(dev_fn); + unsigned long offset, status, cfg_base, flags, entryLo0, entryLo1, r; + int error = PCIBIOS_SUCCESSFUL; + + if (device > 19) { + *data = 0xffffffff; + return -1; + } + + /* YAMON on all db1xxx boards wipes the TLB and writes zero to C0_wired + * on resume, clearing our wired entry. Unfortunately the ->resume() + * callback is called way way way too late (and ->suspend() too early) + * to have them destroy and recreate it. Instead just test if c0_wired + * is now lower than the index we retrieved before suspending and then + * recreate the entry if necessary. Of course this is totally bonkers + * and breaks as soon as someone else adds another wired entry somewhere + * else. Anyone have any ideas how to handle this better? + */ + if (unlikely(read_c0_wired() < ctx->wired_entry)) + alchemy_pci_wired_entry(ctx); + + local_irq_save(flags); + r = __raw_readl(ctx->regs + PCI_REG_STATCMD) & 0x0000ffff; + r |= PCI_STATCMD_STATUS(0x2000); + __raw_writel(r, ctx->regs + PCI_REG_STATCMD); + wmb(); + + /* Allow board vendors to implement their own off-chip IDSEL. + * If it doesn't succeed, may as well bail out at this point. + */ + if (ctx->board_pci_idsel(device, 1) == 0) { + *data = 0xffffffff; + local_irq_restore(flags); + return -1; + } + + /* Setup the config window */ + if (bus->number == 0) + cfg_base = (1 << device) << 11; + else + cfg_base = 0x80000000 | (bus->number << 16) | (device << 11); + + /* Setup the lower bits of the 36-bit address */ + offset = (function << 8) | (where & ~0x3); + /* Pick up any address that falls below the page mask */ + offset |= cfg_base & ~PAGE_MASK; + + /* Page boundary */ + cfg_base = cfg_base & PAGE_MASK; + + /* To improve performance, if the current device is the same as + * the last device accessed, we don't touch the TLB. + */ + entryLo0 = (6 << 26) | (cfg_base >> 6) | (2 << 3) | 7; + entryLo1 = (6 << 26) | (cfg_base >> 6) | (0x1000 >> 6) | (2 << 3) | 7; + if ((entryLo0 != ctx->last_elo0) || (entryLo1 != ctx->last_elo1)) { + mod_wired_entry(ctx->wired_entry, entryLo0, entryLo1, + (unsigned long)ctx->pci_cfg_vm->addr, PM_4K); + ctx->last_elo0 = entryLo0; + ctx->last_elo1 = entryLo1; + } + + if (access_type == PCI_ACCESS_WRITE) + __raw_writel(*data, ctx->pci_cfg_vm->addr + offset); + else + *data = __raw_readl(ctx->pci_cfg_vm->addr + offset); + wmb(); + + DBG("alchemy-pci: cfg access %d bus %u dev %u at %x dat %x conf %lx\n", + access_type, bus->number, device, where, *data, offset); + + /* check for errors, master abort */ + status = __raw_readl(ctx->regs + PCI_REG_STATCMD); + if (status & (1 << 29)) { + *data = 0xffffffff; + error = -1; + DBG("alchemy-pci: master abort on cfg access %d bus %d dev %d", + access_type, bus->number, device); + } else if ((status >> 28) & 0xf) { + DBG("alchemy-pci: PCI ERR detected: dev %d, status %lx\n", + device, (status >> 28) & 0xf); + + /* clear errors */ + __raw_writel(status & 0xf000ffff, ctx->regs + PCI_REG_STATCMD); + + *data = 0xffffffff; + error = -1; + } + + /* Take away the IDSEL. */ + (void)ctx->board_pci_idsel(device, 0); + + local_irq_restore(flags); + return error; +} + +static int read_config_byte(struct pci_bus *bus, unsigned int devfn, + int where, u8 *val) +{ + u32 data; + int ret = config_access(PCI_ACCESS_READ, bus, devfn, where, &data); + + if (where & 1) + data >>= 8; + if (where & 2) + data >>= 16; + *val = data & 0xff; + return ret; +} + +static int read_config_word(struct pci_bus *bus, unsigned int devfn, + int where, u16 *val) +{ + u32 data; + int ret = config_access(PCI_ACCESS_READ, bus, devfn, where, &data); + + if (where & 2) + data >>= 16; + *val = data & 0xffff; + return ret; +} + +static int read_config_dword(struct pci_bus *bus, unsigned int devfn, + int where, u32 *val) +{ + return config_access(PCI_ACCESS_READ, bus, devfn, where, val); +} + +static int write_config_byte(struct pci_bus *bus, unsigned int devfn, + int where, u8 val) +{ + u32 data = 0; + + if (config_access(PCI_ACCESS_READ, bus, devfn, where, &data)) + return -1; + + data = (data & ~(0xff << ((where & 3) << 3))) | + (val << ((where & 3) << 3)); + + if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data)) + return -1; + + return PCIBIOS_SUCCESSFUL; +} + +static int write_config_word(struct pci_bus *bus, unsigned int devfn, + int where, u16 val) +{ + u32 data = 0; + + if (config_access(PCI_ACCESS_READ, bus, devfn, where, &data)) + return -1; + + data = (data & ~(0xffff << ((where & 3) << 3))) | + (val << ((where & 3) << 3)); + + if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data)) + return -1; + + return PCIBIOS_SUCCESSFUL; +} + +static int write_config_dword(struct pci_bus *bus, unsigned int devfn, + int where, u32 val) +{ + return config_access(PCI_ACCESS_WRITE, bus, devfn, where, &val); +} + +static int alchemy_pci_read(struct pci_bus *bus, unsigned int devfn, + int where, int size, u32 *val) +{ + switch (size) { + case 1: { + u8 _val; + int rc = read_config_byte(bus, devfn, where, &_val); + + *val = _val; + return rc; + } + case 2: { + u16 _val; + int rc = read_config_word(bus, devfn, where, &_val); + + *val = _val; + return rc; + } + default: + return read_config_dword(bus, devfn, where, val); + } +} + +static int alchemy_pci_write(struct pci_bus *bus, unsigned int devfn, + int where, int size, u32 val) +{ + switch (size) { + case 1: + return write_config_byte(bus, devfn, where, (u8) val); + case 2: + return write_config_word(bus, devfn, where, (u16) val); + default: + return write_config_dword(bus, devfn, where, val); + } +} + +static struct pci_ops alchemy_pci_ops = { + .read = alchemy_pci_read, + .write = alchemy_pci_write, +}; + +static int alchemy_pci_def_idsel(unsigned int devsel, int assert) +{ + return 1; /* success */ +} + +static int __devinit alchemy_pci_probe(struct platform_device *pdev) +{ + struct alchemy_pci_platdata *pd = pdev->dev.platform_data; + struct alchemy_pci_context *ctx; + void __iomem *virt_io; + unsigned long val; + struct resource *r; + int ret; + + /* need at least PCI IRQ mapping table */ + if (!pd) { + dev_err(&pdev->dev, "need platform data for PCI setup\n"); + ret = -ENODEV; + goto out; + } + + ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); + if (!ctx) { + dev_err(&pdev->dev, "no memory for pcictl context\n"); + ret = -ENOMEM; + goto out; + } + + r = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!r) { + dev_err(&pdev->dev, "no pcictl ctrl regs resource\n"); + ret = -ENODEV; + goto out1; + } + + if (!request_mem_region(r->start, resource_size(r), pdev->name)) { + dev_err(&pdev->dev, "cannot claim pci regs\n"); + ret = -ENODEV; + goto out1; + } + + ctx->regs = ioremap_nocache(r->start, resource_size(r)); + if (!ctx->regs) { + dev_err(&pdev->dev, "cannot map pci regs\n"); + ret = -ENODEV; + goto out2; + } + + /* map parts of the PCI IO area */ + /* REVISIT: if this changes with a newer variant (doubt it) make this + * a platform resource. + */ + virt_io = ioremap(AU1500_PCI_IO_PHYS_ADDR, 0x00100000); + if (!virt_io) { + dev_err(&pdev->dev, "cannot remap pci io space\n"); + ret = -ENODEV; + goto out3; + } + ctx->alchemy_pci_ctrl.io_map_base = (unsigned long)virt_io; + +#ifdef CONFIG_DMA_NONCOHERENT + /* Au1500 revisions older than AD have borked coherent PCI */ + if ((alchemy_get_cputype() == ALCHEMY_CPU_AU1500) && + (read_c0_prid() < 0x01030202)) { + val = __raw_readl(ctx->regs + PCI_REG_CONFIG); + val |= PCI_CONFIG_NC; + __raw_writel(val, ctx->regs + PCI_REG_CONFIG); + wmb(); + dev_info(&pdev->dev, "non-coherent PCI on Au1500 AA/AB/AC\n"); + } +#endif + + if (pd->board_map_irq) + ctx->board_map_irq = pd->board_map_irq; + + if (pd->board_pci_idsel) + ctx->board_pci_idsel = pd->board_pci_idsel; + else + ctx->board_pci_idsel = alchemy_pci_def_idsel; + + /* fill in relevant pci_controller members */ + ctx->alchemy_pci_ctrl.pci_ops = &alchemy_pci_ops; + ctx->alchemy_pci_ctrl.mem_resource = &alchemy_pci_def_memres; + ctx->alchemy_pci_ctrl.io_resource = &alchemy_pci_def_iores; + + /* we can't ioremap the entire pci config space because it's too large, + * nor can we dynamically ioremap it because some drivers use the + * PCI config routines from within atomic contex and that becomes a + * problem in get_vm_area(). Instead we use one wired TLB entry to + * handle all config accesses for all busses. + */ + ctx->pci_cfg_vm = get_vm_area(0x2000, VM_IOREMAP); + if (!ctx->pci_cfg_vm) { + dev_err(&pdev->dev, "unable to get vm area\n"); + ret = -ENOMEM; + goto out4; + } + ctx->wired_entry = 8192; /* impossibly high value */ + + set_io_port_base((unsigned long)ctx->alchemy_pci_ctrl.io_map_base); + + /* board may want to modify bits in the config register, do it now */ + val = __raw_readl(ctx->regs + PCI_REG_CONFIG); + val &= ~pd->pci_cfg_clr; + val |= pd->pci_cfg_set; + val &= ~PCI_CONFIG_PD; /* clear disable bit */ + __raw_writel(val, ctx->regs + PCI_REG_CONFIG); + wmb(); + + platform_set_drvdata(pdev, ctx); + register_pci_controller(&ctx->alchemy_pci_ctrl); + + return 0; + +out4: + iounmap(virt_io); +out3: + iounmap(ctx->regs); +out2: + release_mem_region(r->start, resource_size(r)); +out1: + kfree(ctx); +out: + return ret; +} + + +#ifdef CONFIG_PM +/* save PCI controller register contents. */ +static int alchemy_pci_suspend(struct device *dev) +{ + struct alchemy_pci_context *ctx = dev_get_drvdata(dev); + + ctx->pm[0] = __raw_readl(ctx->regs + PCI_REG_CMEM); + ctx->pm[1] = __raw_readl(ctx->regs + PCI_REG_CONFIG) & 0x0009ffff; + ctx->pm[2] = __raw_readl(ctx->regs + PCI_REG_B2BMASK_CCH); + ctx->pm[3] = __raw_readl(ctx->regs + PCI_REG_B2BBASE0_VID); + ctx->pm[4] = __raw_readl(ctx->regs + PCI_REG_B2BBASE1_SID); + ctx->pm[5] = __raw_readl(ctx->regs + PCI_REG_MWMASK_DEV); + ctx->pm[6] = __raw_readl(ctx->regs + PCI_REG_MWBASE_REV_CCL); + ctx->pm[7] = __raw_readl(ctx->regs + PCI_REG_ID); + ctx->pm[8] = __raw_readl(ctx->regs + PCI_REG_CLASSREV); + ctx->pm[9] = __raw_readl(ctx->regs + PCI_REG_PARAM); + ctx->pm[10] = __raw_readl(ctx->regs + PCI_REG_MBAR); + ctx->pm[11] = __raw_readl(ctx->regs + PCI_REG_TIMEOUT); + + return 0; +} + +static int alchemy_pci_resume(struct device *dev) +{ + struct alchemy_pci_context *ctx = dev_get_drvdata(dev); + + __raw_writel(ctx->pm[0], ctx->regs + PCI_REG_CMEM); + __raw_writel(ctx->pm[2], ctx->regs + PCI_REG_B2BMASK_CCH); + __raw_writel(ctx->pm[3], ctx->regs + PCI_REG_B2BBASE0_VID); + __raw_writel(ctx->pm[4], ctx->regs + PCI_REG_B2BBASE1_SID); + __raw_writel(ctx->pm[5], ctx->regs + PCI_REG_MWMASK_DEV); + __raw_writel(ctx->pm[6], ctx->regs + PCI_REG_MWBASE_REV_CCL); + __raw_writel(ctx->pm[7], ctx->regs + PCI_REG_ID); + __raw_writel(ctx->pm[8], ctx->regs + PCI_REG_CLASSREV); + __raw_writel(ctx->pm[9], ctx->regs + PCI_REG_PARAM); + __raw_writel(ctx->pm[10], ctx->regs + PCI_REG_MBAR); + __raw_writel(ctx->pm[11], ctx->regs + PCI_REG_TIMEOUT); + wmb(); + __raw_writel(ctx->pm[1], ctx->regs + PCI_REG_CONFIG); + wmb(); + + return 0; +} + +static const struct dev_pm_ops alchemy_pci_pmops = { + .suspend = alchemy_pci_suspend, + .resume = alchemy_pci_resume, +}; + +#define ALCHEMY_PCICTL_PM (&alchemy_pci_pmops) + +#else +#define ALCHEMY_PCICTL_PM NULL +#endif + +static struct platform_driver alchemy_pcictl_driver = { + .probe = alchemy_pci_probe, + .driver = { + .name = "alchemy-pci", + .owner = THIS_MODULE, + .pm = ALCHEMY_PCICTL_PM, + }, +}; + +static int __init alchemy_pci_init(void) +{ + /* Au1500/Au1550 have PCI */ + switch (alchemy_get_cputype()) { + case ALCHEMY_CPU_AU1500: + case ALCHEMY_CPU_AU1550: + return platform_driver_register(&alchemy_pcictl_driver); + } + return 0; +} +arch_initcall(alchemy_pci_init); + + +int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) +{ + struct alchemy_pci_context *ctx = dev->sysdata; + if (ctx && ctx->board_map_irq) + return ctx->board_map_irq(dev, slot, pin); + return -1; +} + +int pcibios_plat_dev_init(struct pci_dev *dev) +{ + return 0; +} diff --git a/arch/mips/pmc-sierra/msp71xx/msp_setup.c b/arch/mips/pmc-sierra/msp71xx/msp_setup.c index 0abfbe04ffc9..655308a4e1cd 100644 --- a/arch/mips/pmc-sierra/msp71xx/msp_setup.c +++ b/arch/mips/pmc-sierra/msp71xx/msp_setup.c @@ -14,6 +14,7 @@ #include <asm/cacheflush.h> #include <asm/r4kcache.h> #include <asm/reboot.h> +#include <asm/smp-ops.h> #include <asm/time.h> #include <msp_prom.h> diff --git a/arch/mips/pmc-sierra/yosemite/py-console.c b/arch/mips/pmc-sierra/yosemite/py-console.c index 434d7b1a8c6a..b7f1d9c4a8a3 100644 --- a/arch/mips/pmc-sierra/yosemite/py-console.c +++ b/arch/mips/pmc-sierra/yosemite/py-console.c @@ -65,15 +65,11 @@ static unsigned char readb_outer_space(unsigned long long phys) __asm__ __volatile__ ( " .set mips3 \n" - " .set push \n" - " .set noreorder \n" - " .set nomacro \n" " ld %0, %1 \n" - " .set pop \n" " lbu %0, (%0) \n" " .set mips0 \n" : "=r" (res) - : "R" (vaddr)); + : "m" (vaddr)); write_c0_status(sr); ssnop_4(); @@ -93,15 +89,11 @@ static void writeb_outer_space(unsigned long long phys, unsigned char c) __asm__ __volatile__ ( " .set mips3 \n" - " .set push \n" - " .set noreorder \n" - " .set nomacro \n" " ld %0, %1 \n" - " .set pop \n" " sb %2, (%0) \n" " .set mips0 \n" : "=&r" (tmp) - : "R" (vaddr), "r" (c)); + : "m" (vaddr), "r" (c)); write_c0_status(sr); ssnop_4(); diff --git a/arch/mips/pnx8550/common/prom.c b/arch/mips/pnx8550/common/prom.c index 32f70097c3c7..49639e8120d8 100644 --- a/arch/mips/pnx8550/common/prom.c +++ b/arch/mips/pnx8550/common/prom.c @@ -30,7 +30,7 @@ typedef struct }t_env_var; -char * prom_getcmdline(void) +char * __init prom_getcmdline(void) { return &(arcs_cmdline[0]); } diff --git a/arch/mips/sgi-ip27/ip27-irq.c b/arch/mips/sgi-ip27/ip27-irq.c index b18b04e48577..f90dce315e04 100644 --- a/arch/mips/sgi-ip27/ip27-irq.c +++ b/arch/mips/sgi-ip27/ip27-irq.c @@ -337,12 +337,12 @@ static struct irq_chip bridge_irq_type = { .irq_unmask = enable_bridge_irq, }; -void __devinit register_bridge_irq(unsigned int irq) +void register_bridge_irq(unsigned int irq) { irq_set_chip_and_handler(irq, &bridge_irq_type, handle_level_irq); } -int __devinit request_bridge_irq(struct bridge_controller *bc) +int request_bridge_irq(struct bridge_controller *bc) { int irq = allocate_irqno(); int swlevel, cpu; diff --git a/arch/powerpc/mm/gup.c b/arch/powerpc/mm/gup.c index fec13200868f..d7efdbf640c7 100644 --- a/arch/powerpc/mm/gup.c +++ b/arch/powerpc/mm/gup.c @@ -16,16 +16,6 @@ #ifdef __HAVE_ARCH_PTE_SPECIAL -static inline void get_huge_page_tail(struct page *page) -{ - /* - * __split_huge_page_refcount() cannot run - * from under us. - */ - VM_BUG_ON(atomic_read(&page->_count) < 0); - atomic_inc(&page->_count); -} - /* * The performance critical leaf functions are made noinline otherwise gcc * inlines everything into a single function which results in too much @@ -57,8 +47,6 @@ static noinline int gup_pte_range(pmd_t pmd, unsigned long addr, put_page(page); return 0; } - if (PageTail(page)) - get_huge_page_tail(page); pages[*nr] = page; (*nr)++; diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c index 0b9a5c1901b9..da5eb3885702 100644 --- a/arch/powerpc/mm/hugetlbpage.c +++ b/arch/powerpc/mm/hugetlbpage.c @@ -390,7 +390,7 @@ static noinline int gup_hugepte(pte_t *ptep, unsigned long sz, unsigned long add { unsigned long mask; unsigned long pte_end; - struct page *head, *page; + struct page *head, *page, *tail; pte_t pte; int refs; @@ -413,6 +413,7 @@ static noinline int gup_hugepte(pte_t *ptep, unsigned long sz, unsigned long add head = pte_page(pte); page = head + ((addr & (sz-1)) >> PAGE_SHIFT); + tail = page; do { VM_BUG_ON(compound_head(page) != head); pages[*nr] = page; @@ -428,10 +429,20 @@ static noinline int gup_hugepte(pte_t *ptep, unsigned long sz, unsigned long add if (unlikely(pte_val(pte) != pte_val(*ptep))) { /* Could be optimized better */ - while (*nr) { - put_page(page); - (*nr)--; - } + *nr -= refs; + while (refs--) + put_page(head); + return 0; + } + + /* + * Any tail page need their mapcount reference taken before we + * return. + */ + while (refs--) { + if (PageTail(tail)) + get_huge_page_tail(tail); + tail++; } return 1; diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c index c65f75aa7ff7..22ffccd8bef5 100644 --- a/arch/powerpc/sysdev/fsl_rio.c +++ b/arch/powerpc/sysdev/fsl_rio.c @@ -1608,6 +1608,7 @@ int fsl_rio_setup(struct platform_device *dev) return 0; err: iounmap(priv->regs_win); + release_resource(&port->iores); err_res: kfree(priv); err_priv: diff --git a/arch/s390/hypfs/inode.c b/arch/s390/hypfs/inode.c index 6fe874fc5f8e..481f4f76f664 100644 --- a/arch/s390/hypfs/inode.c +++ b/arch/s390/hypfs/inode.c @@ -108,9 +108,7 @@ static struct inode *hypfs_make_inode(struct super_block *sb, int mode) ret->i_gid = hypfs_info->gid; ret->i_atime = ret->i_mtime = ret->i_ctime = CURRENT_TIME; if (mode & S_IFDIR) - ret->i_nlink = 2; - else - ret->i_nlink = 1; + set_nlink(ret, 2); } return ret; } @@ -361,7 +359,7 @@ static struct dentry *hypfs_create_file(struct super_block *sb, } else if (mode & S_IFDIR) { inode->i_op = &simple_dir_inode_operations; inode->i_fop = &simple_dir_operations; - parent->d_inode->i_nlink++; + inc_nlink(parent->d_inode); } else BUG(); inode->i_private = data; diff --git a/arch/s390/mm/gup.c b/arch/s390/mm/gup.c index 45b405ca2567..65cb06e2af4e 100644 --- a/arch/s390/mm/gup.c +++ b/arch/s390/mm/gup.c @@ -52,7 +52,7 @@ static inline int gup_huge_pmd(pmd_t *pmdp, pmd_t pmd, unsigned long addr, unsigned long end, int write, struct page **pages, int *nr) { unsigned long mask, result; - struct page *head, *page; + struct page *head, *page, *tail; int refs; result = write ? 0 : _SEGMENT_ENTRY_RO; @@ -64,6 +64,7 @@ static inline int gup_huge_pmd(pmd_t *pmdp, pmd_t pmd, unsigned long addr, refs = 0; head = pmd_page(pmd); page = head + ((addr & ~PMD_MASK) >> PAGE_SHIFT); + tail = page; do { VM_BUG_ON(compound_head(page) != head); pages[*nr] = page; @@ -81,6 +82,17 @@ static inline int gup_huge_pmd(pmd_t *pmdp, pmd_t pmd, unsigned long addr, *nr -= refs; while (refs--) put_page(head); + return 0; + } + + /* + * Any tail page need their mapcount reference taken before we + * return. + */ + while (refs--) { + if (PageTail(tail)) + get_huge_page_tail(tail); + tail++; } return 1; diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index ff9177c8f643..5629e2099130 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -101,10 +101,6 @@ config GENERIC_LOCKBREAK def_bool y depends on SMP && PREEMPT -config SYS_SUPPORTS_PM - bool - depends on !SMP - config ARCH_SUSPEND_POSSIBLE def_bool n @@ -649,7 +645,7 @@ config CRASH_DUMP a specially reserved region and then later executed after a crash by kdump/kexec. The crash dump kernel must be compiled to a memory address not used by the main kernel using - MEMORY_START. + PHYSICAL_START. For more details see Documentation/kdump/kdump.txt @@ -660,6 +656,17 @@ config KEXEC_JUMP Jump between original kernel and kexeced kernel and invoke code via KEXEC +config PHYSICAL_START + hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP) + default MEMORY_START + ---help--- + This gives the physical address where the kernel is loaded + and is ordinarily the same as MEMORY_START. + + Different values are primarily used in the case of kexec on panic + where the fail safe kernel needs to run at a different address + than the panic-ed kernel. + config SECCOMP bool "Enable seccomp to safely compute untrusted bytecode" depends on PROC_FS diff --git a/arch/sh/Makefile b/arch/sh/Makefile index 99385d0b3f3b..3fc0f413777c 100644 --- a/arch/sh/Makefile +++ b/arch/sh/Makefile @@ -80,6 +80,7 @@ defaultimage-$(CONFIG_SH_RSK) := uImage defaultimage-$(CONFIG_SH_URQUELL) := uImage defaultimage-$(CONFIG_SH_MIGOR) := uImage defaultimage-$(CONFIG_SH_AP325RXA) := uImage +defaultimage-$(CONFIG_SH_SH7757LCR) := uImage defaultimage-$(CONFIG_SH_7724_SOLUTION_ENGINE) := uImage defaultimage-$(CONFIG_SH_7206_SOLUTION_ENGINE) := vmlinux defaultimage-$(CONFIG_SH_7619_SOLUTION_ENGINE) := vmlinux diff --git a/arch/sh/boards/board-espt.c b/arch/sh/boards/board-espt.c index 9da92ac36533..b3ae9d38cbc0 100644 --- a/arch/sh/boards/board-espt.c +++ b/arch/sh/boards/board-espt.c @@ -13,9 +13,9 @@ #include <linux/interrupt.h> #include <linux/mtd/physmap.h> #include <linux/io.h> +#include <linux/sh_eth.h> #include <asm/machvec.h> #include <asm/sizes.h> -#include <asm/sh_eth.h> /* NOR Flash */ static struct mtd_partition espt_nor_flash_partitions[] = { diff --git a/arch/sh/boards/board-secureedge5410.c b/arch/sh/boards/board-secureedge5410.c index f968f17891a4..03820c3c93d4 100644 --- a/arch/sh/boards/board-secureedge5410.c +++ b/arch/sh/boards/board-secureedge5410.c @@ -41,8 +41,7 @@ static int __init eraseconfig_init(void) printk("SnapGear: EraseConfig init\n"); /* Setup "EraseConfig" switch on external IRQ 0 */ - if (request_irq(irq, eraseconfig_interrupt, IRQF_DISABLED, - "Erase Config", NULL)) + if (request_irq(irq, eraseconfig_interrupt, 0, "Erase Config", NULL)) printk("SnapGear: failed to register IRQ%d for Reset witch\n", irq); else diff --git a/arch/sh/boards/board-sh7757lcr.c b/arch/sh/boards/board-sh7757lcr.c index fa2a208ec6cb..ec8c84c14b17 100644 --- a/arch/sh/boards/board-sh7757lcr.c +++ b/arch/sh/boards/board-sh7757lcr.c @@ -18,8 +18,8 @@ #include <linux/mmc/host.h> #include <linux/mmc/sh_mmcif.h> #include <linux/mmc/sh_mobile_sdhi.h> +#include <linux/sh_eth.h> #include <cpu/sh7757.h> -#include <asm/sh_eth.h> #include <asm/heartbeat.h> static struct resource heartbeat_resource = { diff --git a/arch/sh/boards/mach-cayman/irq.c b/arch/sh/boards/mach-cayman/irq.c index 311bcebdbd07..724e8b7271f4 100644 --- a/arch/sh/boards/mach-cayman/irq.c +++ b/arch/sh/boards/mach-cayman/irq.c @@ -46,13 +46,11 @@ static irqreturn_t cayman_interrupt_pci2(int irq, void *dev_id) static struct irqaction cayman_action_smsc = { .name = "Cayman SMSC Mux", .handler = cayman_interrupt_smsc, - .flags = IRQF_DISABLED, }; static struct irqaction cayman_action_pci2 = { .name = "Cayman PCI2 Mux", .handler = cayman_interrupt_pci2, - .flags = IRQF_DISABLED, }; static void enable_cayman_irq(struct irq_data *data) diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c index b24d69d509e7..92ddce4b3456 100644 --- a/arch/sh/boards/mach-ecovec24/setup.c +++ b/arch/sh/boards/mach-ecovec24/setup.c @@ -28,13 +28,13 @@ #include <linux/spi/mmc_spi.h> #include <linux/input.h> #include <linux/input/sh_keysc.h> +#include <linux/sh_eth.h> #include <video/sh_mobile_lcdc.h> #include <sound/sh_fsi.h> #include <media/sh_mobile_ceu.h> #include <media/tw9910.h> #include <media/mt9t112.h> #include <asm/heartbeat.h> -#include <asm/sh_eth.h> #include <asm/clock.h> #include <asm/suspend.h> #include <cpu/sh7724.h> @@ -248,6 +248,10 @@ static struct renesas_usbhs_platform_info usbhs_info = { .driver_param = { .buswait_bwait = 4, .detection_delay = 5, + .d0_tx_id = SHDMA_SLAVE_USB1D0_TX, + .d0_rx_id = SHDMA_SLAVE_USB1D0_RX, + .d1_tx_id = SHDMA_SLAVE_USB1D1_TX, + .d1_rx_id = SHDMA_SLAVE_USB1D1_RX, }, }; diff --git a/arch/sh/boards/mach-hp6xx/hp6xx_apm.c b/arch/sh/boards/mach-hp6xx/hp6xx_apm.c index b49535c0ddd9..865d8d6e823f 100644 --- a/arch/sh/boards/mach-hp6xx/hp6xx_apm.c +++ b/arch/sh/boards/mach-hp6xx/hp6xx_apm.c @@ -86,7 +86,7 @@ static int __init hp6x0_apm_init(void) int ret; ret = request_irq(HP680_BTN_IRQ, hp6x0_apm_interrupt, - IRQF_DISABLED, MODNAME, NULL); + 0, MODNAME, NULL); if (unlikely(ret < 0)) { printk(KERN_ERR MODNAME ": IRQ %d request failed\n", HP680_BTN_IRQ); diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c index d00756728bd2..b747c0ab9264 100644 --- a/arch/sh/boards/mach-se/7724/setup.c +++ b/arch/sh/boards/mach-se/7724/setup.c @@ -23,12 +23,12 @@ #include <linux/input.h> #include <linux/input/sh_keysc.h> #include <linux/usb/r8a66597.h> +#include <linux/sh_eth.h> #include <video/sh_mobile_lcdc.h> #include <media/sh_mobile_ceu.h> #include <sound/sh_fsi.h> #include <asm/io.h> #include <asm/heartbeat.h> -#include <asm/sh_eth.h> #include <asm/clock.h> #include <asm/suspend.h> #include <cpu/sh7724.h> diff --git a/arch/sh/boards/mach-sh7763rdp/setup.c b/arch/sh/boards/mach-sh7763rdp/setup.c index f3d828f133e5..dd036f1661db 100644 --- a/arch/sh/boards/mach-sh7763rdp/setup.c +++ b/arch/sh/boards/mach-sh7763rdp/setup.c @@ -17,8 +17,8 @@ #include <linux/mtd/physmap.h> #include <linux/fb.h> #include <linux/io.h> +#include <linux/sh_eth.h> #include <mach/sh7763rdp.h> -#include <asm/sh_eth.h> #include <asm/sh7760fb.h> /* NOR Flash */ diff --git a/arch/sh/boot/Makefile b/arch/sh/boot/Makefile index ba515d800245..e4ea31a62c55 100644 --- a/arch/sh/boot/Makefile +++ b/arch/sh/boot/Makefile @@ -19,6 +19,7 @@ CONFIG_MEMORY_START ?= 0x0c000000 CONFIG_BOOT_LINK_OFFSET ?= 0x00800000 CONFIG_ZERO_PAGE_OFFSET ?= 0x00001000 CONFIG_ENTRY_OFFSET ?= 0x00001000 +CONFIG_PHYSICAL_START ?= $(CONFIG_MEMORY_START) suffix-y := bin suffix-$(CONFIG_KERNEL_GZIP) := gz @@ -48,7 +49,7 @@ $(obj)/romimage/vmlinux: $(obj)/zImage FORCE $(Q)$(MAKE) $(build)=$(obj)/romimage $@ KERNEL_MEMORY := $(shell /bin/bash -c 'printf "0x%08x" \ - $$[$(CONFIG_MEMORY_START) & 0x1fffffff]') + $$[$(CONFIG_PHYSICAL_START) & 0x1fffffff]') KERNEL_LOAD := $(shell /bin/bash -c 'printf "0x%08x" \ $$[$(CONFIG_PAGE_OFFSET) + \ @@ -114,4 +115,5 @@ $(obj)/uImage: $(obj)/uImage.$(suffix-y) @echo ' Image $@ is ready' export CONFIG_PAGE_OFFSET CONFIG_MEMORY_START CONFIG_BOOT_LINK_OFFSET \ - CONFIG_ZERO_PAGE_OFFSET CONFIG_ENTRY_OFFSET KERNEL_MEMORY suffix-y + CONFIG_PHYSICAL_START CONFIG_ZERO_PAGE_OFFSET CONFIG_ENTRY_OFFSET \ + KERNEL_MEMORY suffix-y diff --git a/arch/sh/drivers/dma/dma-g2.c b/arch/sh/drivers/dma/dma-g2.c index af7bb589c2c8..be9ca7ca0ce4 100644 --- a/arch/sh/drivers/dma/dma-g2.c +++ b/arch/sh/drivers/dma/dma-g2.c @@ -170,7 +170,7 @@ static int __init g2_dma_init(void) { int ret; - ret = request_irq(HW_EVENT_G2_DMA, g2_dma_interrupt, IRQF_DISABLED, + ret = request_irq(HW_EVENT_G2_DMA, g2_dma_interrupt, 0, "g2 DMA handler", &g2_dma_info); if (unlikely(ret)) return -EINVAL; diff --git a/arch/sh/drivers/dma/dma-pvr2.c b/arch/sh/drivers/dma/dma-pvr2.c index 3cee58e7f1e5..706a3434af7a 100644 --- a/arch/sh/drivers/dma/dma-pvr2.c +++ b/arch/sh/drivers/dma/dma-pvr2.c @@ -70,7 +70,6 @@ static int pvr2_xfer_dma(struct dma_channel *chan) static struct irqaction pvr2_dma_irq = { .name = "pvr2 DMA handler", .handler = pvr2_dma_interrupt, - .flags = IRQF_DISABLED, }; static struct dma_ops pvr2_dma_ops = { diff --git a/arch/sh/drivers/dma/dma-sh.c b/arch/sh/drivers/dma/dma-sh.c index 827208781ed5..a60da6dd4d17 100644 --- a/arch/sh/drivers/dma/dma-sh.c +++ b/arch/sh/drivers/dma/dma-sh.c @@ -95,7 +95,7 @@ static int sh_dmac_request_dma(struct dma_channel *chan) #if defined(CONFIG_SH_DMA_IRQ_MULTI) IRQF_SHARED, #else - IRQF_DISABLED, + 0, #endif chan->dev_id, chan); } @@ -305,7 +305,7 @@ static int __init sh_dmac_init(void) #if defined(CONFIG_SH_DMA_IRQ_MULTI) IRQF_SHARED, #else - IRQF_DISABLED, + 0, #endif dmae_name[n], (void *)dmae_name[n]); if (unlikely(i < 0)) { diff --git a/arch/sh/drivers/dma/dmabrg.c b/arch/sh/drivers/dma/dmabrg.c index 6ab9c4a15439..3d66a32ce610 100644 --- a/arch/sh/drivers/dma/dmabrg.c +++ b/arch/sh/drivers/dma/dmabrg.c @@ -174,17 +174,17 @@ static int __init dmabrg_init(void) or = __raw_readl(DMAOR); __raw_writel(or | DMAOR_BRG | DMAOR_DMEN, DMAOR); - ret = request_irq(DMABRGI0, dmabrg_irq, IRQF_DISABLED, + ret = request_irq(DMABRGI0, dmabrg_irq, 0, "DMABRG USB address error", NULL); if (ret) goto out0; - ret = request_irq(DMABRGI1, dmabrg_irq, IRQF_DISABLED, + ret = request_irq(DMABRGI1, dmabrg_irq, 0, "DMABRG Transfer End", NULL); if (ret) goto out1; - ret = request_irq(DMABRGI2, dmabrg_irq, IRQF_DISABLED, + ret = request_irq(DMABRGI2, dmabrg_irq, 0, "DMABRG Transfer Half", NULL); if (ret == 0) return ret; diff --git a/arch/sh/drivers/pci/pci-sh5.c b/arch/sh/drivers/pci/pci-sh5.c index 0bf296c78795..16c1e721bf54 100644 --- a/arch/sh/drivers/pci/pci-sh5.c +++ b/arch/sh/drivers/pci/pci-sh5.c @@ -107,13 +107,13 @@ static int __init sh5pci_init(void) u32 uval; if (request_irq(IRQ_ERR, pcish5_err_irq, - IRQF_DISABLED, "PCI Error",NULL) < 0) { + 0, "PCI Error",NULL) < 0) { printk(KERN_ERR "PCISH5: Cannot hook PCI_PERR interrupt\n"); return -EINVAL; } if (request_irq(IRQ_SERR, pcish5_serr_irq, - IRQF_DISABLED, "PCI SERR interrupt", NULL) < 0) { + 0, "PCI SERR interrupt", NULL) < 0) { printk(KERN_ERR "PCISH5: Cannot hook PCI_SERR interrupt\n"); return -EINVAL; } diff --git a/arch/sh/drivers/pci/pci-sh7780.c b/arch/sh/drivers/pci/pci-sh7780.c index edb7cca14882..fa7b978cc727 100644 --- a/arch/sh/drivers/pci/pci-sh7780.c +++ b/arch/sh/drivers/pci/pci-sh7780.c @@ -172,7 +172,7 @@ static int __init sh7780_pci_setup_irqs(struct pci_channel *hose) PCI_STATUS_SIG_TARGET_ABORT | \ PCI_STATUS_PARITY, hose->reg_base + PCI_STATUS); - ret = request_irq(hose->serr_irq, sh7780_pci_serr_irq, IRQF_DISABLED, + ret = request_irq(hose->serr_irq, sh7780_pci_serr_irq, 0, "PCI SERR interrupt", hose); if (unlikely(ret)) { printk(KERN_ERR "PCI: Failed hooking SERR IRQ\n"); diff --git a/arch/sh/drivers/push-switch.c b/arch/sh/drivers/push-switch.c index afc24556572b..637b79b09657 100644 --- a/arch/sh/drivers/push-switch.c +++ b/arch/sh/drivers/push-switch.c @@ -63,7 +63,7 @@ static int switch_drv_probe(struct platform_device *pdev) BUG_ON(!psw_info); ret = request_irq(irq, psw_info->irq_handler, - IRQF_DISABLED | psw_info->irq_flags, + psw_info->irq_flags, psw_info->name ? psw_info->name : DRV_NAME, pdev); if (unlikely(ret < 0)) goto err; diff --git a/arch/sh/include/asm/page.h b/arch/sh/include/asm/page.h index 822d6084195b..0dca9a5c6be6 100644 --- a/arch/sh/include/asm/page.h +++ b/arch/sh/include/asm/page.h @@ -113,6 +113,16 @@ typedef struct page *pgtable_t; #define __MEMORY_SIZE CONFIG_MEMORY_SIZE /* + * PHYSICAL_OFFSET is the offset in physical memory where the base + * of the kernel is loaded. + */ +#ifdef CONFIG_PHYSICAL_START +#define PHYSICAL_OFFSET (CONFIG_PHYSICAL_START - __MEMORY_START) +#else +#define PHYSICAL_OFFSET 0 +#endif + +/* * PAGE_OFFSET is the virtual address of the start of kernel address * space. */ diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c index 3b097b09a3ba..19222dae8233 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c @@ -113,7 +113,14 @@ static struct clk_lookup lookups[] = { /* MSTP32 clocks */ CLKDEV_CON_ID("sdhi0", &mstp_clks[MSTP004]), - CLKDEV_CON_ID("riic", &mstp_clks[MSTP000]), + CLKDEV_CON_ID("riic0", &mstp_clks[MSTP000]), + CLKDEV_CON_ID("riic1", &mstp_clks[MSTP000]), + CLKDEV_CON_ID("riic2", &mstp_clks[MSTP000]), + CLKDEV_CON_ID("riic3", &mstp_clks[MSTP000]), + CLKDEV_CON_ID("riic4", &mstp_clks[MSTP000]), + CLKDEV_CON_ID("riic5", &mstp_clks[MSTP000]), + CLKDEV_CON_ID("riic6", &mstp_clks[MSTP000]), + CLKDEV_CON_ID("riic7", &mstp_clks[MSTP000]), CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[MSTP113]), CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[MSTP114]), @@ -121,6 +128,7 @@ static struct clk_lookup lookups[] = { CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[MSTP111]), CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[MSTP110]), + CLKDEV_CON_ID("usb_fck", &mstp_clks[MSTP103]), CLKDEV_CON_ID("usb0", &mstp_clks[MSTP102]), CLKDEV_CON_ID("mmc0", &mstp_clks[MSTP220]), }; diff --git a/arch/sh/kernel/cpu/sh4a/smp-shx3.c b/arch/sh/kernel/cpu/sh4a/smp-shx3.c index de865cac02ee..03f2b55757cf 100644 --- a/arch/sh/kernel/cpu/sh4a/smp-shx3.c +++ b/arch/sh/kernel/cpu/sh4a/smp-shx3.c @@ -79,7 +79,7 @@ static void shx3_prepare_cpus(unsigned int max_cpus) for (i = 0; i < SMP_MSG_NR; i++) request_irq(104 + i, ipi_interrupt_handler, - IRQF_DISABLED | IRQF_PERCPU, "IPI", (void *)(long)i); + IRQF_PERCPU, "IPI", (void *)(long)i); for (i = 0; i < max_cpus; i++) set_cpu_present(i, true); diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c index 58bff45d1156..1a0e946679a4 100644 --- a/arch/sh/kernel/setup.c +++ b/arch/sh/kernel/setup.c @@ -211,13 +211,16 @@ void __init __add_active_range(unsigned int nid, unsigned long start_pfn, } /* - * We don't know which RAM region contains kernel data, - * so we try it repeatedly and let the resource manager - * test it. + * We don't know which RAM region contains kernel data or + * the reserved crashkernel region, so try it repeatedly + * and let the resource manager test it. */ request_resource(res, &code_resource); request_resource(res, &data_resource); request_resource(res, &bss_resource); +#ifdef CONFIG_KEXEC + request_resource(res, &crashk_res); +#endif /* * Also make sure that there is a PMB mapping that covers this diff --git a/arch/sh/kernel/topology.c b/arch/sh/kernel/topology.c index 38e862852dd0..ecc2d3d0f54a 100644 --- a/arch/sh/kernel/topology.c +++ b/arch/sh/kernel/topology.c @@ -11,6 +11,7 @@ #include <linux/cpumask.h> #include <linux/init.h> #include <linux/percpu.h> +#include <linux/topology.h> #include <linux/node.h> #include <linux/nodemask.h> diff --git a/arch/sh/kernel/vmlinux.lds.S b/arch/sh/kernel/vmlinux.lds.S index 731c10ce67b5..c98905f71e28 100644 --- a/arch/sh/kernel/vmlinux.lds.S +++ b/arch/sh/kernel/vmlinux.lds.S @@ -23,7 +23,7 @@ OUTPUT_ARCH(sh) ENTRY(_start) SECTIONS { - . = PAGE_OFFSET + MEMORY_OFFSET + CONFIG_ZERO_PAGE_OFFSET; + . = PAGE_OFFSET + MEMORY_OFFSET + PHYSICAL_OFFSET + CONFIG_ZERO_PAGE_OFFSET; _text = .; /* Text and read-only data */ diff --git a/arch/sh/mm/init.c b/arch/sh/mm/init.c index 58a93fb3d965..c9dbace35b16 100644 --- a/arch/sh/mm/init.c +++ b/arch/sh/mm/init.c @@ -287,6 +287,8 @@ static void __init do_init_bootmem(void) static void __init early_reserve_mem(void) { unsigned long start_pfn; + u32 zero_base = (u32)__MEMORY_START + (u32)PHYSICAL_OFFSET; + u32 start = zero_base + (u32)CONFIG_ZERO_PAGE_OFFSET; /* * Partially used pages are not usable - thus @@ -300,15 +302,13 @@ static void __init early_reserve_mem(void) * this catches the (definitely buggy) case of us accidentally * initializing the bootmem allocator with an invalid RAM area. */ - memblock_reserve(__MEMORY_START + CONFIG_ZERO_PAGE_OFFSET, - (PFN_PHYS(start_pfn) + PAGE_SIZE - 1) - - (__MEMORY_START + CONFIG_ZERO_PAGE_OFFSET)); + memblock_reserve(start, (PFN_PHYS(start_pfn) + PAGE_SIZE - 1) - start); /* * Reserve physical pages below CONFIG_ZERO_PAGE_OFFSET. */ if (CONFIG_ZERO_PAGE_OFFSET != 0) - memblock_reserve(__MEMORY_START, CONFIG_ZERO_PAGE_OFFSET); + memblock_reserve(zero_base, CONFIG_ZERO_PAGE_OFFSET); /* * Handle additional early reservations diff --git a/arch/sparc/mm/gup.c b/arch/sparc/mm/gup.c index a986b5d05712..42c55df3aec3 100644 --- a/arch/sparc/mm/gup.c +++ b/arch/sparc/mm/gup.c @@ -56,6 +56,8 @@ static noinline int gup_pte_range(pmd_t pmd, unsigned long addr, put_page(head); return 0; } + if (head != page) + get_huge_page_tail(page); pages[*nr] = page; (*nr)++; diff --git a/arch/um/Kconfig.char b/arch/um/Kconfig.char index 70dabd1e0652..b9d7c4276682 100644 --- a/arch/um/Kconfig.char +++ b/arch/um/Kconfig.char @@ -1,5 +1,4 @@ - -menu "Character Devices" +menu "UML Character Devices" config STDERR_CONSOLE bool "stderr console" @@ -105,92 +104,6 @@ config SSL_CHAN this if you expect the UML that you build to be run in environments which don't have a set of /dev/pty* devices. -config UNIX98_PTYS - bool "Unix98 PTY support" - help - A pseudo terminal (PTY) is a software device consisting of two - halves: a master and a slave. The slave device behaves identical to - a physical terminal; the master device is used by a process to - read data from and write data to the slave, thereby emulating a - terminal. Typical programs for the master side are telnet servers - and xterms. - - Linux has traditionally used the BSD-like names /dev/ptyxx for - masters and /dev/ttyxx for slaves of pseudo terminals. This scheme - has a number of problems. The GNU C library glibc 2.1 and later, - however, supports the Unix98 naming standard: in order to acquire a - pseudo terminal, a process opens /dev/ptmx; the number of the pseudo - terminal is then made available to the process and the pseudo - terminal slave can be accessed as /dev/pts/<number>. What was - traditionally /dev/ttyp2 will then be /dev/pts/2, for example. - - All modern Linux systems use the Unix98 ptys. Say Y unless - you're on an embedded system and want to conserve memory. - -config LEGACY_PTYS - bool "Legacy (BSD) PTY support" - default y - help - A pseudo terminal (PTY) is a software device consisting of two - halves: a master and a slave. The slave device behaves identical to - a physical terminal; the master device is used by a process to - read data from and write data to the slave, thereby emulating a - terminal. Typical programs for the master side are telnet servers - and xterms. - - Linux has traditionally used the BSD-like names /dev/ptyxx - for masters and /dev/ttyxx for slaves of pseudo - terminals. This scheme has a number of problems, including - security. This option enables these legacy devices; on most - systems, it is safe to say N. - -config RAW_DRIVER - tristate "RAW driver (/dev/raw/rawN)" - depends on BLOCK - help - The raw driver permits block devices to be bound to /dev/raw/rawN. - Once bound, I/O against /dev/raw/rawN uses efficient zero-copy I/O. - See the raw(8) manpage for more details. - - Applications should preferably open the device (eg /dev/hda1) - with the O_DIRECT flag. - -config MAX_RAW_DEVS - int "Maximum number of RAW devices to support (1-8192)" - depends on RAW_DRIVER - default "256" - help - The maximum number of RAW devices that are supported. - Default is 256. Increase this number in case you need lots of - raw devices. - -config LEGACY_PTY_COUNT - int "Maximum number of legacy PTY in use" - depends on LEGACY_PTYS - default "256" - help - The maximum number of legacy PTYs that can be used at any one time. - The default is 256, and should be more than enough. Embedded - systems may want to reduce this to save memory. - - When not in use, each legacy PTY occupies 12 bytes on 32-bit - architectures and 24 bytes on 64-bit architectures. - -config WATCHDOG - bool "Watchdog Timer Support" - -config WATCHDOG_NOWAYOUT - bool "Disable watchdog shutdown on close" - depends on WATCHDOG - -config SOFT_WATCHDOG - tristate "Software Watchdog" - depends on WATCHDOG - -config UML_WATCHDOG - tristate "UML watchdog" - depends on WATCHDOG - config UML_SOUND tristate "Sound support" help @@ -211,29 +124,4 @@ config HOSTAUDIO tristate default UML_SOUND -#It is selected elsewhere, so kconfig would warn without this. -config HW_RANDOM - tristate - default n - -config UML_RANDOM - tristate "Hardware random number generator" - help - This option enables UML's "hardware" random number generator. It - attaches itself to the host's /dev/random, supplying as much entropy - as the host has, rather than the small amount the UML gets from its - own drivers. It registers itself as a standard hardware random number - generator, major 10, minor 183, and the canonical device name is - /dev/hwrng. - The way to make use of this is to install the rng-tools package - (check your distro, or download from - http://sourceforge.net/projects/gkernel/). rngd periodically reads - /dev/hwrng and injects the entropy into /dev/random. - -config MMAPPER - tristate "iomem emulation driver" - help - This driver allows a host file to be used as emulated IO memory inside - UML. - endmenu diff --git a/arch/um/Kconfig.rest b/arch/um/Kconfig.rest index 0ccad0ff6d6e..567eb5fc21df 100644 --- a/arch/um/Kconfig.rest +++ b/arch/um/Kconfig.rest @@ -2,20 +2,14 @@ source "init/Kconfig" source "kernel/Kconfig.freezer" -source "drivers/block/Kconfig" - source "arch/um/Kconfig.char" -source "drivers/base/Kconfig" +source "drivers/Kconfig" source "net/Kconfig" source "arch/um/Kconfig.net" -source "drivers/net/Kconfig" - -source "drivers/connector/Kconfig" - source "fs/Kconfig" source "security/Kconfig" @@ -24,19 +18,4 @@ source "crypto/Kconfig" source "lib/Kconfig" -source "drivers/scsi/Kconfig" - -source "drivers/md/Kconfig" - -if BROKEN - source "drivers/mtd/Kconfig" -endif - -source "drivers/leds/Kconfig" - -#This is just to shut up some Kconfig warnings, so no prompt. -config INPUT - tristate - default n - source "arch/um/Kconfig.debug" diff --git a/arch/um/Kconfig.um b/arch/um/Kconfig.um index b5e675e370c6..70fd690964e4 100644 --- a/arch/um/Kconfig.um +++ b/arch/um/Kconfig.um @@ -148,5 +148,11 @@ config KERNEL_STACK_ORDER be 1 << order pages. The default is OK unless you're running Valgrind on UML, in which case, set this to 3. +config MMAPPER + tristate "iomem emulation driver" + help + This driver allows a host file to be used as emulated IO memory inside + UML. + config NO_DMA def_bool y diff --git a/arch/um/Makefile b/arch/um/Makefile index c0f712cc7c5f..7730af6ec13f 100644 --- a/arch/um/Makefile +++ b/arch/um/Makefile @@ -20,15 +20,27 @@ core-y += $(ARCH_DIR)/kernel/ \ MODE_INCLUDE += -I$(srctree)/$(ARCH_DIR)/include/shared/skas +HEADER_ARCH := $(SUBARCH) + +# Additional ARCH settings for x86 +ifeq ($(SUBARCH),i386) + HEADER_ARCH := x86 +endif +ifeq ($(SUBARCH),x86_64) + HEADER_ARCH := x86 +endif + +HOST_DIR := arch/$(HEADER_ARCH) + include $(srctree)/$(ARCH_DIR)/Makefile-skas +include $(srctree)/$(HOST_DIR)/Makefile.um + +core-y += $(HOST_DIR)/um/ SHARED_HEADERS := $(ARCH_DIR)/include/shared ARCH_INCLUDE := -I$(srctree)/$(SHARED_HEADERS) -ARCH_INCLUDE += -I$(srctree)/$(ARCH_DIR)/sys-$(SUBARCH)/shared -ifneq ($(KBUILD_SRC),) -ARCH_INCLUDE += -I$(SHARED_HEADERS) -endif -KBUILD_CPPFLAGS += -I$(srctree)/$(ARCH_DIR)/sys-$(SUBARCH) +ARCH_INCLUDE += -I$(srctree)/$(HOST_DIR)/um/shared +KBUILD_CPPFLAGS += -I$(srctree)/$(HOST_DIR)/um # -Dvmap=kernel_vmap prevents anything from referencing the libpcap.o symbol so # named - it's a common symbol in libpcap, so we get a binary which crashes. @@ -47,14 +59,12 @@ KBUILD_AFLAGS += $(ARCH_INCLUDE) USER_CFLAGS = $(patsubst $(KERNEL_DEFINES),,$(patsubst -D__KERNEL__,,\ $(patsubst -I%,,$(KBUILD_CFLAGS)))) $(ARCH_INCLUDE) $(MODE_INCLUDE) \ - $(filter -I%,$(CFLAGS)) -D_FILE_OFFSET_BITS=64 - -include $(srctree)/$(ARCH_DIR)/Makefile-$(SUBARCH) + $(filter -I%,$(CFLAGS)) -D_FILE_OFFSET_BITS=64 -idirafter include #This will adjust *FLAGS accordingly to the platform. include $(srctree)/$(ARCH_DIR)/Makefile-os-$(OS) -KBUILD_CPPFLAGS += -I$(srctree)/arch/$(HEADER_ARCH)/include +KBUILD_CPPFLAGS += -I$(srctree)/$(HOST_DIR)/include # -Derrno=kernel_errno - This turns all kernel references to errno into # kernel_errno to separate them from the libc errno. This allows -fno-common @@ -84,10 +94,9 @@ define archhelp echo ' find in the kernel root.' endef -KBUILD_KCONFIG := arch/um/Kconfig.$(HEADER_ARCH) +KBUILD_KCONFIG := $(HOST_DIR)/um/Kconfig -archprepare: $(SHARED_HEADERS)/user_constants.h -archprepare: $(SHARED_HEADERS)/kern_constants.h +archprepare: include/generated/user_constants.h LINK-$(CONFIG_LD_SCRIPT_STATIC) += -static LINK-$(CONFIG_LD_SCRIPT_DYN) += -Wl,-rpath,/lib @@ -118,9 +127,7 @@ endef # When cleaning we don't include .config, so we don't include # TT or skas makefiles and don't clean skas_ptregs.h. -CLEAN_FILES += linux x.i gmon.out \ - $(SHARED_HEADERS)/user_constants.h \ - $(SHARED_HEADERS)/kern_constants.h +CLEAN_FILES += linux x.i gmon.out archclean: @find . \( -name '*.bb' -o -name '*.bbg' -o -name '*.da' \ @@ -128,8 +135,8 @@ archclean: # Generated files -$(ARCH_DIR)/sys-$(SUBARCH)/user-offsets.s: FORCE - $(Q)$(MAKE) $(build)=$(ARCH_DIR)/sys-$(SUBARCH) $@ +$(HOST_DIR)/um/user-offsets.s: FORCE + $(Q)$(MAKE) $(build)=$(HOST_DIR)/um $@ define filechk_gen-asm-offsets (set -e; \ @@ -144,11 +151,7 @@ define filechk_gen-asm-offsets echo ""; ) endef -$(SHARED_HEADERS)/user_constants.h: $(ARCH_DIR)/sys-$(SUBARCH)/user-offsets.s +include/generated/user_constants.h: $(HOST_DIR)/um/user-offsets.s $(call filechk,gen-asm-offsets) -$(SHARED_HEADERS)/kern_constants.h: - $(Q)mkdir -p $(dir $@) - $(Q)echo '#include "../../../../include/generated/asm-offsets.h"' >$@ - -export SUBARCH USER_CFLAGS CFLAGS_NO_HARDENING OS HEADER_ARCH DEV_NULL_PATH +export SUBARCH USER_CFLAGS CFLAGS_NO_HARDENING OS DEV_NULL_PATH diff --git a/arch/um/Makefile-x86_64 b/arch/um/Makefile-x86_64 deleted file mode 100644 index a9cd7e77a7ab..000000000000 --- a/arch/um/Makefile-x86_64 +++ /dev/null @@ -1,26 +0,0 @@ -# Copyright 2003 - 2004 Pathscale, Inc -# Released under the GPL - -core-y += arch/um/sys-x86_64/ arch/x86/crypto/ -START := 0x60000000 - -_extra_flags_ = -fno-builtin -m64 - -KBUILD_CFLAGS += $(_extra_flags_) - -CHECKFLAGS += -m64 -D__x86_64__ -KBUILD_AFLAGS += -m64 -LDFLAGS += -m elf_x86_64 -KBUILD_CPPFLAGS += -m64 - -ELF_ARCH := i386:x86-64 -ELF_FORMAT := elf64-x86-64 -HEADER_ARCH := x86 - -# Not on all 64-bit distros /lib is a symlink to /lib64. PLD is an example. - -LINK-$(CONFIG_LD_SCRIPT_DYN) += -Wl,-rpath,/lib64 -LINK-y += -m64 - -# Do unit-at-a-time unconditionally on x86_64, following the host -KBUILD_CFLAGS += $(call cc-option,-funit-at-a-time) diff --git a/arch/um/include/shared/chan_kern.h b/arch/um/drivers/chan.h index 1e651457e049..8df0fd9024dc 100644 --- a/arch/um/include/shared/chan_kern.h +++ b/arch/um/drivers/chan.h @@ -6,9 +6,9 @@ #ifndef __CHAN_KERN_H__ #define __CHAN_KERN_H__ -#include "linux/tty.h" -#include "linux/list.h" -#include "linux/console.h" +#include <linux/tty.h> +#include <linux/list.h> +#include <linux/console.h> #include "chan_user.h" #include "line.h" diff --git a/arch/um/drivers/chan_kern.c b/arch/um/drivers/chan_kern.c index d4191fe1cede..420e2c800799 100644 --- a/arch/um/drivers/chan_kern.c +++ b/arch/um/drivers/chan_kern.c @@ -6,7 +6,7 @@ #include <linux/slab.h> #include <linux/tty.h> #include <linux/tty_flip.h> -#include "chan_kern.h" +#include "chan.h" #include "os.h" #ifdef CONFIG_NOCONFIG_CHAN @@ -358,11 +358,11 @@ int chan_window_size(struct list_head *chans, unsigned short *rows_out, return 0; } -static void free_one_chan(struct chan *chan, int delay_free_irq) +static void free_one_chan(struct chan *chan) { list_del(&chan->list); - close_one_chan(chan, delay_free_irq); + close_one_chan(chan, 0); if (chan->ops->free != NULL) (*chan->ops->free)(chan->data); @@ -372,14 +372,14 @@ static void free_one_chan(struct chan *chan, int delay_free_irq) kfree(chan); } -static void free_chan(struct list_head *chans, int delay_free_irq) +static void free_chan(struct list_head *chans) { struct list_head *ele, *next; struct chan *chan; list_for_each_safe(ele, next, chans) { chan = list_entry(ele, struct chan, list); - free_one_chan(chan, delay_free_irq); + free_one_chan(chan); } } @@ -547,7 +547,7 @@ int parse_chan_pair(char *str, struct line *line, int device, char *in, *out; if (!list_empty(chans)) { - free_chan(chans, 0); + free_chan(chans); INIT_LIST_HEAD(chans); } diff --git a/arch/um/drivers/chan_user.c b/arch/um/drivers/chan_user.c index cfeb3f4a44af..f180813ce2c7 100644 --- a/arch/um/drivers/chan_user.c +++ b/arch/um/drivers/chan_user.c @@ -11,10 +11,8 @@ #include <termios.h> #include <sys/ioctl.h> #include "chan_user.h" -#include "kern_constants.h" #include "os.h" #include "um_malloc.h" -#include "user.h" void generic_close(int fd, void *unused) { @@ -283,7 +281,12 @@ void register_winch(int fd, struct tty_struct *tty) return; pid = tcgetpgrp(fd); - if (!is_skas_winch(pid, fd, tty) && (pid == -1)) { + if (is_skas_winch(pid, fd, tty)) { + register_winch_irq(-1, fd, -1, tty, 0); + return; + } + + if (pid == -1) { thread = winch_tramp(fd, tty, &thread_fd, &stack); if (thread < 0) return; diff --git a/arch/um/include/shared/chan_user.h b/arch/um/drivers/chan_user.h index 9b9ced85b703..9b9ced85b703 100644 --- a/arch/um/include/shared/chan_user.h +++ b/arch/um/drivers/chan_user.h diff --git a/arch/um/drivers/cow_sys.h b/arch/um/drivers/cow_sys.h index f5701fd2ef90..7f2ed0b8824a 100644 --- a/arch/um/drivers/cow_sys.h +++ b/arch/um/drivers/cow_sys.h @@ -3,7 +3,6 @@ #include "kern_util.h" #include "os.h" -#include "user.h" #include "um_malloc.h" static inline void *cow_malloc(int size) diff --git a/arch/um/drivers/daemon_user.c b/arch/um/drivers/daemon_user.c index f8e85e0bdace..a4fd7bc14af7 100644 --- a/arch/um/drivers/daemon_user.c +++ b/arch/um/drivers/daemon_user.c @@ -17,7 +17,6 @@ #include "net_user.h" #include "os.h" #include "um_malloc.h" -#include "user.h" enum request_type { REQ_NEW_CONTROL }; diff --git a/arch/um/drivers/fd.c b/arch/um/drivers/fd.c index f5a981a16240..5b81d2574415 100644 --- a/arch/um/drivers/fd.c +++ b/arch/um/drivers/fd.c @@ -9,10 +9,8 @@ #include <errno.h> #include <termios.h> #include "chan_user.h" -#include "kern_constants.h" #include "os.h" #include "um_malloc.h" -#include "user.h" struct fd_chan { int fd; diff --git a/arch/um/drivers/harddog_user.c b/arch/um/drivers/harddog_user.c index 84dce3fc590c..0345d6206d40 100644 --- a/arch/um/drivers/harddog_user.c +++ b/arch/um/drivers/harddog_user.c @@ -7,7 +7,6 @@ #include <unistd.h> #include <errno.h> #include "os.h" -#include "user.h" struct dog_data { int stdin; diff --git a/arch/um/drivers/line.c b/arch/um/drivers/line.c index 364c8a15c4c3..c1cf2206b84b 100644 --- a/arch/um/drivers/line.c +++ b/arch/um/drivers/line.c @@ -7,7 +7,7 @@ #include "linux/kd.h" #include "linux/sched.h" #include "linux/slab.h" -#include "chan_kern.h" +#include "chan.h" #include "irq_kern.h" #include "irq_user.h" #include "kern_util.h" diff --git a/arch/um/include/shared/line.h b/arch/um/drivers/line.h index 63df3ca02ac2..63df3ca02ac2 100644 --- a/arch/um/include/shared/line.h +++ b/arch/um/drivers/line.h diff --git a/arch/um/include/shared/mconsole.h b/arch/um/drivers/mconsole.h index c139ae1d6826..c139ae1d6826 100644 --- a/arch/um/include/shared/mconsole.h +++ b/arch/um/drivers/mconsole.h diff --git a/arch/um/include/shared/mconsole_kern.h b/arch/um/drivers/mconsole_kern.h index d2fe07e78958..d2fe07e78958 100644 --- a/arch/um/include/shared/mconsole_kern.h +++ b/arch/um/drivers/mconsole_kern.h diff --git a/arch/um/drivers/mconsole_user.c b/arch/um/drivers/mconsole_user.c index f8cf4c8bedef..99209826adb1 100644 --- a/arch/um/drivers/mconsole_user.c +++ b/arch/um/drivers/mconsole_user.c @@ -10,9 +10,7 @@ #include <sys/socket.h> #include <sys/uio.h> #include <sys/un.h> -#include "kern_constants.h" #include "mconsole.h" -#include "user.h" static struct mconsole_command commands[] = { /* diff --git a/arch/um/drivers/net_user.c b/arch/um/drivers/net_user.c index 520118888f16..05090c37fa84 100644 --- a/arch/um/drivers/net_user.c +++ b/arch/um/drivers/net_user.c @@ -12,10 +12,8 @@ #include <sys/socket.h> #include <sys/wait.h> #include "net_user.h" -#include "kern_constants.h" #include "os.h" #include "um_malloc.h" -#include "user.h" int tap_open_common(void *dev, char *gate_addr) { diff --git a/arch/um/drivers/pcap_user.c b/arch/um/drivers/pcap_user.c index 5f903587d69e..702a75b190ee 100644 --- a/arch/um/drivers/pcap_user.c +++ b/arch/um/drivers/pcap_user.c @@ -9,9 +9,7 @@ #include <asm/types.h> #include "net_user.h" #include "pcap_user.h" -#include "kern_constants.h" #include "um_malloc.h" -#include "user.h" #define PCAP_FD(p) (*(int *)(p)) diff --git a/arch/um/drivers/port_user.c b/arch/um/drivers/port_user.c index b49bf56a56aa..7b010b76ddf0 100644 --- a/arch/um/drivers/port_user.c +++ b/arch/um/drivers/port_user.c @@ -10,11 +10,9 @@ #include <unistd.h> #include <netinet/in.h> #include "chan_user.h" -#include "kern_constants.h" #include "os.h" #include "port.h" #include "um_malloc.h" -#include "user.h" struct port_chan { int raw; diff --git a/arch/um/drivers/pty.c b/arch/um/drivers/pty.c index 1113911dcb2b..cff2b75d31fd 100644 --- a/arch/um/drivers/pty.c +++ b/arch/um/drivers/pty.c @@ -12,10 +12,8 @@ #include <termios.h> #include <sys/stat.h> #include "chan_user.h" -#include "kern_constants.h" #include "os.h" #include "um_malloc.h" -#include "user.h" struct pty_chan { void (*announce)(char *dev_name, int dev); diff --git a/arch/um/drivers/slip_user.c b/arch/um/drivers/slip_user.c index cbacfc4e63e6..932b4d69bec2 100644 --- a/arch/um/drivers/slip_user.c +++ b/arch/um/drivers/slip_user.c @@ -11,12 +11,10 @@ #include <string.h> #include <sys/termios.h> #include <sys/wait.h> -#include "kern_constants.h" #include "net_user.h" #include "os.h" #include "slip.h" #include "um_malloc.h" -#include "user.h" static int slip_user_init(void *data, void *dev) { diff --git a/arch/um/drivers/slirp_user.c b/arch/um/drivers/slirp_user.c index a0ada8fec72a..db4adb639ff8 100644 --- a/arch/um/drivers/slirp_user.c +++ b/arch/um/drivers/slirp_user.c @@ -7,11 +7,9 @@ #include <errno.h> #include <string.h> #include <sys/wait.h> -#include "kern_constants.h" #include "net_user.h" #include "os.h" #include "slirp.h" -#include "user.h" static int slirp_user_init(void *data, void *dev) { diff --git a/arch/um/drivers/ssl.c b/arch/um/drivers/ssl.c index f1786e64607f..9d8c20af6f80 100644 --- a/arch/um/drivers/ssl.c +++ b/arch/um/drivers/ssl.c @@ -12,10 +12,8 @@ #include "linux/console.h" #include "asm/termbits.h" #include "asm/irq.h" -#include "line.h" #include "ssl.h" -#include "chan_kern.h" -#include "kern.h" +#include "chan.h" #include "init.h" #include "irq_user.h" #include "mconsole_kern.h" diff --git a/arch/um/drivers/stdio_console.c b/arch/um/drivers/stdio_console.c index 49266f6108c4..088776f01908 100644 --- a/arch/um/drivers/stdio_console.c +++ b/arch/um/drivers/stdio_console.c @@ -20,8 +20,7 @@ #include "asm/current.h" #include "asm/irq.h" #include "stdio_console.h" -#include "line.h" -#include "chan_kern.h" +#include "chan.h" #include "irq_user.h" #include "mconsole_kern.h" #include "init.h" diff --git a/arch/um/drivers/tty.c b/arch/um/drivers/tty.c index 495858a090e4..a97391f9ec54 100644 --- a/arch/um/drivers/tty.c +++ b/arch/um/drivers/tty.c @@ -7,10 +7,8 @@ #include <fcntl.h> #include <termios.h> #include "chan_user.h" -#include "kern_constants.h" #include "os.h" #include "um_malloc.h" -#include "user.h" struct tty_chan { char *dev; diff --git a/arch/um/drivers/ubd_kern.c b/arch/um/drivers/ubd_kern.c index 620f5b70957d..944453a3ec99 100644 --- a/arch/um/drivers/ubd_kern.c +++ b/arch/um/drivers/ubd_kern.c @@ -46,7 +46,6 @@ #include "asm/tlbflush.h" #include "mem_user.h" #include "kern_util.h" -#include "kern.h" #include "mconsole_kern.h" #include "init.h" #include "irq_user.h" @@ -54,7 +53,6 @@ #include "ubd_user.h" #include "os.h" #include "mem.h" -#include "mem_kern.h" #include "cow.h" enum ubd_req { UBD_READ, UBD_WRITE }; @@ -513,8 +511,37 @@ __uml_exitcall(kill_io_thread); static inline int ubd_file_size(struct ubd *ubd_dev, __u64 *size_out) { char *file; + int fd; + int err; + + __u32 version; + __u32 align; + char *backing_file; + time_t mtime; + unsigned long long size; + int sector_size; + int bitmap_offset; + + if (ubd_dev->file && ubd_dev->cow.file) { + file = ubd_dev->cow.file; + + goto out; + } - file = ubd_dev->cow.file ? ubd_dev->cow.file : ubd_dev->file; + fd = os_open_file(ubd_dev->file, global_openflags, 0); + if (fd < 0) + return fd; + + err = read_cow_header(file_reader, &fd, &version, &backing_file, \ + &mtime, &size, §or_size, &align, &bitmap_offset); + os_close_file(fd); + + if(err == -EINVAL) + file = ubd_dev->file; + else + file = backing_file; + +out: return os_file_size(file, size_out); } diff --git a/arch/um/drivers/ubd_user.c b/arch/um/drivers/ubd_user.c index b591bb9c41dd..007b94d97726 100644 --- a/arch/um/drivers/ubd_user.c +++ b/arch/um/drivers/ubd_user.c @@ -16,7 +16,6 @@ #include <sys/mman.h> #include <sys/param.h> #include "asm/types.h" -#include "user.h" #include "ubd_user.h" #include "os.h" #include "cow.h" diff --git a/arch/um/include/shared/ubd_user.h b/arch/um/drivers/ubd_user.h index 3845051f1b10..3845051f1b10 100644 --- a/arch/um/include/shared/ubd_user.h +++ b/arch/um/drivers/ubd_user.h diff --git a/arch/um/drivers/umcast_user.c b/arch/um/drivers/umcast_user.c index 59c56fd6f52a..010fa2d849ec 100644 --- a/arch/um/drivers/umcast_user.c +++ b/arch/um/drivers/umcast_user.c @@ -15,11 +15,9 @@ #include <unistd.h> #include <errno.h> #include <netinet/in.h> -#include "kern_constants.h" #include "umcast.h" #include "net_user.h" #include "um_malloc.h" -#include "user.h" static struct sockaddr_in *new_addr(char *addr, unsigned short port) { diff --git a/arch/um/drivers/vde_user.c b/arch/um/drivers/vde_user.c index c5c43253e6ce..b8c286748d3d 100644 --- a/arch/um/drivers/vde_user.c +++ b/arch/um/drivers/vde_user.c @@ -6,10 +6,8 @@ #include <stddef.h> #include <errno.h> #include <libvdeplug.h> -#include "kern_constants.h" #include "net_user.h" #include "um_malloc.h" -#include "user.h" #include "vde.h" static int vde_user_init(void *data, void *dev) diff --git a/arch/um/drivers/xterm.c b/arch/um/drivers/xterm.c index 2e1de5728604..969110e56487 100644 --- a/arch/um/drivers/xterm.c +++ b/arch/um/drivers/xterm.c @@ -11,10 +11,8 @@ #include <string.h> #include <termios.h> #include "chan_user.h" -#include "kern_constants.h" #include "os.h" #include "um_malloc.h" -#include "user.h" #include "xterm.h" struct xterm_chan { diff --git a/arch/um/include/asm/Kbuild b/arch/um/include/asm/Kbuild new file mode 100644 index 000000000000..451f4517b334 --- /dev/null +++ b/arch/um/include/asm/Kbuild @@ -0,0 +1,3 @@ +generic-y += bug.h cputime.h device.h emergency-restart.h futex.h hardirq.h +generic-y += hw_irq.h irq_regs.h kdebug.h percpu.h sections.h topology.h xor.h +generic-y += ftrace.h diff --git a/arch/um/include/asm/bug.h b/arch/um/include/asm/bug.h deleted file mode 100644 index 9e33b864c359..000000000000 --- a/arch/um/include/asm/bug.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __UM_BUG_H -#define __UM_BUG_H - -#include <asm-generic/bug.h> - -#endif diff --git a/arch/um/include/asm/checksum.h b/arch/um/include/asm/checksum.h deleted file mode 100644 index 5b501361e361..000000000000 --- a/arch/um/include/asm/checksum.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __UM_CHECKSUM_H -#define __UM_CHECKSUM_H - -#include "sysdep/checksum.h" - -#endif diff --git a/arch/um/include/asm/cputime.h b/arch/um/include/asm/cputime.h deleted file mode 100644 index c84acbadfa2f..000000000000 --- a/arch/um/include/asm/cputime.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __UM_CPUTIME_H -#define __UM_CPUTIME_H - -#include <asm-generic/cputime.h> - -#endif /* __UM_CPUTIME_H */ diff --git a/arch/um/include/asm/device.h b/arch/um/include/asm/device.h deleted file mode 100644 index d8f9872b0e2d..000000000000 --- a/arch/um/include/asm/device.h +++ /dev/null @@ -1,7 +0,0 @@ -/* - * Arch specific extensions to struct device - * - * This file is released under the GPLv2 - */ -#include <asm-generic/device.h> - diff --git a/arch/um/include/asm/emergency-restart.h b/arch/um/include/asm/emergency-restart.h deleted file mode 100644 index 108d8c48e42e..000000000000 --- a/arch/um/include/asm/emergency-restart.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_EMERGENCY_RESTART_H -#define _ASM_EMERGENCY_RESTART_H - -#include <asm-generic/emergency-restart.h> - -#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/arch/um/include/asm/ftrace.h b/arch/um/include/asm/ftrace.h deleted file mode 100644 index 40a8c178f10d..000000000000 --- a/arch/um/include/asm/ftrace.h +++ /dev/null @@ -1 +0,0 @@ -/* empty */ diff --git a/arch/um/include/asm/futex.h b/arch/um/include/asm/futex.h deleted file mode 100644 index 6a332a9f099c..000000000000 --- a/arch/um/include/asm/futex.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_FUTEX_H -#define _ASM_FUTEX_H - -#include <asm-generic/futex.h> - -#endif diff --git a/arch/um/include/asm/hardirq.h b/arch/um/include/asm/hardirq.h deleted file mode 100644 index fb3c05a0cbbf..000000000000 --- a/arch/um/include/asm/hardirq.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/hardirq.h> diff --git a/arch/um/include/asm/hw_irq.h b/arch/um/include/asm/hw_irq.h deleted file mode 100644 index 1cf84cf5f21a..000000000000 --- a/arch/um/include/asm/hw_irq.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef _ASM_UM_HW_IRQ_H -#define _ASM_UM_HW_IRQ_H - -#include "asm/irq.h" -#include "asm/archparam.h" - -#endif diff --git a/arch/um/include/asm/irq_regs.h b/arch/um/include/asm/irq_regs.h deleted file mode 100644 index 3dd9c0b70270..000000000000 --- a/arch/um/include/asm/irq_regs.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/irq_regs.h> diff --git a/arch/um/include/asm/irqflags.h b/arch/um/include/asm/irqflags.h index 659b9abdfdba..c780d8a16773 100644 --- a/arch/um/include/asm/irqflags.h +++ b/arch/um/include/asm/irqflags.h @@ -1,6 +1,42 @@ #ifndef __UM_IRQFLAGS_H #define __UM_IRQFLAGS_H -/* Empty for now */ +extern int get_signals(void); +extern int set_signals(int enable); +extern void block_signals(void); +extern void unblock_signals(void); + +static inline unsigned long arch_local_save_flags(void) +{ + return get_signals(); +} + +static inline void arch_local_irq_restore(unsigned long flags) +{ + set_signals(flags); +} + +static inline void arch_local_irq_enable(void) +{ + unblock_signals(); +} + +static inline void arch_local_irq_disable(void) +{ + block_signals(); +} + +static inline unsigned long arch_local_irq_save(void) +{ + unsigned long flags; + flags = arch_local_save_flags(); + arch_local_irq_disable(); + return flags; +} + +static inline bool arch_irqs_disabled(void) +{ + return arch_local_save_flags() == 0; +} #endif diff --git a/arch/um/include/asm/kdebug.h b/arch/um/include/asm/kdebug.h deleted file mode 100644 index 6ece1b037665..000000000000 --- a/arch/um/include/asm/kdebug.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/kdebug.h> diff --git a/arch/um/include/asm/mmu.h b/arch/um/include/asm/mmu.h index cf259de51531..30509b9f37fd 100644 --- a/arch/um/include/asm/mmu.h +++ b/arch/um/include/asm/mmu.h @@ -1,12 +1,24 @@ /* - * Copyright (C) 2002 Jeff Dike (jdike@karaya.com) + * Copyright (C) 2002 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com) * Licensed under the GPL */ -#ifndef __MMU_H -#define __MMU_H +#ifndef __ARCH_UM_MMU_H +#define __ARCH_UM_MMU_H -#include "um_mmu.h" +#include "mm_id.h" +#include <asm/mm_context.h> -#endif +typedef struct mm_context { + struct mm_id id; + struct uml_arch_mm_context arch; + struct page **stub_pages; +} mm_context_t; + +extern void __switch_mm(struct mm_id * mm_idp); +/* Avoid tangled inclusion with asm/ldt.h */ +extern long init_new_ldt(struct mm_context *to_mm, struct mm_context *from_mm); +extern void free_ldt(struct mm_context *mm); + +#endif diff --git a/arch/um/include/asm/mmu_context.h b/arch/um/include/asm/mmu_context.h index 34d813011b7a..591b3d8d7614 100644 --- a/arch/um/include/asm/mmu_context.h +++ b/arch/um/include/asm/mmu_context.h @@ -6,15 +6,12 @@ #ifndef __UM_MMU_CONTEXT_H #define __UM_MMU_CONTEXT_H -#include "linux/sched.h" -#include "um_mmu.h" +#include <linux/sched.h> +#include <asm/mmu.h> extern void arch_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm); extern void arch_exit_mmap(struct mm_struct *mm); -#define get_mmu_context(task) do ; while(0) -#define activate_context(tsk) do ; while(0) - #define deactivate_mm(tsk,mm) do { } while (0) extern void force_flush_all(void); diff --git a/arch/um/include/asm/page.h b/arch/um/include/asm/page.h index 4cc9b6cf480a..7cfc3cedce84 100644 --- a/arch/um/include/asm/page.h +++ b/arch/um/include/asm/page.h @@ -19,7 +19,7 @@ struct page; #include <linux/types.h> -#include <sysdep/vm-flags.h> +#include <asm/vm-flags.h> /* * These are used to make use of C type-checking.. diff --git a/arch/um/include/asm/page_offset.h b/arch/um/include/asm/page_offset.h deleted file mode 100644 index 1c168dfbf359..000000000000 --- a/arch/um/include/asm/page_offset.h +++ /dev/null @@ -1 +0,0 @@ -#define PAGE_OFFSET_RAW (uml_physmem) diff --git a/arch/um/include/asm/pda.h b/arch/um/include/asm/pda.h deleted file mode 100644 index ddcd774fc2a0..000000000000 --- a/arch/um/include/asm/pda.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Copyright 2003 PathScale, Inc. - * - * Licensed under the GPL - */ - -#ifndef __UM_PDA_X86_64_H -#define __UM_PDA_X86_64_H - -/* XXX */ -struct foo { - unsigned int __softirq_pending; - unsigned int __nmi_count; -}; - -extern struct foo me; - -#define read_pda(me) (&me) - -#endif - diff --git a/arch/um/include/asm/percpu.h b/arch/um/include/asm/percpu.h deleted file mode 100644 index efe7508d8abd..000000000000 --- a/arch/um/include/asm/percpu.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __UM_PERCPU_H -#define __UM_PERCPU_H - -#include <asm-generic/percpu.h> - -#endif /* __UM_PERCPU_H */ diff --git a/arch/um/include/asm/ptrace-generic.h b/arch/um/include/asm/ptrace-generic.h index 1a7d2757fe05..f605d3c4844c 100644 --- a/arch/um/include/asm/ptrace-generic.h +++ b/arch/um/include/asm/ptrace-generic.h @@ -23,17 +23,10 @@ struct pt_regs { #define PT_REGS_IP(r) UPT_IP(&(r)->regs) #define PT_REGS_SP(r) UPT_SP(&(r)->regs) -#define PT_REG(r, reg) UPT_REG(&(r)->regs, reg) -#define PT_REGS_SET(r, reg, val) UPT_SET(&(r)->regs, reg, val) - -#define PT_REGS_SET_SYSCALL_RETURN(r, res) \ - UPT_SET_SYSCALL_RETURN(&(r)->regs, res) #define PT_REGS_RESTART_SYSCALL(r) UPT_RESTART_SYSCALL(&(r)->regs) #define PT_REGS_SYSCALL_NR(r) UPT_SYSCALL_NR(&(r)->regs) -#define PT_REGS_SC(r) UPT_SC(&(r)->regs) - #define instruction_pointer(regs) PT_REGS_IP(regs) struct task_struct; diff --git a/arch/um/include/asm/sections.h b/arch/um/include/asm/sections.h deleted file mode 100644 index 6b0231eefea8..000000000000 --- a/arch/um/include/asm/sections.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef _UM_SECTIONS_H -#define _UM_SECTIONS_H - -/* nothing to see, move along */ -#include <asm-generic/sections.h> - -#endif diff --git a/arch/um/include/asm/system.h b/arch/um/include/asm/system.h deleted file mode 100644 index 68a90ecd1450..000000000000 --- a/arch/um/include/asm/system.h +++ /dev/null @@ -1,47 +0,0 @@ -#ifndef __UM_SYSTEM_GENERIC_H -#define __UM_SYSTEM_GENERIC_H - -#include "sysdep/system.h" - -extern int get_signals(void); -extern int set_signals(int enable); -extern void block_signals(void); -extern void unblock_signals(void); - -static inline unsigned long arch_local_save_flags(void) -{ - return get_signals(); -} - -static inline void arch_local_irq_restore(unsigned long flags) -{ - set_signals(flags); -} - -static inline void arch_local_irq_enable(void) -{ - unblock_signals(); -} - -static inline void arch_local_irq_disable(void) -{ - block_signals(); -} - -static inline unsigned long arch_local_irq_save(void) -{ - unsigned long flags; - flags = arch_local_save_flags(); - arch_local_irq_disable(); - return flags; -} - -static inline bool arch_irqs_disabled(void) -{ - return arch_local_save_flags() == 0; -} - -extern void *_switch_to(void *prev, void *next, void *last); -#define switch_to(prev, next, last) prev = _switch_to(prev, next, last) - -#endif diff --git a/arch/um/include/asm/topology.h b/arch/um/include/asm/topology.h deleted file mode 100644 index 0905e4f21d42..000000000000 --- a/arch/um/include/asm/topology.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_UM_TOPOLOGY_H -#define _ASM_UM_TOPOLOGY_H - -#include <asm-generic/topology.h> - -#endif diff --git a/arch/um/include/asm/uaccess.h b/arch/um/include/asm/uaccess.h index b9a895d6fa1d..3f22fbf7ca1d 100644 --- a/arch/um/include/asm/uaccess.h +++ b/arch/um/include/asm/uaccess.h @@ -6,15 +6,15 @@ #ifndef __UM_UACCESS_H #define __UM_UACCESS_H -#include <asm/errno.h> -#include <asm/processor.h> - /* thread_info has a mm_segment_t in it, so put the definition up here */ typedef struct { unsigned long seg; } mm_segment_t; -#include "linux/thread_info.h" +#include <linux/thread_info.h> +#include <linux/errno.h> +#include <asm/processor.h> +#include <asm/elf.h> #define VERIFY_READ 0 #define VERIFY_WRITE 1 @@ -38,7 +38,86 @@ typedef struct { #define segment_eq(a, b) ((a).seg == (b).seg) -#include "um_uaccess.h" +#define __under_task_size(addr, size) \ + (((unsigned long) (addr) < TASK_SIZE) && \ + (((unsigned long) (addr) + (size)) < TASK_SIZE)) + +#define __access_ok_vsyscall(type, addr, size) \ + ((type == VERIFY_READ) && \ + ((unsigned long) (addr) >= FIXADDR_USER_START) && \ + ((unsigned long) (addr) + (size) <= FIXADDR_USER_END) && \ + ((unsigned long) (addr) + (size) >= (unsigned long)(addr))) + +#define __addr_range_nowrap(addr, size) \ + ((unsigned long) (addr) <= ((unsigned long) (addr) + (size))) + +#define access_ok(type, addr, size) \ + (__addr_range_nowrap(addr, size) && \ + (__under_task_size(addr, size) || \ + __access_ok_vsyscall(type, addr, size) || \ + segment_eq(get_fs(), KERNEL_DS))) + +extern int copy_from_user(void *to, const void __user *from, int n); +extern int copy_to_user(void __user *to, const void *from, int n); + +/* + * strncpy_from_user: - Copy a NUL terminated string from userspace. + * @dst: Destination address, in kernel space. This buffer must be at + * least @count bytes long. + * @src: Source address, in user space. + * @count: Maximum number of bytes to copy, including the trailing NUL. + * + * Copies a NUL-terminated string from userspace to kernel space. + * + * On success, returns the length of the string (not including the trailing + * NUL). + * + * If access to userspace fails, returns -EFAULT (some data may have been + * copied). + * + * If @count is smaller than the length of the string, copies @count bytes + * and returns @count. + */ + +extern int strncpy_from_user(char *dst, const char __user *src, int count); + +/* + * __clear_user: - Zero a block of memory in user space, with less checking. + * @to: Destination address, in user space. + * @n: Number of bytes to zero. + * + * Zero a block of memory in user space. Caller must check + * the specified block with access_ok() before calling this function. + * + * Returns number of bytes that could not be cleared. + * On success, this will be zero. + */ +extern int __clear_user(void __user *mem, int len); + +/* + * clear_user: - Zero a block of memory in user space. + * @to: Destination address, in user space. + * @n: Number of bytes to zero. + * + * Zero a block of memory in user space. + * + * Returns number of bytes that could not be cleared. + * On success, this will be zero. + */ +extern int clear_user(void __user *mem, int len); + +/* + * strlen_user: - Get the size of a string in user space. + * @str: The string to measure. + * @n: The maximum valid length + * + * Get the size of a NUL-terminated string in user space. + * + * Returns the size of the string INCLUDING the terminating NUL. + * On exception, returns 0. + * If the string is too long, returns a value greater than @n. + */ +extern int strnlen_user(const void __user *str, int len); #define __copy_from_user(to, from, n) copy_from_user(to, from, n) diff --git a/arch/um/include/asm/xor.h b/arch/um/include/asm/xor.h deleted file mode 100644 index a19db3e17241..000000000000 --- a/arch/um/include/asm/xor.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __UM_XOR_H -#define __UM_XOR_H - -#include "asm-generic/xor.h" - -#endif diff --git a/arch/um/include/shared/as-layout.h b/arch/um/include/shared/as-layout.h index a92b678503cf..896e16602176 100644 --- a/arch/um/include/shared/as-layout.h +++ b/arch/um/include/shared/as-layout.h @@ -6,7 +6,7 @@ #ifndef __START_H__ #define __START_H__ -#include "kern_constants.h" +#include <generated/asm-offsets.h> /* * Stolen from linux/const.h, which can't be directly included since diff --git a/arch/um/include/shared/common-offsets.h b/arch/um/include/shared/common-offsets.h index 72009c7e3210..d7fe563aa7e7 100644 --- a/arch/um/include/shared/common-offsets.h +++ b/arch/um/include/shared/common-offsets.h @@ -2,7 +2,6 @@ DEFINE(KERNEL_MADV_REMOVE, MADV_REMOVE); -OFFSET(HOST_TASK_REGS, task_struct, thread.regs); OFFSET(HOST_TASK_PID, task_struct, pid); DEFINE(UM_KERN_PAGE_SIZE, PAGE_SIZE); diff --git a/arch/um/include/shared/initrd.h b/arch/um/include/shared/initrd.h deleted file mode 100644 index 22673bcc273d..000000000000 --- a/arch/um/include/shared/initrd.h +++ /dev/null @@ -1,12 +0,0 @@ -/* - * Copyright (C) 2000 Jeff Dike (jdike@karaya.com) - * Licensed under the GPL - */ - -#ifndef __INITRD_USER_H__ -#define __INITRD_USER_H__ - -extern int load_initrd(char *filename, void *buf, int size); - -#endif - diff --git a/arch/um/include/shared/kern.h b/arch/um/include/shared/kern.h index 4ce3fc650e57..6cd01240bbf0 100644 --- a/arch/um/include/shared/kern.h +++ b/arch/um/include/shared/kern.h @@ -13,28 +13,10 @@ * includes. */ -extern int errno; - -extern int clone(int (*proc)(void *), void *sp, int flags, void *data); -extern int sleep(int); extern int printf(const char *fmt, ...); -extern char *strerror(int errnum); -extern char *ptsname(int __fd); -extern int munmap(void *, int); extern void *sbrk(int increment); -extern void *malloc(int size); -extern void perror(char *err); -extern int kill(int pid, int sig); -extern int getuid(void); -extern int getgid(void); extern int pause(void); -extern int write(int, const void *, int); extern void exit(int); -extern int close(int); -extern int read(unsigned int, char *, int); -extern int pipe(int *); -extern int sched_yield(void); -extern int ptrace(int op, int pid, long addr, long data); #endif diff --git a/arch/um/include/shared/kern_util.h b/arch/um/include/shared/kern_util.h index 3c341222d252..0f1483852460 100644 --- a/arch/um/include/shared/kern_util.h +++ b/arch/um/include/shared/kern_util.h @@ -21,7 +21,6 @@ extern unsigned long alloc_stack(int order, int atomic); extern void free_stack(unsigned long stack, int order); extern int do_signal(void); -extern void copy_sc(struct uml_pt_regs *regs, void *from); extern void interrupt_end(void); extern void relay_signal(int sig, struct uml_pt_regs *regs); diff --git a/arch/um/include/shared/ldt.h b/arch/um/include/shared/ldt.h deleted file mode 100644 index a7f999a58774..000000000000 --- a/arch/um/include/shared/ldt.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * Copyright (C) 2004 Fujitsu Siemens Computers GmbH - * Licensed under the GPL - * - * Author: Bodo Stroesser <bstroesser@fujitsu-siemens.com> - */ - -#ifndef __ASM_LDT_H -#define __ASM_LDT_H - -#include <linux/mutex.h> -#include <sysdep/host_ldt.h> - -extern void ldt_host_info(void); - -#define LDT_PAGES_MAX \ - ((LDT_ENTRIES * LDT_ENTRY_SIZE)/PAGE_SIZE) -#define LDT_ENTRIES_PER_PAGE \ - (PAGE_SIZE/LDT_ENTRY_SIZE) -#define LDT_DIRECT_ENTRIES \ - ((LDT_PAGES_MAX*sizeof(void *))/LDT_ENTRY_SIZE) - -struct ldt_entry { - __u32 a; - __u32 b; -}; - -typedef struct uml_ldt { - int entry_count; - struct mutex lock; - union { - struct ldt_entry * pages[LDT_PAGES_MAX]; - struct ldt_entry entries[LDT_DIRECT_ENTRIES]; - } u; -} uml_ldt_t; - -#endif diff --git a/arch/um/include/shared/mem_kern.h b/arch/um/include/shared/mem_kern.h deleted file mode 100644 index 69be0fd0ce4b..000000000000 --- a/arch/um/include/shared/mem_kern.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Copyright (C) 2003 Jeff Dike (jdike@addtoit.com) - * Licensed under the GPL - */ - -#ifndef __MEM_KERN_H__ -#define __MEM_KERN_H__ - -#include "linux/list.h" -#include "linux/types.h" - -struct remapper { - struct list_head list; - int (*proc)(int, unsigned long, int, __u64); -}; - -extern void register_remapper(struct remapper *info); - -#endif - diff --git a/arch/um/include/shared/os.h b/arch/um/include/shared/os.h index 83c7c2ecd614..89b686c1a3ea 100644 --- a/arch/um/include/shared/os.h +++ b/arch/um/include/shared/os.h @@ -10,7 +10,6 @@ #include "irq_user.h" #include "longjmp.h" #include "mm_id.h" -#include "sysdep/tls.h" #define CATCH_EINTR(expr) while ((errno = 0, ((expr) < 0)) && (errno == EINTR)) @@ -203,12 +202,6 @@ extern int os_drop_memory(void *addr, int length); extern int can_drop_memory(void); extern void os_flush_stdout(void); -/* uaccess.c */ -extern unsigned long __do_user_copy(void *to, const void *from, int n, - void **fault_addr, jmp_buf **fault_catcher, - void (*op)(void *to, const void *from, - int n), int *faulted_out); - /* execvp.c */ extern int execvp_noalloc(char *buf, const char *file, char *const argv[]); /* helper.c */ @@ -218,10 +211,6 @@ extern int run_helper_thread(int (*proc)(void *), void *arg, extern int helper_wait(int pid); -/* tls.c */ -extern int os_set_thread_area(user_desc_t *info, int pid); -extern int os_get_thread_area(user_desc_t *info, int pid); - /* umid.c */ extern int umid_file_name(char *name, char *buf, int len); extern int set_umid(char *name); @@ -231,7 +220,7 @@ extern char *get_umid(void); extern void timer_init(void); extern void set_sigstack(void *sig_stack, int size); extern void remove_sigstack(void); -extern void set_handler(int sig, void (*handler)(int), int flags, ...); +extern void set_handler(int sig); extern int change_sig(int signal, int on); extern void block_signals(void); extern void unblock_signals(void); diff --git a/arch/um/include/shared/process.h b/arch/um/include/shared/process.h deleted file mode 100644 index bb873a51262e..000000000000 --- a/arch/um/include/shared/process.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * Copyright (C) 2000 - 2008 Jeff Dike (jdike@{addtoit,linux.intel}.com) - * Licensed under the GPL - */ - -#ifndef __PROCESS_H__ -#define __PROCESS_H__ - -#include <signal.h> - -/* Copied from linux/compiler-gcc.h since we can't include it directly */ -#define barrier() __asm__ __volatile__("": : :"memory") - -extern void sig_handler(int sig, struct sigcontext *sc); -extern void alarm_handler(int sig, struct sigcontext *sc); - -#endif diff --git a/arch/um/include/shared/ptrace_user.h b/arch/um/include/shared/ptrace_user.h index 7fd8539bc19a..56b2f284b108 100644 --- a/arch/um/include/shared/ptrace_user.h +++ b/arch/um/include/shared/ptrace_user.h @@ -6,7 +6,8 @@ #ifndef __PTRACE_USER_H__ #define __PTRACE_USER_H__ -#include "sysdep/ptrace_user.h" +#include <sys/ptrace.h> +#include <sysdep/ptrace_user.h> extern int ptrace_getregs(long pid, unsigned long *regs_out); extern int ptrace_setregs(long pid, unsigned long *regs_in); diff --git a/arch/um/include/shared/skas_ptregs.h b/arch/um/include/shared/skas_ptregs.h deleted file mode 100644 index 73db19e9c077..000000000000 --- a/arch/um/include/shared/skas_ptregs.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __SKAS_PT_REGS_ -#define __SKAS_PT_REGS_ - -#include <user_constants.h> - -#endif diff --git a/arch/um/include/shared/syscall.h b/arch/um/include/shared/syscall.h deleted file mode 100644 index dda1df901a08..000000000000 --- a/arch/um/include/shared/syscall.h +++ /dev/null @@ -1,12 +0,0 @@ -/* - * Copyright (C) 2002 Jeff Dike (jdike@karaya.com) - * Licensed under the GPL - */ - -#ifndef __SYSCALL_USER_H -#define __SYSCALL_USER_H - -extern int record_syscall_start(int syscall); -extern void record_syscall_end(int index, long result); - -#endif diff --git a/arch/um/include/shared/task.h b/arch/um/include/shared/task.h deleted file mode 100644 index 3fe726b3cf48..000000000000 --- a/arch/um/include/shared/task.h +++ /dev/null @@ -1,9 +0,0 @@ -#ifndef __TASK_H -#define __TASK_H - -#include <kern_constants.h> - -#define TASK_REGS(task) ((struct uml_pt_regs *) &(((char *) (task))[HOST_TASK_REGS])) -#define TASK_PID(task) *((int *) &(((char *) (task))[HOST_TASK_PID])) - -#endif diff --git a/arch/um/include/shared/tlb.h b/arch/um/include/shared/tlb.h deleted file mode 100644 index ecd2265b301b..000000000000 --- a/arch/um/include/shared/tlb.h +++ /dev/null @@ -1,15 +0,0 @@ -/* - * Copyright (C) 2002 Jeff Dike (jdike@karaya.com) - * Licensed under the GPL - */ - -#ifndef __TLB_H__ -#define __TLB_H__ - -#include "um_mmu.h" - -extern void force_flush_all(void); -extern int flush_tlb_kernel_range_common(unsigned long start, - unsigned long end); - -#endif diff --git a/arch/um/include/shared/um_malloc.h b/arch/um/include/shared/um_malloc.h index c554d706d106..6395fef6b69b 100644 --- a/arch/um/include/shared/um_malloc.h +++ b/arch/um/include/shared/um_malloc.h @@ -6,7 +6,7 @@ #ifndef __UM_MALLOC_H__ #define __UM_MALLOC_H__ -#include "kern_constants.h" +#include <generated/asm-offsets.h> extern void *uml_kmalloc(int size, int flags); extern void kfree(const void *ptr); diff --git a/arch/um/include/shared/um_mmu.h b/arch/um/include/shared/um_mmu.h deleted file mode 100644 index b1a7e47d1027..000000000000 --- a/arch/um/include/shared/um_mmu.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * Copyright (C) 2002 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com) - * Licensed under the GPL - */ - -#ifndef __ARCH_UM_MMU_H -#define __ARCH_UM_MMU_H - -#include "mm_id.h" -#include "ldt.h" - -typedef struct mm_context { - struct mm_id id; - struct uml_ldt ldt; - struct page **stub_pages; -} mm_context_t; - -extern void __switch_mm(struct mm_id * mm_idp); - -/* Avoid tangled inclusion with asm/ldt.h */ -extern long init_new_ldt(struct mm_context *to_mm, struct mm_context *from_mm); -extern void free_ldt(struct mm_context *mm); - -#endif diff --git a/arch/um/include/shared/um_uaccess.h b/arch/um/include/shared/um_uaccess.h deleted file mode 100644 index 45c04999d670..000000000000 --- a/arch/um/include/shared/um_uaccess.h +++ /dev/null @@ -1,97 +0,0 @@ -/* - * Copyright (C) 2002 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com) - * Licensed under the GPL - */ - -#ifndef __ARCH_UM_UACCESS_H -#define __ARCH_UM_UACCESS_H - -#include <asm/elf.h> -#include <asm/fixmap.h> -#include "sysdep/archsetjmp.h" - -#define __under_task_size(addr, size) \ - (((unsigned long) (addr) < TASK_SIZE) && \ - (((unsigned long) (addr) + (size)) < TASK_SIZE)) - -#define __access_ok_vsyscall(type, addr, size) \ - ((type == VERIFY_READ) && \ - ((unsigned long) (addr) >= FIXADDR_USER_START) && \ - ((unsigned long) (addr) + (size) <= FIXADDR_USER_END) && \ - ((unsigned long) (addr) + (size) >= (unsigned long)(addr))) - -#define __addr_range_nowrap(addr, size) \ - ((unsigned long) (addr) <= ((unsigned long) (addr) + (size))) - -#define access_ok(type, addr, size) \ - (__addr_range_nowrap(addr, size) && \ - (__under_task_size(addr, size) || \ - __access_ok_vsyscall(type, addr, size) || \ - segment_eq(get_fs(), KERNEL_DS))) - -extern int copy_from_user(void *to, const void __user *from, int n); -extern int copy_to_user(void __user *to, const void *from, int n); - -extern int __do_copy_to_user(void *to, const void *from, int n, - void **fault_addr, jmp_buf **fault_catcher); - -/* - * strncpy_from_user: - Copy a NUL terminated string from userspace. - * @dst: Destination address, in kernel space. This buffer must be at - * least @count bytes long. - * @src: Source address, in user space. - * @count: Maximum number of bytes to copy, including the trailing NUL. - * - * Copies a NUL-terminated string from userspace to kernel space. - * - * On success, returns the length of the string (not including the trailing - * NUL). - * - * If access to userspace fails, returns -EFAULT (some data may have been - * copied). - * - * If @count is smaller than the length of the string, copies @count bytes - * and returns @count. - */ - -extern int strncpy_from_user(char *dst, const char __user *src, int count); - -/* - * __clear_user: - Zero a block of memory in user space, with less checking. - * @to: Destination address, in user space. - * @n: Number of bytes to zero. - * - * Zero a block of memory in user space. Caller must check - * the specified block with access_ok() before calling this function. - * - * Returns number of bytes that could not be cleared. - * On success, this will be zero. - */ -extern int __clear_user(void __user *mem, int len); - -/* - * clear_user: - Zero a block of memory in user space. - * @to: Destination address, in user space. - * @n: Number of bytes to zero. - * - * Zero a block of memory in user space. - * - * Returns number of bytes that could not be cleared. - * On success, this will be zero. - */ -extern int clear_user(void __user *mem, int len); - -/* - * strlen_user: - Get the size of a string in user space. - * @str: The string to measure. - * @n: The maximum valid length - * - * Get the size of a NUL-terminated string in user space. - * - * Returns the size of the string INCLUDING the terminating NUL. - * On exception, returns 0. - * If the string is too long, returns a value greater than @n. - */ -extern int strnlen_user(const void __user *str, int len); - -#endif diff --git a/arch/um/include/shared/user.h b/arch/um/include/shared/user.h index 293f7c794faa..4fa82c055aab 100644 --- a/arch/um/include/shared/user.h +++ b/arch/um/include/shared/user.h @@ -6,7 +6,7 @@ #ifndef __USER_H__ #define __USER_H__ -#include "kern_constants.h" +#include <generated/asm-offsets.h> /* * The usual definition - copied here because the kernel provides its own, @@ -36,10 +36,11 @@ static inline int printk(const char *fmt, ...) } #endif -extern void schedule(void); extern int in_aton(char *str); -extern int open_gdb_chan(void); extern size_t strlcpy(char *, const char *, size_t); extern size_t strlcat(char *, const char *, size_t); +/* Copied from linux/compiler-gcc.h since we can't include it directly */ +#define barrier() __asm__ __volatile__("": : :"memory") + #endif diff --git a/arch/um/kernel/Makefile b/arch/um/kernel/Makefile index c4491c15afb2..bc494741b1f3 100644 --- a/arch/um/kernel/Makefile +++ b/arch/um/kernel/Makefile @@ -11,7 +11,7 @@ clean-files := obj-y = config.o exec.o exitcode.o init_task.o irq.o ksyms.o mem.o \ physmem.o process.o ptrace.o reboot.o sigio.o \ - signal.o smp.o syscall.o sysrq.o time.o tlb.o trap.o uaccess.o \ + signal.o smp.o syscall.o sysrq.o time.o tlb.o trap.o \ um_arch.o umid.o skas/ obj-$(CONFIG_BLK_DEV_INITRD) += initrd.o diff --git a/arch/um/kernel/exec.c b/arch/um/kernel/exec.c index 939a4a67f0fd..6cade9366364 100644 --- a/arch/um/kernel/exec.c +++ b/arch/um/kernel/exec.c @@ -3,14 +3,15 @@ * Licensed under the GPL */ -#include "linux/stddef.h" -#include "linux/fs.h" -#include "linux/ptrace.h" -#include "linux/sched.h" -#include "linux/slab.h" -#include "asm/current.h" -#include "asm/processor.h" -#include "asm/uaccess.h" +#include <linux/stddef.h> +#include <linux/module.h> +#include <linux/fs.h> +#include <linux/ptrace.h> +#include <linux/sched.h> +#include <linux/slab.h> +#include <asm/current.h> +#include <asm/processor.h> +#include <asm/uaccess.h> #include "as-layout.h" #include "mem_user.h" #include "skas.h" @@ -41,6 +42,7 @@ void start_thread(struct pt_regs *regs, unsigned long eip, unsigned long esp) PT_REGS_IP(regs) = eip; PT_REGS_SP(regs) = esp; } +EXPORT_SYMBOL(start_thread); static long execve1(const char *file, const char __user *const __user *argv, diff --git a/arch/um/kernel/gmon_syms.c b/arch/um/kernel/gmon_syms.c index 72eccd2a4113..e9bcf247bcee 100644 --- a/arch/um/kernel/gmon_syms.c +++ b/arch/um/kernel/gmon_syms.c @@ -7,18 +7,3 @@ extern void __bb_init_func(void *) __attribute__((weak)); EXPORT_SYMBOL(__bb_init_func); - -/* - * This is defined (and referred to in profiling stub code) only by some GCC - * versions in libgcov. - * - * Since SuSE backported the fix, we cannot handle it depending on GCC version. - * So, unconditionally export it. But also give it a weak declaration, which - * will be overridden by any other one. - */ - -extern void __gcov_init(void *) __attribute__((weak)); -EXPORT_SYMBOL(__gcov_init); - -extern void __gcov_merge_add(void *) __attribute__((weak)); -EXPORT_SYMBOL(__gcov_merge_add); diff --git a/arch/um/kernel/initrd.c b/arch/um/kernel/initrd.c index d386c75c88eb..10cc18f729fd 100644 --- a/arch/um/kernel/initrd.c +++ b/arch/um/kernel/initrd.c @@ -7,12 +7,12 @@ #include "linux/bootmem.h" #include "linux/initrd.h" #include "asm/types.h" -#include "initrd.h" #include "init.h" #include "os.h" /* Changed by uml_initrd_setup, which is a setup */ static char *initrd __initdata = NULL; +static int load_initrd(char *filename, void *buf, int size); static int __init read_initrd(void) { @@ -62,7 +62,7 @@ __uml_setup("initrd=", uml_initrd_setup, " name of the file containing the image.\n\n" ); -int load_initrd(char *filename, void *buf, int size) +static int load_initrd(char *filename, void *buf, int size) { int fd, n; diff --git a/arch/um/kernel/irq.c b/arch/um/kernel/irq.c index 9e485c770308..71b8c947e5ef 100644 --- a/arch/um/kernel/irq.c +++ b/arch/um/kernel/irq.c @@ -258,6 +258,7 @@ void deactivate_fd(int fd, int irqnum) ignore_sigio_fd(fd); } +EXPORT_SYMBOL(deactivate_fd); /* * Called just before shutdown in order to provide a clean exec diff --git a/arch/um/kernel/ksyms.c b/arch/um/kernel/ksyms.c index 0ae0dfcfbffb..e17bea0b22e1 100644 --- a/arch/um/kernel/ksyms.c +++ b/arch/um/kernel/ksyms.c @@ -3,33 +3,11 @@ * Licensed under the GPL */ -#include "linux/module.h" -#include "linux/syscalls.h" -#include "asm/tlbflush.h" -#include "asm/uaccess.h" -#include "as-layout.h" -#include "kern_util.h" -#include "mem_user.h" +#include <linux/module.h> #include "os.h" -EXPORT_SYMBOL(uml_physmem); EXPORT_SYMBOL(set_signals); EXPORT_SYMBOL(get_signals); -EXPORT_SYMBOL(kernel_thread); -EXPORT_SYMBOL(sys_waitpid); -EXPORT_SYMBOL(flush_tlb_range); - -EXPORT_SYMBOL(high_physmem); -EXPORT_SYMBOL(empty_zero_page); -EXPORT_SYMBOL(handle_page_fault); -EXPORT_SYMBOL(find_iomem); - -EXPORT_SYMBOL(strnlen_user); -EXPORT_SYMBOL(strncpy_from_user); -EXPORT_SYMBOL(copy_to_user); -EXPORT_SYMBOL(copy_from_user); -EXPORT_SYMBOL(clear_user); -EXPORT_SYMBOL(uml_strdup); EXPORT_SYMBOL(os_stat_fd); EXPORT_SYMBOL(os_stat_file); @@ -57,24 +35,10 @@ EXPORT_SYMBOL(os_connect_socket); EXPORT_SYMBOL(os_accept_connection); EXPORT_SYMBOL(os_rcv_fd); EXPORT_SYMBOL(run_helper); -EXPORT_SYMBOL(start_thread); EXPORT_SYMBOL(os_major); EXPORT_SYMBOL(os_minor); EXPORT_SYMBOL(os_makedev); EXPORT_SYMBOL(add_sigio_fd); EXPORT_SYMBOL(ignore_sigio_fd); -EXPORT_SYMBOL(deactivate_fd); EXPORT_SYMBOL(sigio_broken); - -#ifdef CONFIG_SMP - -/* required for SMP */ - -extern void __write_lock_failed(rwlock_t *rw); -EXPORT_SYMBOL(__write_lock_failed); - -extern void __read_lock_failed(rwlock_t *rw); -EXPORT_SYMBOL(__read_lock_failed); - -#endif diff --git a/arch/um/kernel/mem.c b/arch/um/kernel/mem.c index 8137ccc9635b..ebb86b218445 100644 --- a/arch/um/kernel/mem.c +++ b/arch/um/kernel/mem.c @@ -4,6 +4,7 @@ */ #include <linux/stddef.h> +#include <linux/module.h> #include <linux/bootmem.h> #include <linux/highmem.h> #include <linux/mm.h> @@ -20,6 +21,7 @@ /* allocated in paging_init, zeroed in mem_init, and unchanged thereafter */ unsigned long *empty_zero_page = NULL; +EXPORT_SYMBOL(empty_zero_page); /* allocated in paging_init and unchanged thereafter */ static unsigned long *empty_bad_page = NULL; diff --git a/arch/um/kernel/physmem.c b/arch/um/kernel/physmem.c index a1a9090254c2..f116db15d402 100644 --- a/arch/um/kernel/physmem.c +++ b/arch/um/kernel/physmem.c @@ -3,20 +3,22 @@ * Licensed under the GPL */ -#include "linux/bootmem.h" -#include "linux/mm.h" -#include "linux/pfn.h" -#include "asm/page.h" -#include "as-layout.h" -#include "init.h" -#include "kern.h" -#include "mem_user.h" -#include "os.h" +#include <linux/module.h> +#include <linux/bootmem.h> +#include <linux/mm.h> +#include <linux/pfn.h> +#include <asm/page.h> +#include <as-layout.h> +#include <init.h> +#include <kern.h> +#include <mem_user.h> +#include <os.h> static int physmem_fd = -1; /* Changed during early boot */ unsigned long high_physmem; +EXPORT_SYMBOL(high_physmem); extern unsigned long long physmem_size; @@ -184,6 +186,7 @@ unsigned long find_iomem(char *driver, unsigned long *len_out) return 0; } +EXPORT_SYMBOL(find_iomem); static int setup_iomem(void) { diff --git a/arch/um/kernel/process.c b/arch/um/kernel/process.c index 21c1ae7c3d75..c5338351aecd 100644 --- a/arch/um/kernel/process.c +++ b/arch/um/kernel/process.c @@ -20,12 +20,12 @@ #include <linux/threads.h> #include <asm/current.h> #include <asm/pgtable.h> +#include <asm/mmu_context.h> #include <asm/uaccess.h> #include "as-layout.h" #include "kern_util.h" #include "os.h" #include "skas.h" -#include "tlb.h" /* * This is a per-cpu array. A processor only modifies its entry and it only @@ -78,6 +78,7 @@ int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags) ¤t->thread.regs, 0, NULL, NULL); return pid; } +EXPORT_SYMBOL(kernel_thread); static inline void set_current(struct task_struct *task) { @@ -286,6 +287,7 @@ char *uml_strdup(const char *string) { return kstrdup(string, GFP_KERNEL); } +EXPORT_SYMBOL(uml_strdup); int copy_to_user_proc(void __user *to, void *from, int size) { diff --git a/arch/um/kernel/signal.c b/arch/um/kernel/signal.c index b5c094c4ade4..e8b889d3bce7 100644 --- a/arch/um/kernel/signal.c +++ b/arch/um/kernel/signal.c @@ -11,7 +11,6 @@ #include <asm/unistd.h> #include "frame_kern.h" #include "kern_util.h" -#include <sysdep/sigcontext.h> EXPORT_SYMBOL(block_signals); EXPORT_SYMBOL(unblock_signals); diff --git a/arch/um/kernel/skas/clone.c b/arch/um/kernel/skas/clone.c index 2c8583c1a344..e1fd066a3525 100644 --- a/arch/um/kernel/skas/clone.c +++ b/arch/um/kernel/skas/clone.c @@ -8,7 +8,6 @@ #include <asm/unistd.h> #include <sys/time.h> #include "as-layout.h" -#include "kern_constants.h" #include "ptrace_user.h" #include "stub-data.h" #include "sysdep/stub.h" diff --git a/arch/um/kernel/skas/uaccess.c b/arch/um/kernel/skas/uaccess.c index 696634214dc6..9fefd924fb49 100644 --- a/arch/um/kernel/skas/uaccess.c +++ b/arch/um/kernel/skas/uaccess.c @@ -6,6 +6,7 @@ #include <linux/err.h> #include <linux/highmem.h> #include <linux/mm.h> +#include <linux/module.h> #include <linux/sched.h> #include <asm/current.h> #include <asm/page.h> @@ -149,6 +150,7 @@ int copy_from_user(void *to, const void __user *from, int n) buffer_op((unsigned long) from, n, 0, copy_chunk_from_user, &to): n; } +EXPORT_SYMBOL(copy_from_user); static int copy_chunk_to_user(unsigned long to, int len, void *arg) { @@ -170,6 +172,7 @@ int copy_to_user(void __user *to, const void *from, int n) buffer_op((unsigned long) to, n, 1, copy_chunk_to_user, &from) : n; } +EXPORT_SYMBOL(copy_to_user); static int strncpy_chunk_from_user(unsigned long from, int len, void *arg) { @@ -204,6 +207,7 @@ int strncpy_from_user(char *dst, const char __user *src, int count) return -EFAULT; return strnlen(dst, count); } +EXPORT_SYMBOL(strncpy_from_user); static int clear_chunk(unsigned long addr, int len, void *unused) { @@ -226,6 +230,7 @@ int clear_user(void __user *mem, int len) return access_ok(VERIFY_WRITE, mem, len) ? buffer_op((unsigned long) mem, len, 1, clear_chunk, NULL) : len; } +EXPORT_SYMBOL(clear_user); static int strnlen_chunk(unsigned long str, int len, void *arg) { @@ -251,3 +256,4 @@ int strnlen_user(const void __user *str, int len) return count + 1; return -EFAULT; } +EXPORT_SYMBOL(strnlen_user); diff --git a/arch/um/kernel/tlb.c b/arch/um/kernel/tlb.c index d175d0566af0..7f3d4d86431a 100644 --- a/arch/um/kernel/tlb.c +++ b/arch/um/kernel/tlb.c @@ -4,6 +4,7 @@ */ #include <linux/mm.h> +#include <linux/module.h> #include <linux/sched.h> #include <asm/pgtable.h> #include <asm/tlbflush.h> @@ -11,7 +12,6 @@ #include "mem_user.h" #include "os.h" #include "skas.h" -#include "tlb.h" struct host_vm_change { struct host_vm_op { @@ -287,7 +287,7 @@ void fix_range_common(struct mm_struct *mm, unsigned long start_addr, } } -int flush_tlb_kernel_range_common(unsigned long start, unsigned long end) +static int flush_tlb_kernel_range_common(unsigned long start, unsigned long end) { struct mm_struct *mm; pgd_t *pgd; @@ -499,6 +499,7 @@ void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, flush_tlb_kernel_range_common(start, end); else fix_range(vma->vm_mm, start, end, 0); } +EXPORT_SYMBOL(flush_tlb_range); void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start, unsigned long end) diff --git a/arch/um/kernel/trap.c b/arch/um/kernel/trap.c index 8c7b8823d1f0..dafc94715950 100644 --- a/arch/um/kernel/trap.c +++ b/arch/um/kernel/trap.c @@ -6,6 +6,7 @@ #include <linux/mm.h> #include <linux/sched.h> #include <linux/hardirq.h> +#include <linux/module.h> #include <asm/current.h> #include <asm/pgtable.h> #include <asm/tlbflush.h> @@ -14,7 +15,6 @@ #include "kern_util.h" #include "os.h" #include "skas.h" -#include "sysdep/sigcontext.h" /* * Note this is constrained to return 0, -EFAULT, -EACCESS, -ENOMEM by @@ -112,6 +112,7 @@ out_of_memory: pagefault_out_of_memory(); return 0; } +EXPORT_SYMBOL(handle_page_fault); static void show_segv_info(struct uml_pt_regs *regs) { diff --git a/arch/um/kernel/uaccess.c b/arch/um/kernel/uaccess.c deleted file mode 100644 index dd33f040c526..000000000000 --- a/arch/um/kernel/uaccess.c +++ /dev/null @@ -1,33 +0,0 @@ -/* - * Copyright (C) 2001 Chris Emerson (cemerson@chiark.greenend.org.uk) - * Copyright (C) 2001 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com) - * Licensed under the GPL - */ - -/* - * These are here rather than tt/uaccess.c because skas mode needs them in - * order to do SIGBUS recovery when a tmpfs mount runs out of room. - */ - -#include <linux/string.h> -#include "os.h" - -static void __do_copy(void *to, const void *from, int n) -{ - memcpy(to, from, n); -} - - -int __do_copy_to_user(void *to, const void *from, int n, - void **fault_addr, jmp_buf **fault_catcher) -{ - unsigned long fault; - int faulted; - - fault = __do_user_copy(to, from, n, fault_addr, fault_catcher, - __do_copy, &faulted); - if (!faulted) - return 0; - else - return n - (fault - (unsigned long) to); -} diff --git a/arch/um/kernel/um_arch.c b/arch/um/kernel/um_arch.c index 8d84250324b3..ba00eae45aad 100644 --- a/arch/um/kernel/um_arch.c +++ b/arch/um/kernel/um_arch.c @@ -102,6 +102,8 @@ const struct seq_operations cpuinfo_op = { /* Set in linux_main */ unsigned long uml_physmem; +EXPORT_SYMBOL(uml_physmem); + unsigned long uml_reserved; /* Also modified in mem_init */ unsigned long start_vm; unsigned long end_vm; diff --git a/arch/um/os-Linux/Makefile b/arch/um/os-Linux/Makefile index b33f4dfe7ae5..dd764101e488 100644 --- a/arch/um/os-Linux/Makefile +++ b/arch/um/os-Linux/Makefile @@ -4,14 +4,14 @@ # obj-y = aio.o execvp.o file.o helper.o irq.o main.o mem.o process.o \ - registers.o sigio.o signal.o start_up.o time.o tty.o uaccess.o \ - umid.o tls.o user_syms.o util.o drivers/ sys-$(SUBARCH)/ skas/ + registers.o sigio.o signal.o start_up.o time.o tty.o \ + umid.o user_syms.o util.o drivers/ skas/ obj-$(CONFIG_ARCH_REUSE_HOST_VSYSCALL_AREA) += elf_aux.o USER_OBJS := $(user-objs-y) aio.o elf_aux.o execvp.o file.o helper.o irq.o \ main.o mem.o process.o registers.o sigio.o signal.o start_up.o time.o \ - tty.o tls.o uaccess.o umid.o util.o + tty.o umid.o util.o CFLAGS_user_syms.o += -DSUBARCH_$(SUBARCH) diff --git a/arch/um/os-Linux/aio.c b/arch/um/os-Linux/aio.c index 57e3d46c989c..c5d039e1ff3b 100644 --- a/arch/um/os-Linux/aio.c +++ b/arch/um/os-Linux/aio.c @@ -11,10 +11,8 @@ #include <asm/unistd.h> #include "aio.h" #include "init.h" -#include "kern_constants.h" #include "kern_util.h" #include "os.h" -#include "user.h" struct aio_thread_req { enum aio_type type; diff --git a/arch/um/os-Linux/drivers/ethertap_user.c b/arch/um/os-Linux/drivers/ethertap_user.c index cc72cb2c1af6..db3d6481375a 100644 --- a/arch/um/os-Linux/drivers/ethertap_user.c +++ b/arch/um/os-Linux/drivers/ethertap_user.c @@ -13,11 +13,9 @@ #include <sys/socket.h> #include <sys/wait.h> #include "etap.h" -#include "kern_constants.h" #include "os.h" #include "net_user.h" #include "um_malloc.h" -#include "user.h" #define MAX_PACKET ETH_MAX_PACKET diff --git a/arch/um/os-Linux/drivers/tuntap_user.c b/arch/um/os-Linux/drivers/tuntap_user.c index 2448be03fd7a..a2aacffdd907 100644 --- a/arch/um/os-Linux/drivers/tuntap_user.c +++ b/arch/um/os-Linux/drivers/tuntap_user.c @@ -13,11 +13,9 @@ #include <sys/socket.h> #include <sys/wait.h> #include <sys/uio.h> -#include "kern_constants.h" #include "kern_util.h" #include "os.h" #include "tuntap.h" -#include "user.h" static int tuntap_user_init(void *data, void *dev) { diff --git a/arch/um/os-Linux/elf_aux.c b/arch/um/os-Linux/elf_aux.c index 953323799381..d895271ad6f7 100644 --- a/arch/um/os-Linux/elf_aux.c +++ b/arch/um/os-Linux/elf_aux.c @@ -12,7 +12,6 @@ #include "init.h" #include "elf_user.h" #include "mem_user.h" -#include <kern_constants.h> typedef Elf32_auxv_t elf_auxv_t; diff --git a/arch/um/os-Linux/file.c b/arch/um/os-Linux/file.c index 140e587bc0ad..b049a63bb74b 100644 --- a/arch/um/os-Linux/file.c +++ b/arch/um/os-Linux/file.c @@ -13,9 +13,7 @@ #include <sys/socket.h> #include <sys/stat.h> #include <sys/un.h> -#include "kern_constants.h" #include "os.h" -#include "user.h" static void copy_stat(struct uml_stat *dst, const struct stat64 *src) { diff --git a/arch/um/os-Linux/helper.c b/arch/um/os-Linux/helper.c index feff22d64672..cf26c4a9a43a 100644 --- a/arch/um/os-Linux/helper.c +++ b/arch/um/os-Linux/helper.c @@ -10,11 +10,9 @@ #include <linux/limits.h> #include <sys/socket.h> #include <sys/wait.h> -#include "kern_constants.h" #include "kern_util.h" #include "os.h" #include "um_malloc.h" -#include "user.h" struct helper_data { void (*pre_exec)(void*); diff --git a/arch/um/os-Linux/internal.h b/arch/um/os-Linux/internal.h new file mode 100644 index 000000000000..2c3c3ecd8c01 --- /dev/null +++ b/arch/um/os-Linux/internal.h @@ -0,0 +1 @@ +void alarm_handler(int, mcontext_t *); diff --git a/arch/um/os-Linux/irq.c b/arch/um/os-Linux/irq.c index 0348b975e81c..9a49908b576c 100644 --- a/arch/um/os-Linux/irq.c +++ b/arch/um/os-Linux/irq.c @@ -9,11 +9,8 @@ #include <signal.h> #include <string.h> #include "irq_user.h" -#include "kern_constants.h" #include "os.h" -#include "process.h" #include "um_malloc.h" -#include "user.h" /* * Locked by irq_lock in arch/um/kernel/irq.c. Changed by os_create_pollfd diff --git a/arch/um/os-Linux/main.c b/arch/um/os-Linux/main.c index 8471b817d94f..7a86dd516eb1 100644 --- a/arch/um/os-Linux/main.c +++ b/arch/um/os-Linux/main.c @@ -12,7 +12,6 @@ #include <sys/resource.h> #include "as-layout.h" #include "init.h" -#include "kern_constants.h" #include "kern_util.h" #include "os.h" #include "um_malloc.h" diff --git a/arch/um/os-Linux/mem.c b/arch/um/os-Linux/mem.c index 62878cf1d33f..8e421e1d6d36 100644 --- a/arch/um/os-Linux/mem.c +++ b/arch/um/os-Linux/mem.c @@ -14,9 +14,7 @@ #include <sys/mman.h> #include <sys/param.h> #include "init.h" -#include "kern_constants.h" #include "os.h" -#include "user.h" /* Modified by which_tmpdir, which is called during early boot */ static char *default_tmpdir = "/tmp"; diff --git a/arch/um/os-Linux/process.c b/arch/um/os-Linux/process.c index 0c45dc8efb05..307f173e7f82 100644 --- a/arch/um/os-Linux/process.c +++ b/arch/um/os-Linux/process.c @@ -13,12 +13,9 @@ #include <sys/wait.h> #include <asm/unistd.h> #include "init.h" -#include "kern_constants.h" #include "longjmp.h" #include "os.h" -#include "process.h" #include "skas_ptrace.h" -#include "user.h" #define ARBITRARY_ADDR -1 #define FAILURE_PID -1 @@ -237,21 +234,13 @@ out: void init_new_thread_signals(void) { - set_handler(SIGSEGV, (__sighandler_t) sig_handler, SA_ONSTACK, - SIGUSR1, SIGIO, SIGWINCH, SIGVTALRM, -1); - set_handler(SIGTRAP, (__sighandler_t) sig_handler, SA_ONSTACK, - SIGUSR1, SIGIO, SIGWINCH, SIGVTALRM, -1); - set_handler(SIGFPE, (__sighandler_t) sig_handler, SA_ONSTACK, - SIGUSR1, SIGIO, SIGWINCH, SIGVTALRM, -1); - set_handler(SIGILL, (__sighandler_t) sig_handler, SA_ONSTACK, - SIGUSR1, SIGIO, SIGWINCH, SIGVTALRM, -1); - set_handler(SIGBUS, (__sighandler_t) sig_handler, SA_ONSTACK, - SIGUSR1, SIGIO, SIGWINCH, SIGVTALRM, -1); + set_handler(SIGSEGV); + set_handler(SIGTRAP); + set_handler(SIGFPE); + set_handler(SIGILL); + set_handler(SIGBUS); signal(SIGHUP, SIG_IGN); - - set_handler(SIGIO, (__sighandler_t) sig_handler, - SA_ONSTACK | SA_RESTART, SIGUSR1, SIGIO, SIGWINCH, SIGALRM, - SIGVTALRM, -1); + set_handler(SIGIO); signal(SIGWINCH, SIG_IGN); signal(SIGTERM, SIG_DFL); } diff --git a/arch/um/os-Linux/sigio.c b/arch/um/os-Linux/sigio.c index 63d299df152b..3c161218c671 100644 --- a/arch/um/os-Linux/sigio.c +++ b/arch/um/os-Linux/sigio.c @@ -11,14 +11,11 @@ #include <sched.h> #include <signal.h> #include <string.h> -#include "kern_constants.h" #include "kern_util.h" #include "init.h" #include "os.h" -#include "process.h" #include "sigio.h" #include "um_malloc.h" -#include "user.h" /* * Protected by sigio_lock(), also used by sigio_cleanup, which is an diff --git a/arch/um/os-Linux/signal.c b/arch/um/os-Linux/signal.c index 6ae180703a63..2d22f1fcd8e2 100644 --- a/arch/um/os-Linux/signal.c +++ b/arch/um/os-Linux/signal.c @@ -12,13 +12,7 @@ #include "as-layout.h" #include "kern_util.h" #include "os.h" -#include "process.h" -#include "sysdep/barrier.h" -#include "sysdep/sigcontext.h" -#include "user.h" - -/* Copied from linux/compiler-gcc.h since we can't include it directly */ -#define barrier() __asm__ __volatile__("": : :"memory") +#include "sysdep/mcontext.h" void (*sig_info[NSIG])(int, struct uml_pt_regs *) = { [SIGTRAP] = relay_signal, @@ -30,7 +24,7 @@ void (*sig_info[NSIG])(int, struct uml_pt_regs *) = { [SIGIO] = sigio_handler, [SIGVTALRM] = timer_handler }; -static void sig_handler_common(int sig, struct sigcontext *sc) +static void sig_handler_common(int sig, mcontext_t *mc) { struct uml_pt_regs r; int save_errno = errno; @@ -38,8 +32,8 @@ static void sig_handler_common(int sig, struct sigcontext *sc) r.is_user = 0; if (sig == SIGSEGV) { /* For segfaults, we want the data from the sigcontext. */ - copy_sc(&r, sc); - GET_FAULTINFO_FROM_SC(r.faultinfo, sc); + get_regs_from_mc(&r, mc); + GET_FAULTINFO_FROM_MC(r.faultinfo, mc); } /* enable signals if sig isn't IRQ signal */ @@ -66,7 +60,7 @@ static void sig_handler_common(int sig, struct sigcontext *sc) static int signals_enabled; static unsigned int signals_pending; -void sig_handler(int sig, struct sigcontext *sc) +void sig_handler(int sig, mcontext_t *mc) { int enabled; @@ -78,23 +72,23 @@ void sig_handler(int sig, struct sigcontext *sc) block_signals(); - sig_handler_common(sig, sc); + sig_handler_common(sig, mc); set_signals(enabled); } -static void real_alarm_handler(struct sigcontext *sc) +static void real_alarm_handler(mcontext_t *mc) { struct uml_pt_regs regs; - if (sc != NULL) - copy_sc(®s, sc); + if (mc != NULL) + get_regs_from_mc(®s, mc); regs.is_user = 0; unblock_signals(); timer_handler(SIGVTALRM, ®s); } -void alarm_handler(int sig, struct sigcontext *sc) +void alarm_handler(int sig, mcontext_t *mc) { int enabled; @@ -106,14 +100,13 @@ void alarm_handler(int sig, struct sigcontext *sc) block_signals(); - real_alarm_handler(sc); + real_alarm_handler(mc); set_signals(enabled); } void timer_init(void) { - set_handler(SIGVTALRM, (__sighandler_t) alarm_handler, - SA_ONSTACK | SA_RESTART, SIGUSR1, SIGIO, SIGWINCH, -1); + set_handler(SIGVTALRM); } void set_sigstack(void *sig_stack, int size) @@ -126,10 +119,23 @@ void set_sigstack(void *sig_stack, int size) panic("enabling signal stack failed, errno = %d\n", errno); } -static void (*handlers[_NSIG])(int sig, struct sigcontext *sc); +static void (*handlers[_NSIG])(int sig, mcontext_t *mc) = { + [SIGSEGV] = sig_handler, + [SIGBUS] = sig_handler, + [SIGILL] = sig_handler, + [SIGFPE] = sig_handler, + [SIGTRAP] = sig_handler, + + [SIGIO] = sig_handler, + [SIGWINCH] = sig_handler, + [SIGVTALRM] = alarm_handler +}; + -void handle_signal(int sig, struct sigcontext *sc) +static void hard_handler(int sig, siginfo_t *info, void *p) { + struct ucontext *uc = p; + mcontext_t *mc = &uc->uc_mcontext; unsigned long pending = 1UL << sig; do { @@ -155,7 +161,7 @@ void handle_signal(int sig, struct sigcontext *sc) while ((sig = ffs(pending)) != 0){ sig--; pending &= ~(1 << sig); - (*handlers[sig])(sig, sc); + (*handlers[sig])(sig, mc); } /* @@ -169,28 +175,26 @@ void handle_signal(int sig, struct sigcontext *sc) } while (pending); } -extern void hard_handler(int sig); - -void set_handler(int sig, void (*handler)(int), int flags, ...) +void set_handler(int sig) { struct sigaction action; - va_list ap; + int flags = SA_SIGINFO | SA_ONSTACK; sigset_t sig_mask; - int mask; - handlers[sig] = (void (*)(int, struct sigcontext *)) handler; - action.sa_handler = hard_handler; + action.sa_sigaction = hard_handler; + /* block irq ones */ sigemptyset(&action.sa_mask); - - va_start(ap, flags); - while ((mask = va_arg(ap, int)) != -1) - sigaddset(&action.sa_mask, mask); - va_end(ap); + sigaddset(&action.sa_mask, SIGVTALRM); + sigaddset(&action.sa_mask, SIGIO); + sigaddset(&action.sa_mask, SIGWINCH); if (sig == SIGSEGV) flags |= SA_NODEFER; + if (sigismember(&action.sa_mask, sig)) + flags |= SA_RESTART; /* if it's an irq signal */ + action.sa_flags = flags; action.sa_restorer = NULL; if (sigaction(sig, &action, NULL) < 0) diff --git a/arch/um/os-Linux/skas/mem.c b/arch/um/os-Linux/skas/mem.c index e771398be5f3..c0afff7af4bd 100644 --- a/arch/um/os-Linux/skas/mem.c +++ b/arch/um/os-Linux/skas/mem.c @@ -9,7 +9,6 @@ #include <string.h> #include <sys/mman.h> #include "init.h" -#include "kern_constants.h" #include "as-layout.h" #include "mm_id.h" #include "os.h" @@ -17,7 +16,6 @@ #include "ptrace_user.h" #include "registers.h" #include "skas.h" -#include "user.h" #include "sysdep/ptrace.h" #include "sysdep/stub.h" diff --git a/arch/um/os-Linux/skas/process.c b/arch/um/os-Linux/skas/process.c index dee0e8cf8ad0..cd65727854eb 100644 --- a/arch/um/os-Linux/skas/process.c +++ b/arch/um/os-Linux/skas/process.c @@ -9,31 +9,23 @@ #include <errno.h> #include <string.h> #include <sys/mman.h> -#include <sys/ptrace.h> #include <sys/wait.h> #include <asm/unistd.h> #include "as-layout.h" -#include "chan_user.h" -#include "kern_constants.h" +#include "init.h" #include "kern_util.h" #include "mem.h" #include "os.h" -#include "process.h" #include "proc_mm.h" #include "ptrace_user.h" #include "registers.h" #include "skas.h" #include "skas_ptrace.h" -#include "user.h" #include "sysdep/stub.h" int is_skas_winch(int pid, int fd, void *data) { - if (pid != getpgrp()) - return 0; - - register_winch_irq(-1, fd, -1, data, 0); - return 1; + return pid == getpgrp(); } static int ptrace_dump_regs(int pid) @@ -169,7 +161,7 @@ static void handle_trap(int pid, struct uml_pt_regs *regs, if (!local_using_sysemu) { - err = ptrace(PTRACE_POKEUSR, pid, PT_SYSCALL_NR_OFFSET, + err = ptrace(PTRACE_POKEUSER, pid, PT_SYSCALL_NR_OFFSET, __NR_getpid); if (err < 0) { printk(UM_KERN_ERR "handle_trap - nullifying syscall " @@ -257,8 +249,8 @@ static int userspace_tramp(void *stack) set_sigstack((void *) STUB_DATA, UM_KERN_PAGE_SIZE); sigemptyset(&sa.sa_mask); - sa.sa_flags = SA_ONSTACK | SA_NODEFER; - sa.sa_handler = (void *) v; + sa.sa_flags = SA_ONSTACK | SA_NODEFER | SA_SIGINFO; + sa.sa_sigaction = (void *) v; sa.sa_restorer = NULL; if (sigaction(SIGSEGV, &sa, NULL) < 0) { printk(UM_KERN_ERR "userspace_tramp - setting SIGSEGV " @@ -661,8 +653,7 @@ int start_idle_thread(void *stack, jmp_buf *switch_buf) { int n; - set_handler(SIGWINCH, (__sighandler_t) sig_handler, - SA_ONSTACK | SA_RESTART, SIGUSR1, SIGIO, SIGVTALRM, -1); + set_handler(SIGWINCH); /* * Can't use UML_SETJMP or UML_LONGJMP here because they save diff --git a/arch/um/os-Linux/start_up.c b/arch/um/os-Linux/start_up.c index 02ee9adff54a..425162e22af5 100644 --- a/arch/um/os-Linux/start_up.c +++ b/arch/um/os-Linux/start_up.c @@ -13,12 +13,10 @@ #include <signal.h> #include <string.h> #include <sys/mman.h> -#include <sys/ptrace.h> #include <sys/stat.h> #include <sys/wait.h> #include <asm/unistd.h> #include "init.h" -#include "kern_constants.h" #include "os.h" #include "mem_user.h" #include "ptrace_user.h" @@ -225,7 +223,7 @@ static void __init check_sysemu(void) goto fail; } - n = ptrace(PTRACE_POKEUSR, pid, PT_SYSCALL_RET_OFFSET, os_getpid()); + n = ptrace(PTRACE_POKEUSER, pid, PT_SYSCALL_RET_OFFSET, os_getpid()); if (n < 0) { non_fatal("check_sysemu : failed to modify system call " "return"); @@ -261,7 +259,7 @@ static void __init check_sysemu(void) "doesn't singlestep"); goto fail; } - n = ptrace(PTRACE_POKEUSR, pid, PT_SYSCALL_RET_OFFSET, + n = ptrace(PTRACE_POKEUSER, pid, PT_SYSCALL_RET_OFFSET, os_getpid()); if (n < 0) fatal_perror("check_sysemu : failed to modify " @@ -317,10 +315,10 @@ static void __init check_ptrace(void) fatal("check_ptrace : expected (SIGTRAP|0x80), " "got status = %d", status); - syscall = ptrace(PTRACE_PEEKUSR, pid, PT_SYSCALL_NR_OFFSET, + syscall = ptrace(PTRACE_PEEKUSER, pid, PT_SYSCALL_NR_OFFSET, 0); if (syscall == __NR_getpid) { - n = ptrace(PTRACE_POKEUSR, pid, PT_SYSCALL_NR_OFFSET, + n = ptrace(PTRACE_POKEUSER, pid, PT_SYSCALL_NR_OFFSET, __NR_getppid); if (n < 0) fatal_perror("check_ptrace : failed to modify " diff --git a/arch/um/os-Linux/sys-i386/signal.c b/arch/um/os-Linux/sys-i386/signal.c deleted file mode 100644 index f311609f93da..000000000000 --- a/arch/um/os-Linux/sys-i386/signal.c +++ /dev/null @@ -1,13 +0,0 @@ -/* - * Copyright (C) 2006 Jeff Dike (jdike@{addtoit,linux.intel}.com) - * Licensed under the GPL - */ - -#include <signal.h> - -extern void handle_signal(int sig, struct sigcontext *sc); - -void hard_handler(int sig) -{ - handle_signal(sig, (struct sigcontext *) (&sig + 1)); -} diff --git a/arch/um/os-Linux/sys-x86_64/Makefile b/arch/um/os-Linux/sys-x86_64/Makefile deleted file mode 100644 index a44a47f8f57b..000000000000 --- a/arch/um/os-Linux/sys-x86_64/Makefile +++ /dev/null @@ -1,10 +0,0 @@ -# -# Copyright (C) 2000 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com) -# Licensed under the GPL -# - -obj-y = registers.o prctl.o signal.o task_size.o - -USER_OBJS := $(obj-y) - -include arch/um/scripts/Makefile.rules diff --git a/arch/um/os-Linux/sys-x86_64/registers.c b/arch/um/os-Linux/sys-x86_64/registers.c deleted file mode 100644 index 594d97ad02b3..000000000000 --- a/arch/um/os-Linux/sys-x86_64/registers.c +++ /dev/null @@ -1,52 +0,0 @@ -/* - * Copyright (C) 2006 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com) - * Licensed under the GPL - */ - -#include <errno.h> -#include <sys/ptrace.h> -#define __FRAME_OFFSETS -#include <asm/ptrace.h> -#include "kern_constants.h" -#include "longjmp.h" -#include "user.h" - -int save_fp_registers(int pid, unsigned long *fp_regs) -{ - if (ptrace(PTRACE_GETFPREGS, pid, 0, fp_regs) < 0) - return -errno; - return 0; -} - -int restore_fp_registers(int pid, unsigned long *fp_regs) -{ - if (ptrace(PTRACE_SETFPREGS, pid, 0, fp_regs) < 0) - return -errno; - return 0; -} - -unsigned long get_thread_reg(int reg, jmp_buf *buf) -{ - switch (reg) { - case RIP: - return buf[0]->__rip; - case RSP: - return buf[0]->__rsp; - case RBP: - return buf[0]->__rbp; - default: - printk(UM_KERN_ERR "get_thread_regs - unknown register %d\n", - reg); - return 0; - } -} - -int get_fp_registers(int pid, unsigned long *regs) -{ - return save_fp_registers(pid, regs); -} - -int put_fp_registers(int pid, unsigned long *regs) -{ - return restore_fp_registers(pid, regs); -} diff --git a/arch/um/os-Linux/sys-x86_64/signal.c b/arch/um/os-Linux/sys-x86_64/signal.c deleted file mode 100644 index 82a388822cd3..000000000000 --- a/arch/um/os-Linux/sys-x86_64/signal.c +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Copyright (C) 2006 Jeff Dike (jdike@{addtoit,linux.intel}.com) - * Licensed under the GPL - */ - -#include <signal.h> - -extern void handle_signal(int sig, struct sigcontext *sc); - -void hard_handler(int sig) -{ - struct ucontext *uc; - asm("movq %%rdx, %0" : "=r" (uc)); - - handle_signal(sig, (struct sigcontext *) &uc->uc_mcontext); -} diff --git a/arch/um/os-Linux/sys-x86_64/task_size.c b/arch/um/os-Linux/sys-x86_64/task_size.c deleted file mode 100644 index 26a0dd1f349c..000000000000 --- a/arch/um/os-Linux/sys-x86_64/task_size.c +++ /dev/null @@ -1,5 +0,0 @@ -unsigned long os_get_top_address(unsigned long shift) -{ - /* The old value of CONFIG_TOP_ADDR */ - return 0x7fc0000000; -} diff --git a/arch/um/os-Linux/time.c b/arch/um/os-Linux/time.c index 6e3359d6a839..910499d76a67 100644 --- a/arch/um/os-Linux/time.c +++ b/arch/um/os-Linux/time.c @@ -8,11 +8,9 @@ #include <signal.h> #include <time.h> #include <sys/time.h> -#include "kern_constants.h" #include "kern_util.h" #include "os.h" -#include "process.h" -#include "user.h" +#include "internal.h" int set_interval(void) { diff --git a/arch/um/os-Linux/tls.c b/arch/um/os-Linux/tls.c deleted file mode 100644 index 73277801ef14..000000000000 --- a/arch/um/os-Linux/tls.c +++ /dev/null @@ -1,35 +0,0 @@ -#include <errno.h> -#include <sys/ptrace.h> -#include "sysdep/tls.h" - -/* TLS support - we basically rely on the host's one.*/ - -#ifndef PTRACE_GET_THREAD_AREA -#define PTRACE_GET_THREAD_AREA 25 -#endif - -#ifndef PTRACE_SET_THREAD_AREA -#define PTRACE_SET_THREAD_AREA 26 -#endif - -int os_set_thread_area(user_desc_t *info, int pid) -{ - int ret; - - ret = ptrace(PTRACE_SET_THREAD_AREA, pid, info->entry_number, - (unsigned long) info); - if (ret < 0) - ret = -errno; - return ret; -} - -int os_get_thread_area(user_desc_t *info, int pid) -{ - int ret; - - ret = ptrace(PTRACE_GET_THREAD_AREA, pid, info->entry_number, - (unsigned long) info); - if (ret < 0) - ret = -errno; - return ret; -} diff --git a/arch/um/os-Linux/tty.c b/arch/um/os-Linux/tty.c index b09ff66a77ee..dd12b99dcb59 100644 --- a/arch/um/os-Linux/tty.c +++ b/arch/um/os-Linux/tty.c @@ -7,10 +7,8 @@ #include <unistd.h> #include <errno.h> #include <fcntl.h> -#include "kern_constants.h" #include "kern_util.h" #include "os.h" -#include "user.h" struct grantpt_info { int fd; diff --git a/arch/um/os-Linux/uaccess.c b/arch/um/os-Linux/uaccess.c deleted file mode 100644 index 087ed74ffca5..000000000000 --- a/arch/um/os-Linux/uaccess.c +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Copyright (C) 2001 Chris Emerson (cemerson@chiark.greenend.org.uk) - * Copyright (C) 2001 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com) - * Licensed under the GPL - */ - -#include <stddef.h> -#include "longjmp.h" - -unsigned long __do_user_copy(void *to, const void *from, int n, - void **fault_addr, jmp_buf **fault_catcher, - void (*op)(void *to, const void *from, - int n), int *faulted_out) -{ - unsigned long *faddrp = (unsigned long *) fault_addr, ret; - - jmp_buf jbuf; - *fault_catcher = &jbuf; - if (UML_SETJMP(&jbuf) == 0) { - (*op)(to, from, n); - ret = 0; - *faulted_out = 0; - } - else { - ret = *faddrp; - *faulted_out = 1; - } - *fault_addr = NULL; - *fault_catcher = NULL; - return ret; -} - diff --git a/arch/um/os-Linux/umid.c b/arch/um/os-Linux/umid.c index a27defb81884..4832eb519f8d 100644 --- a/arch/um/os-Linux/umid.c +++ b/arch/um/os-Linux/umid.c @@ -13,9 +13,7 @@ #include <unistd.h> #include <sys/stat.h> #include "init.h" -#include "kern_constants.h" #include "os.h" -#include "user.h" #define UML_DIR "~/.uml/" diff --git a/arch/um/os-Linux/util.c b/arch/um/os-Linux/util.c index 5803b1887672..9e3b43bb84c9 100644 --- a/arch/um/os-Linux/util.c +++ b/arch/um/os-Linux/util.c @@ -13,9 +13,7 @@ #include <wait.h> #include <sys/mman.h> #include <sys/utsname.h> -#include "kern_constants.h" #include "os.h" -#include "user.h" void stack_protections(unsigned long address) { diff --git a/arch/um/scripts/Makefile.rules b/arch/um/scripts/Makefile.rules index 61107b68e05b..2eb2843b0634 100644 --- a/arch/um/scripts/Makefile.rules +++ b/arch/um/scripts/Makefile.rules @@ -8,7 +8,7 @@ USER_OBJS += $(filter %_user.o,$(obj-y) $(obj-m) $(USER_SINGLE_OBJS)) USER_OBJS := $(foreach file,$(USER_OBJS),$(obj)/$(file)) $(USER_OBJS:.o=.%): \ - c_flags = -Wp,-MD,$(depfile) $(USER_CFLAGS) $(CFLAGS_$(basetarget).o) + c_flags = -Wp,-MD,$(depfile) $(USER_CFLAGS) -include user.h $(CFLAGS_$(basetarget).o) $(USER_OBJS) : CHECKFLAGS := -D__linux__ -Dlinux -D__STDC__ \ -Dunix -D__unix__ -D__$(SUBARCH)__ $(CF) @@ -25,8 +25,3 @@ $(UNPROFILE_OBJS) : CHECKFLAGS := -D__linux__ -Dlinux -D__STDC__ \ define unprofile $(patsubst -pg,,$(patsubst -fprofile-arcs -ftest-coverage,,$(1))) endef - -ifdef subarch-obj-y -obj-y += subarch.o -subarch-y = $(addprefix ../../$(HEADER_ARCH)/,$(subarch-obj-y)) -endif diff --git a/arch/um/sys-i386/Makefile b/arch/um/sys-i386/Makefile deleted file mode 100644 index 3923cfb87649..000000000000 --- a/arch/um/sys-i386/Makefile +++ /dev/null @@ -1,24 +0,0 @@ -# -# Copyright (C) 2002 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com) -# - -obj-y = bug.o bugs.o checksum.o delay.o fault.o ksyms.o ldt.o ptrace.o \ - ptrace_user.o setjmp.o signal.o stub.o stub_segv.o syscalls.o sysrq.o \ - sys_call_table.o tls.o atomic64_cx8_32.o mem.o - -obj-$(CONFIG_BINFMT_ELF) += elfcore.o - -subarch-obj-y = lib/string_32.o -subarch-obj-$(CONFIG_RWSEM_XCHGADD_ALGORITHM) += lib/rwsem.o -subarch-obj-$(CONFIG_HIGHMEM) += mm/highmem_32.o -subarch-obj-$(CONFIG_MODULES) += kernel/module.o - -USER_OBJS := bugs.o ptrace_user.o fault.o - -USER_OBJS += user-offsets.s -extra-y += user-offsets.s - -UNPROFILE_OBJS := stub_segv.o -CFLAGS_stub_segv.o := $(CFLAGS_NO_HARDENING) - -include arch/um/scripts/Makefile.rules diff --git a/arch/um/sys-i386/asm/elf.h b/arch/um/sys-i386/asm/elf.h deleted file mode 100644 index 42305551d204..000000000000 --- a/arch/um/sys-i386/asm/elf.h +++ /dev/null @@ -1,125 +0,0 @@ -/* - * Copyright (C) 2000 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com) - * Licensed under the GPL - */ -#ifndef __UM_ELF_I386_H -#define __UM_ELF_I386_H - -#include <asm/user.h> -#include "skas.h" - -#define R_386_NONE 0 -#define R_386_32 1 -#define R_386_PC32 2 -#define R_386_GOT32 3 -#define R_386_PLT32 4 -#define R_386_COPY 5 -#define R_386_GLOB_DAT 6 -#define R_386_JMP_SLOT 7 -#define R_386_RELATIVE 8 -#define R_386_GOTOFF 9 -#define R_386_GOTPC 10 -#define R_386_NUM 11 - -typedef unsigned long elf_greg_t; - -#define ELF_NGREG (sizeof (struct user_regs_struct) / sizeof(elf_greg_t)) -typedef elf_greg_t elf_gregset_t[ELF_NGREG]; - -typedef struct user_i387_struct elf_fpregset_t; - -/* - * This is used to ensure we don't load something for the wrong architecture. - */ -#define elf_check_arch(x) \ - (((x)->e_machine == EM_386) || ((x)->e_machine == EM_486)) - -#define ELF_CLASS ELFCLASS32 -#define ELF_DATA ELFDATA2LSB -#define ELF_ARCH EM_386 - -#define ELF_PLAT_INIT(regs, load_addr) do { \ - PT_REGS_EBX(regs) = 0; \ - PT_REGS_ECX(regs) = 0; \ - PT_REGS_EDX(regs) = 0; \ - PT_REGS_ESI(regs) = 0; \ - PT_REGS_EDI(regs) = 0; \ - PT_REGS_EBP(regs) = 0; \ - PT_REGS_EAX(regs) = 0; \ -} while (0) - -#define ELF_EXEC_PAGESIZE 4096 - -#define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3) - -/* Shamelessly stolen from include/asm-i386/elf.h */ - -#define ELF_CORE_COPY_REGS(pr_reg, regs) do { \ - pr_reg[0] = PT_REGS_EBX(regs); \ - pr_reg[1] = PT_REGS_ECX(regs); \ - pr_reg[2] = PT_REGS_EDX(regs); \ - pr_reg[3] = PT_REGS_ESI(regs); \ - pr_reg[4] = PT_REGS_EDI(regs); \ - pr_reg[5] = PT_REGS_EBP(regs); \ - pr_reg[6] = PT_REGS_EAX(regs); \ - pr_reg[7] = PT_REGS_DS(regs); \ - pr_reg[8] = PT_REGS_ES(regs); \ - /* fake once used fs and gs selectors? */ \ - pr_reg[9] = PT_REGS_DS(regs); \ - pr_reg[10] = PT_REGS_DS(regs); \ - pr_reg[11] = PT_REGS_SYSCALL_NR(regs); \ - pr_reg[12] = PT_REGS_IP(regs); \ - pr_reg[13] = PT_REGS_CS(regs); \ - pr_reg[14] = PT_REGS_EFLAGS(regs); \ - pr_reg[15] = PT_REGS_SP(regs); \ - pr_reg[16] = PT_REGS_SS(regs); \ -} while (0); - -#define task_pt_regs(t) (&(t)->thread.regs) - -struct task_struct; - -extern int elf_core_copy_fpregs(struct task_struct *t, elf_fpregset_t *fpu); - -#define ELF_CORE_COPY_FPREGS(t, fpu) elf_core_copy_fpregs(t, fpu) - -extern long elf_aux_hwcap; -#define ELF_HWCAP (elf_aux_hwcap) - -extern char * elf_aux_platform; -#define ELF_PLATFORM (elf_aux_platform) - -#define SET_PERSONALITY(ex) do { } while (0) - -extern unsigned long vsyscall_ehdr; -extern unsigned long vsyscall_end; -extern unsigned long __kernel_vsyscall; - -#define VSYSCALL_BASE vsyscall_ehdr -#define VSYSCALL_END vsyscall_end - -/* - * This is the range that is readable by user mode, and things - * acting like user mode such as get_user_pages. - */ -#define FIXADDR_USER_START VSYSCALL_BASE -#define FIXADDR_USER_END VSYSCALL_END - -#define __HAVE_ARCH_GATE_AREA 1 - -/* - * Architecture-neutral AT_ values in 0-17, leave some room - * for more of them, start the x86-specific ones at 32. - */ -#define AT_SYSINFO 32 -#define AT_SYSINFO_EHDR 33 - -#define ARCH_DLINFO \ -do { \ - if ( vsyscall_ehdr ) { \ - NEW_AUX_ENT(AT_SYSINFO, __kernel_vsyscall); \ - NEW_AUX_ENT(AT_SYSINFO_EHDR, vsyscall_ehdr); \ - } \ -} while (0) - -#endif diff --git a/arch/um/sys-i386/asm/module.h b/arch/um/sys-i386/asm/module.h deleted file mode 100644 index 5ead4a0b2e35..000000000000 --- a/arch/um/sys-i386/asm/module.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef __UM_MODULE_I386_H -#define __UM_MODULE_I386_H - -/* UML is simple */ -struct mod_arch_specific -{ -}; - -#define Elf_Shdr Elf32_Shdr -#define Elf_Sym Elf32_Sym -#define Elf_Ehdr Elf32_Ehdr - -#endif diff --git a/arch/um/sys-i386/atomic64_cx8_32.S b/arch/um/sys-i386/atomic64_cx8_32.S deleted file mode 100644 index 1e901d3d4a95..000000000000 --- a/arch/um/sys-i386/atomic64_cx8_32.S +++ /dev/null @@ -1,225 +0,0 @@ -/* - * atomic64_t for 586+ - * - * Copied from arch/x86/lib/atomic64_cx8_32.S - * - * Copyright © 2010 Luca Barbieri - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - */ - -#include <linux/linkage.h> -#include <asm/alternative-asm.h> -#include <asm/dwarf2.h> - -.macro SAVE reg - pushl_cfi %\reg - CFI_REL_OFFSET \reg, 0 -.endm - -.macro RESTORE reg - popl_cfi %\reg - CFI_RESTORE \reg -.endm - -.macro read64 reg - movl %ebx, %eax - movl %ecx, %edx -/* we need LOCK_PREFIX since otherwise cmpxchg8b always does the write */ - LOCK_PREFIX - cmpxchg8b (\reg) -.endm - -ENTRY(atomic64_read_cx8) - CFI_STARTPROC - - read64 %ecx - ret - CFI_ENDPROC -ENDPROC(atomic64_read_cx8) - -ENTRY(atomic64_set_cx8) - CFI_STARTPROC - -1: -/* we don't need LOCK_PREFIX since aligned 64-bit writes - * are atomic on 586 and newer */ - cmpxchg8b (%esi) - jne 1b - - ret - CFI_ENDPROC -ENDPROC(atomic64_set_cx8) - -ENTRY(atomic64_xchg_cx8) - CFI_STARTPROC - - movl %ebx, %eax - movl %ecx, %edx -1: - LOCK_PREFIX - cmpxchg8b (%esi) - jne 1b - - ret - CFI_ENDPROC -ENDPROC(atomic64_xchg_cx8) - -.macro addsub_return func ins insc -ENTRY(atomic64_\func\()_return_cx8) - CFI_STARTPROC - SAVE ebp - SAVE ebx - SAVE esi - SAVE edi - - movl %eax, %esi - movl %edx, %edi - movl %ecx, %ebp - - read64 %ebp -1: - movl %eax, %ebx - movl %edx, %ecx - \ins\()l %esi, %ebx - \insc\()l %edi, %ecx - LOCK_PREFIX - cmpxchg8b (%ebp) - jne 1b - -10: - movl %ebx, %eax - movl %ecx, %edx - RESTORE edi - RESTORE esi - RESTORE ebx - RESTORE ebp - ret - CFI_ENDPROC -ENDPROC(atomic64_\func\()_return_cx8) -.endm - -addsub_return add add adc -addsub_return sub sub sbb - -.macro incdec_return func ins insc -ENTRY(atomic64_\func\()_return_cx8) - CFI_STARTPROC - SAVE ebx - - read64 %esi -1: - movl %eax, %ebx - movl %edx, %ecx - \ins\()l $1, %ebx - \insc\()l $0, %ecx - LOCK_PREFIX - cmpxchg8b (%esi) - jne 1b - -10: - movl %ebx, %eax - movl %ecx, %edx - RESTORE ebx - ret - CFI_ENDPROC -ENDPROC(atomic64_\func\()_return_cx8) -.endm - -incdec_return inc add adc -incdec_return dec sub sbb - -ENTRY(atomic64_dec_if_positive_cx8) - CFI_STARTPROC - SAVE ebx - - read64 %esi -1: - movl %eax, %ebx - movl %edx, %ecx - subl $1, %ebx - sbb $0, %ecx - js 2f - LOCK_PREFIX - cmpxchg8b (%esi) - jne 1b - -2: - movl %ebx, %eax - movl %ecx, %edx - RESTORE ebx - ret - CFI_ENDPROC -ENDPROC(atomic64_dec_if_positive_cx8) - -ENTRY(atomic64_add_unless_cx8) - CFI_STARTPROC - SAVE ebp - SAVE ebx -/* these just push these two parameters on the stack */ - SAVE edi - SAVE esi - - movl %ecx, %ebp - movl %eax, %esi - movl %edx, %edi - - read64 %ebp -1: - cmpl %eax, 0(%esp) - je 4f -2: - movl %eax, %ebx - movl %edx, %ecx - addl %esi, %ebx - adcl %edi, %ecx - LOCK_PREFIX - cmpxchg8b (%ebp) - jne 1b - - movl $1, %eax -3: - addl $8, %esp - CFI_ADJUST_CFA_OFFSET -8 - RESTORE ebx - RESTORE ebp - ret -4: - cmpl %edx, 4(%esp) - jne 2b - xorl %eax, %eax - jmp 3b - CFI_ENDPROC -ENDPROC(atomic64_add_unless_cx8) - -ENTRY(atomic64_inc_not_zero_cx8) - CFI_STARTPROC - SAVE ebx - - read64 %esi -1: - testl %eax, %eax - je 4f -2: - movl %eax, %ebx - movl %edx, %ecx - addl $1, %ebx - adcl $0, %ecx - LOCK_PREFIX - cmpxchg8b (%esi) - jne 1b - - movl $1, %eax -3: - RESTORE ebx - ret -4: - testl %edx, %edx - jne 2b - jmp 3b - CFI_ENDPROC -ENDPROC(atomic64_inc_not_zero_cx8) diff --git a/arch/um/sys-i386/bug.c b/arch/um/sys-i386/bug.c deleted file mode 100644 index 8d4f273f1219..000000000000 --- a/arch/um/sys-i386/bug.c +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Copyright (C) 2006 Jeff Dike (jdike@addtoit.com) - * Licensed under the GPL V2 - */ - -#include <linux/uaccess.h> -#include <asm/errno.h> - -/* Mostly copied from i386/x86_86 - eliminated the eip < PAGE_OFFSET because - * that's not relevant in skas mode. - */ - -int is_valid_bugaddr(unsigned long eip) -{ - unsigned short ud2; - - if (probe_kernel_address((unsigned short __user *)eip, ud2)) - return 0; - - return ud2 == 0x0b0f; -} diff --git a/arch/um/sys-i386/ksyms.c b/arch/um/sys-i386/ksyms.c deleted file mode 100644 index bfbefd30db8f..000000000000 --- a/arch/um/sys-i386/ksyms.c +++ /dev/null @@ -1,5 +0,0 @@ -#include "linux/module.h" -#include "asm/checksum.h" - -/* Networking helper routines. */ -EXPORT_SYMBOL(csum_partial); diff --git a/arch/um/sys-i386/shared/sysdep/barrier.h b/arch/um/sys-i386/shared/sysdep/barrier.h deleted file mode 100644 index b58d52c5b2f4..000000000000 --- a/arch/um/sys-i386/shared/sysdep/barrier.h +++ /dev/null @@ -1,9 +0,0 @@ -#ifndef __SYSDEP_I386_BARRIER_H -#define __SYSDEP_I386_BARRIER_H - -/* Copied from include/asm-i386 for use by userspace. i386 has the option - * of using mfence, but I'm just using this, which works everywhere, for now. - */ -#define mb() asm volatile("lock; addl $0,0(%esp)") - -#endif diff --git a/arch/um/sys-i386/shared/sysdep/host_ldt.h b/arch/um/sys-i386/shared/sysdep/host_ldt.h deleted file mode 100644 index 0953cc4df652..000000000000 --- a/arch/um/sys-i386/shared/sysdep/host_ldt.h +++ /dev/null @@ -1,34 +0,0 @@ -#ifndef __ASM_HOST_LDT_I386_H -#define __ASM_HOST_LDT_I386_H - -#include <asm/ldt.h> - -/* - * macros stolen from include/asm-i386/desc.h - */ -#define LDT_entry_a(info) \ - ((((info)->base_addr & 0x0000ffff) << 16) | ((info)->limit & 0x0ffff)) - -#define LDT_entry_b(info) \ - (((info)->base_addr & 0xff000000) | \ - (((info)->base_addr & 0x00ff0000) >> 16) | \ - ((info)->limit & 0xf0000) | \ - (((info)->read_exec_only ^ 1) << 9) | \ - ((info)->contents << 10) | \ - (((info)->seg_not_present ^ 1) << 15) | \ - ((info)->seg_32bit << 22) | \ - ((info)->limit_in_pages << 23) | \ - ((info)->useable << 20) | \ - 0x7000) - -#define LDT_empty(info) (\ - (info)->base_addr == 0 && \ - (info)->limit == 0 && \ - (info)->contents == 0 && \ - (info)->read_exec_only == 1 && \ - (info)->seg_32bit == 0 && \ - (info)->limit_in_pages == 0 && \ - (info)->seg_not_present == 1 && \ - (info)->useable == 0 ) - -#endif diff --git a/arch/um/sys-i386/shared/sysdep/ptrace_user.h b/arch/um/sys-i386/shared/sysdep/ptrace_user.h deleted file mode 100644 index ef56247e4143..000000000000 --- a/arch/um/sys-i386/shared/sysdep/ptrace_user.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * Copyright (C) 2002 Jeff Dike (jdike@karaya.com) - * Licensed under the GPL - */ - -#ifndef __SYSDEP_I386_PTRACE_USER_H__ -#define __SYSDEP_I386_PTRACE_USER_H__ - -#include <sys/ptrace.h> -#include <linux/ptrace.h> -#include <asm/ptrace.h> -#include "user_constants.h" - -#define PT_OFFSET(r) ((r) * sizeof(long)) - -#define PT_SYSCALL_NR(regs) ((regs)[ORIG_EAX]) -#define PT_SYSCALL_NR_OFFSET PT_OFFSET(ORIG_EAX) - -#define PT_SYSCALL_ARG1_OFFSET PT_OFFSET(EBX) -#define PT_SYSCALL_ARG2_OFFSET PT_OFFSET(ECX) -#define PT_SYSCALL_ARG3_OFFSET PT_OFFSET(EDX) -#define PT_SYSCALL_ARG4_OFFSET PT_OFFSET(ESI) -#define PT_SYSCALL_ARG5_OFFSET PT_OFFSET(EDI) -#define PT_SYSCALL_ARG6_OFFSET PT_OFFSET(EBP) - -#define PT_SYSCALL_RET_OFFSET PT_OFFSET(EAX) - -#define REGS_SYSCALL_NR EAX /* This is used before a system call */ -#define REGS_SYSCALL_ARG1 EBX -#define REGS_SYSCALL_ARG2 ECX -#define REGS_SYSCALL_ARG3 EDX -#define REGS_SYSCALL_ARG4 ESI -#define REGS_SYSCALL_ARG5 EDI -#define REGS_SYSCALL_ARG6 EBP - -#define REGS_IP_INDEX EIP -#define REGS_SP_INDEX UESP - -#define PT_IP_OFFSET PT_OFFSET(EIP) -#define PT_IP(regs) ((regs)[EIP]) -#define PT_SP_OFFSET PT_OFFSET(UESP) -#define PT_SP(regs) ((regs)[UESP]) - -#define FP_SIZE ((HOST_FPX_SIZE > HOST_FP_SIZE) ? HOST_FPX_SIZE : HOST_FP_SIZE) - -#ifndef FRAME_SIZE -#define FRAME_SIZE (17) -#endif - -#endif diff --git a/arch/um/sys-i386/shared/sysdep/sc.h b/arch/um/sys-i386/shared/sysdep/sc.h deleted file mode 100644 index c57d1780ad37..000000000000 --- a/arch/um/sys-i386/shared/sysdep/sc.h +++ /dev/null @@ -1,44 +0,0 @@ -#ifndef __SYSDEP_I386_SC_H -#define __SYSDEP_I386_SC_H - -#include <user_constants.h> - -#define SC_OFFSET(sc, field) \ - *((unsigned long *) &(((char *) (sc))[HOST_##field])) -#define SC_FP_OFFSET(sc, field) \ - *((unsigned long *) &(((char *) (SC_FPSTATE(sc)))[HOST_##field])) -#define SC_FP_OFFSET_PTR(sc, field, type) \ - ((type *) &(((char *) (SC_FPSTATE(sc)))[HOST_##field])) - -#define SC_IP(sc) SC_OFFSET(sc, SC_IP) -#define SC_SP(sc) SC_OFFSET(sc, SC_SP) -#define SC_FS(sc) SC_OFFSET(sc, SC_FS) -#define SC_GS(sc) SC_OFFSET(sc, SC_GS) -#define SC_DS(sc) SC_OFFSET(sc, SC_DS) -#define SC_ES(sc) SC_OFFSET(sc, SC_ES) -#define SC_SS(sc) SC_OFFSET(sc, SC_SS) -#define SC_CS(sc) SC_OFFSET(sc, SC_CS) -#define SC_EFLAGS(sc) SC_OFFSET(sc, SC_EFLAGS) -#define SC_EAX(sc) SC_OFFSET(sc, SC_EAX) -#define SC_EBX(sc) SC_OFFSET(sc, SC_EBX) -#define SC_ECX(sc) SC_OFFSET(sc, SC_ECX) -#define SC_EDX(sc) SC_OFFSET(sc, SC_EDX) -#define SC_EDI(sc) SC_OFFSET(sc, SC_EDI) -#define SC_ESI(sc) SC_OFFSET(sc, SC_ESI) -#define SC_EBP(sc) SC_OFFSET(sc, SC_EBP) -#define SC_TRAPNO(sc) SC_OFFSET(sc, SC_TRAPNO) -#define SC_ERR(sc) SC_OFFSET(sc, SC_ERR) -#define SC_CR2(sc) SC_OFFSET(sc, SC_CR2) -#define SC_FPSTATE(sc) SC_OFFSET(sc, SC_FPSTATE) -#define SC_SIGMASK(sc) SC_OFFSET(sc, SC_SIGMASK) -#define SC_FP_CW(sc) SC_FP_OFFSET(sc, SC_FP_CW) -#define SC_FP_SW(sc) SC_FP_OFFSET(sc, SC_FP_SW) -#define SC_FP_TAG(sc) SC_FP_OFFSET(sc, SC_FP_TAG) -#define SC_FP_IPOFF(sc) SC_FP_OFFSET(sc, SC_FP_IPOFF) -#define SC_FP_CSSEL(sc) SC_FP_OFFSET(sc, SC_FP_CSSEL) -#define SC_FP_DATAOFF(sc) SC_FP_OFFSET(sc, SC_FP_DATAOFF) -#define SC_FP_DATASEL(sc) SC_FP_OFFSET(sc, SC_FP_DATASEL) -#define SC_FP_ST(sc) SC_FP_OFFSET_PTR(sc, SC_FP_ST, struct _fpstate) -#define SC_FXSR_ENV(sc) SC_FP_OFFSET_PTR(sc, SC_FXSR_ENV, void) - -#endif diff --git a/arch/um/sys-i386/shared/sysdep/sigcontext.h b/arch/um/sys-i386/shared/sysdep/sigcontext.h deleted file mode 100644 index f583c87111a0..000000000000 --- a/arch/um/sys-i386/shared/sysdep/sigcontext.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * Copyright (C) 2000 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com) - * Licensed under the GPL - */ - -#ifndef __SYS_SIGCONTEXT_I386_H -#define __SYS_SIGCONTEXT_I386_H - -#include "sysdep/sc.h" - -#define IP_RESTART_SYSCALL(ip) ((ip) -= 2) - -#define GET_FAULTINFO_FROM_SC(fi, sc) \ - { \ - (fi).cr2 = SC_CR2(sc); \ - (fi).error_code = SC_ERR(sc); \ - (fi).trap_no = SC_TRAPNO(sc); \ - } - -/* This is Page Fault */ -#define SEGV_IS_FIXABLE(fi) ((fi)->trap_no == 14) - -/* SKAS3 has no trap_no on i386, but get_skas_faultinfo() sets it to 0. */ -#define SEGV_MAYBE_FIXABLE(fi) ((fi)->trap_no == 0 && ptrace_faultinfo) - -#endif diff --git a/arch/um/sys-i386/shared/sysdep/system.h b/arch/um/sys-i386/shared/sysdep/system.h deleted file mode 100644 index d1b93c436200..000000000000 --- a/arch/um/sys-i386/shared/sysdep/system.h +++ /dev/null @@ -1,132 +0,0 @@ -#ifndef _ASM_X86_SYSTEM_H_ -#define _ASM_X86_SYSTEM_H_ - -#include <asm/asm.h> -#include <asm/segment.h> -#include <asm/cpufeature.h> -#include <asm/cmpxchg.h> -#include <asm/nops.h> - -#include <linux/kernel.h> -#include <linux/irqflags.h> - -/* entries in ARCH_DLINFO: */ -#ifdef CONFIG_IA32_EMULATION -# define AT_VECTOR_SIZE_ARCH 2 -#else -# define AT_VECTOR_SIZE_ARCH 1 -#endif - -extern unsigned long arch_align_stack(unsigned long sp); - -void default_idle(void); - -/* - * Force strict CPU ordering. - * And yes, this is required on UP too when we're talking - * to devices. - */ -#ifdef CONFIG_X86_32 -/* - * Some non-Intel clones support out of order store. wmb() ceases to be a - * nop for these. - */ -#define mb() alternative("lock; addl $0,0(%%esp)", "mfence", X86_FEATURE_XMM2) -#define rmb() alternative("lock; addl $0,0(%%esp)", "lfence", X86_FEATURE_XMM2) -#define wmb() alternative("lock; addl $0,0(%%esp)", "sfence", X86_FEATURE_XMM) -#else -#define mb() asm volatile("mfence":::"memory") -#define rmb() asm volatile("lfence":::"memory") -#define wmb() asm volatile("sfence" ::: "memory") -#endif - -/** - * read_barrier_depends - Flush all pending reads that subsequents reads - * depend on. - * - * No data-dependent reads from memory-like regions are ever reordered - * over this barrier. All reads preceding this primitive are guaranteed - * to access memory (but not necessarily other CPUs' caches) before any - * reads following this primitive that depend on the data return by - * any of the preceding reads. This primitive is much lighter weight than - * rmb() on most CPUs, and is never heavier weight than is - * rmb(). - * - * These ordering constraints are respected by both the local CPU - * and the compiler. - * - * Ordering is not guaranteed by anything other than these primitives, - * not even by data dependencies. See the documentation for - * memory_barrier() for examples and URLs to more information. - * - * For example, the following code would force ordering (the initial - * value of "a" is zero, "b" is one, and "p" is "&a"): - * - * <programlisting> - * CPU 0 CPU 1 - * - * b = 2; - * memory_barrier(); - * p = &b; q = p; - * read_barrier_depends(); - * d = *q; - * </programlisting> - * - * because the read of "*q" depends on the read of "p" and these - * two reads are separated by a read_barrier_depends(). However, - * the following code, with the same initial values for "a" and "b": - * - * <programlisting> - * CPU 0 CPU 1 - * - * a = 2; - * memory_barrier(); - * b = 3; y = b; - * read_barrier_depends(); - * x = a; - * </programlisting> - * - * does not enforce ordering, since there is no data dependency between - * the read of "a" and the read of "b". Therefore, on some CPUs, such - * as Alpha, "y" could be set to 3 and "x" to 0. Use rmb() - * in cases like this where there are no data dependencies. - **/ - -#define read_barrier_depends() do { } while (0) - -#ifdef CONFIG_SMP -#define smp_mb() mb() -#ifdef CONFIG_X86_PPRO_FENCE -# define smp_rmb() rmb() -#else -# define smp_rmb() barrier() -#endif -#ifdef CONFIG_X86_OOSTORE -# define smp_wmb() wmb() -#else -# define smp_wmb() barrier() -#endif -#define smp_read_barrier_depends() read_barrier_depends() -#define set_mb(var, value) do { (void)xchg(&var, value); } while (0) -#else -#define smp_mb() barrier() -#define smp_rmb() barrier() -#define smp_wmb() barrier() -#define smp_read_barrier_depends() do { } while (0) -#define set_mb(var, value) do { var = value; barrier(); } while (0) -#endif - -/* - * Stop RDTSC speculation. This is needed when you need to use RDTSC - * (or get_cycles or vread that possibly accesses the TSC) in a defined - * code region. - * - * (Could use an alternative three way for this if there was one.) - */ -static inline void rdtsc_barrier(void) -{ - alternative(ASM_NOP3, "mfence", X86_FEATURE_MFENCE_RDTSC); - alternative(ASM_NOP3, "lfence", X86_FEATURE_LFENCE_RDTSC); -} - -#endif diff --git a/arch/um/sys-i386/shared/sysdep/vm-flags.h b/arch/um/sys-i386/shared/sysdep/vm-flags.h deleted file mode 100644 index e0d24c568dbc..000000000000 --- a/arch/um/sys-i386/shared/sysdep/vm-flags.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * Copyright (C) 2004 Jeff Dike (jdike@addtoit.com) - * Licensed under the GPL - */ - -#ifndef __VM_FLAGS_I386_H -#define __VM_FLAGS_I386_H - -#define VM_DATA_DEFAULT_FLAGS \ - (VM_READ | VM_WRITE | \ - ((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0 ) | \ - VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) - -#endif diff --git a/arch/um/sys-i386/stub_segv.c b/arch/um/sys-i386/stub_segv.c deleted file mode 100644 index 28ccf737a79f..000000000000 --- a/arch/um/sys-i386/stub_segv.c +++ /dev/null @@ -1,17 +0,0 @@ -/* - * Copyright (C) 2004 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com) - * Licensed under the GPL - */ - -#include "sysdep/stub.h" -#include "sysdep/sigcontext.h" - -void __attribute__ ((__section__ (".__syscall_stub"))) -stub_segv_handler(int sig) -{ - struct sigcontext *sc = (struct sigcontext *) (&sig + 1); - - GET_FAULTINFO_FROM_SC(*((struct faultinfo *) STUB_DATA), sc); - - trap_myself(); -} diff --git a/arch/um/sys-i386/user-offsets.c b/arch/um/sys-i386/user-offsets.c deleted file mode 100644 index 5f883bfe773f..000000000000 --- a/arch/um/sys-i386/user-offsets.c +++ /dev/null @@ -1,53 +0,0 @@ -#include <stdio.h> -#include <stddef.h> -#include <signal.h> -#include <sys/poll.h> -#include <sys/user.h> -#include <sys/mman.h> -#include <asm/ptrace.h> - -#define DEFINE(sym, val) \ - asm volatile("\n->" #sym " %0 " #val : : "i" (val)) - -#define DEFINE_LONGS(sym, val) \ - asm volatile("\n->" #sym " %0 " #val : : "i" (val/sizeof(unsigned long))) - -#define OFFSET(sym, str, mem) \ - DEFINE(sym, offsetof(struct str, mem)); - -void foo(void) -{ - OFFSET(HOST_SC_TRAPNO, sigcontext, trapno); - OFFSET(HOST_SC_ERR, sigcontext, err); - OFFSET(HOST_SC_CR2, sigcontext, cr2); - - DEFINE_LONGS(HOST_FP_SIZE, sizeof(struct user_fpregs_struct)); - DEFINE_LONGS(HOST_FPX_SIZE, sizeof(struct user_fpxregs_struct)); - - DEFINE(HOST_IP, EIP); - DEFINE(HOST_SP, UESP); - DEFINE(HOST_EFLAGS, EFL); - DEFINE(HOST_EAX, EAX); - DEFINE(HOST_EBX, EBX); - DEFINE(HOST_ECX, ECX); - DEFINE(HOST_EDX, EDX); - DEFINE(HOST_ESI, ESI); - DEFINE(HOST_EDI, EDI); - DEFINE(HOST_EBP, EBP); - DEFINE(HOST_CS, CS); - DEFINE(HOST_SS, SS); - DEFINE(HOST_DS, DS); - DEFINE(HOST_FS, FS); - DEFINE(HOST_ES, ES); - DEFINE(HOST_GS, GS); - DEFINE(UM_FRAME_SIZE, sizeof(struct user_regs_struct)); - - /* XXX Duplicated between i386 and x86_64 */ - DEFINE(UM_POLLIN, POLLIN); - DEFINE(UM_POLLPRI, POLLPRI); - DEFINE(UM_POLLOUT, POLLOUT); - - DEFINE(UM_PROT_READ, PROT_READ); - DEFINE(UM_PROT_WRITE, PROT_WRITE); - DEFINE(UM_PROT_EXEC, PROT_EXEC); -} diff --git a/arch/um/sys-x86_64/Makefile b/arch/um/sys-x86_64/Makefile deleted file mode 100644 index bd4d1d3ba919..000000000000 --- a/arch/um/sys-x86_64/Makefile +++ /dev/null @@ -1,27 +0,0 @@ -# -# Copyright 2003 PathScale, Inc. -# -# Licensed under the GPL -# - -obj-y = bug.o bugs.o delay.o fault.o ldt.o ptrace.o ptrace_user.o mem.o \ - setjmp.o signal.o stub.o stub_segv.o syscalls.o syscall_table.o \ - sysrq.o ksyms.o tls.o - -obj-y += vdso/ - -subarch-obj-y = lib/csum-partial_64.o lib/memcpy_64.o lib/thunk_64.o \ - lib/rwsem.o -subarch-obj-$(CONFIG_MODULES) += kernel/module.o - -ldt-y = ../sys-i386/ldt.o - -USER_OBJS := ptrace_user.o - -USER_OBJS += user-offsets.s -extra-y += user-offsets.s - -UNPROFILE_OBJS := stub_segv.o -CFLAGS_stub_segv.o := $(CFLAGS_NO_HARDENING) - -include arch/um/scripts/Makefile.rules diff --git a/arch/um/sys-x86_64/asm/archparam.h b/arch/um/sys-x86_64/asm/archparam.h deleted file mode 100644 index 6c083663b8d9..000000000000 --- a/arch/um/sys-x86_64/asm/archparam.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Copyright 2003 PathScale, Inc. - * - * Licensed under the GPL - */ - -#ifndef __UM_ARCHPARAM_X86_64_H -#define __UM_ARCHPARAM_X86_64_H - - -/* No user-accessible fixmap addresses, i.e. vsyscall */ -#define FIXADDR_USER_START 0 -#define FIXADDR_USER_END 0 - -#endif - diff --git a/arch/um/sys-x86_64/asm/module.h b/arch/um/sys-x86_64/asm/module.h deleted file mode 100644 index 8eb79c2d07d5..000000000000 --- a/arch/um/sys-x86_64/asm/module.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Copyright 2003 PathScale, Inc. - * - * Licensed under the GPL - */ - -#ifndef __UM_MODULE_X86_64_H -#define __UM_MODULE_X86_64_H - -/* UML is simple */ -struct mod_arch_specific -{ -}; - -#define Elf_Shdr Elf64_Shdr -#define Elf_Sym Elf64_Sym -#define Elf_Ehdr Elf64_Ehdr - -#endif - diff --git a/arch/um/sys-x86_64/delay.c b/arch/um/sys-x86_64/delay.c deleted file mode 100644 index f3fe1a688f7e..000000000000 --- a/arch/um/sys-x86_64/delay.c +++ /dev/null @@ -1,60 +0,0 @@ -/* - * Copyright (C) 2011 Richard Weinberger <richrd@nod.at> - * Mostly copied from arch/x86/lib/delay.c - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/delay.h> -#include <asm/param.h> - -void __delay(unsigned long loops) -{ - asm volatile( - "test %0,%0\n" - "jz 3f\n" - "jmp 1f\n" - - ".align 16\n" - "1: jmp 2f\n" - - ".align 16\n" - "2: dec %0\n" - " jnz 2b\n" - "3: dec %0\n" - - : /* we don't need output */ - : "a" (loops) - ); -} -EXPORT_SYMBOL(__delay); - -inline void __const_udelay(unsigned long xloops) -{ - int d0; - - xloops *= 4; - asm("mull %%edx" - : "=d" (xloops), "=&a" (d0) - : "1" (xloops), "0" - (loops_per_jiffy * (HZ/4))); - - __delay(++xloops); -} -EXPORT_SYMBOL(__const_udelay); - -void __udelay(unsigned long usecs) -{ - __const_udelay(usecs * 0x000010c7); /* 2**32 / 1000000 (rounded up) */ -} -EXPORT_SYMBOL(__udelay); - -void __ndelay(unsigned long nsecs) -{ - __const_udelay(nsecs * 0x00005); /* 2**32 / 1000000000 (rounded up) */ -} -EXPORT_SYMBOL(__ndelay); diff --git a/arch/um/sys-x86_64/fault.c b/arch/um/sys-x86_64/fault.c deleted file mode 100644 index ce85117fc64e..000000000000 --- a/arch/um/sys-x86_64/fault.c +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Copyright 2003 PathScale, Inc. - * - * Licensed under the GPL - */ - -#include "sysdep/ptrace.h" - -/* These two are from asm-um/uaccess.h and linux/module.h, check them. */ -struct exception_table_entry -{ - unsigned long insn; - unsigned long fixup; -}; - -const struct exception_table_entry *search_exception_tables(unsigned long add); - -int arch_fixup(unsigned long address, struct uml_pt_regs *regs) -{ - const struct exception_table_entry *fixup; - - fixup = search_exception_tables(address); - if (fixup != 0) { - UPT_IP(regs) = fixup->fixup; - return 1; - } - return 0; -} diff --git a/arch/um/sys-x86_64/ptrace_user.c b/arch/um/sys-x86_64/ptrace_user.c deleted file mode 100644 index c57a496d3f5b..000000000000 --- a/arch/um/sys-x86_64/ptrace_user.c +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Copyright 2003 PathScale, Inc. - * - * Licensed under the GPL - */ - -#include <errno.h> -#include "ptrace_user.h" - -int ptrace_getregs(long pid, unsigned long *regs_out) -{ - if (ptrace(PTRACE_GETREGS, pid, 0, regs_out) < 0) - return -errno; - return(0); -} - -int ptrace_setregs(long pid, unsigned long *regs_out) -{ - if (ptrace(PTRACE_SETREGS, pid, 0, regs_out) < 0) - return -errno; - return(0); -} diff --git a/arch/um/sys-x86_64/shared/sysdep/barrier.h b/arch/um/sys-x86_64/shared/sysdep/barrier.h deleted file mode 100644 index 7b610befdc8f..000000000000 --- a/arch/um/sys-x86_64/shared/sysdep/barrier.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef __SYSDEP_X86_64_BARRIER_H -#define __SYSDEP_X86_64_BARRIER_H - -/* Copied from include/asm-x86_64 for use by userspace. */ -#define mb() asm volatile("mfence":::"memory") - -#endif diff --git a/arch/um/sys-x86_64/shared/sysdep/host_ldt.h b/arch/um/sys-x86_64/shared/sysdep/host_ldt.h deleted file mode 100644 index e8b1be1e154f..000000000000 --- a/arch/um/sys-x86_64/shared/sysdep/host_ldt.h +++ /dev/null @@ -1,38 +0,0 @@ -#ifndef __ASM_HOST_LDT_X86_64_H -#define __ASM_HOST_LDT_X86_64_H - -#include <asm/ldt.h> - -/* - * macros stolen from include/asm-x86_64/desc.h - */ -#define LDT_entry_a(info) \ - ((((info)->base_addr & 0x0000ffff) << 16) | ((info)->limit & 0x0ffff)) - -/* Don't allow setting of the lm bit. It is useless anyways because - * 64bit system calls require __USER_CS. */ -#define LDT_entry_b(info) \ - (((info)->base_addr & 0xff000000) | \ - (((info)->base_addr & 0x00ff0000) >> 16) | \ - ((info)->limit & 0xf0000) | \ - (((info)->read_exec_only ^ 1) << 9) | \ - ((info)->contents << 10) | \ - (((info)->seg_not_present ^ 1) << 15) | \ - ((info)->seg_32bit << 22) | \ - ((info)->limit_in_pages << 23) | \ - ((info)->useable << 20) | \ - /* ((info)->lm << 21) | */ \ - 0x7000) - -#define LDT_empty(info) (\ - (info)->base_addr == 0 && \ - (info)->limit == 0 && \ - (info)->contents == 0 && \ - (info)->read_exec_only == 1 && \ - (info)->seg_32bit == 0 && \ - (info)->limit_in_pages == 0 && \ - (info)->seg_not_present == 1 && \ - (info)->useable == 0 && \ - (info)->lm == 0) - -#endif diff --git a/arch/um/sys-x86_64/shared/sysdep/kernel-offsets.h b/arch/um/sys-x86_64/shared/sysdep/kernel-offsets.h deleted file mode 100644 index a307237b7964..000000000000 --- a/arch/um/sys-x86_64/shared/sysdep/kernel-offsets.h +++ /dev/null @@ -1,23 +0,0 @@ -#include <linux/stddef.h> -#include <linux/sched.h> -#include <linux/time.h> -#include <linux/elf.h> -#include <linux/crypto.h> -#include <asm/page.h> -#include <asm/mman.h> - -#define DEFINE(sym, val) \ - asm volatile("\n->" #sym " %0 " #val : : "i" (val)) - -#define DEFINE_STR1(x) #x -#define DEFINE_STR(sym, val) asm volatile("\n->" #sym " " DEFINE_STR1(val) " " #val: : ) - -#define BLANK() asm volatile("\n->" : : ) - -#define OFFSET(sym, str, mem) \ - DEFINE(sym, offsetof(struct str, mem)); - -void foo(void) -{ -#include <common-offsets.h> -} diff --git a/arch/um/sys-x86_64/shared/sysdep/ptrace_user.h b/arch/um/sys-x86_64/shared/sysdep/ptrace_user.h deleted file mode 100644 index 4dbccdb58f48..000000000000 --- a/arch/um/sys-x86_64/shared/sysdep/ptrace_user.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * Copyright 2003 PathScale, Inc. - * - * Licensed under the GPL - */ - -#ifndef __SYSDEP_X86_64_PTRACE_USER_H__ -#define __SYSDEP_X86_64_PTRACE_USER_H__ - -#define __FRAME_OFFSETS -#include <sys/ptrace.h> -#include <linux/ptrace.h> -#include <asm/ptrace.h> -#undef __FRAME_OFFSETS -#include "user_constants.h" - -#define PT_INDEX(off) ((off) / sizeof(unsigned long)) - -#define PT_SYSCALL_NR(regs) ((regs)[PT_INDEX(ORIG_RAX)]) -#define PT_SYSCALL_NR_OFFSET (ORIG_RAX) - -#define PT_SYSCALL_ARG1(regs) (((unsigned long *) (regs))[PT_INDEX(RDI)]) -#define PT_SYSCALL_ARG1_OFFSET (RDI) - -#define PT_SYSCALL_ARG2(regs) (((unsigned long *) (regs))[PT_INDEX(RSI)]) -#define PT_SYSCALL_ARG2_OFFSET (RSI) - -#define PT_SYSCALL_ARG3(regs) (((unsigned long *) (regs))[PT_INDEX(RDX)]) -#define PT_SYSCALL_ARG3_OFFSET (RDX) - -#define PT_SYSCALL_ARG4(regs) (((unsigned long *) (regs))[PT_INDEX(RCX)]) -#define PT_SYSCALL_ARG4_OFFSET (RCX) - -#define PT_SYSCALL_ARG5(regs) (((unsigned long *) (regs))[PT_INDEX(R8)]) -#define PT_SYSCALL_ARG5_OFFSET (R8) - -#define PT_SYSCALL_ARG6(regs) (((unsigned long *) (regs))[PT_INDEX(R9)]) -#define PT_SYSCALL_ARG6_OFFSET (R9) - -#define PT_SYSCALL_RET_OFFSET (RAX) - -#define PT_IP_OFFSET (RIP) -#define PT_IP(regs) ((regs)[PT_INDEX(RIP)]) - -#define PT_SP_OFFSET (RSP) -#define PT_SP(regs) ((regs)[PT_INDEX(RSP)]) - -#define PT_ORIG_RAX_OFFSET (ORIG_RAX) -#define PT_ORIG_RAX(regs) ((regs)[PT_INDEX(ORIG_RAX)]) - -/* - * x86_64 FC3 doesn't define this in /usr/include/linux/ptrace.h even though - * it's defined in the kernel's include/linux/ptrace.h. Additionally, use the - * 2.4 name and value for 2.4 host compatibility. - */ -#ifndef PTRACE_OLDSETOPTIONS -#define PTRACE_OLDSETOPTIONS 21 -#endif - -/* - * These are before the system call, so the system call number is RAX - * rather than ORIG_RAX, and arg4 is R10 rather than RCX - */ -#define REGS_SYSCALL_NR PT_INDEX(RAX) -#define REGS_SYSCALL_ARG1 PT_INDEX(RDI) -#define REGS_SYSCALL_ARG2 PT_INDEX(RSI) -#define REGS_SYSCALL_ARG3 PT_INDEX(RDX) -#define REGS_SYSCALL_ARG4 PT_INDEX(R10) -#define REGS_SYSCALL_ARG5 PT_INDEX(R8) -#define REGS_SYSCALL_ARG6 PT_INDEX(R9) - -#define REGS_IP_INDEX PT_INDEX(RIP) -#define REGS_SP_INDEX PT_INDEX(RSP) - -#define FP_SIZE (HOST_FP_SIZE) - -#endif diff --git a/arch/um/sys-x86_64/shared/sysdep/sc.h b/arch/um/sys-x86_64/shared/sysdep/sc.h deleted file mode 100644 index 8aee45b07434..000000000000 --- a/arch/um/sys-x86_64/shared/sysdep/sc.h +++ /dev/null @@ -1,45 +0,0 @@ -#ifndef __SYSDEP_X86_64_SC_H -#define __SYSDEP_X86_64_SC_H - -/* Copyright (C) 2003 - 2004 PathScale, Inc - * Released under the GPL - */ - -#include <user_constants.h> - -#define SC_OFFSET(sc, field) \ - *((unsigned long *) &(((char *) (sc))[HOST_##field])) - -#define SC_RBX(sc) SC_OFFSET(sc, SC_RBX) -#define SC_RCX(sc) SC_OFFSET(sc, SC_RCX) -#define SC_RDX(sc) SC_OFFSET(sc, SC_RDX) -#define SC_RSI(sc) SC_OFFSET(sc, SC_RSI) -#define SC_RDI(sc) SC_OFFSET(sc, SC_RDI) -#define SC_RBP(sc) SC_OFFSET(sc, SC_RBP) -#define SC_RAX(sc) SC_OFFSET(sc, SC_RAX) -#define SC_R8(sc) SC_OFFSET(sc, SC_R8) -#define SC_R9(sc) SC_OFFSET(sc, SC_R9) -#define SC_R10(sc) SC_OFFSET(sc, SC_R10) -#define SC_R11(sc) SC_OFFSET(sc, SC_R11) -#define SC_R12(sc) SC_OFFSET(sc, SC_R12) -#define SC_R13(sc) SC_OFFSET(sc, SC_R13) -#define SC_R14(sc) SC_OFFSET(sc, SC_R14) -#define SC_R15(sc) SC_OFFSET(sc, SC_R15) -#define SC_IP(sc) SC_OFFSET(sc, SC_IP) -#define SC_SP(sc) SC_OFFSET(sc, SC_SP) -#define SC_CR2(sc) SC_OFFSET(sc, SC_CR2) -#define SC_ERR(sc) SC_OFFSET(sc, SC_ERR) -#define SC_TRAPNO(sc) SC_OFFSET(sc, SC_TRAPNO) -#define SC_CS(sc) SC_OFFSET(sc, SC_CS) -#define SC_FS(sc) SC_OFFSET(sc, SC_FS) -#define SC_GS(sc) SC_OFFSET(sc, SC_GS) -#define SC_EFLAGS(sc) SC_OFFSET(sc, SC_EFLAGS) -#define SC_SIGMASK(sc) SC_OFFSET(sc, SC_SIGMASK) -#define SC_SS(sc) SC_OFFSET(sc, SC_SS) -#if 0 -#define SC_ORIG_RAX(sc) SC_OFFSET(sc, SC_ORIG_RAX) -#define SC_DS(sc) SC_OFFSET(sc, SC_DS) -#define SC_ES(sc) SC_OFFSET(sc, SC_ES) -#endif - -#endif diff --git a/arch/um/sys-x86_64/shared/sysdep/sigcontext.h b/arch/um/sys-x86_64/shared/sysdep/sigcontext.h deleted file mode 100644 index 0155133b1458..000000000000 --- a/arch/um/sys-x86_64/shared/sysdep/sigcontext.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * Copyright 2003 PathScale, Inc. - * - * Licensed under the GPL - */ - -#ifndef __SYSDEP_X86_64_SIGCONTEXT_H -#define __SYSDEP_X86_64_SIGCONTEXT_H - -#include <sysdep/sc.h> - -#define IP_RESTART_SYSCALL(ip) ((ip) -= 2) - -#define GET_FAULTINFO_FROM_SC(fi, sc) \ - { \ - (fi).cr2 = SC_CR2(sc); \ - (fi).error_code = SC_ERR(sc); \ - (fi).trap_no = SC_TRAPNO(sc); \ - } - -/* This is Page Fault */ -#define SEGV_IS_FIXABLE(fi) ((fi)->trap_no == 14) - -/* No broken SKAS API, which doesn't pass trap_no, here. */ -#define SEGV_MAYBE_FIXABLE(fi) 0 - -#endif diff --git a/arch/um/sys-x86_64/shared/sysdep/skas_ptrace.h b/arch/um/sys-x86_64/shared/sysdep/skas_ptrace.h deleted file mode 100644 index 95db4be786e4..000000000000 --- a/arch/um/sys-x86_64/shared/sysdep/skas_ptrace.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Copyright (C) 2000, 2001, 2002 Jeff Dike (jdike@karaya.com) - * Licensed under the GPL - */ - -#ifndef __SYSDEP_X86_64_SKAS_PTRACE_H -#define __SYSDEP_X86_64_SKAS_PTRACE_H - -struct ptrace_faultinfo { - int is_write; - unsigned long addr; -}; - -struct ptrace_ldt { - int func; - void *ptr; - unsigned long bytecount; -}; - -#define PTRACE_LDT 54 - -#endif diff --git a/arch/um/sys-x86_64/shared/sysdep/tls.h b/arch/um/sys-x86_64/shared/sysdep/tls.h deleted file mode 100644 index 18c000d0357a..000000000000 --- a/arch/um/sys-x86_64/shared/sysdep/tls.h +++ /dev/null @@ -1,29 +0,0 @@ -#ifndef _SYSDEP_TLS_H -#define _SYSDEP_TLS_H - -# ifndef __KERNEL__ - -/* Change name to avoid conflicts with the original one from <asm/ldt.h>, which - * may be named user_desc (but in 2.4 and in header matching its API was named - * modify_ldt_ldt_s). */ - -typedef struct um_dup_user_desc { - unsigned int entry_number; - unsigned int base_addr; - unsigned int limit; - unsigned int seg_32bit:1; - unsigned int contents:2; - unsigned int read_exec_only:1; - unsigned int limit_in_pages:1; - unsigned int seg_not_present:1; - unsigned int useable:1; - unsigned int lm:1; -} user_desc_t; - -# else /* __KERNEL__ */ - -# include <ldt.h> -typedef struct user_desc user_desc_t; - -# endif /* __KERNEL__ */ -#endif /* _SYSDEP_TLS_H */ diff --git a/arch/um/sys-x86_64/signal.c b/arch/um/sys-x86_64/signal.c deleted file mode 100644 index b6b65c7c7a7d..000000000000 --- a/arch/um/sys-x86_64/signal.c +++ /dev/null @@ -1,290 +0,0 @@ -/* - * Copyright (C) 2003 PathScale, Inc. - * Copyright (C) 2003 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com) - * Licensed under the GPL - */ - -#include <linux/personality.h> -#include <linux/ptrace.h> -#include <linux/kernel.h> -#include <asm/unistd.h> -#include <asm/uaccess.h> -#include <asm/ucontext.h> -#include "frame_kern.h" -#include "skas.h" - -void copy_sc(struct uml_pt_regs *regs, void *from) -{ - struct sigcontext *sc = from; - -#define GETREG(regs, regno, sc, regname) \ - (regs)->gp[(regno) / sizeof(unsigned long)] = (sc)->regname - - GETREG(regs, R8, sc, r8); - GETREG(regs, R9, sc, r9); - GETREG(regs, R10, sc, r10); - GETREG(regs, R11, sc, r11); - GETREG(regs, R12, sc, r12); - GETREG(regs, R13, sc, r13); - GETREG(regs, R14, sc, r14); - GETREG(regs, R15, sc, r15); - GETREG(regs, RDI, sc, di); - GETREG(regs, RSI, sc, si); - GETREG(regs, RBP, sc, bp); - GETREG(regs, RBX, sc, bx); - GETREG(regs, RDX, sc, dx); - GETREG(regs, RAX, sc, ax); - GETREG(regs, RCX, sc, cx); - GETREG(regs, RSP, sc, sp); - GETREG(regs, RIP, sc, ip); - GETREG(regs, EFLAGS, sc, flags); - GETREG(regs, CS, sc, cs); - -#undef GETREG -} - -static int copy_sc_from_user(struct pt_regs *regs, - struct sigcontext __user *from, - struct _fpstate __user *fpp) -{ - struct user_i387_struct fp; - int err = 0; - -#define GETREG(regs, regno, sc, regname) \ - __get_user((regs)->regs.gp[(regno) / sizeof(unsigned long)], \ - &(sc)->regname) - - err |= GETREG(regs, R8, from, r8); - err |= GETREG(regs, R9, from, r9); - err |= GETREG(regs, R10, from, r10); - err |= GETREG(regs, R11, from, r11); - err |= GETREG(regs, R12, from, r12); - err |= GETREG(regs, R13, from, r13); - err |= GETREG(regs, R14, from, r14); - err |= GETREG(regs, R15, from, r15); - err |= GETREG(regs, RDI, from, di); - err |= GETREG(regs, RSI, from, si); - err |= GETREG(regs, RBP, from, bp); - err |= GETREG(regs, RBX, from, bx); - err |= GETREG(regs, RDX, from, dx); - err |= GETREG(regs, RAX, from, ax); - err |= GETREG(regs, RCX, from, cx); - err |= GETREG(regs, RSP, from, sp); - err |= GETREG(regs, RIP, from, ip); - err |= GETREG(regs, EFLAGS, from, flags); - err |= GETREG(regs, CS, from, cs); - if (err) - return 1; - -#undef GETREG - - err = copy_from_user(&fp, fpp, sizeof(struct user_i387_struct)); - if (err) - return 1; - - err = restore_fp_registers(userspace_pid[current_thread_info()->cpu], - (unsigned long *) &fp); - if (err < 0) { - printk(KERN_ERR "copy_sc_from_user - " - "restore_fp_registers failed, errno = %d\n", - -err); - return 1; - } - - return 0; -} - -static int copy_sc_to_user(struct sigcontext __user *to, - struct _fpstate __user *to_fp, struct pt_regs *regs, - unsigned long mask, unsigned long sp) -{ - struct faultinfo * fi = ¤t->thread.arch.faultinfo; - struct user_i387_struct fp; - int err = 0; - - err |= __put_user(0, &to->gs); - err |= __put_user(0, &to->fs); - -#define PUTREG(regs, regno, sc, regname) \ - __put_user((regs)->regs.gp[(regno) / sizeof(unsigned long)], \ - &(sc)->regname) - - err |= PUTREG(regs, RDI, to, di); - err |= PUTREG(regs, RSI, to, si); - err |= PUTREG(regs, RBP, to, bp); - /* - * Must use original RSP, which is passed in, rather than what's in - * the pt_regs, because that's already been updated to point at the - * signal frame. - */ - err |= __put_user(sp, &to->sp); - err |= PUTREG(regs, RBX, to, bx); - err |= PUTREG(regs, RDX, to, dx); - err |= PUTREG(regs, RCX, to, cx); - err |= PUTREG(regs, RAX, to, ax); - err |= PUTREG(regs, R8, to, r8); - err |= PUTREG(regs, R9, to, r9); - err |= PUTREG(regs, R10, to, r10); - err |= PUTREG(regs, R11, to, r11); - err |= PUTREG(regs, R12, to, r12); - err |= PUTREG(regs, R13, to, r13); - err |= PUTREG(regs, R14, to, r14); - err |= PUTREG(regs, R15, to, r15); - err |= PUTREG(regs, CS, to, cs); /* XXX x86_64 doesn't do this */ - - err |= __put_user(fi->cr2, &to->cr2); - err |= __put_user(fi->error_code, &to->err); - err |= __put_user(fi->trap_no, &to->trapno); - - err |= PUTREG(regs, RIP, to, ip); - err |= PUTREG(regs, EFLAGS, to, flags); -#undef PUTREG - - err |= __put_user(mask, &to->oldmask); - if (err) - return 1; - - err = save_fp_registers(userspace_pid[current_thread_info()->cpu], - (unsigned long *) &fp); - if (err < 0) { - printk(KERN_ERR "copy_sc_from_user - restore_fp_registers " - "failed, errno = %d\n", -err); - return 1; - } - - if (copy_to_user(to_fp, &fp, sizeof(struct user_i387_struct))) - return 1; - - return err; -} - -struct rt_sigframe -{ - char __user *pretcode; - struct ucontext uc; - struct siginfo info; - struct _fpstate fpstate; -}; - -int setup_signal_stack_si(unsigned long stack_top, int sig, - struct k_sigaction *ka, struct pt_regs * regs, - siginfo_t *info, sigset_t *set) -{ - struct rt_sigframe __user *frame; - unsigned long save_sp = PT_REGS_RSP(regs); - int err = 0; - struct task_struct *me = current; - - frame = (struct rt_sigframe __user *) - round_down(stack_top - sizeof(struct rt_sigframe), 16); - /* Subtract 128 for a red zone and 8 for proper alignment */ - frame = (struct rt_sigframe __user *) ((unsigned long) frame - 128 - 8); - - if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame))) - goto out; - - if (ka->sa.sa_flags & SA_SIGINFO) { - err |= copy_siginfo_to_user(&frame->info, info); - if (err) - goto out; - } - - /* - * Update SP now because the page fault handler refuses to extend - * the stack if the faulting address is too far below the current - * SP, which frame now certainly is. If there's an error, the original - * value is restored on the way out. - * When writing the sigcontext to the stack, we have to write the - * original value, so that's passed to copy_sc_to_user, which does - * the right thing with it. - */ - PT_REGS_RSP(regs) = (unsigned long) frame; - - /* Create the ucontext. */ - err |= __put_user(0, &frame->uc.uc_flags); - err |= __put_user(0, &frame->uc.uc_link); - err |= __put_user(me->sas_ss_sp, &frame->uc.uc_stack.ss_sp); - err |= __put_user(sas_ss_flags(save_sp), - &frame->uc.uc_stack.ss_flags); - err |= __put_user(me->sas_ss_size, &frame->uc.uc_stack.ss_size); - err |= copy_sc_to_user(&frame->uc.uc_mcontext, &frame->fpstate, regs, - set->sig[0], save_sp); - err |= __put_user(&frame->fpstate, &frame->uc.uc_mcontext.fpstate); - if (sizeof(*set) == 16) { - __put_user(set->sig[0], &frame->uc.uc_sigmask.sig[0]); - __put_user(set->sig[1], &frame->uc.uc_sigmask.sig[1]); - } - else - err |= __copy_to_user(&frame->uc.uc_sigmask, set, - sizeof(*set)); - - /* - * Set up to return from userspace. If provided, use a stub - * already in userspace. - */ - /* x86-64 should always use SA_RESTORER. */ - if (ka->sa.sa_flags & SA_RESTORER) - err |= __put_user(ka->sa.sa_restorer, &frame->pretcode); - else - /* could use a vstub here */ - goto restore_sp; - - if (err) - goto restore_sp; - - /* Set up registers for signal handler */ - { - struct exec_domain *ed = current_thread_info()->exec_domain; - if (unlikely(ed && ed->signal_invmap && sig < 32)) - sig = ed->signal_invmap[sig]; - } - - PT_REGS_RDI(regs) = sig; - /* In case the signal handler was declared without prototypes */ - PT_REGS_RAX(regs) = 0; - - /* - * This also works for non SA_SIGINFO handlers because they expect the - * next argument after the signal number on the stack. - */ - PT_REGS_RSI(regs) = (unsigned long) &frame->info; - PT_REGS_RDX(regs) = (unsigned long) &frame->uc; - PT_REGS_RIP(regs) = (unsigned long) ka->sa.sa_handler; - out: - return err; - -restore_sp: - PT_REGS_RSP(regs) = save_sp; - return err; -} - -long sys_rt_sigreturn(struct pt_regs *regs) -{ - unsigned long sp = PT_REGS_SP(¤t->thread.regs); - struct rt_sigframe __user *frame = - (struct rt_sigframe __user *)(sp - 8); - struct ucontext __user *uc = &frame->uc; - sigset_t set; - - if (copy_from_user(&set, &uc->uc_sigmask, sizeof(set))) - goto segfault; - - sigdelsetmask(&set, ~_BLOCKABLE); - - spin_lock_irq(¤t->sighand->siglock); - current->blocked = set; - recalc_sigpending(); - spin_unlock_irq(¤t->sighand->siglock); - - if (copy_sc_from_user(¤t->thread.regs, &uc->uc_mcontext, - &frame->fpstate)) - goto segfault; - - /* Avoid ERESTART handling */ - PT_REGS_SYSCALL_NR(¤t->thread.regs) = -1; - return PT_REGS_SYSCALL_RET(¤t->thread.regs); - - segfault: - force_sig(SIGSEGV, current); - return 0; -} diff --git a/arch/um/Makefile-i386 b/arch/x86/Makefile.um index 302cbe504543..36ddec6a41c9 100644 --- a/arch/um/Makefile-i386 +++ b/arch/x86/Makefile.um @@ -1,14 +1,11 @@ -core-y += arch/um/sys-i386/ arch/x86/crypto/ - -TOP_ADDR := $(CONFIG_TOP_ADDR) +core-y += arch/x86/crypto/ +ifeq ($(CONFIG_X86_32),y) START := 0x8048000 LDFLAGS += -m elf_i386 -ELF_ARCH := $(SUBARCH) -ELF_FORMAT := elf32-$(SUBARCH) -OBJCOPYFLAGS := -O binary -R .note -R .comment -S -HEADER_ARCH := x86 +ELF_ARCH := i386 +ELF_FORMAT := elf32-i386 CHECKFLAGS += -D__i386__ ifeq ("$(origin SUBARCH)", "command line") @@ -16,9 +13,8 @@ ifneq ("$(shell uname -m | sed -e s/i.86/i386/)", "$(SUBARCH)") KBUILD_CFLAGS += $(call cc-option,-m32) KBUILD_AFLAGS += $(call cc-option,-m32) LINK-y += $(call cc-option,-m32) -UML_OBJCOPYFLAGS += -F $(ELF_FORMAT) -export LDFLAGS HOSTCFLAGS HOSTLDFLAGS UML_OBJCOPYFLAGS +export LDFLAGS endif endif @@ -40,3 +36,26 @@ KBUILD_CFLAGS += $(shell if [ $(call cc-version) -lt 0400 ] ; then \ else echo $(call cc-option,-funit-at-a-time); fi ;) KBUILD_CFLAGS += $(cflags-y) + +else + +START := 0x60000000 + +KBUILD_CFLAGS += -fno-builtin -m64 + +CHECKFLAGS += -m64 -D__x86_64__ +KBUILD_AFLAGS += -m64 +LDFLAGS += -m elf_x86_64 +KBUILD_CPPFLAGS += -m64 + +ELF_ARCH := i386:x86-64 +ELF_FORMAT := elf64-x86-64 + +# Not on all 64-bit distros /lib is a symlink to /lib64. PLD is an example. + +LINK-$(CONFIG_LD_SCRIPT_DYN) += -Wl,-rpath,/lib64 +LINK-y += -m64 + +# Do unit-at-a-time unconditionally on x86_64, following the host +KBUILD_CFLAGS += $(call cc-option,-funit-at-a-time) +endif diff --git a/arch/x86/include/asm/intel_scu_ipc.h b/arch/x86/include/asm/intel_scu_ipc.h index 29f66793cc55..4420993acc47 100644 --- a/arch/x86/include/asm/intel_scu_ipc.h +++ b/arch/x86/include/asm/intel_scu_ipc.h @@ -1,6 +1,8 @@ #ifndef _ASM_X86_INTEL_SCU_IPC_H_ #define _ASM_X86_INTEL_SCU_IPC_H_ +#include <linux/notifier.h> + #define IPCMSG_VRTC 0xFA /* Set vRTC device */ /* Command id associated with message IPCMSG_VRTC */ @@ -44,4 +46,24 @@ int intel_scu_ipc_i2c_cntrl(u32 addr, u32 *data); /* Update FW version */ int intel_scu_ipc_fw_update(u8 *buffer, u32 length); +extern struct blocking_notifier_head intel_scu_notifier; + +static inline void intel_scu_notifier_add(struct notifier_block *nb) +{ + blocking_notifier_chain_register(&intel_scu_notifier, nb); +} + +static inline void intel_scu_notifier_remove(struct notifier_block *nb) +{ + blocking_notifier_chain_unregister(&intel_scu_notifier, nb); +} + +static inline int intel_scu_notifier_post(unsigned long v, void *p) +{ + return blocking_notifier_call_chain(&intel_scu_notifier, v, p); +} + +#define SCU_AVAILABLE 1 +#define SCU_DOWN 2 + #endif diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c index 7b5063a6ad42..864830e1dd65 100644 --- a/arch/x86/kernel/cpu/mcheck/mce.c +++ b/arch/x86/kernel/cpu/mcheck/mce.c @@ -36,7 +36,6 @@ #include <linux/fs.h> #include <linux/mm.h> #include <linux/debugfs.h> -#include <linux/edac_mce.h> #include <linux/irq_work.h> #include <asm/processor.h> @@ -144,23 +143,20 @@ static struct mce_log mcelog = { void mce_log(struct mce *mce) { unsigned next, entry; + int ret = 0; /* Emit the trace record: */ trace_mce_record(mce); + ret = atomic_notifier_call_chain(&x86_mce_decoder_chain, 0, mce); + if (ret == NOTIFY_STOP) + return; + mce->finished = 0; wmb(); for (;;) { entry = rcu_dereference_check_mce(mcelog.next); for (;;) { - /* - * If edac_mce is enabled, it will check the error type - * and will process it, if it is a known error. - * Otherwise, the error will be sent through mcelog - * interface - */ - if (edac_mce_parse(mce)) - return; /* * When the buffer fills up discard new entries. @@ -556,10 +552,8 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b) * Don't get the IP here because it's unlikely to * have anything to do with the actual error location. */ - if (!(flags & MCP_DONTLOG) && !mce_dont_log_ce) { + if (!(flags & MCP_DONTLOG) && !mce_dont_log_ce) mce_log(&m); - atomic_notifier_call_chain(&x86_mce_decoder_chain, 0, &m); - } /* * Clear state for this bank. diff --git a/arch/x86/mm/gup.c b/arch/x86/mm/gup.c index dbe34b931374..ea305856151c 100644 --- a/arch/x86/mm/gup.c +++ b/arch/x86/mm/gup.c @@ -108,16 +108,6 @@ static inline void get_head_page_multiple(struct page *page, int nr) SetPageReferenced(page); } -static inline void get_huge_page_tail(struct page *page) -{ - /* - * __split_huge_page_refcount() cannot run - * from under us. - */ - VM_BUG_ON(atomic_read(&page->_count) < 0); - atomic_inc(&page->_count); -} - static noinline int gup_huge_pmd(pmd_t pmd, unsigned long addr, unsigned long end, int write, struct page **pages, int *nr) { diff --git a/arch/x86/platform/mrst/mrst.c b/arch/x86/platform/mrst/mrst.c index e6379526675b..6ed7afdaf4af 100644 --- a/arch/x86/platform/mrst/mrst.c +++ b/arch/x86/platform/mrst/mrst.c @@ -26,6 +26,8 @@ #include <linux/platform_device.h> #include <linux/irq.h> #include <linux/module.h> +#include <linux/notifier.h> +#include <linux/mfd/intel_msic.h> #include <asm/setup.h> #include <asm/mpspec_def.h> @@ -483,6 +485,128 @@ static void __init *no_platform_data(void *info) return NULL; } +static struct resource msic_resources[] = { + { + .start = INTEL_MSIC_IRQ_PHYS_BASE, + .end = INTEL_MSIC_IRQ_PHYS_BASE + 64 - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct intel_msic_platform_data msic_pdata; + +static struct platform_device msic_device = { + .name = "intel_msic", + .id = -1, + .dev = { + .platform_data = &msic_pdata, + }, + .num_resources = ARRAY_SIZE(msic_resources), + .resource = msic_resources, +}; + +static inline bool mrst_has_msic(void) +{ + return mrst_identify_cpu() == MRST_CPU_CHIP_PENWELL; +} + +static int msic_scu_status_change(struct notifier_block *nb, + unsigned long code, void *data) +{ + if (code == SCU_DOWN) { + platform_device_unregister(&msic_device); + return 0; + } + + return platform_device_register(&msic_device); +} + +static int __init msic_init(void) +{ + static struct notifier_block msic_scu_notifier = { + .notifier_call = msic_scu_status_change, + }; + + /* + * We need to be sure that the SCU IPC is ready before MSIC device + * can be registered. + */ + if (mrst_has_msic()) + intel_scu_notifier_add(&msic_scu_notifier); + + return 0; +} +arch_initcall(msic_init); + +/* + * msic_generic_platform_data - sets generic platform data for the block + * @info: pointer to the SFI device table entry for this block + * @block: MSIC block + * + * Function sets IRQ number from the SFI table entry for given device to + * the MSIC platform data. + */ +static void *msic_generic_platform_data(void *info, enum intel_msic_block block) +{ + struct sfi_device_table_entry *entry = info; + + BUG_ON(block < 0 || block >= INTEL_MSIC_BLOCK_LAST); + msic_pdata.irq[block] = entry->irq; + + return no_platform_data(info); +} + +static void *msic_battery_platform_data(void *info) +{ + return msic_generic_platform_data(info, INTEL_MSIC_BLOCK_BATTERY); +} + +static void *msic_gpio_platform_data(void *info) +{ + static struct intel_msic_gpio_pdata pdata; + int gpio = get_gpio_by_name("msic_gpio_base"); + + if (gpio < 0) + return NULL; + + pdata.gpio_base = gpio; + msic_pdata.gpio = &pdata; + + return msic_generic_platform_data(info, INTEL_MSIC_BLOCK_GPIO); +} + +static void *msic_audio_platform_data(void *info) +{ + struct platform_device *pdev; + + pdev = platform_device_register_simple("sst-platform", -1, NULL, 0); + if (IS_ERR(pdev)) { + pr_err("failed to create audio platform device\n"); + return NULL; + } + + return msic_generic_platform_data(info, INTEL_MSIC_BLOCK_AUDIO); +} + +static void *msic_power_btn_platform_data(void *info) +{ + return msic_generic_platform_data(info, INTEL_MSIC_BLOCK_POWER_BTN); +} + +static void *msic_ocd_platform_data(void *info) +{ + static struct intel_msic_ocd_pdata pdata; + int gpio = get_gpio_by_name("ocd_gpio"); + + if (gpio < 0) + return NULL; + + pdata.gpio = gpio; + msic_pdata.ocd = &pdata; + + return msic_generic_platform_data(info, INTEL_MSIC_BLOCK_OCD); +} + static const struct devs_id __initconst device_ids[] = { {"pmic_gpio", SFI_DEV_TYPE_SPI, 1, &pmic_gpio_platform_data}, {"spi_max3111", SFI_DEV_TYPE_SPI, 0, &max3111_platform_data}, @@ -491,7 +615,14 @@ static const struct devs_id __initconst device_ids[] = { {"emc1403", SFI_DEV_TYPE_I2C, 1, &emc1403_platform_data}, {"i2c_accel", SFI_DEV_TYPE_I2C, 0, &lis331dl_platform_data}, {"pmic_audio", SFI_DEV_TYPE_IPC, 1, &no_platform_data}, - {"msic_audio", SFI_DEV_TYPE_IPC, 1, &no_platform_data}, + + /* MSIC subdevices */ + {"msic_battery", SFI_DEV_TYPE_IPC, 1, &msic_battery_platform_data}, + {"msic_gpio", SFI_DEV_TYPE_IPC, 1, &msic_gpio_platform_data}, + {"msic_audio", SFI_DEV_TYPE_IPC, 1, &msic_audio_platform_data}, + {"msic_power_btn", SFI_DEV_TYPE_IPC, 1, &msic_power_btn_platform_data}, + {"msic_ocd", SFI_DEV_TYPE_IPC, 1, &msic_ocd_platform_data}, + {}, }; @@ -558,6 +689,9 @@ static void __init intel_scu_i2c_device_register(int bus, i2c_devs[i2c_next_dev++] = new_dev; } +BLOCKING_NOTIFIER_HEAD(intel_scu_notifier); +EXPORT_SYMBOL_GPL(intel_scu_notifier); + /* Called by IPC driver */ void intel_scu_devices_create(void) { @@ -582,6 +716,7 @@ void intel_scu_devices_create(void) } else i2c_register_board_info(i2c_bus[i], i2c_devs[i], 1); } + intel_scu_notifier_post(SCU_AVAILABLE, 0L); } EXPORT_SYMBOL_GPL(intel_scu_devices_create); @@ -590,6 +725,8 @@ void intel_scu_devices_destroy(void) { int i; + intel_scu_notifier_post(SCU_DOWN, 0L); + for (i = 0; i < ipc_next_dev; i++) platform_device_del(ipc_devs[i]); } @@ -606,19 +743,37 @@ static void __init install_irq_resource(struct platform_device *pdev, int irq) platform_device_add_resources(pdev, &res, 1); } -static void __init sfi_handle_ipc_dev(struct platform_device *pdev) +static void __init sfi_handle_ipc_dev(struct sfi_device_table_entry *entry) { const struct devs_id *dev = device_ids; + struct platform_device *pdev; void *pdata = NULL; while (dev->name[0]) { if (dev->type == SFI_DEV_TYPE_IPC && - !strncmp(dev->name, pdev->name, SFI_NAME_LEN)) { - pdata = dev->get_platform_data(pdev); + !strncmp(dev->name, entry->name, SFI_NAME_LEN)) { + pdata = dev->get_platform_data(entry); break; } dev++; } + + /* + * On Medfield the platform device creation is handled by the MSIC + * MFD driver so we don't need to do it here. + */ + if (mrst_has_msic()) + return; + + /* ID as IRQ is a hack that will go away */ + pdev = platform_device_alloc(entry->name, entry->irq); + if (pdev == NULL) { + pr_err("out of memory for SFI platform device '%s'.\n", + entry->name); + return; + } + install_irq_resource(pdev, entry->irq); + pdev->dev.platform_data = pdata; intel_scu_device_register(pdev); } @@ -671,7 +826,6 @@ static int __init sfi_parse_devs(struct sfi_table_header *table) struct sfi_device_table_entry *pentry; struct spi_board_info spi_info; struct i2c_board_info i2c_info; - struct platform_device *pdev; int num, i, bus; int ioapic; struct io_apic_irq_attr irq_attr; @@ -699,17 +853,9 @@ static int __init sfi_parse_devs(struct sfi_table_header *table) switch (pentry->type) { case SFI_DEV_TYPE_IPC: - /* ID as IRQ is a hack that will go away */ - pdev = platform_device_alloc(pentry->name, irq); - if (pdev == NULL) { - pr_err("out of memory for SFI platform device '%s'.\n", - pentry->name); - continue; - } - install_irq_resource(pdev, irq); pr_debug("info[%2d]: IPC bus, name = %16.16s, " - "irq = 0x%2x\n", i, pentry->name, irq); - sfi_handle_ipc_dev(pdev); + "irq = 0x%2x\n", i, pentry->name, pentry->irq); + sfi_handle_ipc_dev(pentry); break; case SFI_DEV_TYPE_SPI: memset(&spi_info, 0, sizeof(spi_info)); diff --git a/arch/um/Kconfig.x86 b/arch/x86/um/Kconfig index 21bebe63df66..21bebe63df66 100644 --- a/arch/um/Kconfig.x86 +++ b/arch/x86/um/Kconfig diff --git a/arch/x86/um/Makefile b/arch/x86/um/Makefile new file mode 100644 index 000000000000..8fb58400e415 --- /dev/null +++ b/arch/x86/um/Makefile @@ -0,0 +1,45 @@ +# +# Copyright (C) 2002 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com) +# + +ifeq ($(CONFIG_X86_32),y) + BITS := 32 +else + BITS := 64 +endif + +obj-y = bug.o bugs_$(BITS).o delay.o fault.o ksyms.o ldt.o \ + ptrace_$(BITS).o ptrace_user.o setjmp_$(BITS).o signal.o \ + stub_$(BITS).o stub_segv.o syscalls_$(BITS).o \ + sys_call_table_$(BITS).o sysrq_$(BITS).o tls_$(BITS).o \ + mem_$(BITS).o subarch.o os-$(OS)/ + +ifeq ($(CONFIG_X86_32),y) + +obj-y += checksum_32.o +obj-$(CONFIG_BINFMT_ELF) += elfcore.o + +subarch-y = ../lib/string_32.o ../lib/atomic64_32.o ../lib/atomic64_cx8_32.o +subarch-$(CONFIG_RWSEM_XCHGADD_ALGORITHM) += ../lib/rwsem.o +subarch-$(CONFIG_HIGHMEM) += ../mm/highmem_32.o + +else + +obj-y += vdso/ + +subarch-y = ../lib/csum-partial_64.o ../lib/memcpy_64.o ../lib/thunk_64.o \ + ../lib/rwsem.o + +endif + +subarch-$(CONFIG_MODULES) += ../kernel/module.o + +USER_OBJS := bugs_$(BITS).o ptrace_user.o fault.o + +extra-y += user-offsets.s +$(obj)/user-offsets.s: c_flags = -Wp,-MD,$(depfile) $(USER_CFLAGS) + +UNPROFILE_OBJS := stub_segv.o +CFLAGS_stub_segv.o := $(CFLAGS_NO_HARDENING) + +include arch/um/scripts/Makefile.rules diff --git a/arch/um/include/asm/apic.h b/arch/x86/um/asm/apic.h index 876dee84ab11..876dee84ab11 100644 --- a/arch/um/include/asm/apic.h +++ b/arch/x86/um/asm/apic.h diff --git a/arch/um/include/asm/arch_hweight.h b/arch/x86/um/asm/arch_hweight.h index c656cf443f4a..c656cf443f4a 100644 --- a/arch/um/include/asm/arch_hweight.h +++ b/arch/x86/um/asm/arch_hweight.h diff --git a/arch/um/sys-i386/asm/archparam.h b/arch/x86/um/asm/archparam.h index 2a18a884ca1b..c17cf68dda0f 100644 --- a/arch/um/sys-i386/asm/archparam.h +++ b/arch/x86/um/asm/archparam.h @@ -1,10 +1,13 @@ /* * Copyright (C) 2000 - 2003 Jeff Dike (jdike@addtoit.com) + * Copyright 2003 PathScale, Inc. * Licensed under the GPL */ -#ifndef __UM_ARCHPARAM_I386_H -#define __UM_ARCHPARAM_I386_H +#ifndef __UM_ARCHPARAM_H +#define __UM_ARCHPARAM_H + +#ifdef CONFIG_X86_32 #ifdef CONFIG_X86_PAE #define LAST_PKMAP 512 @@ -14,3 +17,4 @@ #endif +#endif diff --git a/arch/x86/um/asm/checksum.h b/arch/x86/um/asm/checksum.h new file mode 100644 index 000000000000..b6efe2381b5d --- /dev/null +++ b/arch/x86/um/asm/checksum.h @@ -0,0 +1,10 @@ +#ifndef __UM_CHECKSUM_H +#define __UM_CHECKSUM_H + +#ifdef CONFIG_X86_32 +# include "checksum_32.h" +#else +# include "checksum_64.h" +#endif + +#endif diff --git a/arch/um/sys-i386/shared/sysdep/checksum.h b/arch/x86/um/asm/checksum_32.h index ed47445f3905..caab74252e27 100644 --- a/arch/um/sys-i386/shared/sysdep/checksum.h +++ b/arch/x86/um/asm/checksum_32.h @@ -1,4 +1,4 @@ -/* +/* * Licensed under the GPL */ diff --git a/arch/um/sys-x86_64/shared/sysdep/checksum.h b/arch/x86/um/asm/checksum_64.h index a5be9031ea85..a5be9031ea85 100644 --- a/arch/um/sys-x86_64/shared/sysdep/checksum.h +++ b/arch/x86/um/asm/checksum_64.h diff --git a/arch/um/include/asm/desc.h b/arch/x86/um/asm/desc.h index 4ec34a51b62c..4ec34a51b62c 100644 --- a/arch/um/include/asm/desc.h +++ b/arch/x86/um/asm/desc.h diff --git a/arch/um/sys-x86_64/asm/elf.h b/arch/x86/um/asm/elf.h index 11a2bfb38859..f3b0633b69a1 100644 --- a/arch/um/sys-x86_64/asm/elf.h +++ b/arch/x86/um/asm/elf.h @@ -1,15 +1,103 @@ /* - * Copyright 2003 PathScale, Inc. - * Copyright (C) 2003 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com) - * + * Copyright (C) 2000 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com) * Licensed under the GPL */ -#ifndef __UM_ELF_X86_64_H -#define __UM_ELF_X86_64_H +#ifndef __UM_ELF_X86_H +#define __UM_ELF_X86_H #include <asm/user.h> #include "skas.h" +#ifdef CONFIG_X86_32 + +#define R_386_NONE 0 +#define R_386_32 1 +#define R_386_PC32 2 +#define R_386_GOT32 3 +#define R_386_PLT32 4 +#define R_386_COPY 5 +#define R_386_GLOB_DAT 6 +#define R_386_JMP_SLOT 7 +#define R_386_RELATIVE 8 +#define R_386_GOTOFF 9 +#define R_386_GOTPC 10 +#define R_386_NUM 11 + +/* + * This is used to ensure we don't load something for the wrong architecture. + */ +#define elf_check_arch(x) \ + (((x)->e_machine == EM_386) || ((x)->e_machine == EM_486)) + +#define ELF_CLASS ELFCLASS32 +#define ELF_DATA ELFDATA2LSB +#define ELF_ARCH EM_386 + +#define ELF_PLAT_INIT(regs, load_addr) do { \ + PT_REGS_EBX(regs) = 0; \ + PT_REGS_ECX(regs) = 0; \ + PT_REGS_EDX(regs) = 0; \ + PT_REGS_ESI(regs) = 0; \ + PT_REGS_EDI(regs) = 0; \ + PT_REGS_EBP(regs) = 0; \ + PT_REGS_EAX(regs) = 0; \ +} while (0) + +/* Shamelessly stolen from include/asm-i386/elf.h */ + +#define ELF_CORE_COPY_REGS(pr_reg, regs) do { \ + pr_reg[0] = PT_REGS_EBX(regs); \ + pr_reg[1] = PT_REGS_ECX(regs); \ + pr_reg[2] = PT_REGS_EDX(regs); \ + pr_reg[3] = PT_REGS_ESI(regs); \ + pr_reg[4] = PT_REGS_EDI(regs); \ + pr_reg[5] = PT_REGS_EBP(regs); \ + pr_reg[6] = PT_REGS_EAX(regs); \ + pr_reg[7] = PT_REGS_DS(regs); \ + pr_reg[8] = PT_REGS_ES(regs); \ + /* fake once used fs and gs selectors? */ \ + pr_reg[9] = PT_REGS_DS(regs); \ + pr_reg[10] = PT_REGS_DS(regs); \ + pr_reg[11] = PT_REGS_SYSCALL_NR(regs); \ + pr_reg[12] = PT_REGS_IP(regs); \ + pr_reg[13] = PT_REGS_CS(regs); \ + pr_reg[14] = PT_REGS_EFLAGS(regs); \ + pr_reg[15] = PT_REGS_SP(regs); \ + pr_reg[16] = PT_REGS_SS(regs); \ +} while (0); + +extern char * elf_aux_platform; +#define ELF_PLATFORM (elf_aux_platform) + +extern unsigned long vsyscall_ehdr; +extern unsigned long vsyscall_end; +extern unsigned long __kernel_vsyscall; + +/* + * This is the range that is readable by user mode, and things + * acting like user mode such as get_user_pages. + */ +#define FIXADDR_USER_START vsyscall_ehdr +#define FIXADDR_USER_END vsyscall_end + + +/* + * Architecture-neutral AT_ values in 0-17, leave some room + * for more of them, start the x86-specific ones at 32. + */ +#define AT_SYSINFO 32 +#define AT_SYSINFO_EHDR 33 + +#define ARCH_DLINFO \ +do { \ + if ( vsyscall_ehdr ) { \ + NEW_AUX_ENT(AT_SYSINFO, __kernel_vsyscall); \ + NEW_AUX_ENT(AT_SYSINFO_EHDR, vsyscall_ehdr); \ + } \ +} while (0) + +#else + /* x86-64 relocation types, taken from asm-x86_64/elf.h */ #define R_X86_64_NONE 0 /* No reloc */ #define R_X86_64_64 1 /* Direct 64 bit */ @@ -31,13 +119,6 @@ #define R_X86_64_NUM 16 -typedef unsigned long elf_greg_t; - -#define ELF_NGREG (sizeof (struct user_regs_struct) / sizeof(elf_greg_t)) -typedef elf_greg_t elf_gregset_t[ELF_NGREG]; - -typedef struct user_i387_struct elf_fpregset_t; - /* * This is used to ensure we don't load something for the wrong architecture. */ @@ -95,6 +176,30 @@ typedef struct user_i387_struct elf_fpregset_t; (pr_reg)[25] = 0; \ (pr_reg)[26] = 0; +#define ELF_PLATFORM "x86_64" + +/* No user-accessible fixmap addresses, i.e. vsyscall */ +#define FIXADDR_USER_START 0 +#define FIXADDR_USER_END 0 + +#define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1 +struct linux_binprm; +extern int arch_setup_additional_pages(struct linux_binprm *bprm, + int uses_interp); + +extern unsigned long um_vdso_addr; +#define AT_SYSINFO_EHDR 33 +#define ARCH_DLINFO NEW_AUX_ENT(AT_SYSINFO_EHDR, um_vdso_addr) + +#endif + +typedef unsigned long elf_greg_t; + +#define ELF_NGREG (sizeof (struct user_regs_struct) / sizeof(elf_greg_t)) +typedef elf_greg_t elf_gregset_t[ELF_NGREG]; + +typedef struct user_i387_struct elf_fpregset_t; + #define task_pt_regs(t) (&(t)->thread.regs) struct task_struct; @@ -103,11 +208,6 @@ extern int elf_core_copy_fpregs(struct task_struct *t, elf_fpregset_t *fpu); #define ELF_CORE_COPY_FPREGS(t, fpu) elf_core_copy_fpregs(t, fpu) -#ifdef TIF_IA32 /* XXX */ -#error XXX, indeed - clear_thread_flag(TIF_IA32); -#endif - #define ELF_EXEC_PAGESIZE 4096 #define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3) @@ -115,18 +215,7 @@ extern int elf_core_copy_fpregs(struct task_struct *t, elf_fpregset_t *fpu); extern long elf_aux_hwcap; #define ELF_HWCAP (elf_aux_hwcap) -#define ELF_PLATFORM "x86_64" - #define SET_PERSONALITY(ex) do ; while(0) - #define __HAVE_ARCH_GATE_AREA 1 -#define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1 -struct linux_binprm; -extern int arch_setup_additional_pages(struct linux_binprm *bprm, - int uses_interp); - -extern unsigned long um_vdso_addr; -#define AT_SYSINFO_EHDR 33 -#define ARCH_DLINFO NEW_AUX_ENT(AT_SYSINFO_EHDR, um_vdso_addr) #endif diff --git a/arch/um/include/asm/irq_vectors.h b/arch/x86/um/asm/irq_vectors.h index 272a81e0ce14..272a81e0ce14 100644 --- a/arch/um/include/asm/irq_vectors.h +++ b/arch/x86/um/asm/irq_vectors.h diff --git a/arch/x86/um/asm/mm_context.h b/arch/x86/um/asm/mm_context.h new file mode 100644 index 000000000000..4a73d63e4760 --- /dev/null +++ b/arch/x86/um/asm/mm_context.h @@ -0,0 +1,72 @@ +/* + * Copyright (C) 2004 Fujitsu Siemens Computers GmbH + * Licensed under the GPL + * + * Author: Bodo Stroesser <bstroesser@fujitsu-siemens.com> + */ + +#ifndef __ASM_LDT_H +#define __ASM_LDT_H + +#include <linux/mutex.h> +#include <asm/ldt.h> + +extern void ldt_host_info(void); + +#define LDT_PAGES_MAX \ + ((LDT_ENTRIES * LDT_ENTRY_SIZE)/PAGE_SIZE) +#define LDT_ENTRIES_PER_PAGE \ + (PAGE_SIZE/LDT_ENTRY_SIZE) +#define LDT_DIRECT_ENTRIES \ + ((LDT_PAGES_MAX*sizeof(void *))/LDT_ENTRY_SIZE) + +struct ldt_entry { + __u32 a; + __u32 b; +}; + +typedef struct uml_ldt { + int entry_count; + struct mutex lock; + union { + struct ldt_entry * pages[LDT_PAGES_MAX]; + struct ldt_entry entries[LDT_DIRECT_ENTRIES]; + } u; +} uml_ldt_t; + +#define LDT_entry_a(info) \ + ((((info)->base_addr & 0x0000ffff) << 16) | ((info)->limit & 0x0ffff)) + +#define LDT_entry_b(info) \ + (((info)->base_addr & 0xff000000) | \ + (((info)->base_addr & 0x00ff0000) >> 16) | \ + ((info)->limit & 0xf0000) | \ + (((info)->read_exec_only ^ 1) << 9) | \ + ((info)->contents << 10) | \ + (((info)->seg_not_present ^ 1) << 15) | \ + ((info)->seg_32bit << 22) | \ + ((info)->limit_in_pages << 23) | \ + ((info)->useable << 20) | \ + 0x7000) + +#define _LDT_empty(info) (\ + (info)->base_addr == 0 && \ + (info)->limit == 0 && \ + (info)->contents == 0 && \ + (info)->read_exec_only == 1 && \ + (info)->seg_32bit == 0 && \ + (info)->limit_in_pages == 0 && \ + (info)->seg_not_present == 1 && \ + (info)->useable == 0 ) + +#ifdef CONFIG_X86_64 +#define LDT_empty(info) (_LDT_empty(info) && ((info)->lm == 0)) +#else +#define LDT_empty(info) (_LDT_empty(info)) +#endif + +struct uml_arch_mm_context { + uml_ldt_t ldt; +}; + +#endif diff --git a/arch/x86/um/asm/module.h b/arch/x86/um/asm/module.h new file mode 100644 index 000000000000..61af80e932eb --- /dev/null +++ b/arch/x86/um/asm/module.h @@ -0,0 +1,23 @@ +#ifndef __UM_MODULE_H +#define __UM_MODULE_H + +/* UML is simple */ +struct mod_arch_specific +{ +}; + +#ifdef CONFIG_X86_32 + +#define Elf_Shdr Elf32_Shdr +#define Elf_Sym Elf32_Sym +#define Elf_Ehdr Elf32_Ehdr + +#else + +#define Elf_Shdr Elf64_Shdr +#define Elf_Sym Elf64_Sym +#define Elf_Ehdr Elf64_Ehdr + +#endif + +#endif diff --git a/arch/x86/um/asm/processor.h b/arch/x86/um/asm/processor.h new file mode 100644 index 000000000000..118c143a9cb4 --- /dev/null +++ b/arch/x86/um/asm/processor.h @@ -0,0 +1,22 @@ +#ifndef __UM_PROCESSOR_H +#define __UM_PROCESSOR_H + +/* include faultinfo structure */ +#include <sysdep/faultinfo.h> + +#ifdef CONFIG_X86_32 +# include "processor_32.h" +#else +# include "processor_64.h" +#endif + +#define KSTK_EIP(tsk) KSTK_REG(tsk, HOST_IP) +#define KSTK_ESP(tsk) KSTK_REG(tsk, HOST_IP) +#define KSTK_EBP(tsk) KSTK_REG(tsk, HOST_BP) + +#define ARCH_IS_STACKGROW(address) \ + (address + 65536 + 32 * sizeof(unsigned long) >= UPT_SP(¤t->thread.regs.regs)) + +#include <asm/processor-generic.h> + +#endif diff --git a/arch/um/sys-i386/asm/processor.h b/arch/x86/um/asm/processor_32.h index 82a9061ab5be..018f732704dd 100644 --- a/arch/um/sys-i386/asm/processor.h +++ b/arch/x86/um/asm/processor_32.h @@ -6,15 +6,12 @@ #ifndef __UM_PROCESSOR_I386_H #define __UM_PROCESSOR_I386_H -#include "linux/string.h" -#include <sysdep/host_ldt.h> -#include "asm/segment.h" +#include <linux/string.h> +#include <asm/segment.h> +#include <asm/ldt.h> extern int host_has_cmov; -/* include faultinfo structure */ -#include "sysdep/faultinfo.h" - struct uml_tls_struct { struct user_desc tls; unsigned flushed:1; @@ -66,13 +63,4 @@ static inline void rep_nop(void) #define current_text_addr() \ ({ void *pc; __asm__("movl $1f,%0\n1:":"=g" (pc)); pc; }) -#define ARCH_IS_STACKGROW(address) \ - (address + 32 >= UPT_SP(¤t->thread.regs.regs)) - -#define KSTK_EIP(tsk) KSTK_REG(tsk, EIP) -#define KSTK_ESP(tsk) KSTK_REG(tsk, UESP) -#define KSTK_EBP(tsk) KSTK_REG(tsk, EBP) - -#include "asm/processor-generic.h" - #endif diff --git a/arch/um/sys-x86_64/asm/processor.h b/arch/x86/um/asm/processor_64.h index 875a26a62614..61de92d916c3 100644 --- a/arch/um/sys-x86_64/asm/processor.h +++ b/arch/x86/um/asm/processor_64.h @@ -7,9 +7,6 @@ #ifndef __UM_PROCESSOR_X86_64_H #define __UM_PROCESSOR_X86_64_H -/* include faultinfo structure */ -#include "sysdep/faultinfo.h" - struct arch_thread { unsigned long debugregs[8]; int debugregs_seq; @@ -45,12 +42,4 @@ static inline void arch_copy_thread(struct arch_thread *from, #define current_text_addr() \ ({ void *pc; __asm__("movq $1f,%0\n1:":"=g" (pc)); pc; }) -#define ARCH_IS_STACKGROW(address) \ - (address + 128 >= UPT_SP(¤t->thread.regs.regs)) - -#define KSTK_EIP(tsk) KSTK_REG(tsk, RIP) -#define KSTK_ESP(tsk) KSTK_REG(tsk, RSP) - -#include "asm/processor-generic.h" - #endif diff --git a/arch/x86/um/asm/ptrace.h b/arch/x86/um/asm/ptrace.h new file mode 100644 index 000000000000..c8aca8c501b0 --- /dev/null +++ b/arch/x86/um/asm/ptrace.h @@ -0,0 +1,5 @@ +#ifdef CONFIG_X86_32 +# include "ptrace_32.h" +#else +# include "ptrace_64.h" +#endif diff --git a/arch/um/sys-i386/asm/ptrace.h b/arch/x86/um/asm/ptrace_32.h index 5d2a59112537..5d2a59112537 100644 --- a/arch/um/sys-i386/asm/ptrace.h +++ b/arch/x86/um/asm/ptrace_32.h diff --git a/arch/um/sys-x86_64/asm/ptrace.h b/arch/x86/um/asm/ptrace_64.h index 83d8c473b905..706a0d80545c 100644 --- a/arch/um/sys-x86_64/asm/ptrace.h +++ b/arch/x86/um/asm/ptrace_64.h @@ -40,7 +40,7 @@ #define PT_REGS_ORIG_RAX(r) UPT_ORIG_RAX(&(r)->regs) #define PT_REGS_RIP(r) UPT_IP(&(r)->regs) -#define PT_REGS_RSP(r) UPT_SP(&(r)->regs) +#define PT_REGS_SP(r) UPT_SP(&(r)->regs) #define PT_REGS_EFLAGS(r) UPT_EFLAGS(&(r)->regs) diff --git a/arch/um/include/asm/required-features.h b/arch/x86/um/asm/required-features.h index dfb967b2d2f3..dfb967b2d2f3 100644 --- a/arch/um/include/asm/required-features.h +++ b/arch/x86/um/asm/required-features.h diff --git a/arch/um/include/asm/segment.h b/arch/x86/um/asm/segment.h index 45183fcd10b6..45183fcd10b6 100644 --- a/arch/um/include/asm/segment.h +++ b/arch/x86/um/asm/segment.h diff --git a/arch/um/sys-x86_64/shared/sysdep/system.h b/arch/x86/um/asm/system.h index d1b93c436200..a459fd9b7598 100644 --- a/arch/um/sys-x86_64/shared/sysdep/system.h +++ b/arch/x86/um/asm/system.h @@ -129,4 +129,7 @@ static inline void rdtsc_barrier(void) alternative(ASM_NOP3, "lfence", X86_FEATURE_LFENCE_RDTSC); } +extern void *_switch_to(void *prev, void *next, void *last); +#define switch_to(prev, next, last) prev = _switch_to(prev, next, last) + #endif diff --git a/arch/um/sys-x86_64/shared/sysdep/vm-flags.h b/arch/x86/um/asm/vm-flags.h index 3978e55132d2..7c297e9e2413 100644 --- a/arch/um/sys-x86_64/shared/sysdep/vm-flags.h +++ b/arch/x86/um/asm/vm-flags.h @@ -4,8 +4,17 @@ * Licensed under the GPL */ -#ifndef __VM_FLAGS_X86_64_H -#define __VM_FLAGS_X86_64_H +#ifndef __VM_FLAGS_X86_H +#define __VM_FLAGS_X86_H + +#ifdef CONFIG_X86_32 + +#define VM_DATA_DEFAULT_FLAGS \ + (VM_READ | VM_WRITE | \ + ((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0 ) | \ + VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) + +#else #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) @@ -13,3 +22,4 @@ VM_EXEC | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) #endif +#endif diff --git a/arch/um/sys-x86_64/bug.c b/arch/x86/um/bug.c index e8034e363d83..e8034e363d83 100644 --- a/arch/um/sys-x86_64/bug.c +++ b/arch/x86/um/bug.c diff --git a/arch/um/sys-i386/bugs.c b/arch/x86/um/bugs_32.c index 2c6d0d731c12..a1fba5fb9dbe 100644 --- a/arch/um/sys-i386/bugs.c +++ b/arch/x86/um/bugs_32.c @@ -4,17 +4,17 @@ */ #include <signal.h> -#include "kern_constants.h" #include "kern_util.h" #include "longjmp.h" -#include "task.h" -#include "user.h" #include "sysdep/ptrace.h" +#include <generated/asm-offsets.h> /* Set during early boot */ static int host_has_cmov = 1; static jmp_buf cmov_test_return; +#define TASK_PID(task) *((int *) &(((char *) (task))[HOST_TASK_PID])) + static void cmov_sigill_test_handler(int sig) { host_has_cmov = 0; diff --git a/arch/um/sys-x86_64/bugs.c b/arch/x86/um/bugs_64.c index 44e02ba2a265..44e02ba2a265 100644 --- a/arch/um/sys-x86_64/bugs.c +++ b/arch/x86/um/bugs_64.c diff --git a/arch/um/sys-i386/checksum.S b/arch/x86/um/checksum_32.S index f058d2f82e18..f058d2f82e18 100644 --- a/arch/um/sys-i386/checksum.S +++ b/arch/x86/um/checksum_32.S diff --git a/arch/um/sys-i386/delay.c b/arch/x86/um/delay.c index f3fe1a688f7e..f3fe1a688f7e 100644 --- a/arch/um/sys-i386/delay.c +++ b/arch/x86/um/delay.c diff --git a/arch/um/sys-i386/elfcore.c b/arch/x86/um/elfcore.c index 6bb49b687c97..6bb49b687c97 100644 --- a/arch/um/sys-i386/elfcore.c +++ b/arch/x86/um/elfcore.c diff --git a/arch/um/sys-i386/fault.c b/arch/x86/um/fault.c index d670f68532f4..d670f68532f4 100644 --- a/arch/um/sys-i386/fault.c +++ b/arch/x86/um/fault.c diff --git a/arch/um/sys-x86_64/ksyms.c b/arch/x86/um/ksyms.c index 1db2fce00948..2e8f43ec6214 100644 --- a/arch/um/sys-x86_64/ksyms.c +++ b/arch/x86/um/ksyms.c @@ -2,10 +2,12 @@ #include <asm/string.h> #include <asm/checksum.h> +#ifndef CONFIG_X86_32 /*XXX: we need them because they would be exported by x86_64 */ #if (__GNUC__ == 4 && __GNUC_MINOR__ >= 3) || __GNUC__ > 4 EXPORT_SYMBOL(memcpy); #else EXPORT_SYMBOL(__memcpy); #endif +#endif EXPORT_SYMBOL(csum_partial); diff --git a/arch/um/sys-i386/ldt.c b/arch/x86/um/ldt.c index 3f2bf208d884..26b0e39d2ce9 100644 --- a/arch/um/sys-i386/ldt.c +++ b/arch/x86/um/ldt.c @@ -137,7 +137,7 @@ static int read_ldt(void __user * ptr, unsigned long bytecount) { int i, err = 0; unsigned long size; - uml_ldt_t * ldt = ¤t->mm->context.ldt; + uml_ldt_t *ldt = ¤t->mm->context.arch.ldt; if (!ldt->entry_count) goto out; @@ -205,7 +205,7 @@ static int read_default_ldt(void __user * ptr, unsigned long bytecount) static int write_ldt(void __user * ptr, unsigned long bytecount, int func) { - uml_ldt_t * ldt = ¤t->mm->context.ldt; + uml_ldt_t *ldt = ¤t->mm->context.arch.ldt; struct mm_id * mm_idp = ¤t->mm->context.id; int i, err; struct user_desc ldt_info; @@ -397,7 +397,7 @@ long init_new_ldt(struct mm_context *new_mm, struct mm_context *from_mm) if (!ptrace_ldt) - mutex_init(&new_mm->ldt.lock); + mutex_init(&new_mm->arch.ldt.lock); if (!from_mm) { memset(&desc, 0, sizeof(desc)); @@ -429,7 +429,7 @@ long init_new_ldt(struct mm_context *new_mm, struct mm_context *from_mm) break; } } - new_mm->ldt.entry_count = 0; + new_mm->arch.ldt.entry_count = 0; goto out; } @@ -457,26 +457,26 @@ long init_new_ldt(struct mm_context *new_mm, struct mm_context *from_mm) * i.e., we have to use the stub for modify_ldt, which * can't handle the big read buffer of up to 64kB. */ - mutex_lock(&from_mm->ldt.lock); - if (from_mm->ldt.entry_count <= LDT_DIRECT_ENTRIES) - memcpy(new_mm->ldt.u.entries, from_mm->ldt.u.entries, - sizeof(new_mm->ldt.u.entries)); + mutex_lock(&from_mm->arch.ldt.lock); + if (from_mm->arch.ldt.entry_count <= LDT_DIRECT_ENTRIES) + memcpy(new_mm->arch.ldt.u.entries, from_mm->arch.ldt.u.entries, + sizeof(new_mm->arch.ldt.u.entries)); else { - i = from_mm->ldt.entry_count / LDT_ENTRIES_PER_PAGE; + i = from_mm->arch.ldt.entry_count / LDT_ENTRIES_PER_PAGE; while (i-->0) { page = __get_free_page(GFP_KERNEL|__GFP_ZERO); if (!page) { err = -ENOMEM; break; } - new_mm->ldt.u.pages[i] = + new_mm->arch.ldt.u.pages[i] = (struct ldt_entry *) page; - memcpy(new_mm->ldt.u.pages[i], - from_mm->ldt.u.pages[i], PAGE_SIZE); + memcpy(new_mm->arch.ldt.u.pages[i], + from_mm->arch.ldt.u.pages[i], PAGE_SIZE); } } - new_mm->ldt.entry_count = from_mm->ldt.entry_count; - mutex_unlock(&from_mm->ldt.lock); + new_mm->arch.ldt.entry_count = from_mm->arch.ldt.entry_count; + mutex_unlock(&from_mm->arch.ldt.lock); } out: @@ -488,12 +488,12 @@ void free_ldt(struct mm_context *mm) { int i; - if (!ptrace_ldt && mm->ldt.entry_count > LDT_DIRECT_ENTRIES) { - i = mm->ldt.entry_count / LDT_ENTRIES_PER_PAGE; + if (!ptrace_ldt && mm->arch.ldt.entry_count > LDT_DIRECT_ENTRIES) { + i = mm->arch.ldt.entry_count / LDT_ENTRIES_PER_PAGE; while (i-- > 0) - free_page((long) mm->ldt.u.pages[i]); + free_page((long) mm->arch.ldt.u.pages[i]); } - mm->ldt.entry_count = 0; + mm->arch.ldt.entry_count = 0; } int sys_modify_ldt(int func, void __user *ptr, unsigned long bytecount) diff --git a/arch/um/sys-i386/mem.c b/arch/x86/um/mem_32.c index 639900a6fde9..639900a6fde9 100644 --- a/arch/um/sys-i386/mem.c +++ b/arch/x86/um/mem_32.c diff --git a/arch/um/sys-x86_64/mem.c b/arch/x86/um/mem_64.c index 546518727a73..546518727a73 100644 --- a/arch/um/sys-x86_64/mem.c +++ b/arch/x86/um/mem_64.c diff --git a/arch/um/os-Linux/sys-i386/Makefile b/arch/x86/um/os-Linux/Makefile index b4bc6ac4f30b..253bfb8cb702 100644 --- a/arch/um/os-Linux/sys-i386/Makefile +++ b/arch/x86/um/os-Linux/Makefile @@ -3,7 +3,10 @@ # Licensed under the GPL # -obj-y = registers.o signal.o task_size.o tls.o +obj-y = registers.o task_size.o mcontext.o + +obj-$(CONFIG_X86_32) += tls.o +obj-$(CONFIG_64BIT) += prctl.o USER_OBJS := $(obj-y) diff --git a/arch/x86/um/os-Linux/mcontext.c b/arch/x86/um/os-Linux/mcontext.c new file mode 100644 index 000000000000..1d33d72c6284 --- /dev/null +++ b/arch/x86/um/os-Linux/mcontext.c @@ -0,0 +1,31 @@ +#include <sys/ucontext.h> +#define __FRAME_OFFSETS +#include <asm/ptrace.h> +#include <sysdep/ptrace.h> + +void get_regs_from_mc(struct uml_pt_regs *regs, mcontext_t *mc) +{ +#ifdef __i386__ +#define COPY2(X,Y) regs->gp[X] = mc->gregs[REG_##Y] +#define COPY(X) regs->gp[X] = mc->gregs[REG_##X] +#define COPY_SEG(X) regs->gp[X] = mc->gregs[REG_##X] & 0xffff; +#define COPY_SEG_CPL3(X) regs->gp[X] = (mc->gregs[REG_##X] & 0xffff) | 3; + COPY_SEG(GS); COPY_SEG(FS); COPY_SEG(ES); COPY_SEG(DS); + COPY(EDI); COPY(ESI); COPY(EBP); + COPY2(UESP, ESP); /* sic */ + COPY(EBX); COPY(EDX); COPY(ECX); COPY(EAX); + COPY(EIP); COPY_SEG_CPL3(CS); COPY(EFL); COPY_SEG_CPL3(SS); +#else +#define COPY2(X,Y) regs->gp[X/sizeof(unsigned long)] = mc->gregs[REG_##Y] +#define COPY(X) regs->gp[X/sizeof(unsigned long)] = mc->gregs[REG_##X] + COPY(R8); COPY(R9); COPY(R10); COPY(R11); + COPY(R12); COPY(R13); COPY(R14); COPY(R15); + COPY(RDI); COPY(RSI); COPY(RBP); COPY(RBX); + COPY(RDX); COPY(RAX); COPY(RCX); COPY(RSP); + COPY(RIP); + COPY2(EFLAGS, EFL); + COPY2(CS, CSGSFS); + regs->gp[CS / sizeof(unsigned long)] &= 0xffff; + regs->gp[CS / sizeof(unsigned long)] |= 3; +#endif +} diff --git a/arch/um/os-Linux/sys-x86_64/prctl.c b/arch/x86/um/os-Linux/prctl.c index 9d34eddb517f..9d34eddb517f 100644 --- a/arch/um/os-Linux/sys-x86_64/prctl.c +++ b/arch/x86/um/os-Linux/prctl.c diff --git a/arch/um/os-Linux/sys-i386/registers.c b/arch/x86/um/os-Linux/registers.c index 229f7a53d8da..0cdbb86b012b 100644 --- a/arch/um/os-Linux/sys-i386/registers.c +++ b/arch/x86/um/os-Linux/registers.c @@ -6,10 +6,10 @@ #include <errno.h> #include <sys/ptrace.h> +#ifdef __i386__ #include <sys/user.h> -#include "kern_constants.h" +#endif #include "longjmp.h" -#include "user.h" #include "sysdep/ptrace_user.h" int save_fp_registers(int pid, unsigned long *fp_regs) @@ -26,6 +26,8 @@ int restore_fp_registers(int pid, unsigned long *fp_regs) return 0; } +#ifdef __i386__ +int have_fpx_regs = 1; int save_fpx_registers(int pid, unsigned long *fp_regs) { if (ptrace(PTRACE_GETFPXREGS, pid, 0, fp_regs) < 0) @@ -40,24 +42,6 @@ int restore_fpx_registers(int pid, unsigned long *fp_regs) return 0; } -unsigned long get_thread_reg(int reg, jmp_buf *buf) -{ - switch (reg) { - case EIP: - return buf[0]->__eip; - case UESP: - return buf[0]->__esp; - case EBP: - return buf[0]->__ebp; - default: - printk(UM_KERN_ERR "get_thread_regs - unknown register %d\n", - reg); - return 0; - } -} - -int have_fpx_regs = 1; - int get_fp_registers(int pid, unsigned long *regs) { if (have_fpx_regs) @@ -89,3 +73,41 @@ void arch_init_registers(int pid) have_fpx_regs = 0; } +#else + +int get_fp_registers(int pid, unsigned long *regs) +{ + return save_fp_registers(pid, regs); +} + +int put_fp_registers(int pid, unsigned long *regs) +{ + return restore_fp_registers(pid, regs); +} + +#endif + +unsigned long get_thread_reg(int reg, jmp_buf *buf) +{ + switch (reg) { +#ifdef __i386__ + case HOST_IP: + return buf[0]->__eip; + case HOST_SP: + return buf[0]->__esp; + case HOST_BP: + return buf[0]->__ebp; +#else + case HOST_IP: + return buf[0]->__rip; + case HOST_SP: + return buf[0]->__rsp; + case HOST_BP: + return buf[0]->__rbp; +#endif + default: + printk(UM_KERN_ERR "get_thread_regs - unknown register %d\n", + reg); + return 0; + } +} diff --git a/arch/um/os-Linux/sys-i386/task_size.c b/arch/x86/um/os-Linux/task_size.c index be04c1e183bf..efb16c5c9bcf 100644 --- a/arch/um/os-Linux/sys-i386/task_size.c +++ b/arch/x86/um/os-Linux/task_size.c @@ -3,7 +3,8 @@ #include <signal.h> #include <sys/mman.h> #include "longjmp.h" -#include "kern_constants.h" + +#ifdef __i386__ static jmp_buf buf; @@ -137,3 +138,13 @@ out: return top; } + +#else + +unsigned long os_get_top_address(void) +{ + /* The old value of CONFIG_TOP_ADDR */ + return 0x7fc0000000; +} + +#endif diff --git a/arch/um/os-Linux/sys-i386/tls.c b/arch/x86/um/os-Linux/tls.c index 32ed41ec1a3d..82276b6071af 100644 --- a/arch/um/os-Linux/sys-i386/tls.c +++ b/arch/x86/um/os-Linux/tls.c @@ -1,16 +1,25 @@ #include <errno.h> #include <linux/unistd.h> +#include <sys/ptrace.h> #include <sys/syscall.h> #include <unistd.h> #include "sysdep/tls.h" -#include "user.h" + +#ifndef PTRACE_GET_THREAD_AREA +#define PTRACE_GET_THREAD_AREA 25 +#endif + +#ifndef PTRACE_SET_THREAD_AREA +#define PTRACE_SET_THREAD_AREA 26 +#endif /* Checks whether host supports TLS, and sets *tls_min according to the value * valid on the host. * i386 host have it == 6; x86_64 host have it == 12, for i386 emulation. */ -void check_host_supports_tls(int *supports_tls, int *tls_min) { +void check_host_supports_tls(int *supports_tls, int *tls_min) +{ /* Values for x86 and x86_64.*/ int val[] = {GDT_ENTRY_TLS_MIN_I386, GDT_ENTRY_TLS_MIN_X86_64}; int i; @@ -34,3 +43,25 @@ void check_host_supports_tls(int *supports_tls, int *tls_min) { *supports_tls = 0; } + +int os_set_thread_area(user_desc_t *info, int pid) +{ + int ret; + + ret = ptrace(PTRACE_SET_THREAD_AREA, pid, info->entry_number, + (unsigned long) info); + if (ret < 0) + ret = -errno; + return ret; +} + +int os_get_thread_area(user_desc_t *info, int pid) +{ + int ret; + + ret = ptrace(PTRACE_GET_THREAD_AREA, pid, info->entry_number, + (unsigned long) info); + if (ret < 0) + ret = -errno; + return ret; +} diff --git a/arch/um/sys-i386/ptrace.c b/arch/x86/um/ptrace_32.c index 3375c2717851..3b949daa095c 100644 --- a/arch/um/sys-i386/ptrace.c +++ b/arch/x86/um/ptrace_32.c @@ -50,20 +50,47 @@ int is_syscall(unsigned long addr) /* 1 = access 0 = no access */ #define FLAG_MASK 0x00044dd5 +static const int reg_offsets[] = { + [EBX] = HOST_BX, + [ECX] = HOST_CX, + [EDX] = HOST_DX, + [ESI] = HOST_SI, + [EDI] = HOST_DI, + [EBP] = HOST_BP, + [EAX] = HOST_AX, + [DS] = HOST_DS, + [ES] = HOST_ES, + [FS] = HOST_FS, + [GS] = HOST_GS, + [EIP] = HOST_IP, + [CS] = HOST_CS, + [EFL] = HOST_EFLAGS, + [UESP] = HOST_SP, + [SS] = HOST_SS, +}; + int putreg(struct task_struct *child, int regno, unsigned long value) { regno >>= 2; switch (regno) { + case EBX: + case ECX: + case EDX: + case ESI: + case EDI: + case EBP: + case EAX: + case EIP: + case UESP: + break; case FS: if (value && (value & 3) != 3) return -EIO; - PT_REGS_FS(&child->thread.regs) = value; - return 0; + break; case GS: if (value && (value & 3) != 3) return -EIO; - PT_REGS_GS(&child->thread.regs) = value; - return 0; + break; case DS: case ES: if (value && (value & 3) != 3) @@ -78,10 +105,15 @@ int putreg(struct task_struct *child, int regno, unsigned long value) break; case EFL: value &= FLAG_MASK; - value |= PT_REGS_EFLAGS(&child->thread.regs); - break; + child->thread.regs.regs.gp[HOST_EFLAGS] |= value; + return 0; + case ORIG_EAX: + child->thread.regs.regs.syscall = value; + return 0; + default : + panic("Bad register in putreg() : %d\n", regno); } - PT_REGS_SET(&child->thread.regs, regno, value); + child->thread.regs.regs.gp[reg_offsets[regno]] = value; return 0; } @@ -106,22 +138,35 @@ int poke_user(struct task_struct *child, long addr, long data) unsigned long getreg(struct task_struct *child, int regno) { - unsigned long retval = ~0UL; + unsigned long mask = ~0UL; regno >>= 2; switch (regno) { + case ORIG_EAX: + return child->thread.regs.regs.syscall; case FS: case GS: case DS: case ES: case SS: case CS: - retval = 0xffff; - /* fall through */ + mask = 0xffff; + break; + case EIP: + case UESP: + case EAX: + case EBX: + case ECX: + case EDX: + case ESI: + case EDI: + case EBP: + case EFL: + break; default: - retval &= PT_REG(&child->thread.regs, regno); + panic("Bad register in getreg() : %d\n", regno); } - return retval; + return mask & child->thread.regs.regs.gp[reg_offsets[regno]]; } /* read the word at location addr in the USER area. */ diff --git a/arch/um/sys-x86_64/ptrace.c b/arch/x86/um/ptrace_64.c index 4005506834fd..3b52bf0b418a 100644 --- a/arch/um/sys-x86_64/ptrace.c +++ b/arch/x86/um/ptrace_64.c @@ -18,10 +18,39 @@ */ #define FLAG_MASK 0x44dd5UL -int putreg(struct task_struct *child, int regno, unsigned long value) +static const int reg_offsets[] = { - unsigned long tmp; + [R8 >> 3] = HOST_R8, + [R9 >> 3] = HOST_R9, + [R10 >> 3] = HOST_R10, + [R11 >> 3] = HOST_R11, + [R12 >> 3] = HOST_R12, + [R13 >> 3] = HOST_R13, + [R14 >> 3] = HOST_R14, + [R15 >> 3] = HOST_R15, + [RIP >> 3] = HOST_IP, + [RSP >> 3] = HOST_SP, + [RAX >> 3] = HOST_AX, + [RBX >> 3] = HOST_BX, + [RCX >> 3] = HOST_CX, + [RDX >> 3] = HOST_DX, + [RSI >> 3] = HOST_SI, + [RDI >> 3] = HOST_DI, + [RBP >> 3] = HOST_BP, + [CS >> 3] = HOST_CS, + [SS >> 3] = HOST_SS, + [FS_BASE >> 3] = HOST_FS_BASE, + [GS_BASE >> 3] = HOST_GS_BASE, + [DS >> 3] = HOST_DS, + [ES >> 3] = HOST_ES, + [FS >> 3] = HOST_FS, + [GS >> 3] = HOST_GS, + [EFLAGS >> 3] = HOST_EFLAGS, + [ORIG_RAX >> 3] = HOST_ORIG_AX, +}; +int putreg(struct task_struct *child, int regno, unsigned long value) +{ #ifdef TIF_IA32 /* * Some code in the 64bit emulation may not be 64bit clean. @@ -31,6 +60,26 @@ int putreg(struct task_struct *child, int regno, unsigned long value) value &= 0xffffffff; #endif switch (regno) { + case R8: + case R9: + case R10: + case R11: + case R12: + case R13: + case R14: + case R15: + case RIP: + case RSP: + case RAX: + case RBX: + case RCX: + case RDX: + case RSI: + case RDI: + case RBP: + case ORIG_RAX: + break; + case FS: case GS: case DS: @@ -50,12 +99,14 @@ int putreg(struct task_struct *child, int regno, unsigned long value) case EFLAGS: value &= FLAG_MASK; - tmp = PT_REGS_EFLAGS(&child->thread.regs) & ~FLAG_MASK; - value |= tmp; - break; + child->thread.regs.regs.gp[HOST_EFLAGS] |= value; + return 0; + + default: + panic("Bad register in putreg(): %d\n", regno); } - PT_REGS_SET(&child->thread.regs, regno, value); + child->thread.regs.regs.gp[reg_offsets[regno >> 3]] = value; return 0; } @@ -80,24 +131,46 @@ int poke_user(struct task_struct *child, long addr, long data) unsigned long getreg(struct task_struct *child, int regno) { - unsigned long retval = ~0UL; + unsigned long mask = ~0UL; +#ifdef TIF_IA32 + if (test_tsk_thread_flag(child, TIF_IA32)) + mask = 0xffffffff; +#endif switch (regno) { + case R8: + case R9: + case R10: + case R11: + case R12: + case R13: + case R14: + case R15: + case RIP: + case RSP: + case RAX: + case RBX: + case RCX: + case RDX: + case RSI: + case RDI: + case RBP: + case ORIG_RAX: + case EFLAGS: + case FS_BASE: + case GS_BASE: + break; case FS: case GS: case DS: case ES: case SS: case CS: - retval = 0xffff; - /* fall through */ + mask = 0xffff; + break; default: - retval &= PT_REG(&child->thread.regs, regno); -#ifdef TIF_IA32 - if (test_tsk_thread_flag(child, TIF_IA32)) - retval &= 0xffffffff; -#endif + panic("Bad register in getreg: %d\n", regno); } - return retval; + return mask & child->thread.regs.regs.gp[reg_offsets[regno >> 3]]; } int peek_user(struct task_struct *child, long addr, long data) diff --git a/arch/um/sys-i386/ptrace_user.c b/arch/x86/um/ptrace_user.c index 0b10c3e74028..3960ca1dd35a 100644 --- a/arch/um/sys-i386/ptrace_user.c +++ b/arch/x86/um/ptrace_user.c @@ -4,7 +4,7 @@ */ #include <errno.h> -#include <sys/ptrace.h> +#include "ptrace_user.h" int ptrace_getregs(long pid, unsigned long *regs_out) { diff --git a/arch/um/sys-i386/setjmp.S b/arch/x86/um/setjmp_32.S index b766792c9933..b766792c9933 100644 --- a/arch/um/sys-i386/setjmp.S +++ b/arch/x86/um/setjmp_32.S diff --git a/arch/um/sys-x86_64/setjmp.S b/arch/x86/um/setjmp_64.S index 45f547b4043e..45f547b4043e 100644 --- a/arch/um/sys-x86_64/setjmp.S +++ b/arch/x86/um/setjmp_64.S diff --git a/arch/x86/um/shared/sysdep/archsetjmp.h b/arch/x86/um/shared/sysdep/archsetjmp.h new file mode 100644 index 000000000000..ff7766d28226 --- /dev/null +++ b/arch/x86/um/shared/sysdep/archsetjmp.h @@ -0,0 +1,5 @@ +#ifdef __i386__ +#include "archsetjmp_32.h" +#else +#include "archsetjmp_64.h" +#endif diff --git a/arch/um/sys-i386/shared/sysdep/archsetjmp.h b/arch/x86/um/shared/sysdep/archsetjmp_32.h index 0f312085ce1d..0f312085ce1d 100644 --- a/arch/um/sys-i386/shared/sysdep/archsetjmp.h +++ b/arch/x86/um/shared/sysdep/archsetjmp_32.h diff --git a/arch/um/sys-x86_64/shared/sysdep/archsetjmp.h b/arch/x86/um/shared/sysdep/archsetjmp_64.h index 2af8f12ca161..2af8f12ca161 100644 --- a/arch/um/sys-x86_64/shared/sysdep/archsetjmp.h +++ b/arch/x86/um/shared/sysdep/archsetjmp_64.h diff --git a/arch/x86/um/shared/sysdep/faultinfo.h b/arch/x86/um/shared/sysdep/faultinfo.h new file mode 100644 index 000000000000..862ecb1c7781 --- /dev/null +++ b/arch/x86/um/shared/sysdep/faultinfo.h @@ -0,0 +1,5 @@ +#ifdef __i386__ +#include "faultinfo_32.h" +#else +#include "faultinfo_64.h" +#endif diff --git a/arch/um/sys-i386/shared/sysdep/faultinfo.h b/arch/x86/um/shared/sysdep/faultinfo_32.h index db437cc373bc..a26086b8a800 100644 --- a/arch/um/sys-i386/shared/sysdep/faultinfo.h +++ b/arch/x86/um/shared/sysdep/faultinfo_32.h @@ -24,6 +24,12 @@ struct faultinfo { #define FAULT_WRITE(fi) ((fi).error_code & 2) #define FAULT_ADDRESS(fi) ((fi).cr2) +/* This is Page Fault */ +#define SEGV_IS_FIXABLE(fi) ((fi)->trap_no == 14) + +/* SKAS3 has no trap_no on i386, but get_skas_faultinfo() sets it to 0. */ +#define SEGV_MAYBE_FIXABLE(fi) ((fi)->trap_no == 0 && ptrace_faultinfo) + #define PTRACE_FULL_FAULTINFO 0 #endif diff --git a/arch/um/sys-x86_64/shared/sysdep/faultinfo.h b/arch/x86/um/shared/sysdep/faultinfo_64.h index cb917b0d5660..f811cbe15d62 100644 --- a/arch/um/sys-x86_64/shared/sysdep/faultinfo.h +++ b/arch/x86/um/shared/sysdep/faultinfo_64.h @@ -24,6 +24,12 @@ struct faultinfo { #define FAULT_WRITE(fi) ((fi).error_code & 2) #define FAULT_ADDRESS(fi) ((fi).cr2) +/* This is Page Fault */ +#define SEGV_IS_FIXABLE(fi) ((fi)->trap_no == 14) + +/* No broken SKAS API, which doesn't pass trap_no, here. */ +#define SEGV_MAYBE_FIXABLE(fi) 0 + #define PTRACE_FULL_FAULTINFO 1 #endif diff --git a/arch/um/sys-i386/shared/sysdep/kernel-offsets.h b/arch/x86/um/shared/sysdep/kernel-offsets.h index 5868526b5eef..5868526b5eef 100644 --- a/arch/um/sys-i386/shared/sysdep/kernel-offsets.h +++ b/arch/x86/um/shared/sysdep/kernel-offsets.h diff --git a/arch/x86/um/shared/sysdep/mcontext.h b/arch/x86/um/shared/sysdep/mcontext.h new file mode 100644 index 000000000000..b724c54da316 --- /dev/null +++ b/arch/x86/um/shared/sysdep/mcontext.h @@ -0,0 +1,31 @@ +/* + * Copyright (C) 2000 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com) + * Licensed under the GPL + */ + +#ifndef __SYS_SIGCONTEXT_X86_H +#define __SYS_SIGCONTEXT_X86_H + +extern void get_regs_from_mc(struct uml_pt_regs *, mcontext_t *); + +#ifdef __i386__ + +#define GET_FAULTINFO_FROM_MC(fi, mc) \ + { \ + (fi).cr2 = (mc)->cr2; \ + (fi).error_code = (mc)->gregs[REG_ERR]; \ + (fi).trap_no = (mc)->gregs[REG_TRAPNO]; \ + } + +#else + +#define GET_FAULTINFO_FROM_MC(fi, mc) \ + { \ + (fi).cr2 = (mc)->gregs[REG_CR2]; \ + (fi).error_code = (mc)->gregs[REG_ERR]; \ + (fi).trap_no = (mc)->gregs[REG_TRAPNO]; \ + } + +#endif + +#endif diff --git a/arch/x86/um/shared/sysdep/ptrace.h b/arch/x86/um/shared/sysdep/ptrace.h new file mode 100644 index 000000000000..711b1621747f --- /dev/null +++ b/arch/x86/um/shared/sysdep/ptrace.h @@ -0,0 +1,5 @@ +#ifdef __i386__ +#include "ptrace_32.h" +#else +#include "ptrace_64.h" +#endif diff --git a/arch/um/sys-i386/shared/sysdep/ptrace.h b/arch/x86/um/shared/sysdep/ptrace_32.h index c398a5076111..befd1df32ed0 100644 --- a/arch/um/sys-i386/shared/sysdep/ptrace.h +++ b/arch/x86/um/shared/sysdep/ptrace_32.h @@ -6,7 +6,7 @@ #ifndef __SYSDEP_I386_PTRACE_H #define __SYSDEP_I386_PTRACE_H -#include "user_constants.h" +#include <generated/user_constants.h> #include "sysdep/faultinfo.h" #define MAX_REG_NR (UM_FRAME_SIZE / sizeof(unsigned long)) @@ -24,18 +24,16 @@ void set_using_sysemu(int value); int get_using_sysemu(void); extern int sysemu_supported; -#include "skas_ptregs.h" - #define REGS_IP(r) ((r)[HOST_IP]) #define REGS_SP(r) ((r)[HOST_SP]) #define REGS_EFLAGS(r) ((r)[HOST_EFLAGS]) -#define REGS_EAX(r) ((r)[HOST_EAX]) -#define REGS_EBX(r) ((r)[HOST_EBX]) -#define REGS_ECX(r) ((r)[HOST_ECX]) -#define REGS_EDX(r) ((r)[HOST_EDX]) -#define REGS_ESI(r) ((r)[HOST_ESI]) -#define REGS_EDI(r) ((r)[HOST_EDI]) -#define REGS_EBP(r) ((r)[HOST_EBP]) +#define REGS_EAX(r) ((r)[HOST_AX]) +#define REGS_EBX(r) ((r)[HOST_BX]) +#define REGS_ECX(r) ((r)[HOST_CX]) +#define REGS_EDX(r) ((r)[HOST_DX]) +#define REGS_ESI(r) ((r)[HOST_SI]) +#define REGS_EDI(r) ((r)[HOST_DI]) +#define REGS_EBP(r) ((r)[HOST_BP]) #define REGS_CS(r) ((r)[HOST_CS]) #define REGS_SS(r) ((r)[HOST_SS]) #define REGS_DS(r) ((r)[HOST_DS]) @@ -45,6 +43,7 @@ extern int sysemu_supported; #define REGS_SET_SYSCALL_RETURN(r, res) REGS_EAX(r) = (res) +#define IP_RESTART_SYSCALL(ip) ((ip) -= 2) #define REGS_RESTART_SYSCALL(r) IP_RESTART_SYSCALL(REGS_IP(r)) #ifndef PTRACE_SYSEMU_SINGLESTEP @@ -102,62 +101,6 @@ struct syscall_args { UPT_SYSCALL_ARG5(r), \ UPT_SYSCALL_ARG6(r) } } ) -#define UPT_REG(regs, reg) \ - ({ unsigned long val; \ - switch(reg){ \ - case EIP: val = UPT_IP(regs); break; \ - case UESP: val = UPT_SP(regs); break; \ - case EAX: val = UPT_EAX(regs); break; \ - case EBX: val = UPT_EBX(regs); break; \ - case ECX: val = UPT_ECX(regs); break; \ - case EDX: val = UPT_EDX(regs); break; \ - case ESI: val = UPT_ESI(regs); break; \ - case EDI: val = UPT_EDI(regs); break; \ - case EBP: val = UPT_EBP(regs); break; \ - case ORIG_EAX: val = UPT_ORIG_EAX(regs); break; \ - case CS: val = UPT_CS(regs); break; \ - case SS: val = UPT_SS(regs); break; \ - case DS: val = UPT_DS(regs); break; \ - case ES: val = UPT_ES(regs); break; \ - case FS: val = UPT_FS(regs); break; \ - case GS: val = UPT_GS(regs); break; \ - case EFL: val = UPT_EFLAGS(regs); break; \ - default : \ - panic("Bad register in UPT_REG : %d\n", reg); \ - val = -1; \ - } \ - val; \ - }) - -#define UPT_SET(regs, reg, val) \ - do { \ - switch(reg){ \ - case EIP: UPT_IP(regs) = val; break; \ - case UESP: UPT_SP(regs) = val; break; \ - case EAX: UPT_EAX(regs) = val; break; \ - case EBX: UPT_EBX(regs) = val; break; \ - case ECX: UPT_ECX(regs) = val; break; \ - case EDX: UPT_EDX(regs) = val; break; \ - case ESI: UPT_ESI(regs) = val; break; \ - case EDI: UPT_EDI(regs) = val; break; \ - case EBP: UPT_EBP(regs) = val; break; \ - case ORIG_EAX: UPT_ORIG_EAX(regs) = val; break; \ - case CS: UPT_CS(regs) = val; break; \ - case SS: UPT_SS(regs) = val; break; \ - case DS: UPT_DS(regs) = val; break; \ - case ES: UPT_ES(regs) = val; break; \ - case FS: UPT_FS(regs) = val; break; \ - case GS: UPT_GS(regs) = val; break; \ - case EFL: UPT_EFLAGS(regs) = val; break; \ - default : \ - panic("Bad register in UPT_SET : %d\n", reg); \ - break; \ - } \ - } while (0) - -#define UPT_SET_SYSCALL_RETURN(r, res) \ - REGS_SET_SYSCALL_RETURN((r)->regs, (res)) - #define UPT_RESTART_SYSCALL(r) REGS_RESTART_SYSCALL((r)->gp) #define UPT_ORIG_SYSCALL(r) UPT_EAX(r) diff --git a/arch/um/sys-x86_64/shared/sysdep/ptrace.h b/arch/x86/um/shared/sysdep/ptrace_64.h index 8ee8f8e12af1..031edc53ac57 100644 --- a/arch/um/sys-x86_64/shared/sysdep/ptrace.h +++ b/arch/x86/um/shared/sysdep/ptrace_64.h @@ -8,24 +8,22 @@ #ifndef __SYSDEP_X86_64_PTRACE_H #define __SYSDEP_X86_64_PTRACE_H -#include "user_constants.h" +#include <generated/user_constants.h> #include "sysdep/faultinfo.h" #define MAX_REG_OFFSET (UM_FRAME_SIZE) #define MAX_REG_NR ((MAX_REG_OFFSET) / sizeof(unsigned long)) -#include "skas_ptregs.h" - #define REGS_IP(r) ((r)[HOST_IP]) #define REGS_SP(r) ((r)[HOST_SP]) -#define REGS_RBX(r) ((r)[HOST_RBX]) -#define REGS_RCX(r) ((r)[HOST_RCX]) -#define REGS_RDX(r) ((r)[HOST_RDX]) -#define REGS_RSI(r) ((r)[HOST_RSI]) -#define REGS_RDI(r) ((r)[HOST_RDI]) -#define REGS_RBP(r) ((r)[HOST_RBP]) -#define REGS_RAX(r) ((r)[HOST_RAX]) +#define REGS_RBX(r) ((r)[HOST_BX]) +#define REGS_RCX(r) ((r)[HOST_CX]) +#define REGS_RDX(r) ((r)[HOST_DX]) +#define REGS_RSI(r) ((r)[HOST_SI]) +#define REGS_RDI(r) ((r)[HOST_DI]) +#define REGS_RBP(r) ((r)[HOST_BP]) +#define REGS_RAX(r) ((r)[HOST_AX]) #define REGS_R8(r) ((r)[HOST_R8]) #define REGS_R9(r) ((r)[HOST_R9]) #define REGS_R10(r) ((r)[HOST_R10]) @@ -67,14 +65,13 @@ #define REGS_FS(r) ((r)[HOST_FS]) #define REGS_GS(r) ((r)[HOST_GS]) -#define REGS_ORIG_RAX(r) ((r)[HOST_ORIG_RAX]) +#define REGS_ORIG_RAX(r) ((r)[HOST_ORIG_AX]) #define REGS_SET_SYSCALL_RETURN(r, res) REGS_RAX(r) = (res) +#define IP_RESTART_SYSCALL(ip) ((ip) -= 2) #define REGS_RESTART_SYSCALL(r) IP_RESTART_SYSCALL(REGS_IP(r)) -#define REGS_SEGV_IS_FIXABLE(r) SEGV_IS_FIXABLE((r)->trap_type) - #define REGS_FAULT_ADDR(r) ((r)->fault_addr) #define REGS_FAULT_WRITE(r) FAULT_WRITE((r)->fault_type) @@ -149,88 +146,8 @@ struct syscall_args { UPT_SYSCALL_ARG5(r), \ UPT_SYSCALL_ARG6(r) } } ) -#define UPT_REG(regs, reg) \ - ({ unsigned long val; \ - switch(reg){ \ - case R8: val = UPT_R8(regs); break; \ - case R9: val = UPT_R9(regs); break; \ - case R10: val = UPT_R10(regs); break; \ - case R11: val = UPT_R11(regs); break; \ - case R12: val = UPT_R12(regs); break; \ - case R13: val = UPT_R13(regs); break; \ - case R14: val = UPT_R14(regs); break; \ - case R15: val = UPT_R15(regs); break; \ - case RIP: val = UPT_IP(regs); break; \ - case RSP: val = UPT_SP(regs); break; \ - case RAX: val = UPT_RAX(regs); break; \ - case RBX: val = UPT_RBX(regs); break; \ - case RCX: val = UPT_RCX(regs); break; \ - case RDX: val = UPT_RDX(regs); break; \ - case RSI: val = UPT_RSI(regs); break; \ - case RDI: val = UPT_RDI(regs); break; \ - case RBP: val = UPT_RBP(regs); break; \ - case ORIG_RAX: val = UPT_ORIG_RAX(regs); break; \ - case CS: val = UPT_CS(regs); break; \ - case SS: val = UPT_SS(regs); break; \ - case FS_BASE: val = UPT_FS_BASE(regs); break; \ - case GS_BASE: val = UPT_GS_BASE(regs); break; \ - case DS: val = UPT_DS(regs); break; \ - case ES: val = UPT_ES(regs); break; \ - case FS : val = UPT_FS (regs); break; \ - case GS: val = UPT_GS(regs); break; \ - case EFLAGS: val = UPT_EFLAGS(regs); break; \ - default : \ - panic("Bad register in UPT_REG : %d\n", reg); \ - val = -1; \ - } \ - val; \ - }) - - -#define UPT_SET(regs, reg, val) \ - ({ unsigned long __upt_val = val; \ - switch(reg){ \ - case R8: UPT_R8(regs) = __upt_val; break; \ - case R9: UPT_R9(regs) = __upt_val; break; \ - case R10: UPT_R10(regs) = __upt_val; break; \ - case R11: UPT_R11(regs) = __upt_val; break; \ - case R12: UPT_R12(regs) = __upt_val; break; \ - case R13: UPT_R13(regs) = __upt_val; break; \ - case R14: UPT_R14(regs) = __upt_val; break; \ - case R15: UPT_R15(regs) = __upt_val; break; \ - case RIP: UPT_IP(regs) = __upt_val; break; \ - case RSP: UPT_SP(regs) = __upt_val; break; \ - case RAX: UPT_RAX(regs) = __upt_val; break; \ - case RBX: UPT_RBX(regs) = __upt_val; break; \ - case RCX: UPT_RCX(regs) = __upt_val; break; \ - case RDX: UPT_RDX(regs) = __upt_val; break; \ - case RSI: UPT_RSI(regs) = __upt_val; break; \ - case RDI: UPT_RDI(regs) = __upt_val; break; \ - case RBP: UPT_RBP(regs) = __upt_val; break; \ - case ORIG_RAX: UPT_ORIG_RAX(regs) = __upt_val; break; \ - case CS: UPT_CS(regs) = __upt_val; break; \ - case SS: UPT_SS(regs) = __upt_val; break; \ - case FS_BASE: UPT_FS_BASE(regs) = __upt_val; break; \ - case GS_BASE: UPT_GS_BASE(regs) = __upt_val; break; \ - case DS: UPT_DS(regs) = __upt_val; break; \ - case ES: UPT_ES(regs) = __upt_val; break; \ - case FS: UPT_FS(regs) = __upt_val; break; \ - case GS: UPT_GS(regs) = __upt_val; break; \ - case EFLAGS: UPT_EFLAGS(regs) = __upt_val; break; \ - default : \ - panic("Bad register in UPT_SET : %d\n", reg); \ - break; \ - } \ - __upt_val; \ - }) - -#define UPT_SET_SYSCALL_RETURN(r, res) \ - REGS_SET_SYSCALL_RETURN((r)->regs, (res)) - #define UPT_RESTART_SYSCALL(r) REGS_RESTART_SYSCALL((r)->gp) -#define UPT_SEGV_IS_FIXABLE(r) REGS_SEGV_IS_FIXABLE(&r->skas) - #define UPT_FAULTINFO(r) (&(r)->faultinfo) static inline void arch_init_registers(int pid) diff --git a/arch/x86/um/shared/sysdep/ptrace_user.h b/arch/x86/um/shared/sysdep/ptrace_user.h new file mode 100644 index 000000000000..16cd6b5e71f7 --- /dev/null +++ b/arch/x86/um/shared/sysdep/ptrace_user.h @@ -0,0 +1,27 @@ +#include <generated/user_constants.h> + +#define PT_OFFSET(r) ((r) * sizeof(long)) + +#define PT_SYSCALL_NR(regs) ((regs)[HOST_ORIG_AX]) +#define PT_SYSCALL_NR_OFFSET PT_OFFSET(HOST_ORIG_AX) + +#define PT_SYSCALL_RET_OFFSET PT_OFFSET(HOST_AX) + +#define REGS_IP_INDEX HOST_IP +#define REGS_SP_INDEX HOST_SP + +#ifdef __i386__ +#define FP_SIZE ((HOST_FPX_SIZE > HOST_FP_SIZE) ? HOST_FPX_SIZE : HOST_FP_SIZE) +#else +#define FP_SIZE HOST_FP_SIZE + +/* + * x86_64 FC3 doesn't define this in /usr/include/linux/ptrace.h even though + * it's defined in the kernel's include/linux/ptrace.h. Additionally, use the + * 2.4 name and value for 2.4 host compatibility. + */ +#ifndef PTRACE_OLDSETOPTIONS +#define PTRACE_OLDSETOPTIONS 21 +#endif + +#endif diff --git a/arch/um/sys-i386/shared/sysdep/skas_ptrace.h b/arch/x86/um/shared/sysdep/skas_ptrace.h index e27b8a791773..453febe98993 100644 --- a/arch/um/sys-i386/shared/sysdep/skas_ptrace.h +++ b/arch/x86/um/shared/sysdep/skas_ptrace.h @@ -3,8 +3,8 @@ * Licensed under the GPL */ -#ifndef __SYSDEP_I386_SKAS_PTRACE_H -#define __SYSDEP_I386_SKAS_PTRACE_H +#ifndef __SYSDEP_X86_SKAS_PTRACE_H +#define __SYSDEP_X86_SKAS_PTRACE_H struct ptrace_faultinfo { int is_write; diff --git a/arch/x86/um/shared/sysdep/stub.h b/arch/x86/um/shared/sysdep/stub.h new file mode 100644 index 000000000000..bd161e300102 --- /dev/null +++ b/arch/x86/um/shared/sysdep/stub.h @@ -0,0 +1,14 @@ +#include <asm/unistd.h> +#include <sys/mman.h> +#include <signal.h> +#include "as-layout.h" +#include "stub-data.h" + +#ifdef __i386__ +#include "stub_32.h" +#else +#include "stub_64.h" +#endif + +extern void stub_segv_handler(int, siginfo_t *, void *); +extern void stub_clone_handler(void); diff --git a/arch/um/sys-i386/shared/sysdep/stub.h b/arch/x86/um/shared/sysdep/stub_32.h index 977dedd9221b..51fd256c75f0 100644 --- a/arch/um/sys-i386/shared/sysdep/stub.h +++ b/arch/x86/um/shared/sysdep/stub_32.h @@ -6,15 +6,7 @@ #ifndef __SYSDEP_STUB_H #define __SYSDEP_STUB_H -#include <sys/mman.h> #include <asm/ptrace.h> -#include <asm/unistd.h> -#include "as-layout.h" -#include "stub-data.h" -#include "kern_constants.h" - -extern void stub_segv_handler(int sig); -extern void stub_clone_handler(void); #define STUB_SYSCALL_RET EAX #define STUB_MMAP_NR __NR_mmap2 diff --git a/arch/um/sys-x86_64/shared/sysdep/stub.h b/arch/x86/um/shared/sysdep/stub_64.h index 3432aa249970..994df93c5ed3 100644 --- a/arch/um/sys-x86_64/shared/sysdep/stub.h +++ b/arch/x86/um/shared/sysdep/stub_64.h @@ -6,15 +6,7 @@ #ifndef __SYSDEP_STUB_H #define __SYSDEP_STUB_H -#include <sys/mman.h> -#include <asm/unistd.h> #include <sysdep/ptrace_user.h> -#include "as-layout.h" -#include "stub-data.h" -#include "kern_constants.h" - -extern void stub_segv_handler(int sig); -extern void stub_clone_handler(void); #define STUB_SYSCALL_RET PT_INDEX(RAX) #define STUB_MMAP_NR __NR_mmap diff --git a/arch/x86/um/shared/sysdep/syscalls.h b/arch/x86/um/shared/sysdep/syscalls.h new file mode 100644 index 000000000000..bd9a89b67e41 --- /dev/null +++ b/arch/x86/um/shared/sysdep/syscalls.h @@ -0,0 +1,5 @@ +#ifdef __i386__ +#include "syscalls_32.h" +#else +#include "syscalls_64.h" +#endif diff --git a/arch/um/sys-i386/shared/sysdep/syscalls.h b/arch/x86/um/shared/sysdep/syscalls_32.h index 05cb796aecb5..05cb796aecb5 100644 --- a/arch/um/sys-i386/shared/sysdep/syscalls.h +++ b/arch/x86/um/shared/sysdep/syscalls_32.h diff --git a/arch/um/sys-x86_64/shared/sysdep/syscalls.h b/arch/x86/um/shared/sysdep/syscalls_64.h index 7cfb0b085655..8a7d5e1da98e 100644 --- a/arch/um/sys-x86_64/shared/sysdep/syscalls.h +++ b/arch/x86/um/shared/sysdep/syscalls_64.h @@ -9,7 +9,6 @@ #include <linux/msg.h> #include <linux/shm.h> -#include <kern_constants.h> typedef long syscall_handler_t(void); diff --git a/arch/um/sys-i386/shared/sysdep/tls.h b/arch/x86/um/shared/sysdep/tls.h index 34550755b2a1..27cce00c6b30 100644 --- a/arch/um/sys-i386/shared/sysdep/tls.h +++ b/arch/x86/um/shared/sysdep/tls.h @@ -17,16 +17,23 @@ typedef struct um_dup_user_desc { unsigned int limit_in_pages:1; unsigned int seg_not_present:1; unsigned int useable:1; +#ifdef __x86_64__ + unsigned int lm:1; +#endif } user_desc_t; # else /* __KERNEL__ */ -# include <ldt.h> typedef struct user_desc user_desc_t; # endif /* __KERNEL__ */ +extern int os_set_thread_area(user_desc_t *info, int pid); +extern int os_get_thread_area(user_desc_t *info, int pid); + +#ifdef __i386__ #define GDT_ENTRY_TLS_MIN_I386 6 #define GDT_ENTRY_TLS_MIN_X86_64 12 +#endif #endif /* _SYSDEP_TLS_H */ diff --git a/arch/um/sys-i386/signal.c b/arch/x86/um/signal.c index 89a46626bfd8..4883b9546016 100644 --- a/arch/um/sys-i386/signal.c +++ b/arch/x86/um/signal.c @@ -1,36 +1,20 @@ /* - * Copyright (C) 2004 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com) + * Copyright (C) 2003 PathScale, Inc. + * Copyright (C) 2003 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com) * Licensed under the GPL */ + +#include <linux/personality.h> #include <linux/ptrace.h> +#include <linux/kernel.h> #include <asm/unistd.h> #include <asm/uaccess.h> #include <asm/ucontext.h> #include "frame_kern.h" #include "skas.h" -void copy_sc(struct uml_pt_regs *regs, void *from) -{ - struct sigcontext *sc = from; - - REGS_GS(regs->gp) = sc->gs; - REGS_FS(regs->gp) = sc->fs; - REGS_ES(regs->gp) = sc->es; - REGS_DS(regs->gp) = sc->ds; - REGS_EDI(regs->gp) = sc->di; - REGS_ESI(regs->gp) = sc->si; - REGS_EBP(regs->gp) = sc->bp; - REGS_SP(regs->gp) = sc->sp; - REGS_EBX(regs->gp) = sc->bx; - REGS_EDX(regs->gp) = sc->dx; - REGS_ECX(regs->gp) = sc->cx; - REGS_EAX(regs->gp) = sc->ax; - REGS_IP(regs->gp) = sc->ip; - REGS_CS(regs->gp) = sc->cs; - REGS_EFLAGS(regs->gp) = sc->flags; - REGS_SS(regs->gp) = sc->ss; -} +#ifdef CONFIG_X86_32 /* * FPU tag word conversions. @@ -164,6 +148,8 @@ static int convert_fxsr_from_user(struct user_fxsr_struct *fxsave, extern int have_fpx_regs; +#endif + static int copy_sc_from_user(struct pt_regs *regs, struct sigcontext __user *from) { @@ -174,8 +160,45 @@ static int copy_sc_from_user(struct pt_regs *regs, if (err) return err; +#define GETREG(regno, regname) regs->regs.gp[HOST_##regno] = sc.regname + +#ifdef CONFIG_X86_32 + GETREG(GS, gs); + GETREG(FS, fs); + GETREG(ES, es); + GETREG(DS, ds); +#endif + GETREG(DI, di); + GETREG(SI, si); + GETREG(BP, bp); + GETREG(SP, sp); + GETREG(BX, bx); + GETREG(DX, dx); + GETREG(CX, cx); + GETREG(AX, ax); + GETREG(IP, ip); + +#ifdef CONFIG_X86_64 + GETREG(R8, r8); + GETREG(R9, r9); + GETREG(R10, r10); + GETREG(R11, r11); + GETREG(R12, r12); + GETREG(R13, r13); + GETREG(R14, r14); + GETREG(R15, r15); +#endif + + GETREG(CS, cs); + GETREG(EFLAGS, flags); +#ifdef CONFIG_X86_32 + GETREG(SS, ss); +#endif + +#undef GETREG + pid = userspace_pid[current_thread_info()->cpu]; - copy_sc(®s->regs, &sc); +#ifdef CONFIG_X86_32 if (have_fpx_regs) { struct user_fxsr_struct fpx; @@ -196,8 +219,9 @@ static int copy_sc_from_user(struct pt_regs *regs, -err); return 1; } - } - else { + } else +#endif + { struct user_i387_struct fp; err = copy_from_user(&fp, sc.fpstate, @@ -213,43 +237,66 @@ static int copy_sc_from_user(struct pt_regs *regs, return 1; } } - return 0; } static int copy_sc_to_user(struct sigcontext __user *to, struct _fpstate __user *to_fp, struct pt_regs *regs, - unsigned long sp) + unsigned long mask) { struct sigcontext sc; struct faultinfo * fi = ¤t->thread.arch.faultinfo; int err, pid; + memset(&sc, 0, sizeof(struct sigcontext)); + +#define PUTREG(regno, regname) sc.regname = regs->regs.gp[HOST_##regno] + +#ifdef CONFIG_X86_32 + PUTREG(GS, gs); + PUTREG(FS, fs); + PUTREG(ES, es); + PUTREG(DS, ds); +#endif + PUTREG(DI, di); + PUTREG(SI, si); + PUTREG(BP, bp); + PUTREG(SP, sp); + PUTREG(BX, bx); + PUTREG(DX, dx); + PUTREG(CX, cx); + PUTREG(AX, ax); +#ifdef CONFIG_X86_64 + PUTREG(R8, r8); + PUTREG(R9, r9); + PUTREG(R10, r10); + PUTREG(R11, r11); + PUTREG(R12, r12); + PUTREG(R13, r13); + PUTREG(R14, r14); + PUTREG(R15, r15); +#endif - sc.gs = REGS_GS(regs->regs.gp); - sc.fs = REGS_FS(regs->regs.gp); - sc.es = REGS_ES(regs->regs.gp); - sc.ds = REGS_DS(regs->regs.gp); - sc.di = REGS_EDI(regs->regs.gp); - sc.si = REGS_ESI(regs->regs.gp); - sc.bp = REGS_EBP(regs->regs.gp); - sc.sp = sp; - sc.bx = REGS_EBX(regs->regs.gp); - sc.dx = REGS_EDX(regs->regs.gp); - sc.cx = REGS_ECX(regs->regs.gp); - sc.ax = REGS_EAX(regs->regs.gp); - sc.ip = REGS_IP(regs->regs.gp); - sc.cs = REGS_CS(regs->regs.gp); - sc.flags = REGS_EFLAGS(regs->regs.gp); - sc.sp_at_signal = regs->regs.gp[UESP]; - sc.ss = regs->regs.gp[SS]; sc.cr2 = fi->cr2; sc.err = fi->error_code; sc.trapno = fi->trap_no; - - to_fp = (to_fp ? to_fp : (struct _fpstate __user *) (to + 1)); + PUTREG(IP, ip); + PUTREG(CS, cs); + PUTREG(EFLAGS, flags); +#ifdef CONFIG_X86_32 + PUTREG(SP, sp_at_signal); + PUTREG(SS, ss); +#endif +#undef PUTREG + sc.oldmask = mask; sc.fpstate = to_fp; + err = copy_to_user(to, &sc, sizeof(struct sigcontext)); + if (err) + return 1; + pid = userspace_pid[current_thread_info()->cpu]; + +#ifdef CONFIG_X86_32 if (have_fpx_regs) { struct user_fxsr_struct fpx; @@ -272,8 +319,9 @@ static int copy_sc_to_user(struct sigcontext __user *to, if (copy_to_user(&to_fp->_fxsr_env[0], &fpx, sizeof(struct user_fxsr_struct))) return 1; - } - else { + } else +#endif + { struct user_i387_struct fp; err = save_fp_registers(pid, (unsigned long *) &fp); @@ -281,9 +329,10 @@ static int copy_sc_to_user(struct sigcontext __user *to, return 1; } - return copy_to_user(to, &sc, sizeof(sc)); + return 0; } +#ifdef CONFIG_X86_32 static int copy_ucontext_to_user(struct ucontext __user *uc, struct _fpstate __user *fp, sigset_t *set, unsigned long sp) @@ -293,7 +342,7 @@ static int copy_ucontext_to_user(struct ucontext __user *uc, err |= put_user(current->sas_ss_sp, &uc->uc_stack.ss_sp); err |= put_user(sas_ss_flags(sp), &uc->uc_stack.ss_flags); err |= put_user(current->sas_ss_size, &uc->uc_stack.ss_size); - err |= copy_sc_to_user(&uc->uc_mcontext, fp, ¤t->thread.regs, sp); + err |= copy_sc_to_user(&uc->uc_mcontext, fp, ¤t->thread.regs, 0); err |= copy_to_user(&uc->uc_sigmask, set, sizeof(*set)); return err; } @@ -326,7 +375,6 @@ int setup_signal_stack_sc(unsigned long stack_top, int sig, { struct sigframe __user *frame; void __user *restorer; - unsigned long save_sp = PT_REGS_SP(regs); int err = 0; /* This is the same calculation as i386 - ((sp + 4) & 15) == 0 */ @@ -339,20 +387,9 @@ int setup_signal_stack_sc(unsigned long stack_top, int sig, if (ka->sa.sa_flags & SA_RESTORER) restorer = ka->sa.sa_restorer; - /* Update SP now because the page fault handler refuses to extend - * the stack if the faulting address is too far below the current - * SP, which frame now certainly is. If there's an error, the original - * value is restored on the way out. - * When writing the sigcontext to the stack, we have to write the - * original value, so that's passed to copy_sc_to_user, which does - * the right thing with it. - */ - PT_REGS_SP(regs) = (unsigned long) frame; - err |= __put_user(restorer, &frame->pretcode); err |= __put_user(sig, &frame->sig); - err |= copy_sc_to_user(&frame->sc, NULL, regs, save_sp); - err |= __put_user(mask->sig[0], &frame->sc.oldmask); + err |= copy_sc_to_user(&frame->sc, &frame->fpstate, regs, mask->sig[0]); if (_NSIG_WORDS > 1) err |= __copy_to_user(&frame->extramask, &mask->sig[1], sizeof(frame->extramask)); @@ -369,7 +406,7 @@ int setup_signal_stack_sc(unsigned long stack_top, int sig, err |= __put_user(0x80cd, (short __user *)(frame->retcode+6)); if (err) - goto err; + return err; PT_REGS_SP(regs) = (unsigned long) frame; PT_REGS_IP(regs) = (unsigned long) ka->sa.sa_handler; @@ -380,10 +417,6 @@ int setup_signal_stack_sc(unsigned long stack_top, int sig, if ((current->ptrace & PT_DTRACE) && (current->ptrace & PT_PTRACED)) ptrace_notify(SIGTRAP); return 0; - -err: - PT_REGS_SP(regs) = save_sp; - return err; } int setup_signal_stack_si(unsigned long stack_top, int sig, @@ -392,7 +425,6 @@ int setup_signal_stack_si(unsigned long stack_top, int sig, { struct rt_sigframe __user *frame; void __user *restorer; - unsigned long save_sp = PT_REGS_SP(regs); int err = 0; stack_top &= -8UL; @@ -404,16 +436,13 @@ int setup_signal_stack_si(unsigned long stack_top, int sig, if (ka->sa.sa_flags & SA_RESTORER) restorer = ka->sa.sa_restorer; - /* See comment above about why this is here */ - PT_REGS_SP(regs) = (unsigned long) frame; - err |= __put_user(restorer, &frame->pretcode); err |= __put_user(sig, &frame->sig); err |= __put_user(&frame->info, &frame->pinfo); err |= __put_user(&frame->uc, &frame->puc); err |= copy_siginfo_to_user(&frame->info, info); err |= copy_ucontext_to_user(&frame->uc, &frame->fpstate, mask, - save_sp); + PT_REGS_SP(regs)); /* * This is movl $,%eax ; int $0x80 @@ -427,8 +456,9 @@ int setup_signal_stack_si(unsigned long stack_top, int sig, err |= __put_user(0x80cd, (short __user *)(frame->retcode+5)); if (err) - goto err; + return err; + PT_REGS_SP(regs) = (unsigned long) frame; PT_REGS_IP(regs) = (unsigned long) ka->sa.sa_handler; PT_REGS_EAX(regs) = (unsigned long) sig; PT_REGS_EDX(regs) = (unsigned long) &frame->info; @@ -437,13 +467,9 @@ int setup_signal_stack_si(unsigned long stack_top, int sig, if ((current->ptrace & PT_DTRACE) && (current->ptrace & PT_PTRACED)) ptrace_notify(SIGTRAP); return 0; - -err: - PT_REGS_SP(regs) = save_sp; - return err; } -long sys_sigreturn(struct pt_regs regs) +long sys_sigreturn(struct pt_regs *regs) { unsigned long sp = PT_REGS_SP(¤t->thread.regs); struct sigframe __user *frame = (struct sigframe __user *)(sp - 8); @@ -458,11 +484,7 @@ long sys_sigreturn(struct pt_regs regs) goto segfault; sigdelsetmask(&set, ~_BLOCKABLE); - - spin_lock_irq(¤t->sighand->siglock); - current->blocked = set; - recalc_sigpending(); - spin_unlock_irq(¤t->sighand->siglock); + set_current_blocked(&set); if (copy_sc_from_user(¤t->thread.regs, sc)) goto segfault; @@ -476,24 +498,107 @@ long sys_sigreturn(struct pt_regs regs) return 0; } -long sys_rt_sigreturn(struct pt_regs regs) +#else + +struct rt_sigframe +{ + char __user *pretcode; + struct ucontext uc; + struct siginfo info; + struct _fpstate fpstate; +}; + +int setup_signal_stack_si(unsigned long stack_top, int sig, + struct k_sigaction *ka, struct pt_regs * regs, + siginfo_t *info, sigset_t *set) +{ + struct rt_sigframe __user *frame; + int err = 0; + struct task_struct *me = current; + + frame = (struct rt_sigframe __user *) + round_down(stack_top - sizeof(struct rt_sigframe), 16); + /* Subtract 128 for a red zone and 8 for proper alignment */ + frame = (struct rt_sigframe __user *) ((unsigned long) frame - 128 - 8); + + if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame))) + goto out; + + if (ka->sa.sa_flags & SA_SIGINFO) { + err |= copy_siginfo_to_user(&frame->info, info); + if (err) + goto out; + } + + /* Create the ucontext. */ + err |= __put_user(0, &frame->uc.uc_flags); + err |= __put_user(0, &frame->uc.uc_link); + err |= __put_user(me->sas_ss_sp, &frame->uc.uc_stack.ss_sp); + err |= __put_user(sas_ss_flags(PT_REGS_SP(regs)), + &frame->uc.uc_stack.ss_flags); + err |= __put_user(me->sas_ss_size, &frame->uc.uc_stack.ss_size); + err |= copy_sc_to_user(&frame->uc.uc_mcontext, &frame->fpstate, regs, + set->sig[0]); + err |= __put_user(&frame->fpstate, &frame->uc.uc_mcontext.fpstate); + if (sizeof(*set) == 16) { + __put_user(set->sig[0], &frame->uc.uc_sigmask.sig[0]); + __put_user(set->sig[1], &frame->uc.uc_sigmask.sig[1]); + } + else + err |= __copy_to_user(&frame->uc.uc_sigmask, set, + sizeof(*set)); + + /* + * Set up to return from userspace. If provided, use a stub + * already in userspace. + */ + /* x86-64 should always use SA_RESTORER. */ + if (ka->sa.sa_flags & SA_RESTORER) + err |= __put_user(ka->sa.sa_restorer, &frame->pretcode); + else + /* could use a vstub here */ + return err; + + if (err) + return err; + + /* Set up registers for signal handler */ + { + struct exec_domain *ed = current_thread_info()->exec_domain; + if (unlikely(ed && ed->signal_invmap && sig < 32)) + sig = ed->signal_invmap[sig]; + } + + PT_REGS_SP(regs) = (unsigned long) frame; + PT_REGS_RDI(regs) = sig; + /* In case the signal handler was declared without prototypes */ + PT_REGS_RAX(regs) = 0; + + /* + * This also works for non SA_SIGINFO handlers because they expect the + * next argument after the signal number on the stack. + */ + PT_REGS_RSI(regs) = (unsigned long) &frame->info; + PT_REGS_RDX(regs) = (unsigned long) &frame->uc; + PT_REGS_RIP(regs) = (unsigned long) ka->sa.sa_handler; + out: + return err; +} +#endif + +long sys_rt_sigreturn(struct pt_regs *regs) { unsigned long sp = PT_REGS_SP(¤t->thread.regs); struct rt_sigframe __user *frame = - (struct rt_sigframe __user *) (sp - 4); - sigset_t set; + (struct rt_sigframe __user *)(sp - sizeof(long)); struct ucontext __user *uc = &frame->uc; - int sig_size = _NSIG_WORDS * sizeof(unsigned long); + sigset_t set; - if (copy_from_user(&set, &uc->uc_sigmask, sig_size)) + if (copy_from_user(&set, &uc->uc_sigmask, sizeof(set))) goto segfault; sigdelsetmask(&set, ~_BLOCKABLE); - - spin_lock_irq(¤t->sighand->siglock); - current->blocked = set; - recalc_sigpending(); - spin_unlock_irq(¤t->sighand->siglock); + set_current_blocked(&set); if (copy_sc_from_user(¤t->thread.regs, &uc->uc_mcontext)) goto segfault; @@ -506,3 +611,14 @@ long sys_rt_sigreturn(struct pt_regs regs) force_sig(SIGSEGV, current); return 0; } + +#ifdef CONFIG_X86_32 +long ptregs_sigreturn(void) +{ + return sys_sigreturn(NULL); +} +long ptregs_rt_sigreturn(void) +{ + return sys_rt_sigreturn(NULL); +} +#endif diff --git a/arch/um/sys-i386/stub.S b/arch/x86/um/stub_32.S index 54a36ec20cb7..54a36ec20cb7 100644 --- a/arch/um/sys-i386/stub.S +++ b/arch/x86/um/stub_32.S diff --git a/arch/um/sys-x86_64/stub.S b/arch/x86/um/stub_64.S index 20e4a96a6dcb..20e4a96a6dcb 100644 --- a/arch/um/sys-x86_64/stub.S +++ b/arch/x86/um/stub_64.S diff --git a/arch/um/sys-x86_64/stub_segv.c b/arch/x86/um/stub_segv.c index ced051afc705..b7450bd22e7d 100644 --- a/arch/um/sys-x86_64/stub_segv.c +++ b/arch/x86/um/stub_segv.c @@ -3,19 +3,16 @@ * Licensed under the GPL */ -#include <signal.h> -#include "as-layout.h" #include "sysdep/stub.h" #include "sysdep/faultinfo.h" -#include "sysdep/sigcontext.h" +#include "sysdep/mcontext.h" void __attribute__ ((__section__ (".__syscall_stub"))) -stub_segv_handler(int sig) +stub_segv_handler(int sig, siginfo_t *info, void *p) { - struct ucontext *uc; + struct ucontext *uc = p; - __asm__ __volatile__("movq %%rdx, %0" : "=g" (uc) :); - GET_FAULTINFO_FROM_SC(*((struct faultinfo *) STUB_DATA), + GET_FAULTINFO_FROM_MC(*((struct faultinfo *) STUB_DATA), &uc->uc_mcontext); trap_myself(); } diff --git a/arch/um/sys-i386/sys_call_table.S b/arch/x86/um/sys_call_table_32.S index de274071455d..a7ca80d2dceb 100644 --- a/arch/um/sys-i386/sys_call_table.S +++ b/arch/x86/um/sys_call_table_32.S @@ -13,16 +13,14 @@ #define ptregs_execve sys_execve #define ptregs_iopl sys_iopl #define ptregs_vm86old sys_vm86old -#define ptregs_sigreturn sys_sigreturn #define ptregs_clone sys_clone #define ptregs_vm86 sys_vm86 -#define ptregs_rt_sigreturn sys_rt_sigreturn #define ptregs_sigaltstack sys_sigaltstack #define ptregs_vfork sys_vfork .section .rodata,"a" -#include "../../x86/kernel/syscall_table_32.S" +#include "../kernel/syscall_table_32.S" ENTRY(syscall_table_size) .long .-sys_call_table diff --git a/arch/um/sys-x86_64/syscall_table.c b/arch/x86/um/sys_call_table_64.c index 47d469e7e7ce..99522f78b162 100644 --- a/arch/um/sys-x86_64/syscall_table.c +++ b/arch/x86/um/sys_call_table_64.c @@ -6,7 +6,6 @@ #include <linux/linkage.h> #include <linux/sys.h> #include <linux/cache.h> -#include <kern_constants.h> #define __NO_STUBS @@ -59,7 +58,7 @@ extern void sys_ni_syscall(void); */ sys_call_ptr_t sys_call_table[] __cacheline_aligned = { -#include "../../x86/include/asm/unistd_64.h" +#include <asm/unistd_64.h> }; int syscall_table_size = sizeof(sys_call_table); diff --git a/arch/um/sys-i386/syscalls.c b/arch/x86/um/syscalls_32.c index 70ca357393b8..70ca357393b8 100644 --- a/arch/um/sys-i386/syscalls.c +++ b/arch/x86/um/syscalls_32.c diff --git a/arch/um/sys-x86_64/syscalls.c b/arch/x86/um/syscalls_64.c index f3d82bb6e15a..f3d82bb6e15a 100644 --- a/arch/um/sys-x86_64/syscalls.c +++ b/arch/x86/um/syscalls_64.c diff --git a/arch/um/sys-i386/sysrq.c b/arch/x86/um/sysrq_32.c index 171b3e9dc867..171b3e9dc867 100644 --- a/arch/um/sys-i386/sysrq.c +++ b/arch/x86/um/sysrq_32.c diff --git a/arch/um/sys-x86_64/sysrq.c b/arch/x86/um/sysrq_64.c index f4f82beb3508..e8913436d7dc 100644 --- a/arch/um/sys-x86_64/sysrq.c +++ b/arch/x86/um/sysrq_64.c @@ -20,7 +20,7 @@ void __show_regs(struct pt_regs *regs) current->comm, print_tainted(), init_utsname()->release); printk(KERN_INFO "RIP: %04lx:[<%016lx>]\n", PT_REGS_CS(regs) & 0xffff, PT_REGS_RIP(regs)); - printk(KERN_INFO "RSP: %016lx EFLAGS: %08lx\n", PT_REGS_RSP(regs), + printk(KERN_INFO "RSP: %016lx EFLAGS: %08lx\n", PT_REGS_SP(regs), PT_REGS_EFLAGS(regs)); printk(KERN_INFO "RAX: %016lx RBX: %016lx RCX: %016lx\n", PT_REGS_RAX(regs), PT_REGS_RBX(regs), PT_REGS_RCX(regs)); diff --git a/arch/um/sys-i386/tls.c b/arch/x86/um/tls_32.c index c6c7131e563b..c6c7131e563b 100644 --- a/arch/um/sys-i386/tls.c +++ b/arch/x86/um/tls_32.c diff --git a/arch/um/sys-x86_64/tls.c b/arch/x86/um/tls_64.c index f7ba46200ecd..f7ba46200ecd 100644 --- a/arch/um/sys-x86_64/tls.c +++ b/arch/x86/um/tls_64.c diff --git a/arch/um/sys-x86_64/user-offsets.c b/arch/x86/um/user-offsets.c index 973585414a66..ca49be8ddd0c 100644 --- a/arch/um/sys-x86_64/user-offsets.c +++ b/arch/x86/um/user-offsets.c @@ -9,28 +9,43 @@ #include <asm/types.h> #define DEFINE(sym, val) \ - asm volatile("\n->" #sym " %0 " #val : : "i" (val)) + asm volatile("\n->" #sym " %0 " #val : : "i" (val)) #define DEFINE_LONGS(sym, val) \ - asm volatile("\n->" #sym " %0 " #val : : "i" (val/sizeof(unsigned long))) - -#define OFFSET(sym, str, mem) \ - DEFINE(sym, offsetof(struct str, mem)); + asm volatile("\n->" #sym " %0 " #val : : "i" (val/sizeof(unsigned long))) void foo(void) { - OFFSET(HOST_SC_CR2, sigcontext, cr2); - OFFSET(HOST_SC_ERR, sigcontext, err); - OFFSET(HOST_SC_TRAPNO, sigcontext, trapno); +#ifdef __i386__ + DEFINE_LONGS(HOST_FP_SIZE, sizeof(struct user_fpregs_struct)); + DEFINE_LONGS(HOST_FPX_SIZE, sizeof(struct user_fpxregs_struct)); + DEFINE(HOST_IP, EIP); + DEFINE(HOST_SP, UESP); + DEFINE(HOST_EFLAGS, EFL); + DEFINE(HOST_AX, EAX); + DEFINE(HOST_BX, EBX); + DEFINE(HOST_CX, ECX); + DEFINE(HOST_DX, EDX); + DEFINE(HOST_SI, ESI); + DEFINE(HOST_DI, EDI); + DEFINE(HOST_BP, EBP); + DEFINE(HOST_CS, CS); + DEFINE(HOST_SS, SS); + DEFINE(HOST_DS, DS); + DEFINE(HOST_FS, FS); + DEFINE(HOST_ES, ES); + DEFINE(HOST_GS, GS); + DEFINE(HOST_ORIG_AX, ORIG_EAX); +#else DEFINE(HOST_FP_SIZE, sizeof(struct _fpstate) / sizeof(unsigned long)); - DEFINE_LONGS(HOST_RBX, RBX); - DEFINE_LONGS(HOST_RCX, RCX); - DEFINE_LONGS(HOST_RDI, RDI); - DEFINE_LONGS(HOST_RSI, RSI); - DEFINE_LONGS(HOST_RDX, RDX); - DEFINE_LONGS(HOST_RBP, RBP); - DEFINE_LONGS(HOST_RAX, RAX); + DEFINE_LONGS(HOST_BX, RBX); + DEFINE_LONGS(HOST_CX, RCX); + DEFINE_LONGS(HOST_DI, RDI); + DEFINE_LONGS(HOST_SI, RSI); + DEFINE_LONGS(HOST_DX, RDX); + DEFINE_LONGS(HOST_BP, RBP); + DEFINE_LONGS(HOST_AX, RAX); DEFINE_LONGS(HOST_R8, R8); DEFINE_LONGS(HOST_R9, R9); DEFINE_LONGS(HOST_R10, R10); @@ -39,7 +54,7 @@ void foo(void) DEFINE_LONGS(HOST_R13, R13); DEFINE_LONGS(HOST_R14, R14); DEFINE_LONGS(HOST_R15, R15); - DEFINE_LONGS(HOST_ORIG_RAX, ORIG_RAX); + DEFINE_LONGS(HOST_ORIG_AX, ORIG_RAX); DEFINE_LONGS(HOST_CS, CS); DEFINE_LONGS(HOST_SS, SS); DEFINE_LONGS(HOST_EFLAGS, EFLAGS); @@ -52,9 +67,9 @@ void foo(void) DEFINE_LONGS(HOST_IP, RIP); DEFINE_LONGS(HOST_SP, RSP); - DEFINE(UM_FRAME_SIZE, sizeof(struct user_regs_struct)); +#endif - /* XXX Duplicated between i386 and x86_64 */ + DEFINE(UM_FRAME_SIZE, sizeof(struct user_regs_struct)); DEFINE(UM_POLLIN, POLLIN); DEFINE(UM_POLLPRI, POLLPRI); DEFINE(UM_POLLOUT, POLLOUT); diff --git a/arch/um/sys-x86_64/vdso/Makefile b/arch/x86/um/vdso/Makefile index 5dffe6d46686..6c803ca49b5d 100644 --- a/arch/um/sys-x86_64/vdso/Makefile +++ b/arch/x86/um/vdso/Makefile @@ -46,8 +46,8 @@ $(vobjs): KBUILD_CFLAGS += $(CFL) # # vDSO code runs in userspace and -pg doesn't help with profiling anyway. # -CFLAGS_REMOVE_vdso-note.o = -pg -CFLAGS_REMOVE_um_vdso.o = -pg +CFLAGS_REMOVE_vdso-note.o = -pg -fprofile-arcs -ftest-coverage +CFLAGS_REMOVE_um_vdso.o = -pg -fprofile-arcs -ftest-coverage targets += vdso-syms.lds obj-$(VDSO64-y) += vdso-syms.lds diff --git a/arch/um/sys-x86_64/vdso/checkundef.sh b/arch/x86/um/vdso/checkundef.sh index 7ee90a9b549d..7ee90a9b549d 100644 --- a/arch/um/sys-x86_64/vdso/checkundef.sh +++ b/arch/x86/um/vdso/checkundef.sh diff --git a/arch/um/sys-x86_64/vdso/um_vdso.c b/arch/x86/um/vdso/um_vdso.c index 7c441b59d375..7c441b59d375 100644 --- a/arch/um/sys-x86_64/vdso/um_vdso.c +++ b/arch/x86/um/vdso/um_vdso.c diff --git a/arch/um/sys-x86_64/vdso/vdso-layout.lds.S b/arch/x86/um/vdso/vdso-layout.lds.S index 634a2cf62046..634a2cf62046 100644 --- a/arch/um/sys-x86_64/vdso/vdso-layout.lds.S +++ b/arch/x86/um/vdso/vdso-layout.lds.S diff --git a/arch/um/sys-x86_64/vdso/vdso-note.S b/arch/x86/um/vdso/vdso-note.S index 79a071e4357e..79a071e4357e 100644 --- a/arch/um/sys-x86_64/vdso/vdso-note.S +++ b/arch/x86/um/vdso/vdso-note.S diff --git a/arch/um/sys-x86_64/vdso/vdso.S b/arch/x86/um/vdso/vdso.S index ec82c1686bd6..1cb468adacbb 100644 --- a/arch/um/sys-x86_64/vdso/vdso.S +++ b/arch/x86/um/vdso/vdso.S @@ -4,7 +4,7 @@ __INITDATA .globl vdso_start, vdso_end vdso_start: - .incbin "arch/um/sys-x86_64/vdso/vdso.so" + .incbin "arch/x86/um/vdso/vdso.so" vdso_end: __FINIT diff --git a/arch/um/sys-x86_64/vdso/vdso.lds.S b/arch/x86/um/vdso/vdso.lds.S index b96b2677cad8..b96b2677cad8 100644 --- a/arch/um/sys-x86_64/vdso/vdso.lds.S +++ b/arch/x86/um/vdso/vdso.lds.S diff --git a/arch/um/sys-x86_64/vdso/vma.c b/arch/x86/um/vdso/vma.c index 9495c8d0ce37..91f4ec9a0a56 100644 --- a/arch/um/sys-x86_64/vdso/vma.c +++ b/arch/x86/um/vdso/vma.c @@ -28,7 +28,7 @@ static int __init init_vdso(void) um_vdso_addr = task_size - PAGE_SIZE; - vdsop = kmalloc(GFP_KERNEL, sizeof(struct page *)); + vdsop = kmalloc(sizeof(struct page *), GFP_KERNEL); if (!vdsop) goto oom; |
