diff options
Diffstat (limited to 'arch/mips/mips-boards')
| -rw-r--r-- | arch/mips/mips-boards/atlas/atlas_int.c | 109 | ||||
| -rw-r--r-- | arch/mips/mips-boards/atlas/atlas_setup.c | 5 | ||||
| -rw-r--r-- | arch/mips/mips-boards/generic/init.c | 1 | ||||
| -rw-r--r-- | arch/mips/mips-boards/generic/memory.c | 51 | ||||
| -rw-r--r-- | arch/mips/mips-boards/generic/printf.c | 1 | ||||
| -rw-r--r-- | arch/mips/mips-boards/generic/reset.c | 1 | ||||
| -rw-r--r-- | arch/mips/mips-boards/generic/time.c | 73 | ||||
| -rw-r--r-- | arch/mips/mips-boards/malta/malta_setup.c | 5 | ||||
| -rw-r--r-- | arch/mips/mips-boards/sead/sead_setup.c | 3 | ||||
| -rw-r--r-- | arch/mips/mips-boards/sim/Makefile | 3 | ||||
| -rw-r--r-- | arch/mips/mips-boards/sim/sim_IRQ.c | 148 | ||||
| -rw-r--r-- | arch/mips/mips-boards/sim/sim_irq.S | 101 | ||||
| -rw-r--r-- | arch/mips/mips-boards/sim/sim_setup.c | 3 | ||||
| -rw-r--r-- | arch/mips/mips-boards/sim/sim_smp.c | 1 | ||||
| -rw-r--r-- | arch/mips/mips-boards/sim/sim_time.c | 5 |
15 files changed, 161 insertions, 349 deletions
diff --git a/arch/mips/mips-boards/atlas/atlas_int.c b/arch/mips/mips-boards/atlas/atlas_int.c index db53950b7cfb..a020a3cb4f4b 100644 --- a/arch/mips/mips-boards/atlas/atlas_int.c +++ b/arch/mips/mips-boards/atlas/atlas_int.c @@ -1,6 +1,8 @@ /* - * Carsten Langgaard, carstenl@mips.com - * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved. + * Copyright (C) 1999, 2000, 2006 MIPS Technologies, Inc. + * All rights reserved. + * Authors: Carsten Langgaard <carstenl@mips.com> + * Maciej W. Rozycki <macro@mips.com> * * ######################################################################## * @@ -25,17 +27,20 @@ */ #include <linux/compiler.h> #include <linux/init.h> +#include <linux/irq.h> #include <linux/sched.h> #include <linux/slab.h> #include <linux/interrupt.h> #include <linux/kernel_stat.h> -#include <asm/irq.h> +#include <asm/gdb-stub.h> #include <asm/io.h> +#include <asm/irq_cpu.h> +#include <asm/msc01_ic.h> + #include <asm/mips-boards/atlas.h> #include <asm/mips-boards/atlasint.h> -#include <asm/gdb-stub.h> - +#include <asm/mips-boards/generic.h> static struct atlas_ictrl_regs *atlas_hw0_icregs; @@ -47,13 +52,13 @@ static struct atlas_ictrl_regs *atlas_hw0_icregs; void disable_atlas_irq(unsigned int irq_nr) { - atlas_hw0_icregs->intrsten = (1 << (irq_nr-ATLASINT_BASE)); + atlas_hw0_icregs->intrsten = 1 << (irq_nr - ATLAS_INT_BASE); iob(); } void enable_atlas_irq(unsigned int irq_nr) { - atlas_hw0_icregs->intseten = (1 << (irq_nr-ATLASINT_BASE)); + atlas_hw0_icregs->intseten = 1 << (irq_nr - ATLAS_INT_BASE); iob(); } @@ -73,7 +78,7 @@ static void end_atlas_irq(unsigned int irq) enable_atlas_irq(irq); } -static struct hw_interrupt_type atlas_irq_type = { +static struct irq_chip atlas_irq_type = { .typename = "Atlas", .startup = startup_atlas_irq, .shutdown = shutdown_atlas_irq, @@ -107,7 +112,7 @@ static inline void atlas_hw0_irqdispatch(struct pt_regs *regs) if (unlikely(int_status == 0)) return; - irq = ATLASINT_BASE + ls1bit32(int_status); + irq = ATLAS_INT_BASE + ls1bit32(int_status); DEBUG_INT("atlas_hw0_irqdispatch: irq=%d\n", irq); @@ -161,15 +166,14 @@ static inline unsigned int irq_ffs(unsigned int pending) } /* - * IRQs on the Atlas board look basically (barring software IRQs which we - * don't use at all and all external interrupt sources are combined together - * on hardware interrupt 0 (MIPS IRQ 2)) like: + * IRQs on the Atlas board look basically like (all external interrupt + * sources are combined together on hardware interrupt 0 (MIPS IRQ 2)): * - * MIPS IRQ Source + * MIPS IRQ Source * -------- ------ - * 0 Software (ignored) - * 1 Software (ignored) - * 2 Combined hardware interrupt (hw0) + * 0 Software 0 (reschedule IPI on MT) + * 1 Software 1 (remote call IPI on MT) + * 2 Combined Atlas hardware interrupt (hw0) * 3 Hardware (ignored) * 4 Hardware (ignored) * 5 Hardware (ignored) @@ -179,7 +183,7 @@ static inline unsigned int irq_ffs(unsigned int pending) * We handle the IRQ according to _our_ priority which is: * * Highest ---- R4k Timer - * Lowest ---- Combined hardware interrupt + * Lowest ---- Software 0 * * then we just return, if multiple IRQs are pending then we will just take * another exception, big deal. @@ -193,17 +197,19 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs) if (irq == MIPSCPU_INT_ATLAS) atlas_hw0_irqdispatch(regs); - else if (irq > 0) + else if (irq >= 0) do_IRQ(MIPSCPU_INT_BASE + irq, regs); else spurious_interrupt(regs); } -void __init arch_init_irq(void) +static inline void init_atlas_irqs (int base) { int i; - atlas_hw0_icregs = (struct atlas_ictrl_regs *)ioremap (ATLAS_ICTRL_REGS_BASE, sizeof(struct atlas_ictrl_regs *)); + atlas_hw0_icregs = (struct atlas_ictrl_regs *) + ioremap(ATLAS_ICTRL_REGS_BASE, + sizeof(struct atlas_ictrl_regs *)); /* * Mask out all interrupt by writing "1" to all bit position in @@ -211,11 +217,70 @@ void __init arch_init_irq(void) */ atlas_hw0_icregs->intrsten = 0xffffffff; - for (i = ATLASINT_BASE; i <= ATLASINT_END; i++) { + for (i = ATLAS_INT_BASE; i <= ATLAS_INT_END; i++) { irq_desc[i].status = IRQ_DISABLED; irq_desc[i].action = 0; irq_desc[i].depth = 1; - irq_desc[i].handler = &atlas_irq_type; + irq_desc[i].chip = &atlas_irq_type; spin_lock_init(&irq_desc[i].lock); } } + +static struct irqaction atlasirq = { + .handler = no_action, + .name = "Atlas cascade" +}; + +msc_irqmap_t __initdata msc_irqmap[] = { + {MSC01C_INT_TMR, MSC01_IRQ_EDGE, 0}, + {MSC01C_INT_PCI, MSC01_IRQ_LEVEL, 0}, +}; +int __initdata msc_nr_irqs = sizeof(msc_irqmap) / sizeof(*msc_irqmap); + +msc_irqmap_t __initdata msc_eicirqmap[] = { + {MSC01E_INT_SW0, MSC01_IRQ_LEVEL, 0}, + {MSC01E_INT_SW1, MSC01_IRQ_LEVEL, 0}, + {MSC01E_INT_ATLAS, MSC01_IRQ_LEVEL, 0}, + {MSC01E_INT_TMR, MSC01_IRQ_EDGE, 0}, + {MSC01E_INT_PCI, MSC01_IRQ_LEVEL, 0}, + {MSC01E_INT_PERFCTR, MSC01_IRQ_LEVEL, 0}, + {MSC01E_INT_CPUCTR, MSC01_IRQ_LEVEL, 0} +}; +int __initdata msc_nr_eicirqs = sizeof(msc_eicirqmap) / sizeof(*msc_eicirqmap); + +void __init arch_init_irq(void) +{ + init_atlas_irqs(ATLAS_INT_BASE); + + if (!cpu_has_veic) + mips_cpu_irq_init(MIPSCPU_INT_BASE); + + switch(mips_revision_corid) { + case MIPS_REVISION_CORID_CORE_MSC: + case MIPS_REVISION_CORID_CORE_FPGA2: + case MIPS_REVISION_CORID_CORE_FPGA3: + case MIPS_REVISION_CORID_CORE_24K: + case MIPS_REVISION_CORID_CORE_EMUL_MSC: + if (cpu_has_veic) + init_msc_irqs (MSC01E_INT_BASE, + msc_eicirqmap, msc_nr_eicirqs); + else + init_msc_irqs (MSC01C_INT_BASE, + msc_irqmap, msc_nr_irqs); + } + + + if (cpu_has_veic) { + set_vi_handler (MSC01E_INT_ATLAS, atlas_hw0_irqdispatch); + setup_irq (MSC01E_INT_BASE + MSC01E_INT_ATLAS, &atlasirq); + } else if (cpu_has_vint) { + set_vi_handler (MIPSCPU_INT_ATLAS, atlas_hw0_irqdispatch); +#ifdef CONFIG_MIPS_MT_SMTC + setup_irq_smtc (MIPSCPU_INT_BASE + MIPSCPU_INT_ATLAS, + &atlasirq, (0x100 << MIPSCPU_INT_ATLAS)); +#else /* Not SMTC */ + setup_irq(MIPSCPU_INT_BASE + MIPSCPU_INT_ATLAS, &atlasirq); +#endif /* CONFIG_MIPS_MT_SMTC */ + } else + setup_irq(MIPSCPU_INT_BASE + MIPSCPU_INT_ATLAS, &atlasirq); +} diff --git a/arch/mips/mips-boards/atlas/atlas_setup.c b/arch/mips/mips-boards/atlas/atlas_setup.c index 8cc9effcb832..0c6b0ce15028 100644 --- a/arch/mips/mips-boards/atlas/atlas_setup.c +++ b/arch/mips/mips-boards/atlas/atlas_setup.c @@ -15,7 +15,6 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. */ -#include <linux/config.h> #include <linux/init.h> #include <linux/interrupt.h> #include <linux/sched.h> @@ -36,7 +35,6 @@ extern void mips_reboot_setup(void); extern void mips_time_init(void); -extern void mips_timer_setup(struct irqaction *irq); extern unsigned long mips_rtc_get_time(void); #ifdef CONFIG_KGDB @@ -64,7 +62,6 @@ void __init plat_mem_setup(void) mips_reboot_setup(); board_time_init = mips_time_init; - board_timer_setup = mips_timer_setup; rtc_mips_get_time = mips_rtc_get_time; } @@ -80,7 +77,7 @@ static void __init serial_init(void) #else s.iobase = ATLAS_UART_REGS_BASE+3; #endif - s.irq = ATLASINT_UART; + s.irq = ATLAS_INT_UART; s.uartclk = ATLAS_BASE_BAUD * 16; s.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ; s.iotype = UPIO_PORT; diff --git a/arch/mips/mips-boards/generic/init.c b/arch/mips/mips-boards/generic/init.c index df4e94735604..58a0fe883591 100644 --- a/arch/mips/mips-boards/generic/init.c +++ b/arch/mips/mips-boards/generic/init.c @@ -19,7 +19,6 @@ * * PROM library initialisation code. */ -#include <linux/config.h> #include <linux/init.h> #include <linux/string.h> #include <linux/kernel.h> diff --git a/arch/mips/mips-boards/generic/memory.c b/arch/mips/mips-boards/generic/memory.c index fd492562584a..be80c5dd4a0c 100644 --- a/arch/mips/mips-boards/generic/memory.c +++ b/arch/mips/mips-boards/generic/memory.c @@ -18,7 +18,6 @@ * PROM library functions for acquiring/using memory descriptors given to * us from the YAMON. */ -#include <linux/config.h> #include <linux/init.h> #include <linux/mm.h> #include <linux/bootmem.h> @@ -48,43 +47,45 @@ static char *mtypes[3] = { }; #endif +/* determined physical memory size, not overridden by command line args */ +unsigned long physical_memsize = 0L; + struct prom_pmemblock * __init prom_getmdesc(void) { char *memsize_str; unsigned int memsize; char cmdline[CL_SIZE], *ptr; - /* Check the command line first for a memsize directive */ - strcpy(cmdline, arcs_cmdline); - ptr = strstr(cmdline, "memsize="); - if (ptr && (ptr != cmdline) && (*(ptr - 1) != ' ')) - ptr = strstr(ptr, " memsize="); - - if (ptr) { - memsize = memparse(ptr + 8, &ptr); - } - else { - /* otherwise look in the environment */ - memsize_str = prom_getenv("memsize"); - if (!memsize_str) { - prom_printf("memsize not set in boot prom, set to default (32Mb)\n"); - memsize = 0x02000000; - } else { + /* otherwise look in the environment */ + memsize_str = prom_getenv("memsize"); + if (!memsize_str) { + prom_printf("memsize not set in boot prom, set to default (32Mb)\n"); + physical_memsize = 0x02000000; + } else { #ifdef DEBUG - prom_printf("prom_memsize = %s\n", memsize_str); + prom_printf("prom_memsize = %s\n", memsize_str); #endif - memsize = simple_strtol(memsize_str, NULL, 0); - } + physical_memsize = simple_strtol(memsize_str, NULL, 0); } #ifdef CONFIG_CPU_BIG_ENDIAN - /* - * SOC-it swaps, or perhaps doesn't swap, when DMA'ing the last - * word of physical memory - */ - memsize -= PAGE_SIZE; + /* SOC-it swaps, or perhaps doesn't swap, when DMA'ing the last + word of physical memory */ + physical_memsize -= PAGE_SIZE; #endif + /* Check the command line for a memsize directive that overrides + the physical/default amount */ + strcpy(cmdline, arcs_cmdline); + ptr = strstr(cmdline, "memsize="); + if (ptr && (ptr != cmdline) && (*(ptr - 1) != ' ')) + ptr = strstr(ptr, " memsize="); + + if (ptr) + memsize = memparse(ptr + 8, &ptr); + else + memsize = physical_memsize; + memset(mdesc, 0, sizeof(mdesc)); mdesc[0].type = yamon_dontuse; diff --git a/arch/mips/mips-boards/generic/printf.c b/arch/mips/mips-boards/generic/printf.c index 2c1ab1f19fdc..1a711bd79b51 100644 --- a/arch/mips/mips-boards/generic/printf.c +++ b/arch/mips/mips-boards/generic/printf.c @@ -17,7 +17,6 @@ * * Putting things on the screen/serial line using YAMONs facilities. */ -#include <linux/config.h> #include <linux/init.h> #include <linux/kernel.h> #include <linux/serial_reg.h> diff --git a/arch/mips/mips-boards/generic/reset.c b/arch/mips/mips-boards/generic/reset.c index 7213c395fb6b..0996ba368b2a 100644 --- a/arch/mips/mips-boards/generic/reset.c +++ b/arch/mips/mips-boards/generic/reset.c @@ -22,7 +22,6 @@ * Reset the MIPS boards. * */ -#include <linux/config.h> #include <linux/pm.h> #include <asm/io.h> diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c index a9f6124b3a22..8d15861fce61 100644 --- a/arch/mips/mips-boards/generic/time.c +++ b/arch/mips/mips-boards/generic/time.c @@ -19,7 +19,6 @@ */ #include <linux/types.h> -#include <linux/config.h> #include <linux/init.h> #include <linux/kernel_stat.h> #include <linux/sched.h> @@ -42,8 +41,13 @@ #include <asm/mips-boards/generic.h> #include <asm/mips-boards/prom.h> + +#ifdef CONFIG_MIPS_ATLAS +#include <asm/mips-boards/atlasint.h> +#endif +#ifdef CONFIG_MIPS_MALTA #include <asm/mips-boards/maltaint.h> -#include <asm/mc146818-time.h> +#endif unsigned long cpu_khz; @@ -93,10 +97,9 @@ extern int (*perf_irq)(struct pt_regs *regs); irqreturn_t mips_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) { int cpu = smp_processor_id(); - int r2 = cpu_has_mips_r2; #ifdef CONFIG_MIPS_MT_SMTC - /* + /* * In an SMTC system, one Count/Compare set exists per VPE. * Which TC within a VPE gets the interrupt is essentially * random - we only know that it shouldn't be one with @@ -109,29 +112,46 @@ irqreturn_t mips_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) * the general MIPS timer_interrupt routine. */ + int vpflags; + /* - * DVPE is necessary so long as cross-VPE interrupts - * are done via read-modify-write of Cause register. + * We could be here due to timer interrupt, + * perf counter overflow, or both. */ - int vpflags = dvpe(); - write_c0_compare (read_c0_count() - 1); - clear_c0_cause(CPUCTR_IMASKBIT); - evpe(vpflags); - - if (cpu_data[cpu].vpe_id == 0) { - timer_interrupt(irq, dev_id, regs); - scroll_display_message(); - } else - write_c0_compare (read_c0_count() + ( mips_hpt_frequency/HZ)); - smtc_timer_broadcast(cpu_data[cpu].vpe_id); + if (read_c0_cause() & (1 << 26)) + perf_irq(regs); - if (cpu != 0) + if (read_c0_cause() & (1 << 30)) { + /* If timer interrupt, make it de-assert */ + write_c0_compare (read_c0_count() - 1); /* - * Other CPUs should do profiling and process accounting + * DVPE is necessary so long as cross-VPE interrupts + * are done via read-modify-write of Cause register. */ - local_timer_interrupt(irq, dev_id, regs); - + vpflags = dvpe(); + clear_c0_cause(CPUCTR_IMASKBIT); + evpe(vpflags); + /* + * There are things we only want to do once per tick + * in an "MP" system. One TC of each VPE will take + * the actual timer interrupt. The others will get + * timer broadcast IPIs. We use whoever it is that takes + * the tick on VPE 0 to run the full timer_interrupt(). + */ + if (cpu_data[cpu].vpe_id == 0) { + timer_interrupt(irq, NULL, regs); + smtc_timer_broadcast(cpu_data[cpu].vpe_id); + scroll_display_message(); + } else { + write_c0_compare(read_c0_count() + + (mips_hpt_frequency/HZ)); + local_timer_interrupt(irq, dev_id, regs); + smtc_timer_broadcast(cpu_data[cpu].vpe_id); + } + } #else /* CONFIG_MIPS_MT_SMTC */ + int r2 = cpu_has_mips_r2; + if (cpu == 0) { /* * CPU 0 handles the global timer interrupt job and process @@ -162,9 +182,8 @@ irqreturn_t mips_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) */ local_timer_interrupt(irq, dev_id, regs); } -#endif /* CONFIG_MIPS_MT_SMTC */ - out: +#endif /* CONFIG_MIPS_MT_SMTC */ return IRQ_HANDLED; } @@ -229,9 +248,7 @@ unsigned long __init mips_rtc_get_time(void) void __init mips_time_init(void) { - unsigned int est_freq, flags; - - local_irq_save(flags); + unsigned int est_freq; /* Set Data mode - binary. */ CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL); @@ -242,11 +259,9 @@ void __init mips_time_init(void) (est_freq%1000000)*100/1000000); cpu_khz = est_freq / 1000; - - local_irq_restore(flags); } -void __init mips_timer_setup(struct irqaction *irq) +void __init plat_timer_setup(struct irqaction *irq) { if (cpu_has_veic) { set_vi_handler (MSC01E_INT_CPUCTR, mips_timer_dispatch); diff --git a/arch/mips/mips-boards/malta/malta_setup.c b/arch/mips/mips-boards/malta/malta_setup.c index 0766e434b6bd..ab460f805bef 100644 --- a/arch/mips/mips-boards/malta/malta_setup.c +++ b/arch/mips/mips-boards/malta/malta_setup.c @@ -15,12 +15,11 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. */ -#include <linux/config.h> #include <linux/init.h> #include <linux/sched.h> #include <linux/ioport.h> #include <linux/pci.h> -#include <linux/tty.h> +#include <linux/screen_info.h> #ifdef CONFIG_MTD #include <linux/mtd/partitions.h> @@ -45,7 +44,6 @@ extern void mips_reboot_setup(void); extern void mips_time_init(void); -extern void mips_timer_setup(struct irqaction *irq); extern unsigned long mips_rtc_get_time(void); #ifdef CONFIG_KGDB @@ -224,6 +222,5 @@ void __init plat_mem_setup(void) mips_reboot_setup(); board_time_init = mips_time_init; - board_timer_setup = mips_timer_setup; rtc_mips_get_time = mips_rtc_get_time; } diff --git a/arch/mips/mips-boards/sead/sead_setup.c b/arch/mips/mips-boards/sead/sead_setup.c index 6430f11f3a95..a189dec7c7bc 100644 --- a/arch/mips/mips-boards/sead/sead_setup.c +++ b/arch/mips/mips-boards/sead/sead_setup.c @@ -17,7 +17,6 @@ * * SEAD specific setup. */ -#include <linux/config.h> #include <linux/init.h> #include <linux/sched.h> #include <linux/ioport.h> @@ -36,7 +35,6 @@ extern void mips_reboot_setup(void); extern void mips_time_init(void); -extern void mips_timer_setup(struct irqaction *irq); static void __init serial_init(void); @@ -52,7 +50,6 @@ void __init plat_mem_setup(void) serial_init (); board_time_init = mips_time_init; - board_timer_setup = mips_timer_setup; mips_reboot_setup(); } diff --git a/arch/mips/mips-boards/sim/Makefile b/arch/mips/mips-boards/sim/Makefile index 5b977de4ecff..a12e32aafde0 100644 --- a/arch/mips/mips-boards/sim/Makefile +++ b/arch/mips/mips-boards/sim/Makefile @@ -15,6 +15,5 @@ # 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. # -obj-y := sim_setup.o sim_mem.o sim_time.o sim_printf.o sim_int.o sim_irq.o \ - sim_cmdline.o +obj-y := sim_setup.o sim_mem.o sim_time.o sim_printf.o sim_int.o sim_cmdline.o obj-$(CONFIG_SMP) += sim_smp.o diff --git a/arch/mips/mips-boards/sim/sim_IRQ.c b/arch/mips/mips-boards/sim/sim_IRQ.c deleted file mode 100644 index 5b84c7fe1022..000000000000 --- a/arch/mips/mips-boards/sim/sim_IRQ.c +++ /dev/null @@ -1,148 +0,0 @@ -/* - * Carsten Langgaard, carstenl@mips.com - * Copyright (C) 1999, 2000 MIPS Technologies, Inc. All rights reserved. - * - * This program is free software; you can distribute it and/or modify it - * under the terms of the GNU General Public License (Version 2) as - * published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License - * for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. - * - * Interrupt exception dispatch code. - */ -#include <linux/config.h> - -#include <asm/asm.h> -#include <asm/mipsregs.h> -#include <asm/regdef.h> -#include <asm/stackframe.h> - -/* A lot of complication here is taken away because: - * - * 1) We handle one interrupt and return, sitting in a loop and moving across - * all the pending IRQ bits in the cause register is _NOT_ the answer, the - * common case is one pending IRQ so optimize in that direction. - * - * 2) We need not check against bits in the status register IRQ mask, that - * would make this routine slow as hell. - * - * 3) Linux only thinks in terms of all IRQs on or all IRQs off, nothing in - * between like BSD spl() brain-damage. - * - * Furthermore, the IRQs on the MIPS board look basically (barring software - * IRQs which we don't use at all and all external interrupt sources are - * combined together on hardware interrupt 0 (MIPS IRQ 2)) like: - * - * MIPS IRQ Source - * -------- ------ - * 0 Software (ignored) - * 1 Software (ignored) - * 2 Combined hardware interrupt (hw0) - * 3 Hardware (ignored) - * 4 Hardware (ignored) - * 5 Hardware (ignored) - * 6 Hardware (ignored) - * 7 R4k timer (what we use) - * - * Note: On the SEAD board thing are a little bit different. - * Here IRQ 2 (hw0) is wired to the UART0 and IRQ 3 (hw1) is wired - * wired to UART1. - * - * We handle the IRQ according to _our_ priority which is: - * - * Highest ---- R4k Timer - * Lowest ---- Combined hardware interrupt - * - * then we just return, if multiple IRQs are pending then we will just take - * another exception, big deal. - */ - - .text - .set noreorder - .set noat - .align 5 - NESTED(mipsIRQ, PT_SIZE, sp) - SAVE_ALL - CLI - .set at - - mfc0 s0, CP0_CAUSE # get irq bits - mfc0 s1, CP0_STATUS # get irq mask - and s0, s1 - - /* First we check for r4k counter/timer IRQ. */ - andi a0, s0, CAUSEF_IP7 - beq a0, zero, 1f - andi a0, s0, CAUSEF_IP2 # delay slot, check hw0 interrupt - - /* Wheee, a timer interrupt. */ - move a0, sp - jal mips_timer_interrupt - nop - - j ret_from_irq - nop - -1: -#if defined(CONFIG_MIPS_SEAD) - beq a0, zero, 1f - andi a0, s0, CAUSEF_IP3 # delay slot, check hw1 interrupt -#else - beq a0, zero, 1f # delay slot, check hw3 interrupt - andi a0, s0, CAUSEF_IP5 -#endif - - /* Wheee, combined hardware level zero interrupt. */ -#if defined(CONFIG_MIPS_ATLAS) - jal atlas_hw0_irqdispatch -#elif defined(CONFIG_MIPS_MALTA) - jal malta_hw0_irqdispatch -#elif defined(CONFIG_MIPS_SEAD) - jal sead_hw0_irqdispatch -#else -#error "MIPS board not supported\n" -#endif - move a0, sp # delay slot - - j ret_from_irq - nop # delay slot - -1: -#if defined(CONFIG_MIPS_SEAD) - beq a0, zero, 1f - andi a0, s0, CAUSEF_IP5 # delay slot, check hw3 interrupt - jal sead_hw1_irqdispatch - move a0, sp # delay slot - j ret_from_irq - nop # delay slot -1: -#endif -#if defined(CONFIG_MIPS_MALTA) - beq a0, zero, 1f # check hw3 (coreHI) interrupt - nop - jal corehi_irqdispatch - move a0, sp - j ret_from_irq - nop -1: -#endif - /* - * Here by mistake? This is possible, what can happen is that by the - * time we take the exception the IRQ pin goes low, so just leave if - * this is the case. - */ - move a1,s0 - PRINT("Got interrupt: c0_cause = %08x\n") - mfc0 a1, CP0_EPC - PRINT("c0_epc = %08x\n") - - j ret_from_irq - nop - END(mipsIRQ) diff --git a/arch/mips/mips-boards/sim/sim_irq.S b/arch/mips/mips-boards/sim/sim_irq.S deleted file mode 100644 index d16cf3822076..000000000000 --- a/arch/mips/mips-boards/sim/sim_irq.S +++ /dev/null @@ -1,101 +0,0 @@ -/* - * Copyright (C) 1999, 2005 MIPS Technologies, Inc. All rights reserved. - * - * This program is free software; you can distribute it and/or modify it - * under the terms of the GNU General Public License (Version 2) as - * published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License - * for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. - * - * Interrupt exception dispatch code. - * - */ -#include <linux/config.h> - -#include <asm/asm.h> -#include <asm/mipsregs.h> -#include <asm/regdef.h> -#include <asm/stackframe.h> - -#include <asm/mips-boards/simint.h> - - - .text - .set noreorder - .set noat - .align 5 - NESTED(simIRQ, PT_SIZE, sp) - SAVE_ALL - CLI - .set at - - mfc0 s0, CP0_CAUSE # get irq bits - mfc0 s1, CP0_STATUS # get irq mask - andi s0, ST0_IM # CAUSE.CE may be non-zero! - and s0, s1 - -#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) - .set mips32 - clz a0, s0 - .set mips0 - negu a0 - addu a0, 31-CAUSEB_IP - bltz a0, spurious -#else - beqz s0, spurious - li a0, 7 - - and t0, s0, 0xf000 - sltiu t0, t0, 1 - sll t0, 2 - subu a0, t0 - sll s0, t0 - - and t0, s0, 0xc000 - sltiu t0, t0, 1 - sll t0, 1 - subu a0, t0 - sll s0, t0 - - and t0, s0, 0x8000 - sltiu t0, t0, 1 - # sll t0, 0 - subu a0, t0 - # sll s0, t0 -#endif - -#ifdef CASCADE_IRQ - li a1, CASCADE_IRQ - bne a0, a1, 1f - addu a0, MIPSCPU_INT_BASE - - jal CASCADE_DISPATCH - move a0, sp - - j ret_from_irq - nop -1: -#else - addu a0, MIPSCPU_INT_BASE -#endif - - jal do_IRQ - move a1, sp - - j ret_from_irq - nop - - -spurious: - jal spurious_interrupt - nop - j ret_from_irq - nop - END(simIRQ) diff --git a/arch/mips/mips-boards/sim/sim_setup.c b/arch/mips/mips-boards/sim/sim_setup.c index 15a5dac4ae19..2659c1c3b78d 100644 --- a/arch/mips/mips-boards/sim/sim_setup.c +++ b/arch/mips/mips-boards/sim/sim_setup.c @@ -16,7 +16,6 @@ * */ -#include <linux/config.h> #include <linux/init.h> #include <linux/string.h> #include <linux/kernel.h> @@ -38,7 +37,6 @@ extern void sim_time_init(void); -extern void sim_timer_setup(struct irqaction *irq); static void __init serial_init(void); unsigned int _isbonito = 0; @@ -57,7 +55,6 @@ void __init plat_mem_setup(void) serial_init(); board_time_init = sim_time_init; - board_timer_setup = sim_timer_setup; prom_printf("Linux started...\n"); #ifdef CONFIG_MT_SMP diff --git a/arch/mips/mips-boards/sim/sim_smp.c b/arch/mips/mips-boards/sim/sim_smp.c index 004070956cca..cb47863ecf10 100644 --- a/arch/mips/mips-boards/sim/sim_smp.c +++ b/arch/mips/mips-boards/sim/sim_smp.c @@ -18,7 +18,6 @@ /* * Simulator Platform-specific hooks for SMP operation */ -#include <linux/config.h> #include <linux/kernel.h> #include <linux/sched.h> #include <linux/cpumask.h> diff --git a/arch/mips/mips-boards/sim/sim_time.c b/arch/mips/mips-boards/sim/sim_time.c index 18b968c696d1..230929ecd57f 100644 --- a/arch/mips/mips-boards/sim/sim_time.c +++ b/arch/mips/mips-boards/sim/sim_time.c @@ -1,5 +1,4 @@ #include <linux/types.h> -#include <linux/config.h> #include <linux/init.h> #include <linux/kernel_stat.h> #include <linux/sched.h> @@ -34,8 +33,6 @@ unsigned long cpu_khz; -extern asmlinkage void ll_local_timer_interrupt(int irq, struct pt_regs *regs); - irqreturn_t sim_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) { #ifdef CONFIG_SMP @@ -186,7 +183,7 @@ static void mips_timer_dispatch (struct pt_regs *regs) } -void __init sim_timer_setup(struct irqaction *irq) +void __init plat_timer_setup(struct irqaction *irq) { if (cpu_has_veic) { set_vi_handler(MSC01E_INT_CPUCTR, mips_timer_dispatch); |
