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-rw-r--r--arch/m68knommu/platform/523x/Makefile19
-rw-r--r--arch/m68knommu/platform/5272/config.c6
-rw-r--r--arch/m68knommu/platform/5307/Makefile1
-rw-r--r--arch/m68knommu/platform/68328/config.c94
-rw-r--r--arch/m68knommu/platform/68328/head-de2.S135
-rw-r--r--arch/m68knommu/platform/68328/timers.c106
-rw-r--r--arch/m68knommu/platform/68360/head-ram.S408
-rw-r--r--arch/m68knommu/platform/68360/head-rom.S420
-rw-r--r--arch/m68knommu/platform/68EZ328/config.c80
-rw-r--r--arch/m68knommu/platform/68VZ328/config.c (renamed from arch/m68knommu/platform/68VZ328/de2/config.c)141
-rw-r--r--arch/m68knommu/platform/68VZ328/ucdimm/config.c117
11 files changed, 1214 insertions, 313 deletions
diff --git a/arch/m68knommu/platform/523x/Makefile b/arch/m68knommu/platform/523x/Makefile
new file mode 100644
index 000000000000..c1578b016160
--- /dev/null
+++ b/arch/m68knommu/platform/523x/Makefile
@@ -0,0 +1,19 @@
+#
+# Makefile for the m68knommu linux kernel.
+#
+
+#
+# If you want to play with the HW breakpoints then you will
+# need to add define this, which will give you a stack backtrace
+# on the console port whenever a DBG interrupt occurs. You have to
+# set up you HW breakpoints to trigger a DBG interrupt:
+#
+# EXTRA_CFLAGS += -DTRAP_DBG_INTERRUPT
+# EXTRA_AFLAGS += -DTRAP_DBG_INTERRUPT
+#
+
+ifdef CONFIG_FULLDEBUG
+AFLAGS += -DDEBUGGER_COMPATIBLE_CACHE=1
+endif
+
+obj-y := config.o
diff --git a/arch/m68knommu/platform/5272/config.c b/arch/m68knommu/platform/5272/config.c
index 5cb28690f89a..cf36e7d007b9 100644
--- a/arch/m68knommu/platform/5272/config.c
+++ b/arch/m68knommu/platform/5272/config.c
@@ -104,11 +104,11 @@ int mcf_timerirqpending(int timer)
void config_BSP(char *commandp, int size)
{
-#if 0
- volatile unsigned long *pivrp;
+#if defined (CONFIG_MOD5272)
+ volatile unsigned char *pivrp;
/* Set base of device vectors to be 64 */
- pivrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_PIVR);
+ pivrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_PIVR);
*pivrp = 0x40;
#endif
diff --git a/arch/m68knommu/platform/5307/Makefile b/arch/m68knommu/platform/5307/Makefile
index 84b6b70641e1..6fe5a2b8fb08 100644
--- a/arch/m68knommu/platform/5307/Makefile
+++ b/arch/m68knommu/platform/5307/Makefile
@@ -19,6 +19,7 @@ endif
obj-$(CONFIG_COLDFIRE) += entry.o vectors.o ints.o
obj-$(CONFIG_M5206) += timers.o
obj-$(CONFIG_M5206e) += timers.o
+obj-$(CONFIG_M523x) += pit.o
obj-$(CONFIG_M5249) += timers.o
obj-$(CONFIG_M527x) += pit.o
obj-$(CONFIG_M5272) += timers.o
diff --git a/arch/m68knommu/platform/68328/config.c b/arch/m68knommu/platform/68328/config.c
index fd7c93f86481..bcfa5d7fe1e2 100644
--- a/arch/m68knommu/platform/68328/config.c
+++ b/arch/m68knommu/platform/68328/config.c
@@ -1,5 +1,7 @@
+/***************************************************************************/
+
/*
- * linux/arch/$(ARCH)/platform/$(PLATFORM)/config.c
+ * linux/arch/m68knommu/platform/68328/config.c
*
* Copyright (C) 1993 Hamish Macdonald
* Copyright (C) 1999 D. Jeff Dionne
@@ -11,6 +13,8 @@
* VZ Support/Fixes Evan Stawnyczy <e@lineo.ca>
*/
+/***************************************************************************/
+
#include <asm/dbg.h>
#include <stdarg.h>
#include <linux/config.h>
@@ -29,76 +33,16 @@
#include <asm/machdep.h>
#include <asm/MC68328.h>
+/***************************************************************************/
-void BSP_sched_init(irqreturn_t (*timer_routine)(int, void *, struct pt_regs *))
-{
-
-#ifdef CONFIG_XCOPILOT_BUGS
- /*
- * The only thing I know is that CLK32 is not available on Xcopilot
- * I have little idea about what frequency SYSCLK has on Xcopilot.
- * The values for prescaler and compare registers were simply
- * taken from the original source
- */
-
- /* Restart mode, Enable int, SYSCLK, Enable timer */
- TCTL2 = TCTL_OM | TCTL_IRQEN | TCTL_CLKSOURCE_SYSCLK | TCTL_TEN;
- /* Set prescaler */
- TPRER2 = 2;
- /* Set compare register */
- TCMP2 = 0xd7e4;
-#else
- /* Restart mode, Enable int, 32KHz, Enable timer */
- TCTL2 = TCTL_OM | TCTL_IRQEN | TCTL_CLKSOURCE_32KHZ | TCTL_TEN;
- /* Set prescaler (Divide 32KHz by 32)*/
- TPRER2 = 31;
- /* Set compare register 32Khz / 32 / 10 = 100 */
- TCMP2 = 10;
-#endif
-
- request_irq(TMR2_IRQ_NUM, timer_routine, IRQ_FLG_LOCK, "timer", NULL);
-}
-
-void BSP_tick(void)
-{
- /* Reset Timer2 */
- TSTAT2 &= 0;
-}
+void m68328_timer_init(irqreturn_t (*timer_routine) (int, void *, struct pt_regs *));
+void m68328_timer_tick(void);
+unsigned long m68328_timer_gettimeoffset(void);
+void m68328_timer_gettod(int *year, int *mon, int *day, int *hour, int *min, int *sec);
-unsigned long BSP_gettimeoffset (void)
-{
- return 0;
-}
+/***************************************************************************/
-void BSP_gettod (int *yearp, int *monp, int *dayp,
- int *hourp, int *minp, int *secp)
-{
-}
-
-int BSP_hwclk(int op, struct hwclk_time *t)
-{
- if (!op) {
- /* read */
- } else {
- /* write */
- }
- return 0;
-}
-
-int BSP_set_clock_mmss (unsigned long nowtime)
-{
-#if 0
- short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60;
-
- tod->second1 = real_seconds / 10;
- tod->second2 = real_seconds % 10;
- tod->minute1 = real_minutes / 10;
- tod->minute2 = real_minutes % 10;
-#endif
- return 0;
-}
-
-void BSP_reset (void)
+void m68328_reset (void)
{
local_irq_disable();
asm volatile ("moveal #0x10c00000, %a0;\n\t"
@@ -108,18 +52,22 @@ void BSP_reset (void)
"jmp (%a0);");
}
+/***************************************************************************/
+
void config_BSP(char *command, int len)
{
printk(KERN_INFO "\n68328 support D. Jeff Dionne <jeff@uclinux.org>\n");
printk(KERN_INFO "68328 support Kenneth Albanowski <kjahds@kjshds.com>\n");
printk(KERN_INFO "68328/Pilot support Bernhard Kuhn <kuhn@lpr.e-technik.tu-muenchen.de>\n");
- mach_sched_init = BSP_sched_init;
- mach_tick = BSP_tick;
- mach_gettimeoffset = BSP_gettimeoffset;
- mach_gettod = BSP_gettod;
+ mach_sched_init = m68328_timer_init;
+ mach_tick = m68328_timer_tick;
+ mach_gettimeoffset = m68328_timer_gettimeoffset;
+ mach_gettod = m68328_timer_gettod;
mach_hwclk = NULL;
mach_set_clock_mmss = NULL;
- mach_reset = BSP_reset;
+ mach_reset = m68328_reset;
*command = '\0';
}
+
+/***************************************************************************/
diff --git a/arch/m68knommu/platform/68328/head-de2.S b/arch/m68knommu/platform/68328/head-de2.S
new file mode 100644
index 000000000000..94c5a1609a75
--- /dev/null
+++ b/arch/m68knommu/platform/68328/head-de2.S
@@ -0,0 +1,135 @@
+#include <linux/config.h>
+
+#if defined(CONFIG_RAM32MB)
+#define MEM_END 0x02000000 /* Memory size 32Mb */
+#elif defined(CONFIG_RAM16MB)
+#define MEM_END 0x01000000 /* Memory size 16Mb */
+#else
+#define MEM_END 0x00800000 /* Memory size 8Mb */
+#endif
+
+#undef CRT_DEBUG
+
+.macro PUTC CHAR
+#ifdef CRT_DEBUG
+ moveq #\CHAR, %d7
+ jsr putc
+#endif
+.endm
+
+ .global _start
+ .global _rambase
+ .global _ramvec
+ .global _ramstart
+ .global _ramend
+
+ .data
+
+/*
+ * Set up the usable of RAM stuff
+ */
+_rambase:
+ .long 0
+_ramvec:
+ .long 0
+_ramstart:
+ .long 0
+_ramend:
+ .long 0
+
+ .text
+
+_start:
+
+/*
+ * Setup initial stack
+ */
+ /* disable all interrupts */
+ movew #0x2700, %sr
+ movel #-1, 0xfffff304
+ movel #MEM_END-4, %sp
+
+ PUTC '\r'
+ PUTC '\n'
+ PUTC 'A'
+ PUTC 'B'
+
+/*
+ * Determine end of RAM
+ */
+
+ movel #MEM_END, %a0
+ movel %a0, _ramend
+
+ PUTC 'C'
+
+/*
+ * Move ROM filesystem above bss :-)
+ */
+
+ moveal #_sbss, %a0 /* romfs at the start of bss */
+ moveal #_ebss, %a1 /* Set up destination */
+ movel %a0, %a2 /* Copy of bss start */
+
+ movel 8(%a0), %d1 /* Get size of ROMFS */
+ addql #8, %d1 /* Allow for rounding */
+ andl #0xfffffffc, %d1 /* Whole words */
+
+ addl %d1, %a0 /* Copy from end */
+ addl %d1, %a1 /* Copy from end */
+ movel %a1, _ramstart /* Set start of ram */
+
+1:
+ movel -(%a0), %d0 /* Copy dword */
+ movel %d0, -(%a1)
+ cmpl %a0, %a2 /* Check if at end */
+ bne 1b
+
+ PUTC 'D'
+
+/*
+ * Initialize BSS segment to 0
+ */
+
+ lea _sbss, %a0
+ lea _ebss, %a1
+
+ /* Copy 0 to %a0 until %a0 == %a1 */
+2: cmpal %a0, %a1
+ beq 1f
+ clrl (%a0)+
+ bra 2b
+1:
+
+ PUTC 'E'
+
+/*
+ * Load the current task pointer and stack
+ */
+
+ lea init_thread_union, %a0
+ lea 0x2000(%a0), %sp
+
+ PUTC 'F'
+ PUTC '\r'
+ PUTC '\n'
+
+/*
+ * Go
+ */
+
+ jmp start_kernel
+
+/*
+ * Local functions
+ */
+
+#ifdef CRT_DEBUG
+putc:
+ moveb %d7, 0xfffff907
+1:
+ movew 0xfffff906, %d7
+ andw #0x2000, %d7
+ beq 1b
+ rts
+#endif
diff --git a/arch/m68knommu/platform/68328/timers.c b/arch/m68knommu/platform/68328/timers.c
new file mode 100644
index 000000000000..68c2cd6b0030
--- /dev/null
+++ b/arch/m68knommu/platform/68328/timers.c
@@ -0,0 +1,106 @@
+/***************************************************************************/
+
+/*
+ * linux/arch/m68knommu/platform/68328/timers.c
+ *
+ * Copyright (C) 1993 Hamish Macdonald
+ * Copyright (C) 1999 D. Jeff Dionne
+ * Copyright (C) 2001 Georges Menie, Ken Desmet
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+/***************************************************************************/
+
+#include <linux/config.h>
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <asm/setup.h>
+#include <asm/system.h>
+#include <asm/pgtable.h>
+#include <asm/irq.h>
+#include <asm/machdep.h>
+#include <asm/MC68VZ328.h>
+
+/***************************************************************************/
+
+#if defined(CONFIG_DRAGEN2)
+/* with a 33.16 MHz clock, this will give usec resolution to the time functions */
+#define CLOCK_SOURCE TCTL_CLKSOURCE_SYSCLK
+#define CLOCK_PRE 7
+#define TICKS_PER_JIFFY 41450
+
+#elif defined(CONFIG_XCOPILOT_BUGS)
+/*
+ * The only thing I know is that CLK32 is not available on Xcopilot
+ * I have little idea about what frequency SYSCLK has on Xcopilot.
+ * The values for prescaler and compare registers were simply
+ * taken from the original source
+ */
+#define CLOCK_SOURCE TCTL_CLKSOURCE_SYSCLK
+#define CLOCK_PRE 2
+#define TICKS_PER_JIFFY 0xd7e4
+
+#else
+/* default to using the 32Khz clock */
+#define CLOCK_SOURCE TCTL_CLKSOURCE_32KHZ
+#define CLOCK_PRE 31
+#define TICKS_PER_JIFFY 10
+#endif
+
+/***************************************************************************/
+
+void m68328_timer_init(irqreturn_t (*timer_routine) (int, void *, struct pt_regs *))
+{
+ /* disable timer 1 */
+ TCTL = 0;
+
+ /* set ISR */
+ if (request_irq(TMR_IRQ_NUM, timer_routine, IRQ_FLG_LOCK, "timer", NULL))
+ panic("Unable to attach timer interrupt\n");
+
+ /* Restart mode, Enable int, Set clock source */
+ TCTL = TCTL_OM | TCTL_IRQEN | CLOCK_SOURCE;
+ TPRER = CLOCK_PRE;
+ TCMP = TICKS_PER_JIFFY;
+
+ /* Enable timer 1 */
+ TCTL |= TCTL_TEN;
+}
+
+/***************************************************************************/
+
+void m68328_timer_tick(void)
+{
+ /* Reset Timer1 */
+ TSTAT &= 0;
+}
+/***************************************************************************/
+
+unsigned long m68328_timer_gettimeoffset(void)
+{
+ unsigned long ticks = TCN, offset = 0;
+
+ /* check for pending interrupt */
+ if (ticks < (TICKS_PER_JIFFY >> 1) && (ISR & (1 << TMR_IRQ_NUM)))
+ offset = 1000000 / HZ;
+ ticks = (ticks * 1000000 / HZ) / TICKS_PER_JIFFY;
+ return ticks + offset;
+}
+
+/***************************************************************************/
+
+void m68328_timer_gettod(int *year, int *mon, int *day, int *hour, int *min, int *sec)
+{
+ long now = RTCTIME;
+
+ *year = *mon = *day = 1;
+ *hour = (now >> 24) % 24;
+ *min = (now >> 16) % 60;
+ *sec = now % 60;
+}
+
+/***************************************************************************/
diff --git a/arch/m68knommu/platform/68360/head-ram.S b/arch/m68knommu/platform/68360/head-ram.S
new file mode 100644
index 000000000000..a5c639a51eef
--- /dev/null
+++ b/arch/m68knommu/platform/68360/head-ram.S
@@ -0,0 +1,408 @@
+/* arch/m68knommu/platform/68360/head-ram.S
+ *
+ * Startup code for Motorola 68360
+ *
+ * Copyright 2001 (C) SED Systems, a Division of Calian Ltd.
+ * Based on: arch/m68knommu/platform/68328/pilot/crt0_rom.S
+ * Based on: arch/m68knommu/platform/68360/uCquicc/crt0_rom.S, 2.0.38.1.pre7
+ * uClinux Kernel
+ * Copyright (C) Michael Leslie <mleslie@lineo.com>
+ * Based on: arch/m68knommu/platform/68EZ328/ucsimm/crt0_rom.S
+ * Copyright (C) 1998 D. Jeff Dionne <jeff@uclinux.org>,
+ *
+ */
+#define ASSEMBLY
+#include <linux/config.h>
+
+.global _stext
+.global _start
+
+.global _rambase
+.global __ramvec
+.global _ramvec
+.global _ramstart
+.global _ramend
+
+.global _quicc_base
+.global _periph_base
+
+#define REGB 0x1000
+#define PEPAR (_dprbase + REGB + 0x0016)
+#define GMR (_dprbase + REGB + 0x0040)
+#define OR0 (_dprbase + REGB + 0x0054)
+#define BR0 (_dprbase + REGB + 0x0050)
+#define OR1 (_dprbase + REGB + 0x0064)
+#define BR1 (_dprbase + REGB + 0x0060)
+#define OR4 (_dprbase + REGB + 0x0094)
+#define BR4 (_dprbase + REGB + 0x0090)
+#define OR6 (_dprbase + REGB + 0x00b4)
+#define BR6 (_dprbase + REGB + 0x00b0)
+#define OR7 (_dprbase + REGB + 0x00c4)
+#define BR7 (_dprbase + REGB + 0x00c0)
+
+#define MCR (_dprbase + REGB + 0x0000)
+#define AVR (_dprbase + REGB + 0x0008)
+
+#define SYPCR (_dprbase + REGB + 0x0022)
+
+#define PLLCR (_dprbase + REGB + 0x0010)
+#define CLKOCR (_dprbase + REGB + 0x000C)
+#define CDVCR (_dprbase + REGB + 0x0014)
+
+#define BKAR (_dprbase + REGB + 0x0030)
+#define BKCR (_dprbase + REGB + 0x0034)
+#define SWIV (_dprbase + REGB + 0x0023)
+#define PICR (_dprbase + REGB + 0x0026)
+#define PITR (_dprbase + REGB + 0x002A)
+
+/* Define for all memory configuration */
+#define MCU_SIM_GMR 0x00000000
+#define SIM_OR_MASK 0x0fffffff
+
+/* Defines for chip select zero - the flash */
+#define SIM_OR0_MASK 0x20000002
+#define SIM_BR0_MASK 0x00000001
+
+
+/* Defines for chip select one - the RAM */
+#define SIM_OR1_MASK 0x10000000
+#define SIM_BR1_MASK 0x00000001
+
+#define MCU_SIM_MBAR_ADRS 0x0003ff00
+#define MCU_SIM_MBAR_BA_MASK 0xfffff000
+#define MCU_SIM_MBAR_AS_MASK 0x00000001
+
+#define MCU_SIM_PEPAR 0x00B4
+
+#define MCU_DISABLE_INTRPTS 0x2700
+#define MCU_SIM_AVR 0x00
+
+#define MCU_SIM_MCR 0x00005cff
+
+#define MCU_SIM_CLKOCR 0x00
+#define MCU_SIM_PLLCR 0x8000
+#define MCU_SIM_CDVCR 0x0000
+
+#define MCU_SIM_SYPCR 0x0000
+#define MCU_SIM_SWIV 0x00
+#define MCU_SIM_PICR 0x0000
+#define MCU_SIM_PITR 0x0000
+
+
+#include <asm/m68360_regs.h>
+
+
+/*
+ * By the time this RAM specific code begins to execute, DPRAM
+ * and DRAM should already be mapped and accessible.
+ */
+
+ .text
+_start:
+_stext:
+ nop
+ ori.w #MCU_DISABLE_INTRPTS, %sr /* disable interrupts: */
+ /* We should not need to setup the boot stack the reset should do it. */
+ movea.l #__ramend, %sp /*set up stack at the end of DRAM:*/
+
+set_mbar_register:
+ moveq.l #0x07, %d1 /* Setup MBAR */
+ movec %d1, %dfc
+
+ lea.l MCU_SIM_MBAR_ADRS, %a0
+ move.l #_dprbase, %d0
+ andi.l #MCU_SIM_MBAR_BA_MASK, %d0
+ ori.l #MCU_SIM_MBAR_AS_MASK, %d0
+ moves.l %d0, %a0@
+
+ moveq.l #0x05, %d1
+ movec.l %d1, %dfc
+
+ /* Now we can begin to access registers in DPRAM */
+
+set_sim_mcr:
+ /* Set Module Configuration Register */
+ move.l #MCU_SIM_MCR, MCR
+
+ /* to do: Determine cause of reset */
+
+ /*
+ * configure system clock MC68360 p. 6-40
+ * (value +1)*osc/128 = system clock
+ */
+set_sim_clock:
+ move.w #MCU_SIM_PLLCR, PLLCR
+ move.b #MCU_SIM_CLKOCR, CLKOCR
+ move.w #MCU_SIM_CDVCR, CDVCR
+
+ /* Wait for the PLL to settle */
+ move.w #16384, %d0
+pll_settle_wait:
+ subi.w #1, %d0
+ bne pll_settle_wait
+
+ /* Setup the system protection register, and watchdog timer register */
+ move.b #MCU_SIM_SWIV, SWIV
+ move.w #MCU_SIM_PICR, PICR
+ move.w #MCU_SIM_PITR, PITR
+ move.w #MCU_SIM_SYPCR, SYPCR
+
+ /* Clear DPRAM - system + parameter */
+ movea.l #_dprbase, %a0
+ movea.l #_dprbase+0x2000, %a1
+
+ /* Copy 0 to %a0 until %a0 == %a1 */
+clear_dpram:
+ movel #0, %a0@+
+ cmpal %a0, %a1
+ bhi clear_dpram
+
+configure_memory_controller:
+ /* Set up Global Memory Register (GMR) */
+ move.l #MCU_SIM_GMR, %d0
+ move.l %d0, GMR
+
+configure_chip_select_0:
+ move.l #__ramend, %d0
+ subi.l #__ramstart, %d0
+ subq.l #0x01, %d0
+ eori.l #SIM_OR_MASK, %d0
+ ori.l #SIM_OR0_MASK, %d0
+ move.l %d0, OR0
+
+ move.l #__ramstart, %d0
+ ori.l #SIM_BR0_MASK, %d0
+ move.l %d0, BR0
+
+configure_chip_select_1:
+ move.l #__rom_end, %d0
+ subi.l #__rom_start, %d0
+ subq.l #0x01, %d0
+ eori.l #SIM_OR_MASK, %d0
+ ori.l #SIM_OR1_MASK, %d0
+ move.l %d0, OR1
+
+ move.l #__rom_start, %d0
+ ori.l #SIM_BR1_MASK, %d0
+ move.l %d0, BR1
+
+ move.w #MCU_SIM_PEPAR, PEPAR
+
+ /* point to vector table: */
+ move.l #_romvec, %a0
+ move.l #_ramvec, %a1
+copy_vectors:
+ move.l %a0@, %d0
+ move.l %d0, %a1@
+ move.l %a0@, %a1@
+ addq.l #0x04, %a0
+ addq.l #0x04, %a1
+ cmp.l #_start, %a0
+ blt copy_vectors
+
+ move.l #_ramvec, %a1
+ movec %a1, %vbr
+
+
+ /* Copy data segment from ROM to RAM */
+ moveal #_stext, %a0
+ moveal #_sdata, %a1
+ moveal #_edata, %a2
+
+ /* Copy %a0 to %a1 until %a1 == %a2 */
+LD1:
+ move.l %a0@, %d0
+ addq.l #0x04, %a0
+ move.l %d0, %a1@
+ addq.l #0x04, %a1
+ cmp.l #_edata, %a1
+ blt LD1
+
+ moveal #_sbss, %a0
+ moveal #_ebss, %a1
+
+ /* Copy 0 to %a0 until %a0 == %a1 */
+L1:
+ movel #0, %a0@+
+ cmpal %a0, %a1
+ bhi L1
+
+load_quicc:
+ move.l #_dprbase, _quicc_base
+
+store_ram_size:
+ /* Set ram size information */
+ move.l #_sdata, _rambase
+ move.l #_ebss, _ramstart
+ move.l #__ramend, %d0
+ sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/
+ move.l %d0, _ramend /* Different from __ramend.*/
+
+store_flash_size:
+ /* Set rom size information */
+ move.l #__rom_end, %d0
+ sub.l #__rom_start, %d0
+ move.l %d0, rom_length
+
+ pea 0
+ pea env
+ pea %sp@(4)
+ pea 0
+
+ lea init_thread_union, %a2
+ lea 0x2000(%a2), %sp
+
+lp:
+ jsr start_kernel
+
+_exit:
+ jmp _exit
+
+
+ .data
+ .align 4
+env:
+ .long 0
+_quicc_base:
+ .long 0
+_periph_base:
+ .long 0
+_ramvec:
+ .long 0
+_rambase:
+ .long 0
+_ramstart:
+ .long 0
+_ramend:
+ .long 0
+_dprbase:
+ .long 0xffffe000
+
+ .text
+
+ /*
+ * These are the exception vectors at boot up, they are copied into RAM
+ * and then overwritten as needed.
+ */
+
+.section ".data.initvect","awx"
+ .long __ramend /* Reset: Initial Stack Pointer - 0. */
+ .long _start /* Reset: Initial Program Counter - 1. */
+ .long buserr /* Bus Error - 2. */
+ .long trap /* Address Error - 3. */
+ .long trap /* Illegal Instruction - 4. */
+ .long trap /* Divide by zero - 5. */
+ .long trap /* CHK, CHK2 Instructions - 6. */
+ .long trap /* TRAPcc, TRAPV Instructions - 7. */
+ .long trap /* Privilege Violation - 8. */
+ .long trap /* Trace - 9. */
+ .long trap /* Line 1010 Emulator - 10. */
+ .long trap /* Line 1111 Emualtor - 11. */
+ .long trap /* Harware Breakpoint - 12. */
+ .long trap /* (Reserved for Coprocessor Protocol Violation)- 13. */
+ .long trap /* Format Error - 14. */
+ .long trap /* Uninitialized Interrupt - 15. */
+ .long trap /* (Unassigned, Reserver) - 16. */
+ .long trap /* (Unassigned, Reserver) - 17. */
+ .long trap /* (Unassigned, Reserver) - 18. */
+ .long trap /* (Unassigned, Reserver) - 19. */
+ .long trap /* (Unassigned, Reserver) - 20. */
+ .long trap /* (Unassigned, Reserver) - 21. */
+ .long trap /* (Unassigned, Reserver) - 22. */
+ .long trap /* (Unassigned, Reserver) - 23. */
+ .long trap /* Spurious Interrupt - 24. */
+ .long trap /* Level 1 Interrupt Autovector - 25. */
+ .long trap /* Level 2 Interrupt Autovector - 26. */
+ .long trap /* Level 3 Interrupt Autovector - 27. */
+ .long trap /* Level 4 Interrupt Autovector - 28. */
+ .long trap /* Level 5 Interrupt Autovector - 29. */
+ .long trap /* Level 6 Interrupt Autovector - 30. */
+ .long trap /* Level 7 Interrupt Autovector - 31. */
+ .long system_call /* Trap Instruction Vectors 0 - 32. */
+ .long trap /* Trap Instruction Vectors 1 - 33. */
+ .long trap /* Trap Instruction Vectors 2 - 34. */
+ .long trap /* Trap Instruction Vectors 3 - 35. */
+ .long trap /* Trap Instruction Vectors 4 - 36. */
+ .long trap /* Trap Instruction Vectors 5 - 37. */
+ .long trap /* Trap Instruction Vectors 6 - 38. */
+ .long trap /* Trap Instruction Vectors 7 - 39. */
+ .long trap /* Trap Instruction Vectors 8 - 40. */
+ .long trap /* Trap Instruction Vectors 9 - 41. */
+ .long trap /* Trap Instruction Vectors 10 - 42. */
+ .long trap /* Trap Instruction Vectors 11 - 43. */
+ .long trap /* Trap Instruction Vectors 12 - 44. */
+ .long trap /* Trap Instruction Vectors 13 - 45. */
+ .long trap /* Trap Instruction Vectors 14 - 46. */
+ .long trap /* Trap Instruction Vectors 15 - 47. */
+ .long 0 /* (Reserved for Coprocessor) - 48. */
+ .long 0 /* (Reserved for Coprocessor) - 49. */
+ .long 0 /* (Reserved for Coprocessor) - 50. */
+ .long 0 /* (Reserved for Coprocessor) - 51. */
+ .long 0 /* (Reserved for Coprocessor) - 52. */
+ .long 0 /* (Reserved for Coprocessor) - 53. */
+ .long 0 /* (Reserved for Coprocessor) - 54. */
+ .long 0 /* (Reserved for Coprocessor) - 55. */
+ .long 0 /* (Reserved for Coprocessor) - 56. */
+ .long 0 /* (Reserved for Coprocessor) - 57. */
+ .long 0 /* (Reserved for Coprocessor) - 58. */
+ .long 0 /* (Unassigned, Reserved) - 59. */
+ .long 0 /* (Unassigned, Reserved) - 60. */
+ .long 0 /* (Unassigned, Reserved) - 61. */
+ .long 0 /* (Unassigned, Reserved) - 62. */
+ .long 0 /* (Unassigned, Reserved) - 63. */
+ /* The assignment of these vectors to the CPM is */
+ /* dependent on the configuration of the CPM vba */
+ /* fields. */
+ .long 0 /* (User-Defined Vectors 1) CPM Error - 64. */
+ .long 0 /* (User-Defined Vectors 2) CPM Parallel IO PC11- 65. */
+ .long 0 /* (User-Defined Vectors 3) CPM Parallel IO PC10- 66. */
+ .long 0 /* (User-Defined Vectors 4) CPM SMC2 / PIP - 67. */
+ .long 0 /* (User-Defined Vectors 5) CPM SMC1 - 68. */
+ .long 0 /* (User-Defined Vectors 6) CPM SPI - 69. */
+ .long 0 /* (User-Defined Vectors 7) CPM Parallel IO PC9 - 70. */
+ .long 0 /* (User-Defined Vectors 8) CPM Timer 4 - 71. */
+ .long 0 /* (User-Defined Vectors 9) CPM Reserved - 72. */
+ .long 0 /* (User-Defined Vectors 10) CPM Parallel IO PC8- 73. */
+ .long 0 /* (User-Defined Vectors 11) CPM Parallel IO PC7- 74. */
+ .long 0 /* (User-Defined Vectors 12) CPM Parallel IO PC6- 75. */
+ .long 0 /* (User-Defined Vectors 13) CPM Timer 3 - 76. */
+ .long 0 /* (User-Defined Vectors 14) CPM Reserved - 77. */
+ .long 0 /* (User-Defined Vectors 15) CPM Parallel IO PC5- 78. */
+ .long 0 /* (User-Defined Vectors 16) CPM Parallel IO PC4- 79. */
+ .long 0 /* (User-Defined Vectors 17) CPM Reserved - 80. */
+ .long 0 /* (User-Defined Vectors 18) CPM RISC Timer Tbl - 81. */
+ .long 0 /* (User-Defined Vectors 19) CPM Timer 2 - 82. */
+ .long 0 /* (User-Defined Vectors 21) CPM Reserved - 83. */
+ .long 0 /* (User-Defined Vectors 22) CPM IDMA2 - 84. */
+ .long 0 /* (User-Defined Vectors 23) CPM IDMA1 - 85. */
+ .long 0 /* (User-Defined Vectors 24) CPM SDMA Bus Err - 86. */
+ .long 0 /* (User-Defined Vectors 25) CPM Parallel IO PC3- 87. */
+ .long 0 /* (User-Defined Vectors 26) CPM Parallel IO PC2- 88. */
+ .long 0 /* (User-Defined Vectors 27) CPM Timer 1 - 89. */
+ .long 0 /* (User-Defined Vectors 28) CPM Parallel IO PC1- 90. */
+ .long 0 /* (User-Defined Vectors 29) CPM SCC 4 - 91. */
+ .long 0 /* (User-Defined Vectors 30) CPM SCC 3 - 92. */
+ .long 0 /* (User-Defined Vectors 31) CPM SCC 2 - 93. */
+ .long 0 /* (User-Defined Vectors 32) CPM SCC 1 - 94. */
+ .long 0 /* (User-Defined Vectors 33) CPM Parallel IO PC0- 95. */
+ /* I don't think anything uses the vectors after here. */
+ .long 0 /* (User-Defined Vectors 34) - 96. */
+ .long 0,0,0,0,0 /* (User-Defined Vectors 35 - 39). */
+ .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 40 - 49). */
+ .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 50 - 59). */
+ .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 60 - 69). */
+ .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 70 - 79). */
+ .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 80 - 89). */
+ .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 90 - 99). */
+ .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 100 - 109). */
+ .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 110 - 119). */
+ .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 120 - 129). */
+ .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 130 - 139). */
+ .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 140 - 149). */
+ .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 150 - 159). */
+ .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 160 - 169). */
+ .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 170 - 179). */
+ .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 180 - 189). */
+ .long 0,0,0 /* (User-Defined Vectors 190 - 192). */
+.text
+ignore: rte
diff --git a/arch/m68knommu/platform/68360/head-rom.S b/arch/m68knommu/platform/68360/head-rom.S
new file mode 100644
index 000000000000..0da357a4cfee
--- /dev/null
+++ b/arch/m68knommu/platform/68360/head-rom.S
@@ -0,0 +1,420 @@
+/* arch/m68knommu/platform/68360/head-rom.S
+ *
+ * Startup code for Motorola 68360
+ *
+ * Copyright (C) SED Systems, a Division of Calian Ltd.
+ * Based on: arch/m68knommu/platform/68328/pilot/crt0_rom.S
+ * Based on: arch/m68knommu/platform/68360/uCquicc/crt0_rom.S, 2.0.38.1.pre7
+ * uClinux Kernel
+ * Copyright (C) Michael Leslie <mleslie@lineo.com>
+ * Based on: arch/m68knommu/platform/68EZ328/ucsimm/crt0_rom.S
+ * Copyright (C) 1998 D. Jeff Dionne <jeff@uclinux.org>,
+ *
+ */
+#include <linux/config.h>
+
+.global _stext
+.global _sbss
+.global _start
+
+.global _rambase
+.global __ramvec
+.global _ramvec
+.global _ramstart
+.global _ramend
+
+.global _quicc_base
+.global _periph_base
+
+#define REGB 0x1000
+#define PEPAR (_dprbase + REGB + 0x0016)
+#define GMR (_dprbase + REGB + 0x0040)
+#define OR0 (_dprbase + REGB + 0x0054)
+#define BR0 (_dprbase + REGB + 0x0050)
+
+#define OR1 (_dprbase + REGB + 0x0064)
+#define BR1 (_dprbase + REGB + 0x0060)
+
+#define OR2 (_dprbase + REGB + 0x0074)
+#define BR2 (_dprbase + REGB + 0x0070)
+
+#define OR3 (_dprbase + REGB + 0x0084)
+#define BR3 (_dprbase + REGB + 0x0080)
+
+#define OR4 (_dprbase + REGB + 0x0094)
+#define BR4 (_dprbase + REGB + 0x0090)
+
+#define OR5 (_dprbase + REGB + 0x00A4)
+#define BR5 (_dprbase + REGB + 0x00A0)
+
+#define OR6 (_dprbase + REGB + 0x00b4)
+#define BR6 (_dprbase + REGB + 0x00b0)
+
+#define OR7 (_dprbase + REGB + 0x00c4)
+#define BR7 (_dprbase + REGB + 0x00c0)
+
+#define MCR (_dprbase + REGB + 0x0000)
+#define AVR (_dprbase + REGB + 0x0008)
+
+#define SYPCR (_dprbase + REGB + 0x0022)
+
+#define PLLCR (_dprbase + REGB + 0x0010)
+#define CLKOCR (_dprbase + REGB + 0x000C)
+#define CDVCR (_dprbase + REGB + 0x0014)
+
+#define BKAR (_dprbase + REGB + 0x0030)
+#define BKCR (_dprbase + REGB + 0x0034)
+#define SWIV (_dprbase + REGB + 0x0023)
+#define PICR (_dprbase + REGB + 0x0026)
+#define PITR (_dprbase + REGB + 0x002A)
+
+/* Define for all memory configuration */
+#define MCU_SIM_GMR 0x00000000
+#define SIM_OR_MASK 0x0fffffff
+
+/* Defines for chip select zero - the flash */
+#define SIM_OR0_MASK 0x20000000
+#define SIM_BR0_MASK 0x00000001
+
+/* Defines for chip select one - the RAM */
+#define SIM_OR1_MASK 0x10000000
+#define SIM_BR1_MASK 0x00000001
+
+#define MCU_SIM_MBAR_ADRS 0x0003ff00
+#define MCU_SIM_MBAR_BA_MASK 0xfffff000
+#define MCU_SIM_MBAR_AS_MASK 0x00000001
+
+#define MCU_SIM_PEPAR 0x00B4
+
+#define MCU_DISABLE_INTRPTS 0x2700
+#define MCU_SIM_AVR 0x00
+
+#define MCU_SIM_MCR 0x00005cff
+
+#define MCU_SIM_CLKOCR 0x00
+#define MCU_SIM_PLLCR 0x8000
+#define MCU_SIM_CDVCR 0x0000
+
+#define MCU_SIM_SYPCR 0x0000
+#define MCU_SIM_SWIV 0x00
+#define MCU_SIM_PICR 0x0000
+#define MCU_SIM_PITR 0x0000
+
+
+#include <asm/m68360_regs.h>
+
+
+/*
+ * By the time this RAM specific code begins to execute, DPRAM
+ * and DRAM should already be mapped and accessible.
+ */
+
+ .text
+_start:
+_stext:
+ nop
+ ori.w #MCU_DISABLE_INTRPTS, %sr /* disable interrupts: */
+ /* We should not need to setup the boot stack the reset should do it. */
+ movea.l #__ramend, %sp /* set up stack at the end of DRAM:*/
+
+
+set_mbar_register:
+ moveq.l #0x07, %d1 /* Setup MBAR */
+ movec %d1, %dfc
+
+ lea.l MCU_SIM_MBAR_ADRS, %a0
+ move.l #_dprbase, %d0
+ andi.l #MCU_SIM_MBAR_BA_MASK, %d0
+ ori.l #MCU_SIM_MBAR_AS_MASK, %d0
+ moves.l %d0, %a0@
+
+ moveq.l #0x05, %d1
+ movec.l %d1, %dfc
+
+ /* Now we can begin to access registers in DPRAM */
+
+set_sim_mcr:
+ /* Set Module Configuration Register */
+ move.l #MCU_SIM_MCR, MCR
+
+ /* to do: Determine cause of reset */
+
+ /*
+ * configure system clock MC68360 p. 6-40
+ * (value +1)*osc/128 = system clock
+ * or
+ * (value + 1)*osc = system clock
+ * You do not need to divide the oscillator by 128 unless you want to.
+ */
+set_sim_clock:
+ move.w #MCU_SIM_PLLCR, PLLCR
+ move.b #MCU_SIM_CLKOCR, CLKOCR
+ move.w #MCU_SIM_CDVCR, CDVCR
+
+ /* Wait for the PLL to settle */
+ move.w #16384, %d0
+pll_settle_wait:
+ subi.w #1, %d0
+ bne pll_settle_wait
+
+ /* Setup the system protection register, and watchdog timer register */
+ move.b #MCU_SIM_SWIV, SWIV
+ move.w #MCU_SIM_PICR, PICR
+ move.w #MCU_SIM_PITR, PITR
+ move.w #MCU_SIM_SYPCR, SYPCR
+
+ /* Clear DPRAM - system + parameter */
+ movea.l #_dprbase, %a0
+ movea.l #_dprbase+0x2000, %a1
+
+ /* Copy 0 to %a0 until %a0 == %a1 */
+clear_dpram:
+ movel #0, %a0@+
+ cmpal %a0, %a1
+ bhi clear_dpram
+
+configure_memory_controller:
+ /* Set up Global Memory Register (GMR) */
+ move.l #MCU_SIM_GMR, %d0
+ move.l %d0, GMR
+
+configure_chip_select_0:
+ move.l #0x00400000, %d0
+ subq.l #0x01, %d0
+ eori.l #SIM_OR_MASK, %d0
+ ori.l #SIM_OR0_MASK, %d0
+ move.l %d0, OR0
+
+ move.l #__rom_start, %d0
+ ori.l #SIM_BR0_MASK, %d0
+ move.l %d0, BR0
+
+ move.l #0x0, BR1
+ move.l #0x0, BR2
+ move.l #0x0, BR3
+ move.l #0x0, BR4
+ move.l #0x0, BR5
+ move.l #0x0, BR6
+ move.l #0x0, BR7
+
+ move.w #MCU_SIM_PEPAR, PEPAR
+
+ /* point to vector table: */
+ move.l #_romvec, %a0
+ move.l #_ramvec, %a1
+copy_vectors:
+ move.l %a0@, %d0
+ move.l %d0, %a1@
+ move.l %a0@, %a1@
+ addq.l #0x04, %a0
+ addq.l #0x04, %a1
+ cmp.l #_start, %a0
+ blt copy_vectors
+
+ move.l #_ramvec, %a1
+ movec %a1, %vbr
+
+
+ /* Copy data segment from ROM to RAM */
+ moveal #_etext, %a0
+ moveal #_sdata, %a1
+ moveal #_edata, %a2
+
+ /* Copy %a0 to %a1 until %a1 == %a2 */
+LD1:
+ move.l %a0@, %d0
+ addq.l #0x04, %a0
+ move.l %d0, %a1@
+ addq.l #0x04, %a1
+ cmp.l #_edata, %a1
+ blt LD1
+
+ moveal #_sbss, %a0
+ moveal #_ebss, %a1
+
+ /* Copy 0 to %a0 until %a0 == %a1 */
+L1:
+ movel #0, %a0@+
+ cmpal %a0, %a1
+ bhi L1
+
+load_quicc:
+ move.l #_dprbase, _quicc_base
+
+store_ram_size:
+ /* Set ram size information */
+ move.l #_sdata, _rambase
+ move.l #_ebss, _ramstart
+ move.l #__ramend, %d0
+ sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/
+ move.l %d0, _ramend /* Different from __ramend.*/
+
+store_flash_size:
+ /* Set rom size information */
+ move.l #__rom_end, %d0
+ sub.l #__rom_start, %d0
+ move.l %d0, rom_length
+
+ pea 0
+ pea env
+ pea %sp@(4)
+ pea 0
+
+ lea init_thread_union, %a2
+ lea 0x2000(%a2), %sp
+
+lp:
+ jsr start_kernel
+
+_exit:
+ jmp _exit
+
+
+ .data
+ .align 4
+env:
+ .long 0
+_quicc_base:
+ .long 0
+_periph_base:
+ .long 0
+_ramvec:
+ .long 0
+_rambase:
+ .long 0
+_ramstart:
+ .long 0
+_ramend:
+ .long 0
+_dprbase:
+ .long 0xffffe000
+
+
+ .text
+
+ /*
+ * These are the exception vectors at boot up, they are copied into RAM
+ * and then overwritten as needed.
+ */
+
+.section ".data.initvect","awx"
+ .long __ramend /* Reset: Initial Stack Pointer - 0. */
+ .long _start /* Reset: Initial Program Counter - 1. */
+ .long buserr /* Bus Error - 2. */
+ .long trap /* Address Error - 3. */
+ .long trap /* Illegal Instruction - 4. */
+ .long trap /* Divide by zero - 5. */
+ .long trap /* CHK, CHK2 Instructions - 6. */
+ .long trap /* TRAPcc, TRAPV Instructions - 7. */
+ .long trap /* Privilege Violation - 8. */
+ .long trap /* Trace - 9. */
+ .long trap /* Line 1010 Emulator - 10. */
+ .long trap /* Line 1111 Emualtor - 11. */
+ .long trap /* Harware Breakpoint - 12. */
+ .long trap /* (Reserved for Coprocessor Protocol Violation)- 13. */
+ .long trap /* Format Error - 14. */
+ .long trap /* Uninitialized Interrupt - 15. */
+ .long trap /* (Unassigned, Reserver) - 16. */
+ .long trap /* (Unassigned, Reserver) - 17. */
+ .long trap /* (Unassigned, Reserver) - 18. */
+ .long trap /* (Unassigned, Reserver) - 19. */
+ .long trap /* (Unassigned, Reserver) - 20. */
+ .long trap /* (Unassigned, Reserver) - 21. */
+ .long trap /* (Unassigned, Reserver) - 22. */
+ .long trap /* (Unassigned, Reserver) - 23. */
+ .long trap /* Spurious Interrupt - 24. */
+ .long trap /* Level 1 Interrupt Autovector - 25. */
+ .long trap /* Level 2 Interrupt Autovector - 26. */
+ .long trap /* Level 3 Interrupt Autovector - 27. */
+ .long trap /* Level 4 Interrupt Autovector - 28. */
+ .long trap /* Level 5 Interrupt Autovector - 29. */
+ .long trap /* Level 6 Interrupt Autovector - 30. */
+ .long trap /* Level 7 Interrupt Autovector - 31. */
+ .long system_call /* Trap Instruction Vectors 0 - 32. */
+ .long trap /* Trap Instruction Vectors 1 - 33. */
+ .long trap /* Trap Instruction Vectors 2 - 34. */
+ .long trap /* Trap Instruction Vectors 3 - 35. */
+ .long trap /* Trap Instruction Vectors 4 - 36. */
+ .long trap /* Trap Instruction Vectors 5 - 37. */
+ .long trap /* Trap Instruction Vectors 6 - 38. */
+ .long trap /* Trap Instruction Vectors 7 - 39. */
+ .long trap /* Trap Instruction Vectors 8 - 40. */
+ .long trap /* Trap Instruction Vectors 9 - 41. */
+ .long trap /* Trap Instruction Vectors 10 - 42. */
+ .long trap /* Trap Instruction Vectors 11 - 43. */
+ .long trap /* Trap Instruction Vectors 12 - 44. */
+ .long trap /* Trap Instruction Vectors 13 - 45. */
+ .long trap /* Trap Instruction Vectors 14 - 46. */
+ .long trap /* Trap Instruction Vectors 15 - 47. */
+ .long 0 /* (Reserved for Coprocessor) - 48. */
+ .long 0 /* (Reserved for Coprocessor) - 49. */
+ .long 0 /* (Reserved for Coprocessor) - 50. */
+ .long 0 /* (Reserved for Coprocessor) - 51. */
+ .long 0 /* (Reserved for Coprocessor) - 52. */
+ .long 0 /* (Reserved for Coprocessor) - 53. */
+ .long 0 /* (Reserved for Coprocessor) - 54. */
+ .long 0 /* (Reserved for Coprocessor) - 55. */
+ .long 0 /* (Reserved for Coprocessor) - 56. */
+ .long 0 /* (Reserved for Coprocessor) - 57. */
+ .long 0 /* (Reserved for Coprocessor) - 58. */
+ .long 0 /* (Unassigned, Reserved) - 59. */
+ .long 0 /* (Unassigned, Reserved) - 60. */
+ .long 0 /* (Unassigned, Reserved) - 61. */
+ .long 0 /* (Unassigned, Reserved) - 62. */
+ .long 0 /* (Unassigned, Reserved) - 63. */
+ /* The assignment of these vectors to the CPM is */
+ /* dependent on the configuration of the CPM vba */
+ /* fields. */
+ .long 0 /* (User-Defined Vectors 1) CPM Error - 64. */
+ .long 0 /* (User-Defined Vectors 2) CPM Parallel IO PC11- 65. */
+ .long 0 /* (User-Defined Vectors 3) CPM Parallel IO PC10- 66. */
+ .long 0 /* (User-Defined Vectors 4) CPM SMC2 / PIP - 67. */
+ .long 0 /* (User-Defined Vectors 5) CPM SMC1 - 68. */
+ .long 0 /* (User-Defined Vectors 6) CPM SPI - 69. */
+ .long 0 /* (User-Defined Vectors 7) CPM Parallel IO PC9 - 70. */
+ .long 0 /* (User-Defined Vectors 8) CPM Timer 4 - 71. */
+ .long 0 /* (User-Defined Vectors 9) CPM Reserved - 72. */
+ .long 0 /* (User-Defined Vectors 10) CPM Parallel IO PC8- 73. */
+ .long 0 /* (User-Defined Vectors 11) CPM Parallel IO PC7- 74. */
+ .long 0 /* (User-Defined Vectors 12) CPM Parallel IO PC6- 75. */
+ .long 0 /* (User-Defined Vectors 13) CPM Timer 3 - 76. */
+ .long 0 /* (User-Defined Vectors 14) CPM Reserved - 77. */
+ .long 0 /* (User-Defined Vectors 15) CPM Parallel IO PC5- 78. */
+ .long 0 /* (User-Defined Vectors 16) CPM Parallel IO PC4- 79. */
+ .long 0 /* (User-Defined Vectors 17) CPM Reserved - 80. */
+ .long 0 /* (User-Defined Vectors 18) CPM RISC Timer Tbl - 81. */
+ .long 0 /* (User-Defined Vectors 19) CPM Timer 2 - 82. */
+ .long 0 /* (User-Defined Vectors 21) CPM Reserved - 83. */
+ .long 0 /* (User-Defined Vectors 22) CPM IDMA2 - 84. */
+ .long 0 /* (User-Defined Vectors 23) CPM IDMA1 - 85. */
+ .long 0 /* (User-Defined Vectors 24) CPM SDMA Bus Err - 86. */
+ .long 0 /* (User-Defined Vectors 25) CPM Parallel IO PC3- 87. */
+ .long 0 /* (User-Defined Vectors 26) CPM Parallel IO PC2- 88. */
+ .long 0 /* (User-Defined Vectors 27) CPM Timer 1 - 89. */
+ .long 0 /* (User-Defined Vectors 28) CPM Parallel IO PC1- 90. */
+ .long 0 /* (User-Defined Vectors 29) CPM SCC 4 - 91. */
+ .long 0 /* (User-Defined Vectors 30) CPM SCC 3 - 92. */
+ .long 0 /* (User-Defined Vectors 31) CPM SCC 2 - 93. */
+ .long 0 /* (User-Defined Vectors 32) CPM SCC 1 - 94. */
+ .long 0 /* (User-Defined Vectors 33) CPM Parallel IO PC0- 95. */
+ /* I don't think anything uses the vectors after here. */
+ .long 0 /* (User-Defined Vectors 34) - 96. */
+ .long 0,0,0,0,0 /* (User-Defined Vectors 35 - 39). */
+ .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 40 - 49). */
+ .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 50 - 59). */
+ .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 60 - 69). */
+ .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 70 - 79). */
+ .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 80 - 89). */
+ .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 90 - 99). */
+ .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 100 - 109). */
+ .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 110 - 119). */
+ .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 120 - 129). */
+ .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 130 - 139). */
+ .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 140 - 149). */
+ .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 150 - 159). */
+ .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 160 - 169). */
+ .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 170 - 179). */
+ .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 180 - 189). */
+ .long 0,0,0 /* (User-Defined Vectors 190 - 192). */
+.text
+ignore: rte
diff --git a/arch/m68knommu/platform/68EZ328/config.c b/arch/m68knommu/platform/68EZ328/config.c
index c21971971ff5..d8d56e5de310 100644
--- a/arch/m68knommu/platform/68EZ328/config.c
+++ b/arch/m68knommu/platform/68EZ328/config.c
@@ -1,5 +1,7 @@
+/***************************************************************************/
+
/*
- * linux/arch/$(ARCH)/platform/$(PLATFORM)/config.c
+ * linux/arch/m68knommu/platform/68EZ328/config.c
*
* Copyright (C) 1993 Hamish Macdonald
* Copyright (C) 1999 D. Jeff Dionne
@@ -9,6 +11,8 @@
* for more details.
*/
+/***************************************************************************/
+
#include <stdarg.h>
#include <linux/config.h>
#include <linux/types.h>
@@ -20,68 +24,22 @@
#include <asm/setup.h>
#include <asm/system.h>
#include <asm/pgtable.h>
-#include <asm/irq.h>
#include <asm/machdep.h>
#include <asm/MC68EZ328.h>
#ifdef CONFIG_UCSIMM
#include <asm/bootstd.h>
#endif
-#ifdef CONFIG_PILOT
-#include "PalmV/romfs.h"
-#endif
-
-void BSP_sched_init(void (*timer_routine)(int, void *, struct pt_regs *))
-{
- /* Restart mode, Enable int, 32KHz, Enable timer */
- TCTL = TCTL_OM | TCTL_IRQEN | TCTL_CLKSOURCE_32KHZ | TCTL_TEN;
- /* Set prescaler (Divide 32KHz by 32)*/
- TPRER = 31;
- /* Set compare register 32Khz / 32 / 10 = 100 */
- TCMP = 10;
-
- request_irq(TMR_IRQ_NUM, timer_routine, IRQ_FLG_LOCK, "timer", NULL);
-}
-
-void BSP_tick(void)
-{
- /* Reset Timer1 */
- TSTAT &= 0;
-}
-
-unsigned long BSP_gettimeoffset (void)
-{
- return 0;
-}
-void BSP_gettod (int *yearp, int *monp, int *dayp,
- int *hourp, int *minp, int *secp)
-{
-}
+/***************************************************************************/
-int BSP_hwclk(int op, struct hwclk_time *t)
-{
- if (!op) {
- /* read */
- } else {
- /* write */
- }
- return 0;
-}
+void m68328_timer_init(irqreturn_t (*timer_routine) (int, void *, struct pt_regs *));
+void m68328_timer_tick(void);
+unsigned long m68328_timer_gettimeoffset(void);
+void m68328_timer_gettod(int *year, int *mon, int *day, int *hour, int *min, int *sec);
-int BSP_set_clock_mmss (unsigned long nowtime)
-{
-#if 0
- short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60;
+/***************************************************************************/
- tod->second1 = real_seconds / 10;
- tod->second2 = real_seconds % 10;
- tod->minute1 = real_minutes / 10;
- tod->minute2 = real_minutes % 10;
-#endif
- return 0;
-}
-
-void BSP_reset (void)
+void m68ez328_reset(void)
{
local_irq_disable();
asm volatile ("
@@ -93,6 +51,8 @@ void BSP_reset (void)
");
}
+/***************************************************************************/
+
unsigned char *cs8900a_hwaddr;
static int errno;
@@ -119,11 +79,13 @@ void config_BSP(char *command, int len)
else command[0] = 0;
#endif
- mach_sched_init = BSP_sched_init;
- mach_tick = BSP_tick;
- mach_gettimeoffset = BSP_gettimeoffset;
- mach_gettod = BSP_gettod;
+ mach_sched_init = m68328_timer_init;
+ mach_tick = m68328_timer_tick;
+ mach_gettimeoffset = m68328_timer_gettimeoffset;
+ mach_gettod = m68328_timer_gettod;
mach_hwclk = NULL;
mach_set_clock_mmss = NULL;
- mach_reset = BSP_reset;
+ mach_reset = m68ez328_reset;
}
+
+/***************************************************************************/
diff --git a/arch/m68knommu/platform/68VZ328/de2/config.c b/arch/m68knommu/platform/68VZ328/config.c
index d0586197f113..d926524cdf82 100644
--- a/arch/m68knommu/platform/68VZ328/de2/config.c
+++ b/arch/m68knommu/platform/68VZ328/config.c
@@ -1,5 +1,7 @@
+/***************************************************************************/
+
/*
- * linux/arch/m68knommu/platform/MC68VZ328/de2/config.c
+ * linux/arch/m68knommu/platform/68VZ328/config.c
*
* Copyright (C) 1993 Hamish Macdonald
* Copyright (C) 1999 D. Jeff Dionne
@@ -10,6 +12,8 @@
* for more details.
*/
+/***************************************************************************/
+
#include <linux/config.h>
#include <linux/types.h>
#include <linux/kernel.h>
@@ -25,66 +29,25 @@
#include <asm/irq.h>
#include <asm/machdep.h>
#include <asm/MC68VZ328.h>
+#include <asm/bootstd.h>
#ifdef CONFIG_INIT_LCD
-#include "screen.h"
+#include "bootlogo.h"
#endif
-/* with a 33.16 MHz clock, this will give usec resolution to the time functions */
-#define CLOCK_SOURCE TCTL_CLKSOURCE_SYSCLK
-#define CLOCK_PRE 7
-#define TICKS_PER_JIFFY 41450
-
-static void
-dragen2_sched_init(irqreturn_t (*timer_routine) (int, void *, struct pt_regs *))
-{
- /* disable timer 1 */
- TCTL = 0;
-
- /* set ISR */
- if (request_irq(TMR_IRQ_NUM, timer_routine, IRQ_FLG_LOCK, "timer", NULL))
- panic("Unable to attach timer interrupt\n");
-
- /* Restart mode, Enable int, Set clock source */
- TCTL = TCTL_OM | TCTL_IRQEN | CLOCK_SOURCE;
- TPRER = CLOCK_PRE;
- TCMP = TICKS_PER_JIFFY;
-
- /* Enable timer 1 */
- TCTL |= TCTL_TEN;
-}
-
-static void dragen2_tick(void)
-{
- /* Reset Timer1 */
- TSTAT &= 0;
-}
-
-static unsigned long dragen2_gettimeoffset(void)
-{
- unsigned long ticks = TCN, offset = 0;
-
- /* check for pending interrupt */
- if (ticks < (TICKS_PER_JIFFY >> 1) && (ISR & (1 << TMR_IRQ_NUM)))
- offset = 1000000 / HZ;
-
- ticks = (ticks * 1000000 / HZ) / TICKS_PER_JIFFY;
+/***************************************************************************/
- return ticks + offset;
-}
+void m68328_timer_init(irqreturn_t (*timer_routine) (int, void *, struct pt_regs *));
+void m68328_timer_tick(void);
+unsigned long m68328_timer_gettimeoffset(void);
+void m68328_timer_gettod(int *year, int *mon, int *day, int *hour, int *min, int *sec);
-static void dragen2_gettod(int *year, int *mon, int *day, int *hour,
- int *min, int *sec)
-{
- long now = RTCTIME;
+/***************************************************************************/
+/* Init Drangon Engine hardware */
+/***************************************************************************/
+#if defined(CONFIG_DRAGEN2)
- *year = *mon = *day = 1;
- *hour = (now >> 24) % 24;
- *min = (now >> 16) % 60;
- *sec = now % 60;
-}
-
-static void dragen2_reset(void)
+static void m68vz328_reset(void)
{
local_irq_disable();
@@ -103,7 +66,7 @@ static void dragen2_reset(void)
);
}
-static void init_hardware(void)
+static void init_hardware(char *command, int size)
{
#ifdef CONFIG_DIRECT_IO_ACCESS
SCR = 0x10; /* allow user access to internal registers */
@@ -170,6 +133,60 @@ static void init_hardware(void)
#endif
}
+/***************************************************************************/
+/* Init RT-Control uCdimm hardware */
+/***************************************************************************/
+#elif defined(CONFIG_UCDIMM)
+
+static void m68vz328_reset(void)
+{
+ local_irq_disable();
+ asm volatile ("
+ moveal #0x10c00000, %a0;
+ moveb #0, 0xFFFFF300;
+ moveal 0(%a0), %sp;
+ moveal 4(%a0), %a0;
+ jmp (%a0);
+ ");
+}
+
+unsigned char *cs8900a_hwaddr;
+static int errno;
+
+_bsc0(char *, getserialnum)
+_bsc1(unsigned char *, gethwaddr, int, a)
+_bsc1(char *, getbenv, char *, a)
+
+static void init_hardware(char *command, int size)
+{
+ char *p;
+
+ printk(KERN_INFO "uCdimm serial string [%s]\n", getserialnum());
+ p = cs8900a_hwaddr = gethwaddr(0);
+ printk(KERN_INFO "uCdimm hwaddr %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n",
+ p[0], p[1], p[2], p[3], p[4], p[5]);
+ p = getbenv("APPEND");
+ if (p)
+ strcpy(p, command);
+ else
+ command[0] = 0;
+}
+
+/***************************************************************************/
+#else
+
+static void m68vz328_reset(void)
+{
+}
+
+static void init_hardware(char *command, int size)
+{
+}
+
+/***************************************************************************/
+#endif
+/***************************************************************************/
+
void config_BSP(char *command, int size)
{
printk(KERN_INFO "68VZ328 DragonBallVZ support (c) 2001 Lineo, Inc.\n");
@@ -181,11 +198,13 @@ void config_BSP(char *command, int size)
memset(command, 0, size);
#endif
- init_hardware();
+ init_hardware(command, size);
- mach_sched_init = (void *)dragen2_sched_init;
- mach_tick = dragen2_tick;
- mach_gettimeoffset = dragen2_gettimeoffset;
- mach_reset = dragen2_reset;
- mach_gettod = dragen2_gettod;
+ mach_sched_init = (void *) m68328_timer_init;
+ mach_tick = m68328_timer_tick;
+ mach_gettimeoffset = m68328_timer_gettimeoffset;
+ mach_gettod = m68328_timer_gettod;
+ mach_reset = m68vz328_reset;
}
+
+/***************************************************************************/
diff --git a/arch/m68knommu/platform/68VZ328/ucdimm/config.c b/arch/m68knommu/platform/68VZ328/ucdimm/config.c
deleted file mode 100644
index 2deadaffd81e..000000000000
--- a/arch/m68knommu/platform/68VZ328/ucdimm/config.c
+++ /dev/null
@@ -1,117 +0,0 @@
-/*
- * linux/arch/m68knommu/platform/68VZ328/ucdimm/config.c
- *
- * Copyright (C) 1993 Hamish Macdonald
- * Copyright (C) 1999 D. Jeff Dionne
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file COPYING in the main directory of this archive
- * for more details.
- */
-
-#include <stdarg.h>
-#include <linux/config.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/tty.h>
-#include <linux/console.h>
-
-#include <asm/setup.h>
-#include <asm/system.h>
-#include <asm/pgtable.h>
-#include <asm/irq.h>
-#include <asm/machdep.h>
-#include <asm/MC68VZ328.h>
-#include <asm/bootstd.h>
-
-void BSP_sched_init(void (*timer_routine)(int, void *, struct pt_regs *))
-{
- /* Restart mode, Enable int, 32KHz, Enable timer */
- TCTL = TCTL_OM | TCTL_IRQEN | TCTL_CLKSOURCE_32KHZ | TCTL_TEN;
- /* Set prescaler (Divide 32KHz by 32)*/
- TPRER = 31;
- /* Set compare register 32Khz / 32 / 10 = 100 */
- TCMP = 10;
-
- request_irq(TMR_IRQ_NUM, timer_routine, IRQ_FLG_LOCK, "timer", NULL);
-}
-
-void BSP_tick(void)
-{
- /* Reset Timer1 */
- TSTAT &= 0;
-}
-
-unsigned long BSP_gettimeoffset (void)
-{
- return 0;
-}
-
-void BSP_gettod (int *yearp, int *monp, int *dayp,
- int *hourp, int *minp, int *secp)
-{
-}
-
-int BSP_hwclk(int op, struct hwclk_time *t)
-{
- if (!op) {
- /* read */
- } else {
- /* write */
- }
- return 0;
-}
-
-int BSP_set_clock_mmss (unsigned long nowtime)
-{
-#if 0
- short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60;
-
- tod->second1 = real_seconds / 10;
- tod->second2 = real_seconds % 10;
- tod->minute1 = real_minutes / 10;
- tod->minute2 = real_minutes % 10;
-#endif
- return 0;
-}
-
-void BSP_reset (void)
-{
- local_irq_disable();
- asm volatile ("
- moveal #0x10c00000, %a0;
- moveb #0, 0xFFFFF300;
- moveal 0(%a0), %sp;
- moveal 4(%a0), %a0;
- jmp (%a0);
- ");
-}
-
-unsigned char *cs8900a_hwaddr;
-static int errno;
-
-_bsc0(char *, getserialnum)
-_bsc1(unsigned char *, gethwaddr, int, a)
-_bsc1(char *, getbenv, char *, a)
-
-void config_BSP(char *command, int len)
-{
- unsigned char *p;
-
- printk(KERN_INFO "\n68VZ328 DragonBallVZ support (c) 2001 Lineo, Inc.\n");
-
- printk(KERN_INFO "uCdimm serial string [%s]\n",getserialnum());
- p = cs8900a_hwaddr = gethwaddr(0);
- printk(KERN_INFO "uCdimm hwaddr %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n",
- p[0], p[1], p[2], p[3], p[4], p[5]);
- p = getbenv("APPEND");
- if (p) strcpy(p,command);
- else command[0] = 0;
-
- mach_sched_init = BSP_sched_init;
- mach_tick = BSP_tick;
- mach_gettimeoffset = BSP_gettimeoffset;
- mach_gettod = BSP_gettod;
- mach_reset = BSP_reset;
-}
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