diff options
Diffstat (limited to 'arch/arm')
32 files changed, 78 insertions, 495 deletions
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index c679b3cc3c48..d68f572fc7e6 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -77,8 +77,8 @@ reg = <0x10000000 0x100>; }; - sromc@12570000 { - compatible = "samsung,exynos-srom"; + memory-controller@12570000 { + compatible = "samsung,exynos4210-srom"; reg = <0x12570000 0x14>; }; diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi index 92313cac035e..d5c0f18a4223 100644 --- a/arch/arm/boot/dts/exynos5.dtsi +++ b/arch/arm/boot/dts/exynos5.dtsi @@ -31,8 +31,8 @@ reg = <0x10000000 0x100>; }; - sromc@12250000 { - compatible = "samsung,exynos-srom"; + memory-controller@12250000 { + compatible = "samsung,exynos4210-srom"; reg = <0x12250000 0x14>; }; diff --git a/arch/arm/boot/dts/exynos5410-smdk5410.dts b/arch/arm/boot/dts/exynos5410-smdk5410.dts index a731fbe28ebc..0f6429e1b75c 100644 --- a/arch/arm/boot/dts/exynos5410-smdk5410.dts +++ b/arch/arm/boot/dts/exynos5410-smdk5410.dts @@ -97,7 +97,7 @@ smsc,irq-push-pull; smsc,force-internal-phy; - samsung,srom-page-mode = <1>; + samsung,srom-page-mode; samsung,srom-timing = <9 12 1 9 1 1>; }; }; diff --git a/arch/arm/boot/dts/exynos5410.dtsi b/arch/arm/boot/dts/exynos5410.dtsi index fa558674ac76..7a56aec2c5ba 100644 --- a/arch/arm/boot/dts/exynos5410.dtsi +++ b/arch/arm/boot/dts/exynos5410.dtsi @@ -102,8 +102,8 @@ reg = <0x10000000 0x100>; }; - sromc: sromc@12250000 { - compatible = "samsung,exynos-srom"; + sromc: memory-controller@12250000 { + compatible = "samsung,exynos4210-srom"; reg = <0x12250000 0x14>; #address-cells = <2>; #size-cells = <1>; diff --git a/arch/arm/boot/dts/integrator.dtsi b/arch/arm/boot/dts/integrator.dtsi index b82f0e6d9a63..6fe0dd1d3541 100644 --- a/arch/arm/boot/dts/integrator.dtsi +++ b/arch/arm/boot/dts/integrator.dtsi @@ -52,8 +52,9 @@ }; flash@24000000 { - compatible = "cfi-flash"; + compatible = "arm,versatile-flash", "cfi-flash"; reg = <0x24000000 0x02000000>; + bank-width = <4>; }; fpga { diff --git a/arch/arm/boot/dts/versatile-ab.dts b/arch/arm/boot/dts/versatile-ab.dts index d23320af5ea7..409e069b3a84 100644 --- a/arch/arm/boot/dts/versatile-ab.dts +++ b/arch/arm/boot/dts/versatile-ab.dts @@ -119,8 +119,9 @@ }; flash@34000000 { - compatible = "arm,versatile-flash"; - reg = <0x34000000 0x4000000>; + /* 64 MiB NOR flash in non-interleaved chips */ + compatible = "arm,versatile-flash", "cfi-flash"; + reg = <0x34000000 0x04000000>; bank-width = <4>; }; diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h index 7b84657fba35..194b69923389 100644 --- a/arch/arm/include/asm/unistd.h +++ b/arch/arm/include/asm/unistd.h @@ -19,7 +19,7 @@ * This may need to be greater than __NR_last_syscall+1 in order to * account for the padding in the syscall table */ -#define __NR_syscalls (392) +#define __NR_syscalls (396) #define __ARCH_WANT_STAT64 #define __ARCH_WANT_SYS_GETHOSTNAME diff --git a/arch/arm/include/uapi/asm/unistd.h b/arch/arm/include/uapi/asm/unistd.h index 5dd2528e9e45..2cb9dc770e1d 100644 --- a/arch/arm/include/uapi/asm/unistd.h +++ b/arch/arm/include/uapi/asm/unistd.h @@ -418,6 +418,8 @@ #define __NR_membarrier (__NR_SYSCALL_BASE+389) #define __NR_mlock2 (__NR_SYSCALL_BASE+390) #define __NR_copy_file_range (__NR_SYSCALL_BASE+391) +#define __NR_preadv2 (__NR_SYSCALL_BASE+392) +#define __NR_pwritev2 (__NR_SYSCALL_BASE+393) /* * The following SWIs are ARM private. diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S index dfc7cd6851ad..703fa0f3cd8f 100644 --- a/arch/arm/kernel/calls.S +++ b/arch/arm/kernel/calls.S @@ -399,8 +399,10 @@ CALL(sys_execveat) CALL(sys_userfaultfd) CALL(sys_membarrier) - CALL(sys_mlock2) +/* 390 */ CALL(sys_mlock2) CALL(sys_copy_file_range) + CALL(sys_preadv2) + CALL(sys_pwritev2) #ifndef syscalls_counted .equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls #define syscalls_counted diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index 139791ed473d..a28fce0bdbbe 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c @@ -430,11 +430,13 @@ static void __init patch_aeabi_idiv(void) pr_info("CPU: div instructions available: patching division code\n"); fn_addr = ((uintptr_t)&__aeabi_uidiv) & ~1; + asm ("" : "+g" (fn_addr)); ((u32 *)fn_addr)[0] = udiv_instruction(); ((u32 *)fn_addr)[1] = bx_lr_instruction(); flush_icache_range(fn_addr, fn_addr + 8); fn_addr = ((uintptr_t)&__aeabi_idiv) & ~1; + asm ("" : "+g" (fn_addr)); ((u32 *)fn_addr)[0] = sdiv_instruction(); ((u32 *)fn_addr)[1] = bx_lr_instruction(); flush_icache_range(fn_addr, fn_addr + 8); diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c index 6accd66d26f0..b5384311dec4 100644 --- a/arch/arm/kvm/arm.c +++ b/arch/arm/kvm/arm.c @@ -1061,15 +1061,27 @@ static void cpu_init_hyp_mode(void *dummy) kvm_arm_init_debug(); } +static void cpu_hyp_reinit(void) +{ + if (is_kernel_in_hyp_mode()) { + /* + * cpu_init_stage2() is safe to call even if the PM + * event was cancelled before the CPU was reset. + */ + cpu_init_stage2(NULL); + } else { + if (__hyp_get_vectors() == hyp_default_vectors) + cpu_init_hyp_mode(NULL); + } +} + static int hyp_init_cpu_notify(struct notifier_block *self, unsigned long action, void *cpu) { switch (action) { case CPU_STARTING: case CPU_STARTING_FROZEN: - if (__hyp_get_vectors() == hyp_default_vectors) - cpu_init_hyp_mode(NULL); - break; + cpu_hyp_reinit(); } return NOTIFY_OK; @@ -1084,9 +1096,8 @@ static int hyp_init_cpu_pm_notifier(struct notifier_block *self, unsigned long cmd, void *v) { - if (cmd == CPU_PM_EXIT && - __hyp_get_vectors() == hyp_default_vectors) { - cpu_init_hyp_mode(NULL); + if (cmd == CPU_PM_EXIT) { + cpu_hyp_reinit(); return NOTIFY_OK; } @@ -1128,6 +1139,22 @@ static int init_subsystems(void) int err; /* + * Register CPU Hotplug notifier + */ + cpu_notifier_register_begin(); + err = __register_cpu_notifier(&hyp_init_cpu_nb); + cpu_notifier_register_done(); + if (err) { + kvm_err("Cannot register KVM init CPU notifier (%d)\n", err); + return err; + } + + /* + * Register CPU lower-power notifier + */ + hyp_cpu_pm_init(); + + /* * Init HYP view of VGIC */ err = kvm_vgic_hyp_init(); @@ -1270,19 +1297,6 @@ static int init_hyp_mode(void) free_boot_hyp_pgd(); #endif - cpu_notifier_register_begin(); - - err = __register_cpu_notifier(&hyp_init_cpu_nb); - - cpu_notifier_register_done(); - - if (err) { - kvm_err("Cannot register HYP init CPU notifier (%d)\n", err); - goto out_err; - } - - hyp_cpu_pm_init(); - /* set size of VMID supported by CPU */ kvm_vmid_bits = kvm_get_vmid_bits(); kvm_info("%d-bit VMID\n", kvm_vmid_bits); diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig index 7ef121472cdd..68ab6412392a 100644 --- a/arch/arm/mach-bcm/Kconfig +++ b/arch/arm/mach-bcm/Kconfig @@ -173,12 +173,12 @@ config ARCH_BRCMSTB select ARM_GIC select ARM_ERRATA_798181 if SMP select HAVE_ARM_ARCH_TIMER - select BRCMSTB_GISB_ARB select BRCMSTB_L2_IRQ select BCM7120_L2_IRQ select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE select ARCH_WANT_OPTIONAL_GPIOLIB select SOC_BRCMSTB + select SOC_BUS help Say Y if you intend to run the kernel on a Broadcom ARM-based STB chipset. diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 207fa2c737a6..e65aa7d11b20 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -18,6 +18,7 @@ menuconfig ARCH_EXYNOS select COMMON_CLK_SAMSUNG select EXYNOS_THERMAL select EXYNOS_PMU + select EXYNOS_SROM select HAVE_ARM_SCU if SMP select HAVE_S3C2410_I2C if I2C select HAVE_S3C2410_WATCHDOG if WATCHDOG @@ -26,11 +27,13 @@ menuconfig ARCH_EXYNOS select PINCTRL_EXYNOS select PM_GENERIC_DOMAINS if PM select S5P_DEV_MFC + select SAMSUNG_MC select SOC_SAMSUNG select SRAM select THERMAL select THERMAL_OF select MFD_SYSCON + select MEMORY select CLKSRC_EXYNOS_MCT select POWER_RESET select POWER_RESET_SYSCON diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c index bbf51a46f772..f977eea1c496 100644 --- a/arch/arm/mach-exynos/exynos.c +++ b/arch/arm/mach-exynos/exynos.c @@ -31,11 +31,6 @@ static struct map_desc exynos4_iodesc[] __initdata = { { - .virtual = (unsigned long)S5P_VA_SROMC, - .pfn = __phys_to_pfn(EXYNOS4_PA_SROMC), - .length = SZ_4K, - .type = MT_DEVICE, - }, { .virtual = (unsigned long)S5P_VA_CMU, .pfn = __phys_to_pfn(EXYNOS4_PA_CMU), .length = SZ_128K, @@ -58,15 +53,6 @@ static struct map_desc exynos4_iodesc[] __initdata = { }, }; -static struct map_desc exynos5_iodesc[] __initdata = { - { - .virtual = (unsigned long)S5P_VA_SROMC, - .pfn = __phys_to_pfn(EXYNOS5_PA_SROMC), - .length = SZ_4K, - .type = MT_DEVICE, - }, -}; - static struct platform_device exynos_cpuidle = { .name = "exynos_cpuidle", #ifdef CONFIG_ARM_EXYNOS_CPUIDLE @@ -138,9 +124,6 @@ static void __init exynos_map_io(void) { if (soc_is_exynos4()) iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc)); - - if (soc_is_exynos5()) - iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc)); } static void __init exynos_init_io(void) diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h index c88325d56743..c48ba4fbdfd2 100644 --- a/arch/arm/mach-exynos/include/mach/map.h +++ b/arch/arm/mach-exynos/include/mach/map.h @@ -25,7 +25,4 @@ #define EXYNOS4_PA_COREPERI 0x10500000 -#define EXYNOS4_PA_SROMC 0x12570000 -#define EXYNOS5_PA_SROMC 0x12250000 - #endif /* __ASM_ARCH_MAP_H */ diff --git a/arch/arm/mach-exynos/regs-srom.h b/arch/arm/mach-exynos/regs-srom.h deleted file mode 100644 index 5c4d4427db7b..000000000000 --- a/arch/arm/mach-exynos/regs-srom.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5P SROMC register definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __PLAT_SAMSUNG_REGS_SROM_H -#define __PLAT_SAMSUNG_REGS_SROM_H __FILE__ - -#include <mach/map.h> - -#define S5P_SROMREG(x) (S5P_VA_SROMC + (x)) - -#define S5P_SROM_BW S5P_SROMREG(0x0) -#define S5P_SROM_BC0 S5P_SROMREG(0x4) -#define S5P_SROM_BC1 S5P_SROMREG(0x8) -#define S5P_SROM_BC2 S5P_SROMREG(0xc) -#define S5P_SROM_BC3 S5P_SROMREG(0x10) -#define S5P_SROM_BC4 S5P_SROMREG(0x14) -#define S5P_SROM_BC5 S5P_SROMREG(0x18) - -/* one register BW holds 4 x 4-bit packed settings for NCS0 - NCS3 */ - -#define S5P_SROM_BW__DATAWIDTH__SHIFT 0 -#define S5P_SROM_BW__ADDRMODE__SHIFT 1 -#define S5P_SROM_BW__WAITENABLE__SHIFT 2 -#define S5P_SROM_BW__BYTEENABLE__SHIFT 3 - -#define S5P_SROM_BW__CS_MASK 0xf - -#define S5P_SROM_BW__NCS0__SHIFT 0 -#define S5P_SROM_BW__NCS1__SHIFT 4 -#define S5P_SROM_BW__NCS2__SHIFT 8 -#define S5P_SROM_BW__NCS3__SHIFT 12 -#define S5P_SROM_BW__NCS4__SHIFT 16 -#define S5P_SROM_BW__NCS5__SHIFT 20 - -/* applies to same to BCS0 - BCS3 */ - -#define S5P_SROM_BCX__PMC__SHIFT 0 -#define S5P_SROM_BCX__TACP__SHIFT 4 -#define S5P_SROM_BCX__TCAH__SHIFT 8 -#define S5P_SROM_BCX__TCOH__SHIFT 12 -#define S5P_SROM_BCX__TACC__SHIFT 16 -#define S5P_SROM_BCX__TCOS__SHIFT 24 -#define S5P_SROM_BCX__TACS__SHIFT 28 - -#endif /* __PLAT_SAMSUNG_REGS_SROM_H */ diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c index fee2b003e662..f21690937b7d 100644 --- a/arch/arm/mach-exynos/suspend.c +++ b/arch/arm/mach-exynos/suspend.c @@ -34,10 +34,11 @@ #include <asm/smp_scu.h> #include <asm/suspend.h> +#include <mach/map.h> + #include <plat/pm-common.h> #include "common.h" -#include "regs-srom.h" #define REG_TABLE_END (-1U) @@ -53,15 +54,6 @@ struct exynos_wkup_irq { u32 mask; }; -static struct sleep_save exynos_core_save[] = { - /* SROM side */ - SAVE_ITEM(S5P_SROM_BW), - SAVE_ITEM(S5P_SROM_BC0), - SAVE_ITEM(S5P_SROM_BC1), - SAVE_ITEM(S5P_SROM_BC2), - SAVE_ITEM(S5P_SROM_BC3), -}; - struct exynos_pm_data { const struct exynos_wkup_irq *wkup_irq; unsigned int wake_disable_mask; @@ -343,8 +335,6 @@ static void exynos_pm_prepare(void) /* Set wake-up mask registers */ exynos_pm_set_wakeup_mask(); - s3c_pm_do_save(exynos_core_save, ARRAY_SIZE(exynos_core_save)); - exynos_pm_enter_sleep_mode(); /* ensure at least INFORM0 has the resume address */ @@ -375,8 +365,6 @@ static void exynos5420_pm_prepare(void) /* Set wake-up mask registers */ exynos_pm_set_wakeup_mask(); - s3c_pm_do_save(exynos_core_save, ARRAY_SIZE(exynos_core_save)); - exynos_pmu_spare3 = pmu_raw_readl(S5P_PMU_SPARE3); /* * The cpu state needs to be saved and restored so that the @@ -467,8 +455,6 @@ static void exynos_pm_resume(void) /* For release retention */ exynos_pm_release_retention(); - s3c_pm_do_restore_core(exynos_core_save, ARRAY_SIZE(exynos_core_save)); - if (cpuid == ARM_CPU_PART_CORTEX_A9) scu_enable(S5P_VA_SCU); @@ -535,8 +521,6 @@ static void exynos5420_pm_resume(void) pmu_raw_writel(exynos_pmu_spare3, S5P_PMU_SPARE3); - s3c_pm_do_restore_core(exynos_core_save, ARRAY_SIZE(exynos_core_save)); - early_wakeup: tmp = pmu_raw_readl(EXYNOS5420_SFR_AXI_CGDIS1); diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c index 5b0e363fe5ba..2b118f20c62c 100644 --- a/arch/arm/mach-integrator/integrator_ap.c +++ b/arch/arm/mach-integrator/integrator_ap.c @@ -29,7 +29,6 @@ #include <linux/amba/kmi.h> #include <linux/io.h> #include <linux/irqchip.h> -#include <linux/mtd/physmap.h> #include <linux/platform_data/clk-integrator.h> #include <linux/of_irq.h> #include <linux/of_address.h> @@ -147,65 +146,6 @@ static int __init irq_syscore_init(void) device_initcall(irq_syscore_init); /* - * Flash handling. - */ -static int ap_flash_init(struct platform_device *dev) -{ - u32 tmp; - - writel(INTEGRATOR_SC_CTRL_nFLVPPEN | INTEGRATOR_SC_CTRL_nFLWP, - ap_syscon_base + INTEGRATOR_SC_CTRLC_OFFSET); - - tmp = readl(ebi_base + INTEGRATOR_EBI_CSR1_OFFSET) | - INTEGRATOR_EBI_WRITE_ENABLE; - writel(tmp, ebi_base + INTEGRATOR_EBI_CSR1_OFFSET); - - if (!(readl(ebi_base + INTEGRATOR_EBI_CSR1_OFFSET) - & INTEGRATOR_EBI_WRITE_ENABLE)) { - writel(0xa05f, ebi_base + INTEGRATOR_EBI_LOCK_OFFSET); - writel(tmp, ebi_base + INTEGRATOR_EBI_CSR1_OFFSET); - writel(0, ebi_base + INTEGRATOR_EBI_LOCK_OFFSET); - } - return 0; -} - -static void ap_flash_exit(struct platform_device *dev) -{ - u32 tmp; - - writel(INTEGRATOR_SC_CTRL_nFLVPPEN | INTEGRATOR_SC_CTRL_nFLWP, - ap_syscon_base + INTEGRATOR_SC_CTRLC_OFFSET); - - tmp = readl(ebi_base + INTEGRATOR_EBI_CSR1_OFFSET) & - ~INTEGRATOR_EBI_WRITE_ENABLE; - writel(tmp, ebi_base + INTEGRATOR_EBI_CSR1_OFFSET); - - if (readl(ebi_base + INTEGRATOR_EBI_CSR1_OFFSET) & - INTEGRATOR_EBI_WRITE_ENABLE) { - writel(0xa05f, ebi_base + INTEGRATOR_EBI_LOCK_OFFSET); - writel(tmp, ebi_base + INTEGRATOR_EBI_CSR1_OFFSET); - writel(0, ebi_base + INTEGRATOR_EBI_LOCK_OFFSET); - } -} - -static void ap_flash_set_vpp(struct platform_device *pdev, int on) -{ - if (on) - writel(INTEGRATOR_SC_CTRL_nFLVPPEN, - ap_syscon_base + INTEGRATOR_SC_CTRLS_OFFSET); - else - writel(INTEGRATOR_SC_CTRL_nFLVPPEN, - ap_syscon_base + INTEGRATOR_SC_CTRLC_OFFSET); -} - -static struct physmap_flash_data ap_flash_data = { - .width = 4, - .init = ap_flash_init, - .exit = ap_flash_exit, - .set_vpp = ap_flash_set_vpp, -}; - -/* * For the PL010 found in the Integrator/AP some of the UART control is * implemented in the system controller and accessed using a callback * from the driver. @@ -266,8 +206,6 @@ static struct of_dev_auxdata ap_auxdata_lookup[] __initdata = { "kmi0", NULL), OF_DEV_AUXDATA("arm,primecell", KMI1_BASE, "kmi1", NULL), - OF_DEV_AUXDATA("cfi-flash", INTEGRATOR_FLASH_BASE, - "physmap-flash", &ap_flash_data), { /* sentinel */ }, }; diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c index b5fb71a36ee6..6f6b051e81e0 100644 --- a/arch/arm/mach-integrator/integrator_cp.c +++ b/arch/arm/mach-integrator/integrator_cp.c @@ -23,7 +23,6 @@ #include <linux/io.h> #include <linux/irqchip.h> #include <linux/gfp.h> -#include <linux/mtd/physmap.h> #include <linux/of_irq.h> #include <linux/of_address.h> #include <linux/of_platform.h> @@ -43,14 +42,8 @@ /* Base address to the CP controller */ static void __iomem *intcp_con_base; -#define INTCP_PA_FLASH_BASE 0x24000000 - #define INTCP_PA_CLCD_BASE 0xc0000000 -#define INTCP_FLASHPROG 0x04 -#define CINTEGRATOR_FLASHPROG_FLVPPEN (1 << 0) -#define CINTEGRATOR_FLASHPROG_FLWREN (1 << 1) - /* * Logical Physical * f1000000 10000000 Core module registers @@ -108,48 +101,6 @@ static void __init intcp_map_io(void) } /* - * Flash handling. - */ -static int intcp_flash_init(struct platform_device *dev) -{ - u32 val; - - val = readl(intcp_con_base + INTCP_FLASHPROG); - val |= CINTEGRATOR_FLASHPROG_FLWREN; - writel(val, intcp_con_base + INTCP_FLASHPROG); - - return 0; -} - -static void intcp_flash_exit(struct platform_device *dev) -{ - u32 val; - - val = readl(intcp_con_base + INTCP_FLASHPROG); - val &= ~(CINTEGRATOR_FLASHPROG_FLVPPEN|CINTEGRATOR_FLASHPROG_FLWREN); - writel(val, intcp_con_base + INTCP_FLASHPROG); -} - -static void intcp_flash_set_vpp(struct platform_device *pdev, int on) -{ - u32 val; - - val = readl(intcp_con_base + INTCP_FLASHPROG); - if (on) - val |= CINTEGRATOR_FLASHPROG_FLVPPEN; - else - val &= ~CINTEGRATOR_FLASHPROG_FLVPPEN; - writel(val, intcp_con_base + INTCP_FLASHPROG); -} - -static struct physmap_flash_data intcp_flash_data = { - .width = 4, - .init = intcp_flash_init, - .exit = intcp_flash_exit, - .set_vpp = intcp_flash_set_vpp, -}; - -/* * It seems that the card insertion interrupt remains active after * we've acknowledged it. We therefore ignore the interrupt, and * rely on reading it from the SIC. This also means that we must @@ -260,8 +211,6 @@ static struct of_dev_auxdata intcp_auxdata_lookup[] __initdata = { "aaci", &mmc_data), OF_DEV_AUXDATA("arm,primecell", INTCP_PA_CLCD_BASE, "clcd", &clcd_data), - OF_DEV_AUXDATA("cfi-flash", INTCP_PA_FLASH_BASE, - "physmap-flash", &intcp_flash_data), { /* sentinel */ }, }; diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig index f2bc5c353119..fe4ccb52f921 100644 --- a/arch/arm/mach-shmobile/Kconfig +++ b/arch/arm/mach-shmobile/Kconfig @@ -4,11 +4,6 @@ config ARCH_SHMOBILE config ARCH_SHMOBILE_MULTI bool -config PM_RCAR - bool - select PM - select PM_GENERIC_DOMAINS - config PM_RMOBILE bool select PM @@ -16,13 +11,15 @@ config PM_RMOBILE config ARCH_RCAR_GEN1 bool - select PM_RCAR + select PM + select PM_GENERIC_DOMAINS select RENESAS_INTC_IRQPIN select SYS_SUPPORTS_SH_TMU config ARCH_RCAR_GEN2 bool - select PM_RCAR + select PM + select PM_GENERIC_DOMAINS select RENESAS_IRQC select SYS_SUPPORTS_SH_CMT select PCI_DOMAINS if PCI diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index a65c80ac9009..ebb909c55b85 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile @@ -39,7 +39,6 @@ smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o headsmp-scu.o platsmp-scu.o # PM objects obj-$(CONFIG_SUSPEND) += suspend.o obj-$(CONFIG_CPU_FREQ) += cpufreq.o -obj-$(CONFIG_PM_RCAR) += pm-rcar.o obj-$(CONFIG_PM_RMOBILE) += pm-rmobile.o obj-$(CONFIG_ARCH_RCAR_GEN2) += pm-rcar-gen2.o diff --git a/arch/arm/mach-shmobile/pm-r8a7779.c b/arch/arm/mach-shmobile/pm-r8a7779.c index 14c42a1bdf1e..4174cbcbc467 100644 --- a/arch/arm/mach-shmobile/pm-r8a7779.c +++ b/arch/arm/mach-shmobile/pm-r8a7779.c @@ -9,9 +9,10 @@ * for more details. */ +#include <linux/soc/renesas/rcar-sysc.h> + #include <asm/io.h> -#include "pm-rcar.h" #include "r8a7779.h" /* SYSC */ diff --git a/arch/arm/mach-shmobile/pm-rcar-gen2.c b/arch/arm/mach-shmobile/pm-rcar-gen2.c index 6815781ad116..691ac166a277 100644 --- a/arch/arm/mach-shmobile/pm-rcar-gen2.c +++ b/arch/arm/mach-shmobile/pm-rcar-gen2.c @@ -13,9 +13,9 @@ #include <linux/kernel.h> #include <linux/of.h> #include <linux/smp.h> +#include <linux/soc/renesas/rcar-sysc.h> #include <asm/io.h> #include "common.h" -#include "pm-rcar.h" #include "rcar-gen2.h" /* RST */ diff --git a/arch/arm/mach-shmobile/pm-rcar.c b/arch/arm/mach-shmobile/pm-rcar.c deleted file mode 100644 index 0af05d288b09..000000000000 --- a/arch/arm/mach-shmobile/pm-rcar.c +++ /dev/null @@ -1,164 +0,0 @@ -/* - * R-Car SYSC Power management support - * - * Copyright (C) 2014 Magnus Damm - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ - -#include <linux/delay.h> -#include <linux/err.h> -#include <linux/mm.h> -#include <linux/spinlock.h> -#include <linux/io.h> -#include "pm-rcar.h" - -/* SYSC Common */ -#define SYSCSR 0x00 /* SYSC Status Register */ -#define SYSCISR 0x04 /* Interrupt Status Register */ -#define SYSCISCR 0x08 /* Interrupt Status Clear Register */ -#define SYSCIER 0x0c /* Interrupt Enable Register */ -#define SYSCIMR 0x10 /* Interrupt Mask Register */ - -/* SYSC Status Register */ -#define SYSCSR_PONENB 1 /* Ready for power resume requests */ -#define SYSCSR_POFFENB 0 /* Ready for power shutoff requests */ - -/* - * Power Control Register Offsets inside the register block for each domain - * Note: The "CR" registers for ARM cores exist on H1 only - * Use WFI to power off, CPG/APMU to resume ARM cores on R-Car Gen2 - */ -#define PWRSR_OFFS 0x00 /* Power Status Register */ -#define PWROFFCR_OFFS 0x04 /* Power Shutoff Control Register */ -#define PWROFFSR_OFFS 0x08 /* Power Shutoff Status Register */ -#define PWRONCR_OFFS 0x0c /* Power Resume Control Register */ -#define PWRONSR_OFFS 0x10 /* Power Resume Status Register */ -#define PWRER_OFFS 0x14 /* Power Shutoff/Resume Error */ - - -#define SYSCSR_RETRIES 100 -#define SYSCSR_DELAY_US 1 - -#define PWRER_RETRIES 100 -#define PWRER_DELAY_US 1 - -#define SYSCISR_RETRIES 1000 -#define SYSCISR_DELAY_US 1 - -static void __iomem *rcar_sysc_base; -static DEFINE_SPINLOCK(rcar_sysc_lock); /* SMP CPUs + I/O devices */ - -static int rcar_sysc_pwr_on_off(const struct rcar_sysc_ch *sysc_ch, bool on) -{ - unsigned int sr_bit, reg_offs; - int k; - - if (on) { - sr_bit = SYSCSR_PONENB; - reg_offs = PWRONCR_OFFS; - } else { - sr_bit = SYSCSR_POFFENB; - reg_offs = PWROFFCR_OFFS; - } - - /* Wait until SYSC is ready to accept a power request */ - for (k = 0; k < SYSCSR_RETRIES; k++) { - if (ioread32(rcar_sysc_base + SYSCSR) & BIT(sr_bit)) - break; - udelay(SYSCSR_DELAY_US); - } - - if (k == SYSCSR_RETRIES) - return -EAGAIN; - - /* Submit power shutoff or power resume request */ - iowrite32(BIT(sysc_ch->chan_bit), - rcar_sysc_base + sysc_ch->chan_offs + reg_offs); - - return 0; -} - -static int rcar_sysc_power(const struct rcar_sysc_ch *sysc_ch, bool on) -{ - unsigned int isr_mask = BIT(sysc_ch->isr_bit); - unsigned int chan_mask = BIT(sysc_ch->chan_bit); - unsigned int status; - unsigned long flags; - int ret = 0; - int k; - - spin_lock_irqsave(&rcar_sysc_lock, flags); - - iowrite32(isr_mask, rcar_sysc_base + SYSCISCR); - - /* Submit power shutoff or resume request until it was accepted */ - for (k = 0; k < PWRER_RETRIES; k++) { - ret = rcar_sysc_pwr_on_off(sysc_ch, on); - if (ret) - goto out; - - status = ioread32(rcar_sysc_base + - sysc_ch->chan_offs + PWRER_OFFS); - if (!(status & chan_mask)) - break; - - udelay(PWRER_DELAY_US); - } - - if (k == PWRER_RETRIES) { - ret = -EIO; - goto out; - } - - /* Wait until the power shutoff or resume request has completed * */ - for (k = 0; k < SYSCISR_RETRIES; k++) { - if (ioread32(rcar_sysc_base + SYSCISR) & isr_mask) - break; - udelay(SYSCISR_DELAY_US); - } - - if (k == SYSCISR_RETRIES) - ret = -EIO; - - iowrite32(isr_mask, rcar_sysc_base + SYSCISCR); - - out: - spin_unlock_irqrestore(&rcar_sysc_lock, flags); - - pr_debug("sysc power domain %d: %08x -> %d\n", - sysc_ch->isr_bit, ioread32(rcar_sysc_base + SYSCISR), ret); - return ret; -} - -int rcar_sysc_power_down(const struct rcar_sysc_ch *sysc_ch) -{ - return rcar_sysc_power(sysc_ch, false); -} - -int rcar_sysc_power_up(const struct rcar_sysc_ch *sysc_ch) -{ - return rcar_sysc_power(sysc_ch, true); -} - -bool rcar_sysc_power_is_off(const struct rcar_sysc_ch *sysc_ch) -{ - unsigned int st; - - st = ioread32(rcar_sysc_base + sysc_ch->chan_offs + PWRSR_OFFS); - if (st & BIT(sysc_ch->chan_bit)) - return true; - - return false; -} - -void __iomem *rcar_sysc_init(phys_addr_t base) -{ - rcar_sysc_base = ioremap_nocache(base, PAGE_SIZE); - if (!rcar_sysc_base) - panic("unable to ioremap R-Car SYSC hardware block\n"); - - return rcar_sysc_base; -} diff --git a/arch/arm/mach-shmobile/pm-rcar.h b/arch/arm/mach-shmobile/pm-rcar.h deleted file mode 100644 index 1b901db4a24c..000000000000 --- a/arch/arm/mach-shmobile/pm-rcar.h +++ /dev/null @@ -1,15 +0,0 @@ -#ifndef PM_RCAR_H -#define PM_RCAR_H - -struct rcar_sysc_ch { - u16 chan_offs; - u8 chan_bit; - u8 isr_bit; -}; - -int rcar_sysc_power_down(const struct rcar_sysc_ch *sysc_ch); -int rcar_sysc_power_up(const struct rcar_sysc_ch *sysc_ch); -bool rcar_sysc_power_is_off(const struct rcar_sysc_ch *sysc_ch); -void __iomem *rcar_sysc_init(phys_addr_t base); - -#endif /* PM_RCAR_H */ diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c index f5c31fbc10b2..c6951ee24588 100644 --- a/arch/arm/mach-shmobile/smp-r8a7779.c +++ b/arch/arm/mach-shmobile/smp-r8a7779.c @@ -19,13 +19,13 @@ #include <linux/spinlock.h> #include <linux/io.h> #include <linux/delay.h> +#include <linux/soc/renesas/rcar-sysc.h> #include <asm/cacheflush.h> #include <asm/smp_plat.h> #include <asm/smp_scu.h> #include "common.h" -#include "pm-rcar.h" #include "r8a7779.h" #define AVECR IOMEM(0xfe700040) diff --git a/arch/arm/mach-shmobile/smp-r8a7790.c b/arch/arm/mach-shmobile/smp-r8a7790.c index f6426c6fdefc..28f26d5362d8 100644 --- a/arch/arm/mach-shmobile/smp-r8a7790.c +++ b/arch/arm/mach-shmobile/smp-r8a7790.c @@ -17,12 +17,12 @@ #include <linux/init.h> #include <linux/smp.h> #include <linux/io.h> +#include <linux/soc/renesas/rcar-sysc.h> #include <asm/smp_plat.h> #include "common.h" #include "platsmp-apmu.h" -#include "pm-rcar.h" #include "rcar-gen2.h" #include "r8a7790.h" diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c index f3f61dbbda97..75620ae73913 100644 --- a/arch/arm/mach-tegra/platsmp.c +++ b/arch/arm/mach-tegra/platsmp.c @@ -108,19 +108,9 @@ static int tegra30_boot_secondary(unsigned int cpu, struct task_struct *idle) * be un-gated by un-toggling the power gate register * manually. */ - if (!tegra_pmc_cpu_is_powered(cpu)) { - ret = tegra_pmc_cpu_power_on(cpu); - if (ret) - return ret; - - /* Wait for the power to come up. */ - timeout = jiffies + msecs_to_jiffies(100); - while (!tegra_pmc_cpu_is_powered(cpu)) { - if (time_after(jiffies, timeout)) - return -ETIMEDOUT; - udelay(10); - } - } + ret = tegra_pmc_cpu_power_on(cpu); + if (ret) + return ret; remove_clamps: /* CPU partition is powered. Enable the CPU clock. */ diff --git a/arch/arm/mach-versatile/versatile_dt.c b/arch/arm/mach-versatile/versatile_dt.c index dff1c0595b67..d643b9210dbd 100644 --- a/arch/arm/mach-versatile/versatile_dt.c +++ b/arch/arm/mach-versatile/versatile_dt.c @@ -32,7 +32,6 @@ #include <linux/amba/clcd.h> #include <linux/platform_data/video-clcd-versatile.h> #include <linux/amba/mmci.h> -#include <linux/mtd/physmap.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -42,27 +41,15 @@ #define __io_address(n) ((void __iomem __force *)IO_ADDRESS(n)) /* - * Memory definitions - */ -#define VERSATILE_FLASH_BASE 0x34000000 -#define VERSATILE_FLASH_SIZE SZ_64M - -/* * ------------------------------------------------------------------------ * Versatile Registers * ------------------------------------------------------------------------ */ #define VERSATILE_SYS_PCICTL_OFFSET 0x44 #define VERSATILE_SYS_MCI_OFFSET 0x48 -#define VERSATILE_SYS_FLASH_OFFSET 0x4C #define VERSATILE_SYS_CLCD_OFFSET 0x50 /* - * VERSATILE_SYS_FLASH - */ -#define VERSATILE_FLASHPROG_FLVPPEN (1 << 0) /* Enable writing to flash */ - -/* * VERSATILE peripheral addresses */ #define VERSATILE_MMCI0_BASE 0x10005000 /* MMC interface */ @@ -86,39 +73,6 @@ static void __iomem *versatile_sys_base; static void __iomem *versatile_ib2_ctrl; -static void versatile_flash_set_vpp(struct platform_device *pdev, int on) -{ - u32 val; - - val = readl(versatile_sys_base + VERSATILE_SYS_FLASH_OFFSET); - if (on) - val |= VERSATILE_FLASHPROG_FLVPPEN; - else - val &= ~VERSATILE_FLASHPROG_FLVPPEN; - writel(val, versatile_sys_base + VERSATILE_SYS_FLASH_OFFSET); -} - -static struct physmap_flash_data versatile_flash_data = { - .width = 4, - .set_vpp = versatile_flash_set_vpp, -}; - -static struct resource versatile_flash_resource = { - .start = VERSATILE_FLASH_BASE, - .end = VERSATILE_FLASH_BASE + VERSATILE_FLASH_SIZE - 1, - .flags = IORESOURCE_MEM, -}; - -struct platform_device versatile_flash_device = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &versatile_flash_data, - }, - .num_resources = 1, - .resource = &versatile_flash_resource, -}; - unsigned int mmc_status(struct device *dev) { struct amba_device *adev = container_of(dev, struct amba_device, dev); @@ -390,7 +344,6 @@ static void __init versatile_dt_init(void) versatile_dt_pci_init(); - platform_device_register(&versatile_flash_device); of_platform_populate(NULL, of_default_bus_match_table, versatile_auxdata_lookup, NULL); } diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c index d0ba3551d49a..3cced8455727 100644 --- a/arch/arm/mm/flush.c +++ b/arch/arm/mm/flush.c @@ -235,7 +235,7 @@ void __flush_dcache_page(struct address_space *mapping, struct page *page) */ if (mapping && cache_is_vipt_aliasing()) flush_pfn_alias(page_to_pfn(page), - page->index << PAGE_CACHE_SHIFT); + page->index << PAGE_SHIFT); } static void __flush_dcache_aliases(struct address_space *mapping, struct page *page) @@ -250,7 +250,7 @@ static void __flush_dcache_aliases(struct address_space *mapping, struct page *p * data in the current VM view associated with this page. * - aliasing VIPT: we only need to find one mapping of this page. */ - pgoff = page->index << (PAGE_CACHE_SHIFT - PAGE_SHIFT); + pgoff = page->index; flush_dcache_mmap_lock(mapping); vma_interval_tree_foreach(mpnt, &mapping->i_mmap, pgoff, pgoff) { diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 0f8963a7e7d9..6fcaac8e200f 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -281,12 +281,12 @@ __v7_ca17mp_setup: bl v7_invalidate_l1 ldmia r12, {r1-r6, lr} #ifdef CONFIG_SMP + orr r10, r10, #(1 << 6) @ Enable SMP/nAMP mode ALT_SMP(mrc p15, 0, r0, c1, c0, 1) - ALT_UP(mov r0, #(1 << 6)) @ fake it for UP - tst r0, #(1 << 6) @ SMP/nAMP mode enabled? - orreq r0, r0, #(1 << 6) @ Enable SMP/nAMP mode - orreq r0, r0, r10 @ Enable CPU-specific SMP bits - mcreq p15, 0, r0, c1, c0, 1 + ALT_UP(mov r0, r10) @ fake it for UP + orr r10, r10, r0 @ Set required bits + teq r10, r0 @ Were they already set? + mcrne p15, 0, r10, c1, c0, 1 @ No, update register #endif b __v7_setup_cont diff --git a/arch/arm/plat-samsung/include/plat/map-s5p.h b/arch/arm/plat-samsung/include/plat/map-s5p.h index 4ec9a7050185..b63aeebb93f3 100644 --- a/arch/arm/plat-samsung/include/plat/map-s5p.h +++ b/arch/arm/plat-samsung/include/plat/map-s5p.h @@ -18,7 +18,6 @@ #define S5P_VA_DMC0 S3C_ADDR(0x02440000) #define S5P_VA_DMC1 S3C_ADDR(0x02480000) -#define S5P_VA_SROMC S3C_ADDR(0x024C0000) #define S5P_VA_COREPERI_BASE S3C_ADDR(0x02800000) #define S5P_VA_COREPERI(x) (S5P_VA_COREPERI_BASE + (x)) |
