diff options
Diffstat (limited to 'arch/arm/mach-ux500')
| -rw-r--r-- | arch/arm/mach-ux500/Makefile | 4 | ||||
| -rw-r--r-- | arch/arm/mach-ux500/board-mop500-audio.c | 77 | ||||
| -rw-r--r-- | arch/arm/mach-ux500/board-mop500.h | 17 | ||||
| -rw-r--r-- | arch/arm/mach-ux500/cpu-db8500.c | 19 | ||||
| -rw-r--r-- | arch/arm/mach-ux500/hotplug.c | 37 | ||||
| -rw-r--r-- | arch/arm/mach-ux500/platsmp.c | 54 | ||||
| -rw-r--r-- | arch/arm/mach-ux500/setup.h | 16 | ||||
| -rw-r--r-- | arch/arm/mach-ux500/ste-dma40-db8500.h | 85 |
8 files changed, 26 insertions, 283 deletions
diff --git a/arch/arm/mach-ux500/Makefile b/arch/arm/mach-ux500/Makefile index 56d0eb6e254e..a9a3453548f4 100644 --- a/arch/arm/mach-ux500/Makefile +++ b/arch/arm/mach-ux500/Makefile @@ -4,9 +4,5 @@ obj-y := pm.o obj-$(CONFIG_UX500_SOC_DB8500) += cpu-db8500.o -obj-$(CONFIG_MACH_MOP500) += board-mop500-audio.o obj-$(CONFIG_SMP) += platsmp.o -obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o - -CFLAGS_hotplug.o += -march=armv7-a diff --git a/arch/arm/mach-ux500/board-mop500-audio.c b/arch/arm/mach-ux500/board-mop500-audio.c deleted file mode 100644 index b2a0899e7453..000000000000 --- a/arch/arm/mach-ux500/board-mop500-audio.c +++ /dev/null @@ -1,77 +0,0 @@ -/* - * Copyright (C) ST-Ericsson SA 2010 - * - * License terms: GNU General Public License (GPL), version 2 - */ - -#include <linux/platform_device.h> -#include <linux/init.h> -#include <linux/gpio.h> -#include <linux/platform_data/dma-ste-dma40.h> - -#include <linux/platform_data/asoc-ux500-msp.h> - -#include "ste-dma40-db8500.h" -#include "board-mop500.h" - -static struct stedma40_chan_cfg msp0_dma_rx = { - .high_priority = true, - .dir = DMA_DEV_TO_MEM, - .dev_type = DB8500_DMA_DEV31_MSP0_SLIM0_CH0, -}; - -static struct stedma40_chan_cfg msp0_dma_tx = { - .high_priority = true, - .dir = DMA_MEM_TO_DEV, - .dev_type = DB8500_DMA_DEV31_MSP0_SLIM0_CH0, -}; - -struct msp_i2s_platform_data msp0_platform_data = { - .id = 0, - .msp_i2s_dma_rx = &msp0_dma_rx, - .msp_i2s_dma_tx = &msp0_dma_tx, -}; - -static struct stedma40_chan_cfg msp1_dma_rx = { - .high_priority = true, - .dir = DMA_DEV_TO_MEM, - .dev_type = DB8500_DMA_DEV30_MSP3, -}; - -static struct stedma40_chan_cfg msp1_dma_tx = { - .high_priority = true, - .dir = DMA_MEM_TO_DEV, - .dev_type = DB8500_DMA_DEV30_MSP1, -}; - -struct msp_i2s_platform_data msp1_platform_data = { - .id = 1, - .msp_i2s_dma_rx = NULL, - .msp_i2s_dma_tx = &msp1_dma_tx, -}; - -static struct stedma40_chan_cfg msp2_dma_rx = { - .high_priority = true, - .dir = DMA_DEV_TO_MEM, - .dev_type = DB8500_DMA_DEV14_MSP2, -}; - -static struct stedma40_chan_cfg msp2_dma_tx = { - .high_priority = true, - .dir = DMA_MEM_TO_DEV, - .dev_type = DB8500_DMA_DEV14_MSP2, - .use_fixed_channel = true, - .phy_channel = 1, -}; - -struct msp_i2s_platform_data msp2_platform_data = { - .id = 2, - .msp_i2s_dma_rx = &msp2_dma_rx, - .msp_i2s_dma_tx = &msp2_dma_tx, -}; - -struct msp_i2s_platform_data msp3_platform_data = { - .id = 3, - .msp_i2s_dma_rx = &msp1_dma_rx, - .msp_i2s_dma_tx = NULL, -}; diff --git a/arch/arm/mach-ux500/board-mop500.h b/arch/arm/mach-ux500/board-mop500.h deleted file mode 100644 index 7c7b0adca582..000000000000 --- a/arch/arm/mach-ux500/board-mop500.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * Copyright (C) ST-Ericsson SA 2010 - * - * License terms: GNU General Public License (GPL) version 2 - */ - -#ifndef __BOARD_MOP500_H -#define __BOARD_MOP500_H - -#include <linux/platform_data/asoc-ux500-msp.h> - -extern struct msp_i2s_platform_data msp0_platform_data; -extern struct msp_i2s_platform_data msp1_platform_data; -extern struct msp_i2s_platform_data msp2_platform_data; -extern struct msp_i2s_platform_data msp3_platform_data; - -#endif diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c index 46b1da1bf5d2..28083ef72819 100644 --- a/arch/arm/mach-ux500/cpu-db8500.c +++ b/arch/arm/mach-ux500/cpu-db8500.c @@ -12,7 +12,6 @@ #include <linux/init.h> #include <linux/device.h> #include <linux/amba/bus.h> -#include <linux/init.h> #include <linux/interrupt.h> #include <linux/irq.h> #include <linux/irqchip.h> @@ -32,9 +31,6 @@ #include <asm/mach/map.h> #include <asm/mach/arch.h> -#include "setup.h" - -#include "board-mop500.h" #include "db8500-regs.h" static int __init ux500_l2x0_unlock(void) @@ -142,21 +138,6 @@ static struct arm_pmu_platdata db8500_pmu_platdata = { static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = { /* Requires call-back bindings. */ OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata), - /* Requires DMA bindings. */ - OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000, - "ux500-msp-i2s.0", &msp0_platform_data), - OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000, - "ux500-msp-i2s.1", &msp1_platform_data), - OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80117000, - "ux500-msp-i2s.2", &msp2_platform_data), - OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80125000, - "ux500-msp-i2s.3", &msp3_platform_data), - /* Requires non-DT:able platform data. */ - OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu", NULL), - OF_DEV_AUXDATA("stericsson,ux500-cryp", 0xa03cb000, "cryp1", NULL), - OF_DEV_AUXDATA("stericsson,ux500-hash", 0xa03c2000, "hash1", NULL), - OF_DEV_AUXDATA("stericsson,snd-soc-mop500", 0, "snd-soc-mop500.0", - NULL), {}, }; diff --git a/arch/arm/mach-ux500/hotplug.c b/arch/arm/mach-ux500/hotplug.c deleted file mode 100644 index 1cbed0331fd3..000000000000 --- a/arch/arm/mach-ux500/hotplug.c +++ /dev/null @@ -1,37 +0,0 @@ -/* - * Copyright (C) STMicroelectronics 2009 - * Copyright (C) ST-Ericsson SA 2010 - * - * License Terms: GNU General Public License v2 - * Based on ARM realview platform - * - * Author: Sundar Iyer <sundar.iyer@stericsson.com> - * - */ -#include <linux/kernel.h> -#include <linux/errno.h> -#include <linux/smp.h> - -#include <asm/smp_plat.h> - -#include "setup.h" - -/* - * platform-specific code to shutdown a CPU - * - * Called with IRQs disabled - */ -void ux500_cpu_die(unsigned int cpu) -{ - /* directly enter low power state, skipping secure registers */ - for (;;) { - __asm__ __volatile__("dsb\n\t" "wfi\n\t" - : : : "memory"); - if (pen_release == cpu_logical_map(cpu)) { - /* - * OK, proper wakeup, we're done - */ - break; - } - } -} diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c index 8f2f615ff958..69c2361ca688 100644 --- a/arch/arm/mach-ux500/platsmp.c +++ b/arch/arm/mach-ux500/platsmp.c @@ -23,18 +23,20 @@ #include <asm/smp_plat.h> #include <asm/smp_scu.h> -#include "setup.h" - #include "db8500-regs.h" /* Magic triggers in backup RAM */ #define UX500_CPU1_JUMPADDR_OFFSET 0x1FF4 #define UX500_CPU1_WAKEMAGIC_OFFSET 0x1FF0 -static void wakeup_secondary(void) +static void __iomem *backupram; + +static void __init ux500_smp_prepare_cpus(unsigned int max_cpus) { struct device_node *np; - static void __iomem *backupram; + static void __iomem *scu_base; + unsigned int ncores; + int i; np = of_find_compatible_node(NULL, NULL, "ste,dbx500-backupram"); if (!np) { @@ -48,29 +50,6 @@ static void wakeup_secondary(void) return; } - /* - * write the address of secondary startup into the backup ram register - * at offset 0x1FF4, then write the magic number 0xA1FEED01 to the - * backup ram register at offset 0x1FF0, which is what boot rom code - * is waiting for. This will wake up the secondary core from WFE. - */ - writel(virt_to_phys(secondary_startup), - backupram + UX500_CPU1_JUMPADDR_OFFSET); - writel(0xA1FEED01, - backupram + UX500_CPU1_WAKEMAGIC_OFFSET); - - /* make sure write buffer is drained */ - mb(); - iounmap(backupram); -} - -static void __init ux500_smp_prepare_cpus(unsigned int max_cpus) -{ - struct device_node *np; - static void __iomem *scu_base; - unsigned int ncores; - int i; - np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu"); if (!np) { pr_err("No SCU base address\n"); @@ -92,11 +71,30 @@ static void __init ux500_smp_prepare_cpus(unsigned int max_cpus) static int ux500_boot_secondary(unsigned int cpu, struct task_struct *idle) { - wakeup_secondary(); + /* + * write the address of secondary startup into the backup ram register + * at offset 0x1FF4, then write the magic number 0xA1FEED01 to the + * backup ram register at offset 0x1FF0, which is what boot rom code + * is waiting for. This will wake up the secondary core from WFE. + */ + writel(__pa_symbol(secondary_startup), + backupram + UX500_CPU1_JUMPADDR_OFFSET); + writel(0xA1FEED01, + backupram + UX500_CPU1_WAKEMAGIC_OFFSET); + + /* make sure write buffer is drained */ + mb(); arch_send_wakeup_ipi_mask(cpumask_of(cpu)); return 0; } +#ifdef CONFIG_HOTPLUG_CPU +void ux500_cpu_die(unsigned int cpu) +{ + wfi(); +} +#endif + static const struct smp_operations ux500_smp_ops __initconst = { .smp_prepare_cpus = ux500_smp_prepare_cpus, .smp_boot_secondary = ux500_boot_secondary, diff --git a/arch/arm/mach-ux500/setup.h b/arch/arm/mach-ux500/setup.h deleted file mode 100644 index 988e7c77068d..000000000000 --- a/arch/arm/mach-ux500/setup.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Copyright (C) 2009 ST-Ericsson. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * These symbols are needed for board-specific files to call their - * own cpu-specific files - */ -#ifndef __ASM_ARCH_SETUP_H -#define __ASM_ARCH_SETUP_H - -extern void ux500_cpu_die(unsigned int cpu); - -#endif /* __ASM_ARCH_SETUP_H */ diff --git a/arch/arm/mach-ux500/ste-dma40-db8500.h b/arch/arm/mach-ux500/ste-dma40-db8500.h deleted file mode 100644 index 0296ae5b0fd9..000000000000 --- a/arch/arm/mach-ux500/ste-dma40-db8500.h +++ /dev/null @@ -1,85 +0,0 @@ -/* - * arch/arm/mach-ux500/ste_dma40_db8500.h - * DB8500-SoC-specific configuration for DMA40 - * - * Copyright (C) ST-Ericsson 2007-2010 - * License terms: GNU General Public License (GPL) version 2 - * Author: Per Friden <per.friden@stericsson.com> - * Author: Jonas Aaberg <jonas.aberg@stericsson.com> - */ -#ifndef STE_DMA40_DB8500_H -#define STE_DMA40_DB8500_H - -#define DB8500_DMA_NR_DEV 64 - -/* - * Unless otherwise specified, all channels numbers are used for - * TX & RX, and can be used for either source or destination - * channels. - */ -enum dma_dev_type { - DB8500_DMA_DEV0_SPI0 = 0, - DB8500_DMA_DEV1_SD_MMC0 = 1, - DB8500_DMA_DEV2_SD_MMC1 = 2, - DB8500_DMA_DEV3_SD_MMC2 = 3, - DB8500_DMA_DEV4_I2C1 = 4, - DB8500_DMA_DEV5_I2C3 = 5, - DB8500_DMA_DEV6_I2C2 = 6, - DB8500_DMA_DEV7_I2C4 = 7, /* Only on V1 and later */ - DB8500_DMA_DEV8_SSP0 = 8, - DB8500_DMA_DEV9_SSP1 = 9, - DB8500_DMA_DEV10_MCDE_RX = 10, /* RX only */ - DB8500_DMA_DEV11_UART2 = 11, - DB8500_DMA_DEV12_UART1 = 12, - DB8500_DMA_DEV13_UART0 = 13, - DB8500_DMA_DEV14_MSP2 = 14, - DB8500_DMA_DEV15_I2C0 = 15, - DB8500_DMA_DEV16_USB_OTG_IEP_AND_OEP_7_15 = 16, - DB8500_DMA_DEV17_USB_OTG_IEP_AND_OEP_6_14 = 17, - DB8500_DMA_DEV18_USB_OTG_IEP_AND_OEP_5_13 = 18, - DB8500_DMA_DEV19_USB_OTG_IEP_AND_OEP_4_12 = 19, - DB8500_DMA_DEV20_SLIM0_CH0_HSI_CH0 = 20, - DB8500_DMA_DEV21_SLIM0_CH1_HSI_CH1 = 21, - DB8500_DMA_DEV22_SLIM0_CH2_HSI_CH2 = 22, - DB8500_DMA_DEV23_SLIM0_CH3_HSI_CH3 = 23, - DB8500_DMA_DEV24_SXA0 = 24, - DB8500_DMA_DEV25_SXA1 = 25, - DB8500_DMA_DEV26_SXA2 = 26, - DB8500_DMA_DEV27_SXA3 = 27, - DB8500_DMA_DEV28_SD_MM2 = 28, - DB8500_DMA_DEV29_SD_MM0 = 29, - DB8500_DMA_DEV30_MSP1 = 30, - /* On DB8500v2, MSP3 RX replaces MSP1 RX */ - DB8500_DMA_DEV30_MSP3 = 30, - DB8500_DMA_DEV31_MSP0_SLIM0_CH0 = 31, - DB8500_DMA_DEV32_SD_MM1 = 32, - DB8500_DMA_DEV33_SPI2 = 33, - DB8500_DMA_DEV34_I2C3_RX2_TX2 = 34, - DB8500_DMA_DEV35_SPI1 = 35, - DB8500_DMA_DEV36_USB_OTG_IEP_AND_OEP_3_11 = 36, - DB8500_DMA_DEV37_USB_OTG_IEP_AND_OEP_2_10 = 37, - DB8500_DMA_DEV38_USB_OTG_IEP_AND_OEP_1_9 = 38, - DB8500_DMA_DEV39_USB_OTG_IEP_AND_OEP_8 = 39, - DB8500_DMA_DEV40_SPI3 = 40, - DB8500_DMA_DEV41_SD_MM3 = 41, - DB8500_DMA_DEV42_SD_MM4 = 42, - DB8500_DMA_DEV43_SD_MM5 = 43, - DB8500_DMA_DEV44_SXA4 = 44, - DB8500_DMA_DEV45_SXA5 = 45, - DB8500_DMA_DEV46_SLIM0_CH8_SRC_SXA6 = 46, - DB8500_DMA_DEV47_SLIM0_CH9_SRC_SXA7 = 47, - DB8500_DMA_DEV48_CAC1 = 48, - DB8500_DMA_DEV49_CAC1_TX_HAC1_TX = 49, /* TX only */ - DB8500_DMA_DEV50_HAC1_TX = 50, /* TX only */ - DB8500_DMA_MEMCPY_TX_0 = 51, /* TX only */ - DB8500_DMA_DEV52_SLIM0_CH4_HSI_CH4 = 52, - DB8500_DMA_DEV53_SLIM0_CH5_HSI_CH5 = 53, - DB8500_DMA_DEV54_SLIM0_CH6_HSI_CH6 = 54, - DB8500_DMA_DEV55_SLIM0_CH7_HSI_CH7 = 55, - /* 56 -> 60 are channels reserved for memcpy only */ - DB8500_DMA_DEV61_CAC0 = 61, - DB8500_DMA_DEV62_CAC0_TX_HAC0_TX = 62, /* TX only */ - DB8500_DMA_DEV63_HAC0_TX = 63, /* TX only */ -}; - -#endif |
