diff options
Diffstat (limited to 'arch/arm/mach-s3c64xx')
30 files changed, 1003 insertions, 231 deletions
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig index f5a59727949f..579d2f0f4dd0 100644 --- a/arch/arm/mach-s3c64xx/Kconfig +++ b/arch/arm/mach-s3c64xx/Kconfig @@ -57,11 +57,21 @@ config S3C64XX_SETUP_I2C1 help Common setup code for i2c bus 1. +config S3C64XX_SETUP_IDE + bool + help + Common setup code for S3C64XX IDE. + config S3C64XX_SETUP_FB_24BPP bool help Common setup code for S3C64XX with an 24bpp RGB display helper. +config S3C64XX_SETUP_KEYPAD + bool + help + Common setup code for S3C64XX KEYPAD GPIO configurations + config S3C64XX_SETUP_SDHCI_GPIO bool help @@ -88,6 +98,36 @@ config MACH_ANW6410 help Machine support for the A&W6410 +config MACH_MINI6410 + bool "MINI6410" + select CPU_S3C6410 + select S3C_DEV_HSMMC + select S3C_DEV_HSMMC1 + select S3C64XX_SETUP_SDHCI + select S3C_DEV_USB_HOST + select S3C_DEV_NAND + select S3C_DEV_FB + select S3C64XX_SETUP_FB_24BPP + select SAMSUNG_DEV_ADC + select SAMSUNG_DEV_TS + help + Machine support for the FriendlyARM MINI6410 + +config MACH_REAL6410 + bool "REAL6410" + select CPU_S3C6410 + select S3C_DEV_HSMMC + select S3C_DEV_HSMMC1 + select S3C64XX_SETUP_SDHCI + select S3C_DEV_FB + select S3C64XX_SETUP_FB_24BPP + select S3C_DEV_NAND + select SAMSUNG_DEV_ADC + select SAMSUNG_DEV_TS + select S3C_DEV_USB_HOST + help + Machine support for the CoreWind REAL6410 + config MACH_SMDK6410 bool "SMDK6410" select CPU_S3C6410 @@ -95,15 +135,20 @@ config MACH_SMDK6410 select S3C_DEV_HSMMC select S3C_DEV_HSMMC1 select S3C_DEV_I2C1 + select SAMSUNG_DEV_IDE select S3C_DEV_FB + select S3C_DEV_RTC select SAMSUNG_DEV_TS select S3C_DEV_USB_HOST select S3C_DEV_USB_HSOTG select S3C_DEV_WDT - select HAVE_S3C2410_WATCHDOG + select SAMSUNG_DEV_KEYPAD + select HAVE_S3C2410_WATCHDOG if WATCHDOG select S3C64XX_SETUP_SDHCI select S3C64XX_SETUP_I2C1 + select S3C64XX_SETUP_IDE select S3C64XX_SETUP_FB_24BPP + select S3C64XX_SETUP_KEYPAD help Machine support for the Samsung SMDK6410 @@ -161,6 +206,7 @@ config SMDK6410_WM1192_EV1 select REGULATOR_WM831X select S3C24XX_GPIO_EXTRA64 select MFD_WM831X + select MFD_WM831X_I2C help The Wolfson Microelectronics 1192-EV1 is a WM831x based PMIC daughtercard for the Samsung SMDK6410 reference platform. diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile index 9d1006938f5c..4657363f0674 100644 --- a/arch/arm/mach-s3c64xx/Makefile +++ b/arch/arm/mach-s3c64xx/Makefile @@ -35,6 +35,8 @@ obj-$(CONFIG_S3C64XX_DMA) += dma.o obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o +obj-$(CONFIG_S3C64XX_SETUP_IDE) += setup-ide.o +obj-$(CONFIG_S3C64XX_SETUP_KEYPAD) += setup-keypad.o obj-$(CONFIG_S3C64XX_SETUP_SDHCI) += setup-sdhci.o obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o @@ -50,6 +52,8 @@ obj-$(CONFIG_PM) += irq-pm.o obj-$(CONFIG_MACH_ANW6410) += mach-anw6410.o obj-$(CONFIG_MACH_SMDK6400) += mach-smdk6400.o obj-$(CONFIG_MACH_SMDK6410) += mach-smdk6410.o +obj-$(CONFIG_MACH_REAL6410) += mach-real6410.o +obj-$(CONFIG_MACH_MINI6410) += mach-mini6410.o obj-$(CONFIG_MACH_NCP) += mach-ncp.o obj-$(CONFIG_MACH_HMT) += mach-hmt.o obj-$(CONFIG_MACH_SMARTQ) += mach-smartq.o diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c index fbd85a9b7bbf..7e03f0ae2fc8 100644 --- a/arch/arm/mach-s3c64xx/clock.c +++ b/arch/arm/mach-s3c64xx/clock.c @@ -133,6 +133,12 @@ static struct clk init_clocks_disable[] = { .id = -1, .parent = &clk_h, }, { + .name = "rtc", + .id = -1, + .parent = &clk_p, + .enable = s3c64xx_pclk_ctrl, + .ctrlbit = S3C_CLKCON_PCLK_RTC, + }, { .name = "adc", .id = -1, .parent = &clk_p, @@ -165,6 +171,12 @@ static struct clk init_clocks_disable[] = { .ctrlbit = S3C6410_CLKCON_PCLK_IIS2, }, { #endif + .name = "keypad", + .id = -1, + .parent = &clk_p, + .enable = s3c64xx_pclk_ctrl, + .ctrlbit = S3C_CLKCON_PCLK_KEYPAD, + }, { .name = "spi", .id = 0, .parent = &clk_p, @@ -295,12 +307,6 @@ static struct clk init_clocks[] = { .enable = s3c64xx_pclk_ctrl, .ctrlbit = S3C_CLKCON_PCLK_UART3, }, { - .name = "rtc", - .id = -1, - .parent = &clk_p, - .enable = s3c64xx_pclk_ctrl, - .ctrlbit = S3C_CLKCON_PCLK_RTC, - }, { .name = "watchdog", .id = -1, .parent = &clk_p, @@ -310,6 +316,12 @@ static struct clk init_clocks[] = { .id = -1, .parent = &clk_p, .ctrlbit = S3C_CLKCON_PCLK_AC97, + }, { + .name = "cfcon", + .id = -1, + .parent = &clk_h, + .enable = s3c64xx_hclk_ctrl, + .ctrlbit = S3C_CLKCON_HCLK_IHOST, } }; diff --git a/arch/arm/mach-s3c64xx/dev-audio.c b/arch/arm/mach-s3c64xx/dev-audio.c index c3e9e73bd0f9..76426a32c013 100644 --- a/arch/arm/mach-s3c64xx/dev-audio.c +++ b/arch/arm/mach-s3c64xx/dev-audio.c @@ -12,54 +12,44 @@ #include <linux/string.h> #include <linux/platform_device.h> #include <linux/dma-mapping.h> +#include <linux/gpio.h> #include <mach/irqs.h> #include <mach/map.h> #include <mach/dma.h> -#include <mach/gpio.h> #include <plat/devs.h> #include <plat/audio.h> #include <plat/gpio-cfg.h> -#include <mach/gpio-bank-c.h> -#include <mach/gpio-bank-d.h> -#include <mach/gpio-bank-e.h> -#include <mach/gpio-bank-h.h> - static int s3c64xx_i2sv3_cfg_gpio(struct platform_device *pdev) { + unsigned int base; + switch (pdev->id) { case 0: - s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_I2S0_CLK); - s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_I2S0_CDCLK); - s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_I2S0_LRCLK); - s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_I2S0_DI); - s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_I2S0_D0); + base = S3C64XX_GPD(0); break; case 1: - s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_I2S1_CLK); - s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_I2S1_CDCLK); - s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_I2S1_LRCLK); - s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_I2S1_DI); - s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_I2S1_D0); + base = S3C64XX_GPE(0); + break; default: - printk(KERN_DEBUG "Invalid I2S Controller number!"); + printk(KERN_DEBUG "Invalid I2S Controller number: %d\n", + pdev->id); return -EINVAL; } + s3c_gpio_cfgpin_range(base, 5, S3C_GPIO_SFN(3)); + return 0; } static int s3c64xx_i2sv4_cfg_gpio(struct platform_device *pdev) { - s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C64XX_GPC4_I2S_V40_DO0); - s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C64XX_GPC5_I2S_V40_DO1); - s3c_gpio_cfgpin(S3C64XX_GPC(7), S3C64XX_GPC7_I2S_V40_DO2); - s3c_gpio_cfgpin(S3C64XX_GPH(6), S3C64XX_GPH6_I2S_V40_BCLK); - s3c_gpio_cfgpin(S3C64XX_GPH(7), S3C64XX_GPH7_I2S_V40_CDCLK); - s3c_gpio_cfgpin(S3C64XX_GPH(8), S3C64XX_GPH8_I2S_V40_LRCLK); - s3c_gpio_cfgpin(S3C64XX_GPH(9), S3C64XX_GPH9_I2S_V40_DI); + s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C_GPIO_SFN(5)); + s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C_GPIO_SFN(5)); + s3c_gpio_cfgpin(S3C64XX_GPC(7), S3C_GPIO_SFN(5)); + s3c_gpio_cfgpin_range(S3C64XX_GPH(6), 4, S3C_GPIO_SFN(5)); return 0; } @@ -168,26 +158,22 @@ EXPORT_SYMBOL(s3c64xx_device_iisv4); static int s3c64xx_pcm_cfg_gpio(struct platform_device *pdev) { + unsigned int base; + switch (pdev->id) { case 0: - s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_PCM0_SCLK); - s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_PCM0_EXTCLK); - s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_PCM0_FSYNC); - s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_PCM0_SIN); - s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_PCM0_SOUT); + base = S3C64XX_GPD(0); break; case 1: - s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_PCM1_SCLK); - s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_PCM1_EXTCLK); - s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_PCM1_FSYNC); - s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_PCM1_SIN); - s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_PCM1_SOUT); + base = S3C64XX_GPE(0); break; default: - printk(KERN_DEBUG "Invalid PCM Controller number!"); + printk(KERN_DEBUG "Invalid PCM Controller number: %d\n", + pdev->id); return -EINVAL; } + s3c_gpio_cfgpin_range(base, 5, S3C_GPIO_SFN(2)); return 0; } @@ -261,24 +247,12 @@ EXPORT_SYMBOL(s3c64xx_device_pcm1); static int s3c64xx_ac97_cfg_gpd(struct platform_device *pdev) { - s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_AC97_BITCLK); - s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_AC97_nRESET); - s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_AC97_SYNC); - s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_AC97_SDI); - s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_AC97_SDO); - - return 0; + return s3c_gpio_cfgpin_range(S3C64XX_GPD(0), 5, S3C_GPIO_SFN(4)); } static int s3c64xx_ac97_cfg_gpe(struct platform_device *pdev) { - s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_AC97_BITCLK); - s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_AC97_nRESET); - s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_AC97_SYNC); - s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_AC97_SDI); - s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_AC97_SDO); - - return 0; + return s3c_gpio_cfgpin_range(S3C64XX_GPE(0), 5, S3C_GPIO_SFN(4)); } static struct resource s3c64xx_ac97_resource[] = { @@ -333,3 +307,16 @@ void __init s3c64xx_ac97_setup_gpio(int num) else s3c_ac97_pdata.cfg_gpio = s3c64xx_ac97_cfg_gpe; } + +static u64 s3c_device_audio_dmamask = 0xffffffffUL; + +struct platform_device s3c_device_pcm = { + .name = "s3c24xx-pcm-audio", + .id = -1, + .dev = { + .dma_mask = &s3c_device_audio_dmamask, + .coherent_dma_mask = 0xffffffffUL + } +}; +EXPORT_SYMBOL(s3c_device_pcm); + diff --git a/arch/arm/mach-s3c64xx/dev-spi.c b/arch/arm/mach-s3c64xx/dev-spi.c index 29c32d088515..405e62128917 100644 --- a/arch/arm/mach-s3c64xx/dev-spi.c +++ b/arch/arm/mach-s3c64xx/dev-spi.c @@ -12,16 +12,17 @@ #include <linux/string.h> #include <linux/platform_device.h> #include <linux/dma-mapping.h> +#include <linux/gpio.h> #include <mach/dma.h> #include <mach/map.h> -#include <mach/gpio.h> #include <mach/gpio-bank-c.h> #include <mach/spi-clocks.h> +#include <mach/irqs.h> #include <plat/s3c64xx-spi.h> #include <plat/gpio-cfg.h> -#include <plat/irqs.h> +#include <plat/devs.h> static char *spi_src_clks[] = { [S3C64XX_SPI_SRCCLK_PCLK] = "pclk", diff --git a/arch/arm/mach-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c index 5567e037b0d1..e7d03ab41d80 100644 --- a/arch/arm/mach-s3c64xx/dma.c +++ b/arch/arm/mach-s3c64xx/dma.c @@ -697,7 +697,7 @@ static int s3c64xx_dma_init1(int chno, enum dma_ch chbase, chptr->number = chno; chptr->dmac = dmac; chptr->regs = regptr; - regptr += PL008_Cx_STRIDE; + regptr += PL080_Cx_STRIDE; } /* for the moment, permanently enable the controller */ diff --git a/arch/arm/mach-s3c64xx/gpiolib.c b/arch/arm/mach-s3c64xx/gpiolib.c index 60c929a3cab6..fd99a82e82c4 100644 --- a/arch/arm/mach-s3c64xx/gpiolib.c +++ b/arch/arm/mach-s3c64xx/gpiolib.c @@ -15,9 +15,9 @@ #include <linux/kernel.h> #include <linux/irq.h> #include <linux/io.h> +#include <linux/gpio.h> #include <mach/map.h> -#include <mach/gpio.h> #include <plat/gpio-core.h> #include <plat/gpio-cfg.h> @@ -195,11 +195,6 @@ static struct s3c_gpio_cfg gpio_2bit_cfg_eint11 = { .get_pull = s3c_gpio_getpull_updown, }; -int s3c64xx_gpio2int_gpn(struct gpio_chip *chip, unsigned pin) -{ - return IRQ_EINT(0) + pin; -} - static struct s3c_gpio_chip gpio_2bit[] = { { .base = S3C64XX_GPF_BASE, @@ -227,12 +222,13 @@ static struct s3c_gpio_chip gpio_2bit[] = { }, }, { .base = S3C64XX_GPN_BASE, + .irq_base = IRQ_EINT(0), .config = &gpio_2bit_cfg_eint10, .chip = { .base = S3C64XX_GPN(0), .ngpio = S3C64XX_GPIO_N_NR, .label = "GPN", - .to_irq = s3c64xx_gpio2int_gpn, + .to_irq = samsung_gpiolib_to_irq, }, }, { .base = S3C64XX_GPO_BASE, diff --git a/arch/arm/mach-s3c64xx/include/mach/debug-macro.S b/arch/arm/mach-s3c64xx/include/mach/debug-macro.S index f9ab5d26052a..a29e70550c70 100644 --- a/arch/arm/mach-s3c64xx/include/mach/debug-macro.S +++ b/arch/arm/mach-s3c64xx/include/mach/debug-macro.S @@ -21,13 +21,12 @@ * aligned and add in the offset when we load the value here. */ - .macro addruart, rx, rtmp - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 - ldreq \rx, = S3C_PA_UART - ldrne \rx, = (S3C_VA_UART + S3C_PA_UART & 0xfffff) + .macro addruart, rp, rv + ldr \rp, = S3C_PA_UART + ldr \rv, = (S3C_VA_UART + S3C_PA_UART & 0xfffff) #if CONFIG_DEBUG_S3C_UART != 0 - add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART) + add \rp, \rp, #(0x400 * CONFIG_DEBUG_S3C_UART) + add \rv, \rv, #(0x400 * CONFIG_DEBUG_S3C_UART) #endif .endm diff --git a/arch/arm/mach-s3c64xx/include/mach/map.h b/arch/arm/mach-s3c64xx/include/mach/map.h index e1eab3c94aea..a1f13f02c841 100644 --- a/arch/arm/mach-s3c64xx/include/mach/map.h +++ b/arch/arm/mach-s3c64xx/include/mach/map.h @@ -67,6 +67,7 @@ #define S3C64XX_PA_USB_HSOTG (0x7C000000) #define S3C64XX_PA_WATCHDOG (0x7E004000) #define S3C64XX_PA_RTC (0x7E005000) +#define S3C64XX_PA_KEYPAD (0x7E00A000) #define S3C64XX_PA_ADC (0x7E00B000) #define S3C64XX_PA_SYSCON (0x7E00F000) #define S3C64XX_PA_AC97 (0x7F001000) @@ -86,6 +87,9 @@ #define S3C64XX_SZ_GPIO SZ_4K #define S3C64XX_PA_SDRAM (0x50000000) + +#define S3C64XX_PA_CFCON (0x70300000) + #define S3C64XX_PA_VIC0 (0x71200000) #define S3C64XX_PA_VIC1 (0x71300000) @@ -120,5 +124,7 @@ #define S3C_PA_WDT S3C64XX_PA_WATCHDOG #define SAMSUNG_PA_ADC S3C64XX_PA_ADC +#define SAMSUNG_PA_CFCON S3C64XX_PA_CFCON +#define SAMSUNG_PA_KEYPAD S3C64XX_PA_KEYPAD #endif /* __ASM_ARCH_6400_MAP_H */ diff --git a/arch/arm/mach-s3c64xx/include/mach/memory.h b/arch/arm/mach-s3c64xx/include/mach/memory.h index a3ac84a65480..42cc54e2ee30 100644 --- a/arch/arm/mach-s3c64xx/include/mach/memory.h +++ b/arch/arm/mach-s3c64xx/include/mach/memory.h @@ -15,4 +15,6 @@ #define PHYS_OFFSET UL(0x50000000) +#define CONSISTENT_DMA_SIZE SZ_8M + #endif diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-clock.h b/arch/arm/mach-s3c64xx/include/mach/regs-clock.h index 0114eb0c1fe7..05332b998ec0 100644 --- a/arch/arm/mach-s3c64xx/include/mach/regs-clock.h +++ b/arch/arm/mach-s3c64xx/include/mach/regs-clock.h @@ -34,6 +34,7 @@ #define S3C_SCLK_GATE S3C_CLKREG(0x38) #define S3C_MEM0_GATE S3C_CLKREG(0x3C) #define S3C6410_CLK_SRC2 S3C_CLKREG(0x10C) +#define S3C_MEM_SYS_CFG S3C_CLKREG(0x120) /* CLKDIV0 */ #define S3C6400_CLKDIV0_PCLK_MASK (0xf << 12) @@ -154,4 +155,8 @@ #define S3C6400_CLKSRC_EPLL_MOUT_SHIFT (2) #define S3C6400_CLKSRC_MFC (1 << 4) +/* MEM_SYS_CFG */ +#define MEM_SYS_CFG_INDEP_CF 0x4000 +#define MEM_SYS_CFG_EBI_FIX_PRI_CFCON 0x30 + #endif /* _PLAT_REGS_CLOCK_H */ diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-fb.h b/arch/arm/mach-s3c64xx/include/mach/regs-fb.h index f56611526c63..a06ee0af9a4b 100644 --- a/arch/arm/mach-s3c64xx/include/mach/regs-fb.h +++ b/arch/arm/mach-s3c64xx/include/mach/regs-fb.h @@ -18,24 +18,4 @@ #include <plat/regs-fb-v4.h> -/* Palette registers */ -#define WIN2_PAL(_entry) (0x300 + ((_entry) * 2)) -#define WIN3_PAL(_entry) (0x320 + ((_entry) * 2)) -#define WIN4_PAL(_entry) (0x340 + ((_entry) * 2)) -#define WIN0_PAL(_entry) (0x400 + ((_entry) * 4)) -#define WIN1_PAL(_entry) (0x800 + ((_entry) * 4)) - -static inline unsigned int s3c_fb_pal_reg(unsigned int window, int reg) -{ - switch (window) { - case 0: return WIN0_PAL(reg); - case 1: return WIN1_PAL(reg); - case 2: return WIN2_PAL(reg); - case 3: return WIN3_PAL(reg); - case 4: return WIN4_PAL(reg); - } - - BUG(); -} - #endif /* __ASM_ARCH_MACH_REGS_FB_H */ diff --git a/arch/arm/mach-s3c64xx/include/mach/vmalloc.h b/arch/arm/mach-s3c64xx/include/mach/vmalloc.h index 7411ef3711a6..23f75e556a30 100644 --- a/arch/arm/mach-s3c64xx/include/mach/vmalloc.h +++ b/arch/arm/mach-s3c64xx/include/mach/vmalloc.h @@ -15,6 +15,6 @@ #ifndef __ASM_ARCH_VMALLOC_H #define __ASM_ARCH_VMALLOC_H -#define VMALLOC_END (0xE0000000) +#define VMALLOC_END 0xF6000000UL #endif /* __ASM_ARCH_VMALLOC_H */ diff --git a/arch/arm/mach-s3c64xx/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c index 4a0bb243d14a..a53cf149476e 100644 --- a/arch/arm/mach-s3c64xx/mach-anw6410.c +++ b/arch/arm/mach-s3c64xx/mach-anw6410.c @@ -134,7 +134,6 @@ static struct platform_device anw6410_lcd_powerdev = { static struct s3c_fb_pd_win anw6410_fb_win0 = { /* this is to ensure we use win0 */ .win_mode = { - .pixclock = 41094, .left_margin = 8, .right_margin = 13, .upper_margin = 7, @@ -234,8 +233,6 @@ static void __init anw6410_machine_init(void) MACHINE_START(ANW6410, "A&W6410") /* Maintainer: Kwangwoo Lee <kwangwoo.lee@gmail.com> */ - .phys_io = S3C_PA_UART & 0xfff00000, - .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, .boot_params = S3C64XX_PA_SDRAM + 0x100, .init_irq = s3c6410_init_irq, diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c index 187441a78dd5..b2639582caca 100644 --- a/arch/arm/mach-s3c64xx/mach-hmt.c +++ b/arch/arm/mach-s3c64xx/mach-hmt.c @@ -128,7 +128,6 @@ static struct platform_device hmt_backlight_device = { static struct s3c_fb_pd_win hmt_fb_win0 = { .win_mode = { - .pixclock = 41094, .left_margin = 8, .right_margin = 13, .upper_margin = 7, @@ -266,8 +265,6 @@ static void __init hmt_machine_init(void) MACHINE_START(HMT, "Airgoo-HMT") /* Maintainer: Peter Korsgaard <jacmet@sunsite.dk> */ - .phys_io = S3C_PA_UART & 0xfff00000, - .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, .boot_params = S3C64XX_PA_SDRAM + 0x100, .init_irq = s3c6410_init_irq, .map_io = hmt_map_io, diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c new file mode 100644 index 000000000000..89f35e02e883 --- /dev/null +++ b/arch/arm/mach-s3c64xx/mach-mini6410.c @@ -0,0 +1,357 @@ +/* linux/arch/arm/mach-s3c64xx/mach-mini6410.c + * + * Copyright 2010 Darius Augulis <augulis.darius@gmail.com> + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * http://armlinux.simtec.co.uk/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * +*/ + +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/fb.h> +#include <linux/gpio.h> +#include <linux/kernel.h> +#include <linux/list.h> +#include <linux/dm9000.h> +#include <linux/mtd/mtd.h> +#include <linux/mtd/partitions.h> +#include <linux/serial_core.h> +#include <linux/types.h> + +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/mach/map.h> + +#include <mach/map.h> +#include <mach/regs-fb.h> +#include <mach/regs-gpio.h> +#include <mach/regs-modem.h> +#include <mach/regs-srom.h> +#include <mach/s3c6410.h> + +#include <plat/adc.h> +#include <plat/cpu.h> +#include <plat/devs.h> +#include <plat/fb.h> +#include <plat/nand.h> +#include <plat/regs-serial.h> +#include <plat/ts.h> + +#include <video/platform_lcd.h> + +#define UCON S3C2410_UCON_DEFAULT +#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) +#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) + +static struct s3c2410_uartcfg mini6410_uartcfgs[] __initdata = { + [0] = { + .hwport = 0, + .flags = 0, + .ucon = UCON, + .ulcon = ULCON, + .ufcon = UFCON, + }, + [1] = { + .hwport = 1, + .flags = 0, + .ucon = UCON, + .ulcon = ULCON, + .ufcon = UFCON, + }, + [2] = { + .hwport = 2, + .flags = 0, + .ucon = UCON, + .ulcon = ULCON, + .ufcon = UFCON, + }, + [3] = { + .hwport = 3, + .flags = 0, + .ucon = UCON, + .ulcon = ULCON, + .ufcon = UFCON, + }, +}; + +/* DM9000AEP 10/100 ethernet controller */ + +static struct resource mini6410_dm9k_resource[] = { + [0] = { + .start = S3C64XX_PA_XM0CSN1, + .end = S3C64XX_PA_XM0CSN1 + 1, + .flags = IORESOURCE_MEM + }, + [1] = { + .start = S3C64XX_PA_XM0CSN1 + 4, + .end = S3C64XX_PA_XM0CSN1 + 5, + .flags = IORESOURCE_MEM + }, + [2] = { + .start = S3C_EINT(7), + .end = S3C_EINT(7), + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL + } +}; + +static struct dm9000_plat_data mini6410_dm9k_pdata = { + .flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM), +}; + +static struct platform_device mini6410_device_eth = { + .name = "dm9000", + .id = -1, + .num_resources = ARRAY_SIZE(mini6410_dm9k_resource), + .resource = mini6410_dm9k_resource, + .dev = { + .platform_data = &mini6410_dm9k_pdata, + }, +}; + +static struct mtd_partition mini6410_nand_part[] = { + [0] = { + .name = "uboot", + .size = SZ_1M, + .offset = 0, + }, + [1] = { + .name = "kernel", + .size = SZ_2M, + .offset = SZ_1M, + }, + [2] = { + .name = "rootfs", + .size = MTDPART_SIZ_FULL, + .offset = SZ_1M + SZ_2M, + }, +}; + +static struct s3c2410_nand_set mini6410_nand_sets[] = { + [0] = { + .name = "nand", + .nr_chips = 1, + .nr_partitions = ARRAY_SIZE(mini6410_nand_part), + .partitions = mini6410_nand_part, + }, +}; + +static struct s3c2410_platform_nand mini6410_nand_info = { + .tacls = 25, + .twrph0 = 55, + .twrph1 = 40, + .nr_sets = ARRAY_SIZE(mini6410_nand_sets), + .sets = mini6410_nand_sets, +}; + +static struct s3c_fb_pd_win mini6410_fb_win[] = { + { + .win_mode = { /* 4.3" 480x272 */ + .left_margin = 3, + .right_margin = 2, + .upper_margin = 1, + .lower_margin = 1, + .hsync_len = 40, + .vsync_len = 1, + .xres = 480, + .yres = 272, + }, + .max_bpp = 32, + .default_bpp = 16, + }, { + .win_mode = { /* 7.0" 800x480 */ + .left_margin = 8, + .right_margin = 13, + .upper_margin = 7, + .lower_margin = 5, + .hsync_len = 3, + .vsync_len = 1, + .xres = 800, + .yres = 480, + }, + .max_bpp = 32, + .default_bpp = 16, + }, +}; + +static struct s3c_fb_platdata mini6410_lcd_pdata __initdata = { + .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, + .win[0] = &mini6410_fb_win[0], + .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, + .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, +}; + +static void mini6410_lcd_power_set(struct plat_lcd_data *pd, + unsigned int power) +{ + if (power) + gpio_direction_output(S3C64XX_GPE(0), 1); + else + gpio_direction_output(S3C64XX_GPE(0), 0); +} + +static struct plat_lcd_data mini6410_lcd_power_data = { + .set_power = mini6410_lcd_power_set, +}; + +static struct platform_device mini6410_lcd_powerdev = { + .name = "platform-lcd", + .dev.parent = &s3c_device_fb.dev, + .dev.platform_data = &mini6410_lcd_power_data, +}; + +static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = { + .delay = 10000, + .presc = 49, + .oversampling_shift = 2, +}; + +static struct platform_device *mini6410_devices[] __initdata = { + &mini6410_device_eth, + &s3c_device_hsmmc0, + &s3c_device_hsmmc1, + &s3c_device_ohci, + &s3c_device_nand, + &s3c_device_fb, + &mini6410_lcd_powerdev, + &s3c_device_adc, + &s3c_device_ts, +}; + +static void __init mini6410_map_io(void) +{ + u32 tmp; + + s3c64xx_init_io(NULL, 0); + s3c24xx_init_clocks(12000000); + s3c24xx_init_uarts(mini6410_uartcfgs, ARRAY_SIZE(mini6410_uartcfgs)); + + /* set the LCD type */ + tmp = __raw_readl(S3C64XX_SPCON); + tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK; + tmp |= S3C64XX_SPCON_LCD_SEL_RGB; + __raw_writel(tmp, S3C64XX_SPCON); + + /* remove the LCD bypass */ + tmp = __raw_readl(S3C64XX_MODEM_MIFPCON); + tmp &= ~MIFPCON_LCD_BYPASS; + __raw_writel(tmp, S3C64XX_MODEM_MIFPCON); +} + +/* + * mini6410_features string + * + * 0-9 LCD configuration + * + */ +static char mini6410_features_str[12] __initdata = "0"; + +static int __init mini6410_features_setup(char *str) +{ + if (str) + strlcpy(mini6410_features_str, str, + sizeof(mini6410_features_str)); + return 1; +} + +__setup("mini6410=", mini6410_features_setup); + +#define FEATURE_SCREEN (1 << 0) + +struct mini6410_features_t { + int done; + int lcd_index; +}; + +static void mini6410_parse_features( + struct mini6410_features_t *features, + const char *features_str) +{ + const char *fp = features_str; + + features->done = 0; + features->lcd_index = 0; + + while (*fp) { + char f = *fp++; + + switch (f) { + case '0'...'9': /* tft screen */ + if (features->done & FEATURE_SCREEN) { + printk(KERN_INFO "MINI6410: '%c' ignored, " + "screen type already set\n", f); + } else { + int li = f - '0'; + if (li >= ARRAY_SIZE(mini6410_fb_win)) + printk(KERN_INFO "MINI6410: '%c' out " + "of range LCD mode\n", f); + else { + features->lcd_index = li; + } + } + features->done |= FEATURE_SCREEN; + break; + } + } +} + +static void __init mini6410_machine_init(void) +{ + u32 cs1; + struct mini6410_features_t features = { 0 }; + + printk(KERN_INFO "MINI6410: Option string mini6410=%s\n", + mini6410_features_str); + + /* Parse the feature string */ + mini6410_parse_features(&features, mini6410_features_str); + + mini6410_lcd_pdata.win[0] = &mini6410_fb_win[features.lcd_index]; + + printk(KERN_INFO "MINI6410: selected LCD display is %dx%d\n", + mini6410_lcd_pdata.win[0]->win_mode.xres, + mini6410_lcd_pdata.win[0]->win_mode.yres); + + s3c_nand_set_platdata(&mini6410_nand_info); + s3c_fb_set_platdata(&mini6410_lcd_pdata); + s3c24xx_ts_set_platdata(&s3c_ts_platform); + + /* configure nCS1 width to 16 bits */ + + cs1 = __raw_readl(S3C64XX_SROM_BW) & + ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT); + cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) | + (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) | + (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) << + S3C64XX_SROM_BW__NCS1__SHIFT; + __raw_writel(cs1, S3C64XX_SROM_BW); + + /* set timing for nCS1 suitable for ethernet chip */ + + __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) | + (6 << S3C64XX_SROM_BCX__TACP__SHIFT) | + (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) | + (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) | + (13 << S3C64XX_SROM_BCX__TACC__SHIFT) | + (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) | + (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1); + + gpio_request(S3C64XX_GPF(15), "LCD power"); + gpio_request(S3C64XX_GPE(0), "LCD power"); + + platform_add_devices(mini6410_devices, ARRAY_SIZE(mini6410_devices)); +} + +MACHINE_START(MINI6410, "MINI6410") + /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */ + .boot_params = S3C64XX_PA_SDRAM + 0x100, + .init_irq = s3c6410_init_irq, + .map_io = mini6410_map_io, + .init_machine = mini6410_machine_init, + .timer = &s3c24xx_timer, +MACHINE_END diff --git a/arch/arm/mach-s3c64xx/mach-ncp.c b/arch/arm/mach-s3c64xx/mach-ncp.c index bf65747ea68e..c4986498cd12 100644 --- a/arch/arm/mach-s3c64xx/mach-ncp.c +++ b/arch/arm/mach-s3c64xx/mach-ncp.c @@ -97,8 +97,6 @@ static void __init ncp_machine_init(void) MACHINE_START(NCP, "NCP") /* Maintainer: Samsung Electronics */ - .phys_io = S3C_PA_UART & 0xfff00000, - .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, .boot_params = S3C64XX_PA_SDRAM + 0x100, .init_irq = s3c6410_init_irq, .map_io = ncp_map_io, diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c new file mode 100644 index 000000000000..4957ab0a0d4a --- /dev/null +++ b/arch/arm/mach-s3c64xx/mach-real6410.c @@ -0,0 +1,338 @@ +/* linux/arch/arm/mach-s3c64xx/mach-real6410.c + * + * Copyright 2010 Darius Augulis <augulis.darius@gmail.com> + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * http://armlinux.simtec.co.uk/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * +*/ + +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/fb.h> +#include <linux/gpio.h> +#include <linux/kernel.h> +#include <linux/list.h> +#include <linux/dm9000.h> +#include <linux/mtd/mtd.h> +#include <linux/mtd/partitions.h> +#include <linux/platform_device.h> +#include <linux/serial_core.h> +#include <linux/types.h> + +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/mach/map.h> + +#include <mach/map.h> +#include <mach/regs-fb.h> +#include <mach/regs-gpio.h> +#include <mach/regs-modem.h> +#include <mach/regs-srom.h> +#include <mach/s3c6410.h> + +#include <plat/adc.h> +#include <plat/cpu.h> +#include <plat/devs.h> +#include <plat/fb.h> +#include <plat/nand.h> +#include <plat/regs-serial.h> +#include <plat/ts.h> + +#include <video/platform_lcd.h> + +#define UCON S3C2410_UCON_DEFAULT +#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) +#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) + +static struct s3c2410_uartcfg real6410_uartcfgs[] __initdata = { + [0] = { + .hwport = 0, + .flags = 0, + .ucon = UCON, + .ulcon = ULCON, + .ufcon = UFCON, + }, + [1] = { + .hwport = 1, + .flags = 0, + .ucon = UCON, + .ulcon = ULCON, + .ufcon = UFCON, + }, + [2] = { + .hwport = 2, + .flags = 0, + .ucon = UCON, + .ulcon = ULCON, + .ufcon = UFCON, + }, + [3] = { + .hwport = 3, + .flags = 0, + .ucon = UCON, + .ulcon = ULCON, + .ufcon = UFCON, + }, +}; + +/* DM9000AEP 10/100 ethernet controller */ + +static struct resource real6410_dm9k_resource[] = { + [0] = { + .start = S3C64XX_PA_XM0CSN1, + .end = S3C64XX_PA_XM0CSN1 + 1, + .flags = IORESOURCE_MEM + }, + [1] = { + .start = S3C64XX_PA_XM0CSN1 + 4, + .end = S3C64XX_PA_XM0CSN1 + 5, + .flags = IORESOURCE_MEM + }, + [2] = { + .start = S3C_EINT(7), + .end = S3C_EINT(7), + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL + } +}; + +static struct dm9000_plat_data real6410_dm9k_pdata = { + .flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM), +}; + +static struct platform_device real6410_device_eth = { + .name = "dm9000", + .id = -1, + .num_resources = ARRAY_SIZE(real6410_dm9k_resource), + .resource = real6410_dm9k_resource, + .dev = { + .platform_data = &real6410_dm9k_pdata, + }, +}; + +static struct s3c_fb_pd_win real6410_fb_win[] = { + { + .win_mode = { /* 4.3" 480x272 */ + .left_margin = 3, + .right_margin = 2, + .upper_margin = 1, + .lower_margin = 1, + .hsync_len = 40, + .vsync_len = 1, + .xres = 480, + .yres = 272, + }, + .max_bpp = 32, + .default_bpp = 16, + }, { + .win_mode = { /* 7.0" 800x480 */ + .left_margin = 8, + .right_margin = 13, + .upper_margin = 7, + .lower_margin = 5, + .hsync_len = 3, + .vsync_len = 1, + .xres = 800, + .yres = 480, + }, + .max_bpp = 32, + .default_bpp = 16, + }, +}; + +static struct s3c_fb_platdata real6410_lcd_pdata __initdata = { + .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, + .win[0] = &real6410_fb_win[0], + .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, + .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, +}; + +static struct mtd_partition real6410_nand_part[] = { + [0] = { + .name = "uboot", + .size = SZ_1M, + .offset = 0, + }, + [1] = { + .name = "kernel", + .size = SZ_2M, + .offset = SZ_1M, + }, + [2] = { + .name = "rootfs", + .size = MTDPART_SIZ_FULL, + .offset = SZ_1M + SZ_2M, + }, +}; + +static struct s3c2410_nand_set real6410_nand_sets[] = { + [0] = { + .name = "nand", + .nr_chips = 1, + .nr_partitions = ARRAY_SIZE(real6410_nand_part), + .partitions = real6410_nand_part, + }, +}; + +static struct s3c2410_platform_nand real6410_nand_info = { + .tacls = 25, + .twrph0 = 55, + .twrph1 = 40, + .nr_sets = ARRAY_SIZE(real6410_nand_sets), + .sets = real6410_nand_sets, +}; + +static struct platform_device *real6410_devices[] __initdata = { + &real6410_device_eth, + &s3c_device_hsmmc0, + &s3c_device_hsmmc1, + &s3c_device_fb, + &s3c_device_nand, + &s3c_device_adc, + &s3c_device_ts, + &s3c_device_ohci, +}; + +static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = { + .delay = 10000, + .presc = 49, + .oversampling_shift = 2, +}; + +static void __init real6410_map_io(void) +{ + u32 tmp; + + s3c64xx_init_io(NULL, 0); + s3c24xx_init_clocks(12000000); + s3c24xx_init_uarts(real6410_uartcfgs, ARRAY_SIZE(real6410_uartcfgs)); + + /* set the LCD type */ + tmp = __raw_readl(S3C64XX_SPCON); + tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK; + tmp |= S3C64XX_SPCON_LCD_SEL_RGB; + __raw_writel(tmp, S3C64XX_SPCON); + + /* remove the LCD bypass */ + tmp = __raw_readl(S3C64XX_MODEM_MIFPCON); + tmp &= ~MIFPCON_LCD_BYPASS; + __raw_writel(tmp, S3C64XX_MODEM_MIFPCON); +} + +/* + * real6410_features string + * + * 0-9 LCD configuration + * + */ +static char real6410_features_str[12] __initdata = "0"; + +static int __init real6410_features_setup(char *str) +{ + if (str) + strlcpy(real6410_features_str, str, + sizeof(real6410_features_str)); + return 1; +} + +__setup("real6410=", real6410_features_setup); + +#define FEATURE_SCREEN (1 << 0) + +struct real6410_features_t { + int done; + int lcd_index; +}; + +static void real6410_parse_features( + struct real6410_features_t *features, + const char *features_str) +{ + const char *fp = features_str; + + features->done = 0; + features->lcd_index = 0; + + while (*fp) { + char f = *fp++; + + switch (f) { + case '0'...'9': /* tft screen */ + if (features->done & FEATURE_SCREEN) { + printk(KERN_INFO "REAL6410: '%c' ignored, " + "screen type already set\n", f); + } else { + int li = f - '0'; + if (li >= ARRAY_SIZE(real6410_fb_win)) + printk(KERN_INFO "REAL6410: '%c' out " + "of range LCD mode\n", f); + else { + features->lcd_index = li; + } + } + features->done |= FEATURE_SCREEN; + break; + } + } +} + +static void __init real6410_machine_init(void) +{ + u32 cs1; + struct real6410_features_t features = { 0 }; + + printk(KERN_INFO "REAL6410: Option string real6410=%s\n", + real6410_features_str); + + /* Parse the feature string */ + real6410_parse_features(&features, real6410_features_str); + + real6410_lcd_pdata.win[0] = &real6410_fb_win[features.lcd_index]; + + printk(KERN_INFO "REAL6410: selected LCD display is %dx%d\n", + real6410_lcd_pdata.win[0]->win_mode.xres, + real6410_lcd_pdata.win[0]->win_mode.yres); + + s3c_fb_set_platdata(&real6410_lcd_pdata); + s3c_nand_set_platdata(&real6410_nand_info); + s3c24xx_ts_set_platdata(&s3c_ts_platform); + + /* configure nCS1 width to 16 bits */ + + cs1 = __raw_readl(S3C64XX_SROM_BW) & + ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT); + cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) | + (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) | + (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) << + S3C64XX_SROM_BW__NCS1__SHIFT; + __raw_writel(cs1, S3C64XX_SROM_BW); + + /* set timing for nCS1 suitable for ethernet chip */ + + __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) | + (6 << S3C64XX_SROM_BCX__TACP__SHIFT) | + (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) | + (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) | + (13 << S3C64XX_SROM_BCX__TACC__SHIFT) | + (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) | + (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1); + + gpio_request(S3C64XX_GPF(15), "LCD power"); + + platform_add_devices(real6410_devices, ARRAY_SIZE(real6410_devices)); +} + +MACHINE_START(REAL6410, "REAL6410") + /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */ + .boot_params = S3C64XX_PA_SDRAM + 0x100, + + .init_irq = s3c6410_init_irq, + .map_io = real6410_map_io, + .init_machine = real6410_machine_init, + .timer = &s3c24xx_timer, +MACHINE_END diff --git a/arch/arm/mach-s3c64xx/mach-smartq.c b/arch/arm/mach-s3c64xx/mach-smartq.c index 028d080dcd35..cb1ebeb08763 100644 --- a/arch/arm/mach-s3c64xx/mach-smartq.c +++ b/arch/arm/mach-s3c64xx/mach-smartq.c @@ -16,6 +16,7 @@ #include <linux/platform_device.h> #include <linux/pwm_backlight.h> #include <linux/serial_core.h> +#include <linux/spi/spi_gpio.h> #include <linux/usb/gpio_vbus.h> #include <asm/mach-types.h> @@ -135,7 +136,7 @@ static struct platform_device smartq_usb_otg_vbus_dev = { .dev.platform_data = &smartq_usb_otg_vbus_pdata, }; -static int __init smartq_bl_init(struct device *dev) +static int smartq_bl_init(struct device *dev) { s3c_gpio_cfgpin(S3C64XX_GPF(15), S3C_GPIO_SFN(2)); @@ -166,7 +167,7 @@ static struct s3c2410_ts_mach_info smartq_touchscreen_pdata __initdata = { static struct s3c_sdhci_platdata smartq_internal_hsmmc_pdata = { .max_width = 4, - /*.broken_card_detection = true,*/ + .cd_type = S3C_SDHCI_CD_PERMANENT, }; static struct s3c_hwmon_pdata smartq_hwmon_pdata __initdata = { @@ -184,6 +185,33 @@ static struct s3c_hwmon_pdata smartq_hwmon_pdata __initdata = { }, }; +static int __init smartq_lcd_setup_gpio(void) +{ + int ret; + + ret = gpio_request(S3C64XX_GPM(3), "LCD power"); + if (ret < 0) + return ret; + + /* turn power off */ + gpio_direction_output(S3C64XX_GPM(3), 0); + + return 0; +} + +/* GPM0 -> CS */ +static struct spi_gpio_platform_data smartq_lcd_control = { + .sck = S3C64XX_GPM(1), + .mosi = S3C64XX_GPM(2), + .miso = S3C64XX_GPM(2), +}; + +static struct platform_device smartq_lcd_control_device = { + .name = "spi-gpio", + .id = 1, + .dev.platform_data = &smartq_lcd_control, +}; + static void smartq_lcd_power_set(struct plat_lcd_data *pd, unsigned int power) { gpio_direction_output(S3C64XX_GPM(3), power); @@ -199,6 +227,9 @@ static struct platform_device smartq_lcd_power_device = { .dev.platform_data = &smartq_lcd_power_data, }; +static struct i2c_board_info smartq_i2c_devs[] __initdata = { + { I2C_BOARD_INFO("wm8987", 0x1a), }, +}; static struct platform_device *smartq_devices[] __initdata = { &s3c_device_hsmmc1, /* Init iNAND first, ... */ @@ -213,7 +244,9 @@ static struct platform_device *smartq_devices[] __initdata = { &s3c_device_timer[1], &s3c_device_ts, &s3c_device_usb_hsotg, + &s3c64xx_device_iis0, &smartq_backlight_device, + &smartq_lcd_control_device, &smartq_lcd_power_device, &smartq_usb_otg_vbus_dev, }; @@ -252,7 +285,6 @@ static int __init smartq_power_off_init(void) /* leave power on */ gpio_direction_output(S3C64XX_GPK(15), 0); - pm_power_off = smartq_power_off; return ret; @@ -354,6 +386,10 @@ void __init smartq_machine_init(void) s3c_sdhci2_set_platdata(&smartq_internal_hsmmc_pdata); s3c24xx_ts_set_platdata(&smartq_touchscreen_pdata); + i2c_register_board_info(0, smartq_i2c_devs, + ARRAY_SIZE(smartq_i2c_devs)); + + WARN_ON(smartq_lcd_setup_gpio()); WARN_ON(smartq_power_off_init()); WARN_ON(smartq_usb_host_init()); WARN_ON(smartq_usb_otg_init()); diff --git a/arch/arm/mach-s3c64xx/mach-smartq5.c b/arch/arm/mach-s3c64xx/mach-smartq5.c index 1d0326ead90f..3a3e5acde523 100644 --- a/arch/arm/mach-s3c64xx/mach-smartq5.c +++ b/arch/arm/mach-s3c64xx/mach-smartq5.c @@ -12,7 +12,6 @@ #include <linux/fb.h> #include <linux/gpio.h> #include <linux/gpio_keys.h> -#include <linux/i2c-gpio.h> #include <linux/init.h> #include <linux/input.h> #include <linux/leds.h> @@ -33,32 +32,7 @@ #include "mach-smartq.h" -static void __init smartq5_lcd_setup_gpio(void) -{ - gpio_request(S3C64XX_GPM(0), "LCD SCEN pin"); - gpio_request(S3C64XX_GPM(1), "LCD SCL pin"); - gpio_request(S3C64XX_GPM(2), "LCD SDA pin"); - gpio_request(S3C64XX_GPM(3), "LCD power"); - - /* turn power off */ - gpio_direction_output(S3C64XX_GPM(0), 1); - gpio_direction_input(S3C64XX_GPM(1)); - gpio_direction_input(S3C64XX_GPM(2)); - gpio_direction_output(S3C64XX_GPM(3), 0); -} - -static struct i2c_gpio_platform_data smartq5_lcd_control = { - .sda_pin = S3C64XX_GPM(2), - .scl_pin = S3C64XX_GPM(1), -}; - -static struct platform_device smartq5_lcd_control_device = { - .name = "i2c-gpio", - .id = 1, - .dev.platform_data = &smartq5_lcd_control, -}; - -static struct gpio_led smartq5_leds[] __initdata = { +static struct gpio_led smartq5_leds[] = { { .name = "smartq5:green", .active_low = 1, @@ -134,16 +108,15 @@ static struct platform_device smartq5_buttons_device = { static struct s3c_fb_pd_win smartq5_fb_win0 = { .win_mode = { - .pixclock = 1000000000000ULL / - ((40+1+216+800)*(10+1+35+480)*80), - .left_margin = 40, - .right_margin = 216, - .upper_margin = 10, - .lower_margin = 35, + .left_margin = 216, + .right_margin = 40, + .upper_margin = 35, + .lower_margin = 10, .hsync_len = 1, .vsync_len = 1, .xres = 800, .yres = 480, + .refresh = 80, }, .max_bpp = 32, .default_bpp = 16, @@ -160,7 +133,6 @@ static struct s3c_fb_platdata smartq5_lcd_pdata __initdata = { static struct platform_device *smartq5_devices[] __initdata = { &smartq5_leds_device, &smartq5_buttons_device, - &smartq5_lcd_control_device, }; static void __init smartq5_machine_init(void) @@ -168,15 +140,12 @@ static void __init smartq5_machine_init(void) s3c_fb_set_platdata(&smartq5_lcd_pdata); smartq_machine_init(); - smartq5_lcd_setup_gpio(); platform_add_devices(smartq5_devices, ARRAY_SIZE(smartq5_devices)); } MACHINE_START(SMARTQ5, "SmartQ 5") /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */ - .phys_io = S3C_PA_UART & 0xfff00000, - .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, .boot_params = S3C64XX_PA_SDRAM + 0x100, .init_irq = s3c6410_init_irq, .map_io = smartq_map_io, diff --git a/arch/arm/mach-s3c64xx/mach-smartq7.c b/arch/arm/mach-s3c64xx/mach-smartq7.c index e0bc78ecb156..e65375877d53 100644 --- a/arch/arm/mach-s3c64xx/mach-smartq7.c +++ b/arch/arm/mach-s3c64xx/mach-smartq7.c @@ -12,7 +12,6 @@ #include <linux/fb.h> #include <linux/gpio.h> #include <linux/gpio_keys.h> -#include <linux/i2c-gpio.h> #include <linux/init.h> #include <linux/input.h> #include <linux/leds.h> @@ -33,32 +32,7 @@ #include "mach-smartq.h" -static void __init smartq7_lcd_setup_gpio(void) -{ - gpio_request(S3C64XX_GPM(0), "LCD CSB pin"); - gpio_request(S3C64XX_GPM(3), "LCD power"); - gpio_request(S3C64XX_GPM(4), "LCD power status"); - - /* turn power off */ - gpio_direction_output(S3C64XX_GPM(0), 1); - gpio_direction_output(S3C64XX_GPM(3), 0); - gpio_direction_input(S3C64XX_GPM(4)); -} - -static struct i2c_gpio_platform_data smartq7_lcd_control = { - .sda_pin = S3C64XX_GPM(2), - .scl_pin = S3C64XX_GPM(1), - .sda_is_open_drain = 1, - .scl_is_open_drain = 1, -}; - -static struct platform_device smartq7_lcd_control_device = { - .name = "i2c-gpio", - .id = 1, - .dev.platform_data = &smartq7_lcd_control, -}; - -static struct gpio_led smartq7_leds[] __initdata = { +static struct gpio_led smartq7_leds[] = { { .name = "smartq7:red", .active_low = 1, @@ -150,8 +124,6 @@ static struct platform_device smartq7_buttons_device = { static struct s3c_fb_pd_win smartq7_fb_win0 = { .win_mode = { - .pixclock = 1000000000000ULL / - ((3+10+5+800)*(1+3+20+480)*80), .left_margin = 3, .right_margin = 5, .upper_margin = 1, @@ -160,6 +132,7 @@ static struct s3c_fb_pd_win smartq7_fb_win0 = { .vsync_len = 3, .xres = 800, .yres = 480, + .refresh = 80, }, .max_bpp = 32, .default_bpp = 16, @@ -176,7 +149,6 @@ static struct s3c_fb_platdata smartq7_lcd_pdata __initdata = { static struct platform_device *smartq7_devices[] __initdata = { &smartq7_leds_device, &smartq7_buttons_device, - &smartq7_lcd_control_device, }; static void __init smartq7_machine_init(void) @@ -184,15 +156,12 @@ static void __init smartq7_machine_init(void) s3c_fb_set_platdata(&smartq7_lcd_pdata); smartq_machine_init(); - smartq7_lcd_setup_gpio(); platform_add_devices(smartq7_devices, ARRAY_SIZE(smartq7_devices)); } MACHINE_START(SMARTQ7, "SmartQ 7") /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */ - .phys_io = S3C_PA_UART & 0xfff00000, - .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, .boot_params = S3C64XX_PA_SDRAM + 0x100, .init_irq = s3c6410_init_irq, .map_io = smartq_map_io, diff --git a/arch/arm/mach-s3c64xx/mach-smdk6400.c b/arch/arm/mach-s3c64xx/mach-smdk6400.c index 59916676d8d2..3cca642f1e6d 100644 --- a/arch/arm/mach-s3c64xx/mach-smdk6400.c +++ b/arch/arm/mach-s3c64xx/mach-smdk6400.c @@ -85,8 +85,6 @@ static void __init smdk6400_machine_init(void) MACHINE_START(SMDK6400, "SMDK6400") /* Maintainer: Ben Dooks <ben-linux@fluff.org> */ - .phys_io = S3C_PA_UART & 0xfff00000, - .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, .boot_params = S3C64XX_PA_SDRAM + 0x100, .init_irq = s3c6400_init_irq, diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c index d9a03555f88b..77488facfe4c 100644 --- a/arch/arm/mach-s3c64xx/mach-smdk6410.c +++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c @@ -17,6 +17,7 @@ #include <linux/list.h> #include <linux/timer.h> #include <linux/init.h> +#include <linux/input.h> #include <linux/serial_core.h> #include <linux/platform_device.h> #include <linux/io.h> @@ -56,6 +57,7 @@ #include <mach/regs-gpio.h> #include <mach/regs-sys.h> #include <mach/regs-srom.h> +#include <plat/ata.h> #include <plat/iic.h> #include <plat/fb.h> #include <plat/gpio-cfg.h> @@ -66,6 +68,7 @@ #include <plat/cpu.h> #include <plat/adc.h> #include <plat/ts.h> +#include <plat/keypad.h> #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB @@ -141,7 +144,6 @@ static struct platform_device smdk6410_lcd_powerdev = { static struct s3c_fb_pd_win smdk6410_fb_win0 = { /* this is to ensure we use win0 */ .win_mode = { - .pixclock = 41094, .left_margin = 8, .right_margin = 13, .upper_margin = 7, @@ -153,6 +155,8 @@ static struct s3c_fb_pd_win smdk6410_fb_win0 = { }, .max_bpp = 32, .default_bpp = 16, + .virtual_y = 480 * 2, + .virtual_x = 800, }; /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */ @@ -242,6 +246,29 @@ static struct platform_device smdk6410_b_pwr_5v = { }; #endif +static struct s3c_ide_platdata smdk6410_ide_pdata __initdata = { + .setup_gpio = s3c64xx_ide_setup_gpio, +}; + +static uint32_t smdk6410_keymap[] __initdata = { + /* KEY(row, col, keycode) */ + KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3), + KEY(0, 6, KEY_4), KEY(0, 7, KEY_5), + KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C), + KEY(1, 6, KEY_D), KEY(1, 7, KEY_E) +}; + +static struct matrix_keymap_data smdk6410_keymap_data __initdata = { + .keymap = smdk6410_keymap, + .keymap_size = ARRAY_SIZE(smdk6410_keymap), +}; + +static struct samsung_keypad_platdata smdk6410_keypad_data __initdata = { + .keymap_data = &smdk6410_keymap_data, + .rows = 2, + .cols = 8, +}; + static struct map_desc smdk6410_iodesc[] = {}; static struct platform_device *smdk6410_devices[] __initdata = { @@ -256,7 +283,9 @@ static struct platform_device *smdk6410_devices[] __initdata = { &s3c_device_fb, &s3c_device_ohci, &s3c_device_usb_hsotg, + &s3c_device_pcm, &s3c64xx_device_iisv4, + &samsung_device_keypad, #ifdef CONFIG_REGULATOR &smdk6410_b_pwr_5v, @@ -265,6 +294,8 @@ static struct platform_device *smdk6410_devices[] __initdata = { &smdk6410_smsc911x, &s3c_device_adc, + &s3c_device_cfcon, + &s3c_device_rtc, &s3c_device_ts, &s3c_device_wdt, }; @@ -636,6 +667,8 @@ static void __init smdk6410_machine_init(void) s3c_i2c1_set_platdata(NULL); s3c_fb_set_platdata(&smdk6410_lcd_pdata); + samsung_keypad_set_platdata(&smdk6410_keypad_data); + s3c24xx_ts_set_platdata(&s3c_ts_platform); /* configure nCS1 width to 16 bits */ @@ -665,13 +698,13 @@ static void __init smdk6410_machine_init(void) i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0)); i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1)); + s3c_ide_set_platdata(&smdk6410_ide_pdata); + platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices)); } MACHINE_START(SMDK6410, "SMDK6410") /* Maintainer: Ben Dooks <ben-linux@fluff.org> */ - .phys_io = S3C_PA_UART & 0xfff00000, - .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, .boot_params = S3C64XX_PA_SDRAM + 0x100, .init_irq = s3c6410_init_irq, diff --git a/arch/arm/mach-s3c64xx/s3c6410.c b/arch/arm/mach-s3c64xx/s3c6410.c index 014401c39f36..312aa6b115e8 100644 --- a/arch/arm/mach-s3c64xx/s3c6410.c +++ b/arch/arm/mach-s3c64xx/s3c6410.c @@ -37,8 +37,9 @@ #include <plat/devs.h> #include <plat/clock.h> #include <plat/sdhci.h> +#include <plat/ata-core.h> +#include <plat/adc-core.h> #include <plat/iic-core.h> -#include <plat/adc.h> #include <plat/onenand-core.h> #include <mach/s3c6400.h> #include <mach/s3c6410.h> @@ -54,10 +55,11 @@ void __init s3c6410_map_io(void) s3c_i2c0_setname("s3c2440-i2c"); s3c_i2c1_setname("s3c2440-i2c"); - s3c_device_adc.name = "s3c64xx-adc"; + s3c_adc_setname("s3c64xx-adc"); s3c_device_nand.name = "s3c6400-nand"; s3c_onenand_setname("s3c6410-onenand"); s3c64xx_onenand1_setname("s3c6410-onenand"); + s3c_cfcon_setname("s3c64xx-pata"); } void __init s3c6410_init_clocks(int xtal) diff --git a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c index 8e28e448dd20..8f3091182f9c 100644 --- a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c +++ b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c @@ -15,23 +15,14 @@ #include <linux/kernel.h> #include <linux/types.h> #include <linux/fb.h> +#include <linux/gpio.h> #include <mach/regs-fb.h> -#include <mach/gpio.h> #include <plat/fb.h> #include <plat/gpio-cfg.h> extern void s3c64xx_fb_gpio_setup_24bpp(void) { - unsigned int gpio; - - for (gpio = S3C64XX_GPI(0); gpio <= S3C64XX_GPI(15); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } - - for (gpio = S3C64XX_GPJ(0); gpio <= S3C64XX_GPJ(11); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } + s3c_gpio_cfgrange_nopull(S3C64XX_GPI(0), 16, S3C_GPIO_SFN(2)); + s3c_gpio_cfgrange_nopull(S3C64XX_GPJ(0), 12, S3C_GPIO_SFN(2)); } diff --git a/arch/arm/mach-s3c64xx/setup-i2c0.c b/arch/arm/mach-s3c64xx/setup-i2c0.c index d1b11e6e77e8..406192a43c6e 100644 --- a/arch/arm/mach-s3c64xx/setup-i2c0.c +++ b/arch/arm/mach-s3c64xx/setup-i2c0.c @@ -14,10 +14,10 @@ #include <linux/kernel.h> #include <linux/types.h> +#include <linux/gpio.h> struct platform_device; /* don't need the contents */ -#include <mach/gpio.h> #include <mach/gpio-bank-b.h> #include <plat/iic.h> #include <plat/gpio-cfg.h> diff --git a/arch/arm/mach-s3c64xx/setup-i2c1.c b/arch/arm/mach-s3c64xx/setup-i2c1.c index 2dce57d8c6f8..1ee62c97cd7f 100644 --- a/arch/arm/mach-s3c64xx/setup-i2c1.c +++ b/arch/arm/mach-s3c64xx/setup-i2c1.c @@ -14,10 +14,10 @@ #include <linux/kernel.h> #include <linux/types.h> +#include <linux/gpio.h> struct platform_device; /* don't need the contents */ -#include <mach/gpio.h> #include <mach/gpio-bank-b.h> #include <plat/iic.h> #include <plat/gpio-cfg.h> diff --git a/arch/arm/mach-s3c64xx/setup-ide.c b/arch/arm/mach-s3c64xx/setup-ide.c new file mode 100644 index 000000000000..41b425602d88 --- /dev/null +++ b/arch/arm/mach-s3c64xx/setup-ide.c @@ -0,0 +1,43 @@ +/* linux/arch/arm/mach-s3c64xx/setup-ide.c + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S3C64XX setup information for IDE + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <linux/kernel.h> +#include <linux/gpio.h> +#include <linux/io.h> + +#include <mach/map.h> +#include <mach/regs-clock.h> +#include <plat/gpio-cfg.h> +#include <plat/ata.h> + +void s3c64xx_ide_setup_gpio(void) +{ + u32 reg; + + reg = readl(S3C_MEM_SYS_CFG) & (~0x3f); + + /* Independent CF interface, CF chip select configuration */ + writel(reg | MEM_SYS_CFG_INDEP_CF | + MEM_SYS_CFG_EBI_FIX_PRI_CFCON, S3C_MEM_SYS_CFG); + + s3c_gpio_cfgpin(S3C64XX_GPB(4), S3C_GPIO_SFN(4)); + + /* Set XhiDATA[15:0] pins as CF Data[15:0] */ + s3c_gpio_cfgpin_range(S3C64XX_GPK(0), 16, S3C_GPIO_SFN(5)); + + /* Set XhiADDR[2:0] pins as CF ADDR[2:0] */ + s3c_gpio_cfgpin_range(S3C64XX_GPL(0), 3, S3C_GPIO_SFN(6)); + + /* Set Xhi ctrl pins as CF ctrl pins(IORDY, IOWR, IORD, CE[0:1]) */ + s3c_gpio_cfgpin(S3C64XX_GPM(5), S3C_GPIO_SFN(1)); + s3c_gpio_cfgpin_range(S3C64XX_GPM(0), 5, S3C_GPIO_SFN(6)); +} diff --git a/arch/arm/mach-s3c64xx/setup-keypad.c b/arch/arm/mach-s3c64xx/setup-keypad.c new file mode 100644 index 000000000000..f8ed0d22db70 --- /dev/null +++ b/arch/arm/mach-s3c64xx/setup-keypad.c @@ -0,0 +1,24 @@ +/* linux/arch/arm/mach-s3c64xx/setup-keypad.c + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * GPIO configuration for S3C64XX KeyPad device + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <linux/gpio.h> +#include <plat/gpio-cfg.h> +#include <plat/keypad.h> + +void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols) +{ + /* Set all the necessary GPK pins to special-function 3: KP_ROW[x] */ + s3c_gpio_cfgrange_nopull(S3C64XX_GPK(8), 8 + rows, S3C_GPIO_SFN(3)); + + /* Set all the necessary GPL pins to special-function 3: KP_COL[x] */ + s3c_gpio_cfgrange_nopull(S3C64XX_GPL(0), cols, S3C_GPIO_SFN(3)); +} diff --git a/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c b/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c index a58c0cc7ba5e..6eac071afae2 100644 --- a/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c +++ b/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c @@ -16,60 +16,42 @@ #include <linux/interrupt.h> #include <linux/platform_device.h> #include <linux/io.h> +#include <linux/gpio.h> -#include <mach/gpio.h> #include <plat/gpio-cfg.h> +#include <plat/sdhci.h> void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) { - unsigned int gpio; - unsigned int end; + struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; - end = S3C64XX_GPG(2 + width); + /* Set all the necessary GPG pins to special-function 2 */ + s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2)); - /* Set all the necessary GPG pins to special-function 0 */ - for (gpio = S3C64XX_GPG(0); gpio < end; gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); + if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { + s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); + s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(2)); } - - s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(2)); } void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) { - unsigned int gpio; - unsigned int end; + struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; - end = S3C64XX_GPH(2 + width); + /* Set all the necessary GPH pins to special-function 2 */ + s3c_gpio_cfgrange_nopull(S3C64XX_GPH(0), 2 + width, S3C_GPIO_SFN(2)); - /* Set all the necessary GPG pins to special-function 0 */ - for (gpio = S3C64XX_GPH(0); gpio < end; gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); + if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { + s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); + s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(3)); } - - s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(3)); } void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) { - unsigned int gpio; - unsigned int end; - - end = S3C64XX_GPH(6 + width); + /* Set all the necessary GPH pins to special-function 3 */ + s3c_gpio_cfgrange_nopull(S3C64XX_GPH(6), width, S3C_GPIO_SFN(3)); - /* Set all the necessary GPH pins to special-function 1 */ - for (gpio = S3C64XX_GPH(6); gpio < end; gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } - - /* Set all the necessary GPC pins to special-function 1 */ - for (gpio = S3C64XX_GPC(4); gpio < S3C64XX_GPC(6); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } + /* Set all the necessary GPC pins to special-function 3 */ + s3c_gpio_cfgrange_nopull(S3C64XX_GPC(4), 2, S3C_GPIO_SFN(3)); } |
