diff options
Diffstat (limited to 'arch/arm/mach-s3c24xx')
-rw-r--r-- | arch/arm/mach-s3c24xx/Makefile | 6 | ||||
-rw-r--r-- | arch/arm/mach-s3c24xx/bast-ide.c | 36 | ||||
-rw-r--r-- | arch/arm/mach-s3c24xx/common.c | 303 | ||||
-rw-r--r-- | arch/arm/mach-s3c24xx/irq-pm.c | 95 | ||||
-rw-r--r-- | arch/arm/mach-s3c24xx/mach-amlm5900.c | 9 | ||||
-rw-r--r-- | arch/arm/mach-s3c24xx/mach-anubis.c | 62 | ||||
-rw-r--r-- | arch/arm/mach-s3c24xx/mach-at2440evb.c | 19 | ||||
-rw-r--r-- | arch/arm/mach-s3c24xx/mach-bast.c | 45 | ||||
-rw-r--r-- | arch/arm/mach-s3c24xx/mach-gta02.c | 7 | ||||
-rw-r--r-- | arch/arm/mach-s3c24xx/mach-h1940.c | 9 | ||||
-rw-r--r-- | arch/arm/mach-s3c24xx/mach-mini2440.c | 19 | ||||
-rw-r--r-- | arch/arm/mach-s3c24xx/mach-nexcoder.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-s3c24xx/mach-osiris.c | 12 | ||||
-rw-r--r-- | arch/arm/mach-s3c24xx/mach-otom.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-s3c24xx/mach-qt2410.c | 12 | ||||
-rw-r--r-- | arch/arm/mach-s3c24xx/mach-rx1950.c | 9 | ||||
-rw-r--r-- | arch/arm/mach-s3c24xx/mach-tct_hammer.c | 7 | ||||
-rw-r--r-- | arch/arm/mach-s3c24xx/mach-vr1000.c | 39 | ||||
-rw-r--r-- | arch/arm/mach-s3c24xx/pm.c | 149 | ||||
-rw-r--r-- | arch/arm/mach-s3c24xx/simtec-nor.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-s3c24xx/sleep.S | 84 |
21 files changed, 696 insertions, 244 deletions
diff --git a/arch/arm/mach-s3c24xx/Makefile b/arch/arm/mach-s3c24xx/Makefile index 3518fe812d5f..270a0b6f4f22 100644 --- a/arch/arm/mach-s3c24xx/Makefile +++ b/arch/arm/mach-s3c24xx/Makefile @@ -14,6 +14,8 @@ obj- := # core +obj-y += common.o + obj-$(CONFIG_CPU_S3C2410) += s3c2410.o obj-$(CONFIG_S3C2410_DMA) += dma-s3c2410.o obj-$(CONFIG_S3C2410_PM) += pm-s3c2410.o sleep-s3c2410.o @@ -33,6 +35,10 @@ obj-$(CONFIG_S3C2440_DMA) += dma-s3c2440.o obj-$(CONFIG_CPU_S3C2443) += s3c2443.o irq-s3c2443.o clock-s3c2443.o +# PM + +obj-$(CONFIG_PM) += pm.o irq-pm.o sleep.o + # common code obj-$(CONFIG_S3C2443_COMMON) += common-s3c2443.o diff --git a/arch/arm/mach-s3c24xx/bast-ide.c b/arch/arm/mach-s3c24xx/bast-ide.c index 298ececfa366..ba02cf8d80a2 100644 --- a/arch/arm/mach-s3c24xx/bast-ide.c +++ b/arch/arm/mach-s3c24xx/bast-ide.c @@ -37,21 +37,9 @@ static struct pata_platform_info bast_ide_platdata = { #define IDE_CS S3C2410_CS5 static struct resource bast_ide0_resource[] = { - [0] = { - .start = IDE_CS + BAST_PA_IDEPRI, - .end = IDE_CS + BAST_PA_IDEPRI + (8 * 0x20) - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IDE_CS + BAST_PA_IDEPRIAUX + (6 * 0x20) , - .end = IDE_CS + BAST_PA_IDEPRIAUX + (7 * 0x20) - 1, - .flags = IORESOURCE_MEM, - }, - [2] = { - .start = IRQ_IDE0, - .end = IRQ_IDE0, - .flags = IORESOURCE_IRQ, - }, + [0] = DEFINE_RES_MEM(IDE_CS + BAST_PA_IDEPRI, 8 * 0x20), + [1] = DEFINE_RES_MEM(IDE_CS + BAST_PA_IDEPRIAUX + (6 * 0x20), 0x20), + [2] = DEFINE_RES_IRQ(IRQ_IDE0), }; static struct platform_device bast_device_ide0 = { @@ -67,21 +55,9 @@ static struct platform_device bast_device_ide0 = { }; static struct resource bast_ide1_resource[] = { - [0] = { - .start = IDE_CS + BAST_PA_IDESEC, - .end = IDE_CS + BAST_PA_IDESEC + (8 * 0x20) - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IDE_CS + BAST_PA_IDESECAUX + (6 * 0x20), - .end = IDE_CS + BAST_PA_IDESECAUX + (7 * 0x20) - 1, - .flags = IORESOURCE_MEM, - }, - [2] = { - .start = IRQ_IDE1, - .end = IRQ_IDE1, - .flags = IORESOURCE_IRQ, - }, + [0] = DEFINE_RES_MEM(IDE_CS + BAST_PA_IDESEC, 8 * 0x20), + [1] = DEFINE_RES_MEM(IDE_CS + BAST_PA_IDESECAUX + (6 * 0x20), 0x20), + [2] = DEFINE_RES_IRQ(IRQ_IDE1), }; static struct platform_device bast_device_ide1 = { diff --git a/arch/arm/mach-s3c24xx/common.c b/arch/arm/mach-s3c24xx/common.c new file mode 100644 index 000000000000..56cdd34cce41 --- /dev/null +++ b/arch/arm/mach-s3c24xx/common.c @@ -0,0 +1,303 @@ +/* linux/arch/arm/plat-s3c24xx/cpu.c + * + * Copyright (c) 2004-2005 Simtec Electronics + * http://www.simtec.co.uk/products/SWLINUX/ + * Ben Dooks <ben@simtec.co.uk> + * + * Common code for S3C24XX machines + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +*/ + + +#include <linux/init.h> +#include <linux/module.h> +#include <linux/interrupt.h> +#include <linux/ioport.h> +#include <linux/serial_core.h> +#include <linux/platform_device.h> +#include <linux/delay.h> +#include <linux/io.h> + +#include <mach/hardware.h> +#include <mach/regs-clock.h> +#include <asm/irq.h> +#include <asm/cacheflush.h> +#include <asm/system_info.h> +#include <asm/system_misc.h> + +#include <asm/mach/arch.h> +#include <asm/mach/map.h> + +#include <mach/regs-clock.h> +#include <mach/regs-gpio.h> +#include <plat/regs-serial.h> + +#include <plat/cpu.h> +#include <plat/devs.h> +#include <plat/clock.h> +#include <plat/s3c2410.h> +#include <plat/s3c2412.h> +#include <plat/s3c2416.h> +#include <plat/s3c244x.h> +#include <plat/s3c2443.h> +#include <plat/cpu-freq.h> +#include <plat/pll.h> + +/* table of supported CPUs */ + +static const char name_s3c2410[] = "S3C2410"; +static const char name_s3c2412[] = "S3C2412"; +static const char name_s3c2416[] = "S3C2416/S3C2450"; +static const char name_s3c2440[] = "S3C2440"; +static const char name_s3c2442[] = "S3C2442"; +static const char name_s3c2442b[] = "S3C2442B"; +static const char name_s3c2443[] = "S3C2443"; +static const char name_s3c2410a[] = "S3C2410A"; +static const char name_s3c2440a[] = "S3C2440A"; + +static struct cpu_table cpu_ids[] __initdata = { + { + .idcode = 0x32410000, + .idmask = 0xffffffff, + .map_io = s3c2410_map_io, + .init_clocks = s3c2410_init_clocks, + .init_uarts = s3c2410_init_uarts, + .init = s3c2410_init, + .name = name_s3c2410 + }, + { + .idcode = 0x32410002, + .idmask = 0xffffffff, + .map_io = s3c2410_map_io, + .init_clocks = s3c2410_init_clocks, + .init_uarts = s3c2410_init_uarts, + .init = s3c2410a_init, + .name = name_s3c2410a + }, + { + .idcode = 0x32440000, + .idmask = 0xffffffff, + .map_io = s3c2440_map_io, + .init_clocks = s3c244x_init_clocks, + .init_uarts = s3c244x_init_uarts, + .init = s3c2440_init, + .name = name_s3c2440 + }, + { + .idcode = 0x32440001, + .idmask = 0xffffffff, + .map_io = s3c2440_map_io, + .init_clocks = s3c244x_init_clocks, + .init_uarts = s3c244x_init_uarts, + .init = s3c2440_init, + .name = name_s3c2440a + }, + { + .idcode = 0x32440aaa, + .idmask = 0xffffffff, + .map_io = s3c2442_map_io, + .init_clocks = s3c244x_init_clocks, + .init_uarts = s3c244x_init_uarts, + .init = s3c2442_init, + .name = name_s3c2442 + }, + { + .idcode = 0x32440aab, + .idmask = 0xffffffff, + .map_io = s3c2442_map_io, + .init_clocks = s3c244x_init_clocks, + .init_uarts = s3c244x_init_uarts, + .init = s3c2442_init, + .name = name_s3c2442b + }, + { + .idcode = 0x32412001, + .idmask = 0xffffffff, + .map_io = s3c2412_map_io, + .init_clocks = s3c2412_init_clocks, + .init_uarts = s3c2412_init_uarts, + .init = s3c2412_init, + .name = name_s3c2412, + }, + { /* a newer version of the s3c2412 */ + .idcode = 0x32412003, + .idmask = 0xffffffff, + .map_io = s3c2412_map_io, + .init_clocks = s3c2412_init_clocks, + .init_uarts = s3c2412_init_uarts, + .init = s3c2412_init, + .name = name_s3c2412, + }, + { /* a strange version of the s3c2416 */ + .idcode = 0x32450003, + .idmask = 0xffffffff, + .map_io = s3c2416_map_io, + .init_clocks = s3c2416_init_clocks, + .init_uarts = s3c2416_init_uarts, + .init = s3c2416_init, + .name = name_s3c2416, + }, + { + .idcode = 0x32443001, + .idmask = 0xffffffff, + .map_io = s3c2443_map_io, + .init_clocks = s3c2443_init_clocks, + .init_uarts = s3c2443_init_uarts, + .init = s3c2443_init, + .name = name_s3c2443, + }, +}; + +/* minimal IO mapping */ + +static struct map_desc s3c_iodesc[] __initdata = { + IODESC_ENT(GPIO), + IODESC_ENT(IRQ), + IODESC_ENT(MEMCTRL), + IODESC_ENT(UART) +}; + +/* read cpu identificaiton code */ + +static unsigned long s3c24xx_read_idcode_v5(void) +{ +#if defined(CONFIG_CPU_S3C2416) + /* s3c2416 is v5, with S3C24XX_GSTATUS1 instead of S3C2412_GSTATUS1 */ + + u32 gs = __raw_readl(S3C24XX_GSTATUS1); + + /* test for s3c2416 or similar device */ + if ((gs >> 16) == 0x3245) + return gs; +#endif + +#if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413) + return __raw_readl(S3C2412_GSTATUS1); +#else + return 1UL; /* don't look like an 2400 */ +#endif +} + +static unsigned long s3c24xx_read_idcode_v4(void) +{ + return __raw_readl(S3C2410_GSTATUS1); +} + +static void s3c24xx_default_idle(void) +{ + unsigned long tmp; + int i; + + /* idle the system by using the idle mode which will wait for an + * interrupt to happen before restarting the system. + */ + + /* Warning: going into idle state upsets jtag scanning */ + + __raw_writel(__raw_readl(S3C2410_CLKCON) | S3C2410_CLKCON_IDLE, + S3C2410_CLKCON); + + /* the samsung port seems to do a loop and then unset idle.. */ + for (i = 0; i < 50; i++) + tmp += __raw_readl(S3C2410_CLKCON); /* ensure loop not optimised out */ + + /* this bit is not cleared on re-start... */ + + __raw_writel(__raw_readl(S3C2410_CLKCON) & ~S3C2410_CLKCON_IDLE, + S3C2410_CLKCON); +} + +void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) +{ + arm_pm_idle = s3c24xx_default_idle; + + /* initialise the io descriptors we need for initialisation */ + iotable_init(mach_desc, size); + iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc)); + + if (cpu_architecture() >= CPU_ARCH_ARMv5) { + samsung_cpu_id = s3c24xx_read_idcode_v5(); + } else { + samsung_cpu_id = s3c24xx_read_idcode_v4(); + } + s3c24xx_init_cpu(); + + s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); +} + +/* Serial port registrations */ + +static struct resource s3c2410_uart0_resource[] = { + [0] = DEFINE_RES_MEM(S3C2410_PA_UART0, SZ_16K), + [1] = DEFINE_RES_NAMED(IRQ_S3CUART_RX0, \ + IRQ_S3CUART_ERR0 - IRQ_S3CUART_RX0 + 1, \ + NULL, IORESOURCE_IRQ) +}; + +static struct resource s3c2410_uart1_resource[] = { + [0] = DEFINE_RES_MEM(S3C2410_PA_UART1, SZ_16K), + [1] = DEFINE_RES_NAMED(IRQ_S3CUART_RX1, \ + IRQ_S3CUART_ERR1 - IRQ_S3CUART_RX1 + 1, \ + NULL, IORESOURCE_IRQ) +}; + +static struct resource s3c2410_uart2_resource[] = { + [0] = DEFINE_RES_MEM(S3C2410_PA_UART2, SZ_16K), + [1] = DEFINE_RES_NAMED(IRQ_S3CUART_RX2, \ + IRQ_S3CUART_ERR2 - IRQ_S3CUART_RX2 + 1, \ + NULL, IORESOURCE_IRQ) +}; + +static struct resource s3c2410_uart3_resource[] = { + [0] = DEFINE_RES_MEM(S3C2443_PA_UART3, SZ_16K), + [1] = DEFINE_RES_NAMED(IRQ_S3CUART_RX3, \ + IRQ_S3CUART_ERR3 - IRQ_S3CUART_RX3 + 1, \ + NULL, IORESOURCE_IRQ) +}; + +struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = { + [0] = { + .resources = s3c2410_uart0_resource, + .nr_resources = ARRAY_SIZE(s3c2410_uart0_resource), + }, + [1] = { + .resources = s3c2410_uart1_resource, + .nr_resources = ARRAY_SIZE(s3c2410_uart1_resource), + }, + [2] = { + .resources = s3c2410_uart2_resource, + .nr_resources = ARRAY_SIZE(s3c2410_uart2_resource), + }, + [3] = { + .resources = s3c2410_uart3_resource, + .nr_resources = ARRAY_SIZE(s3c2410_uart3_resource), + }, +}; + +/* initialise all the clocks */ + +void __init_or_cpufreq s3c24xx_setup_clocks(unsigned long fclk, + unsigned long hclk, + unsigned long pclk) +{ + clk_upll.rate = s3c24xx_get_pll(__raw_readl(S3C2410_UPLLCON), + clk_xtal.rate); + + clk_mpll.rate = fclk; + clk_h.rate = hclk; + clk_p.rate = pclk; + clk_f.rate = fclk; +} diff --git a/arch/arm/mach-s3c24xx/irq-pm.c b/arch/arm/mach-s3c24xx/irq-pm.c new file mode 100644 index 000000000000..0efb2e2848c8 --- /dev/null +++ b/arch/arm/mach-s3c24xx/irq-pm.c @@ -0,0 +1,95 @@ +/* linux/arch/arm/plat-s3c24xx/irq-om.c + * + * Copyright (c) 2003-2004 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * http://armlinux.simtec.co.uk/ + * + * S3C24XX - IRQ PM code + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/init.h> +#include <linux/module.h> +#include <linux/interrupt.h> +#include <linux/irq.h> + +#include <plat/cpu.h> +#include <plat/pm.h> +#include <plat/irq.h> + +#include <asm/irq.h> + +/* state for IRQs over sleep */ + +/* default is to allow for EINT0..EINT15, and IRQ_RTC as wakeup sources + * + * set bit to 1 in allow bitfield to enable the wakeup settings on it +*/ + +unsigned long s3c_irqwake_intallow = 1L << (IRQ_RTC - IRQ_EINT0) | 0xfL; +unsigned long s3c_irqwake_eintallow = 0x0000fff0L; + +int s3c_irq_wake(struct irq_data *data, unsigned int state) +{ + unsigned long irqbit = 1 << (data->irq - IRQ_EINT0); + + if (!(s3c_irqwake_intallow & irqbit)) + return -ENOENT; + + printk(KERN_INFO "wake %s for irq %d\n", + state ? "enabled" : "disabled", data->irq); + + if (!state) + s3c_irqwake_intmask |= irqbit; + else + s3c_irqwake_intmask &= ~irqbit; + + return 0; +} + +static struct sleep_save irq_save[] = { + SAVE_ITEM(S3C2410_INTMSK), + SAVE_ITEM(S3C2410_INTSUBMSK), +}; + +/* the extint values move between the s3c2410/s3c2440 and the s3c2412 + * so we use an array to hold them, and to calculate the address of + * the register at run-time +*/ + +static unsigned long save_extint[3]; +static unsigned long save_eintflt[4]; +static unsigned long save_eintmask; + +int s3c24xx_irq_suspend(void) +{ + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(save_extint); i++) + save_extint[i] = __raw_readl(S3C24XX_EXTINT0 + (i*4)); + + for (i = 0; i < ARRAY_SIZE(save_eintflt); i++) + save_eintflt[i] = __raw_readl(S3C24XX_EINFLT0 + (i*4)); + + s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save)); + save_eintmask = __raw_readl(S3C24XX_EINTMASK); + + return 0; +} + +void s3c24xx_irq_resume(void) +{ + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(save_extint); i++) + __raw_writel(save_extint[i], S3C24XX_EXTINT0 + (i*4)); + + for (i = 0; i < ARRAY_SIZE(save_eintflt); i++) + __raw_writel(save_eintflt[i], S3C24XX_EINFLT0 + (i*4)); + + s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save)); + __raw_writel(save_eintmask, S3C24XX_EINTMASK); +} diff --git a/arch/arm/mach-s3c24xx/mach-amlm5900.c b/arch/arm/mach-s3c24xx/mach-amlm5900.c index 4220cc60de3c..ea2c4b003d58 100644 --- a/arch/arm/mach-s3c24xx/mach-amlm5900.c +++ b/arch/arm/mach-s3c24xx/mach-amlm5900.c @@ -65,13 +65,8 @@ #include "common.h" -static struct resource amlm5900_nor_resource = { - .start = 0x00000000, - .end = 0x01000000 - 1, - .flags = IORESOURCE_MEM, -}; - - +static struct resource amlm5900_nor_resource = + DEFINE_RES_MEM(0x00000000, SZ_16M); static struct mtd_partition amlm5900_mtd_partitions[] = { { diff --git a/arch/arm/mach-s3c24xx/mach-anubis.c b/arch/arm/mach-s3c24xx/mach-anubis.c index 60c72c54c21e..5a7d0c0010f7 100644 --- a/arch/arm/mach-s3c24xx/mach-anubis.c +++ b/arch/arm/mach-s3c24xx/mach-anubis.c @@ -235,19 +235,9 @@ static struct pata_platform_info anubis_ide_platdata = { }; static struct resource anubis_ide0_resource[] = { - { - .start = S3C2410_CS3, - .end = S3C2410_CS3 + (8*32) - 1, - .flags = IORESOURCE_MEM, - }, { - .start = S3C2410_CS3 + (1<<26) + (6*32), - .end = S3C2410_CS3 + (1<<26) + (7*32) - 1, - .flags = IORESOURCE_MEM, - }, { - .start = IRQ_IDE0, - .end = IRQ_IDE0, - .flags = IORESOURCE_IRQ, - }, + [0] = DEFINE_RES_MEM(S3C2410_CS3, 8 * 32), + [2] = DEFINE_RES_MEM(S3C2410_CS3 + (1 << 26) + (6 * 32), 32), + [3] = DEFINE_RES_IRQ(IRQ_IDE0), }; static struct platform_device anubis_device_ide0 = { @@ -262,19 +252,9 @@ static struct platform_device anubis_device_ide0 = { }; static struct resource anubis_ide1_resource[] = { - { - .start = S3C2410_CS4, - .end = S3C2410_CS4 + (8*32) - 1, - .flags = IORESOURCE_MEM, - }, { - .start = S3C2410_CS4 + (1<<26) + (6*32), - .end = S3C2410_CS4 + (1<<26) + (7*32) - 1, - .flags = IORESOURCE_MEM, - }, { - .start = IRQ_IDE0, - .end = IRQ_IDE0, - .flags = IORESOURCE_IRQ, - }, + [0] = DEFINE_RES_MEM(S3C2410_CS4, 8 * 32), + [1] = DEFINE_RES_MEM(S3C2410_CS4 + (1 << 26) + (6 * 32), 32), + [2] = DEFINE_RES_IRQ(IRQ_IDE0), }; static struct platform_device anubis_device_ide1 = { @@ -298,16 +278,8 @@ static struct ax_plat_data anubis_asix_platdata = { }; static struct resource anubis_asix_resource[] = { - [0] = { - .start = S3C2410_CS5, - .end = S3C2410_CS5 + (0x20 * 0x20) -1, - .flags = IORESOURCE_MEM - }, - [1] = { - .start = IRQ_ASIX, - .end = IRQ_ASIX, - .flags = IORESOURCE_IRQ - } + [0] = DEFINE_RES_MEM(S3C2410_CS5, 0x20 * 0x20), + [1] = DEFINE_RES_IRQ(IRQ_ASIX), }; static struct platform_device anubis_device_asix = { @@ -323,21 +295,9 @@ static struct platform_device anubis_device_asix = { /* SM501 */ static struct resource anubis_sm501_resource[] = { - [0] = { - .start = S3C2410_CS2, - .end = S3C2410_CS2 + SZ_8M, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = S3C2410_CS2 + SZ_64M - SZ_2M, - .end = S3C2410_CS2 + SZ_64M - 1, - .flags = IORESOURCE_MEM, - }, - [2] = { - .start = IRQ_EINT0, - .end = IRQ_EINT0, - .flags = IORESOURCE_IRQ, - }, + [0] = DEFINE_RES_MEM(S3C2410_CS2, SZ_8M), + [1] = DEFINE_RES_MEM(S3C2410_CS2 + SZ_64M - SZ_2M, SZ_2M), + [2] = DEFINE_RES_IRQ(IRQ_EINT0), }; static struct sm501_initdata anubis_sm501_initdata = { diff --git a/arch/arm/mach-s3c24xx/mach-at2440evb.c b/arch/arm/mach-s3c24xx/mach-at2440evb.c index d7ae49c90118..7a05abf1270b 100644 --- a/arch/arm/mach-s3c24xx/mach-at2440evb.c +++ b/arch/arm/mach-s3c24xx/mach-at2440evb.c @@ -118,21 +118,10 @@ static struct s3c2410_platform_nand __initdata at2440evb_nand_info = { /* DM9000AEP 10/100 ethernet controller */ static struct resource at2440evb_dm9k_resource[] = { - [0] = { - .start = S3C2410_CS3, - .end = S3C2410_CS3 + 3, - .flags = IORESOURCE_MEM - }, - [1] = { - .start = S3C2410_CS3 + 4, - .end = S3C2410_CS3 + 7, - .flags = IORESOURCE_MEM - }, - [2] = { - .start = IRQ_EINT7, - .end = IRQ_EINT7, - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, - } + [0] = DEFINE_RES_MEM(S3C2410_CS3, 4), + [1] = DEFINE_RES_MEM(S3C2410_CS3 + 4, 4), + [2] = DEFINE_RES_NAMED(IRQ_EINT7, 1, NULL, IORESOURCE_IRQ \ + | IORESOURCE_IRQ_HIGHEDGE), }; static struct dm9000_plat_data at2440evb_dm9k_pdata = { diff --git a/arch/arm/mach-s3c24xx/mach-bast.c b/arch/arm/mach-s3c24xx/mach-bast.c index 53219c02eca0..1cf1720682d3 100644 --- a/arch/arm/mach-s3c24xx/mach-bast.c +++ b/arch/arm/mach-s3c24xx/mach-bast.c @@ -310,22 +310,10 @@ static struct s3c2410_platform_nand __initdata bast_nand_info = { /* DM9000 */ static struct resource bast_dm9k_resource[] = { - [0] = { - .start = S3C2410_CS5 + BAST_PA_DM9000, - .end = S3C2410_CS5 + BAST_PA_DM9000 + 3, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = S3C2410_CS5 + BAST_PA_DM9000 + 0x40, - .end = S3C2410_CS5 + BAST_PA_DM9000 + 0x40 + 0x3f, - .flags = IORESOURCE_MEM, - }, - [2] = { - .start = IRQ_DM9000, - .end = IRQ_DM9000, - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, - } - + [0] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_DM9000, 4), + [1] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_DM9000 + 0x40, 0x40), + [2] = DEFINE_RES_NAMED(IRQ_DM9000 , 1, NULL, IORESOURCE_IRQ \ + | IORESOURCE_IRQ_HIGHLEVEL), }; /* for the moment we limit ourselves to 16bit IO until some @@ -400,21 +388,9 @@ static struct ax_plat_data bast_asix_platdata = { }; static struct resource bast_asix_resource[] = { - [0] = { - .start = S3C2410_CS5 + BAST_PA_ASIXNET, - .end = S3C2410_CS5 + BAST_PA_ASIXNET + (0x18 * 0x20) - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = S3C2410_CS5 + BAST_PA_ASIXNET + (0x1f * 0x20), - .end = S3C2410_CS5 + BAST_PA_ASIXNET + (0x1f * 0x20), - .flags = IORESOURCE_MEM, - }, - [2] = { - .start = IRQ_ASIX, - .end = IRQ_ASIX, - .flags = IORESOURCE_IRQ - } + [0] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_ASIXNET, 0x18 * 0x20), + [1] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_ASIXNET + (0x1f * 0x20), 1), + [2] = DEFINE_RES_IRQ(IRQ_ASIX), }; static struct platform_device bast_device_asix = { @@ -430,11 +406,8 @@ static struct platform_device bast_device_asix = { /* Asix AX88796 10/100 ethernet controller parallel port */ static struct resource bast_asixpp_resource[] = { - [0] = { - .start = S3C2410_CS5 + BAST_PA_ASIXNET + (0x18 * 0x20), - .end = S3C2410_CS5 + BAST_PA_ASIXNET + (0x1b * 0x20) - 1, - .flags = IORESOURCE_MEM, - } + [0] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_ASIXNET + (0x18 * 0x20), \ + 0x30 * 0x20), }; static struct platform_device bast_device_axpp = { diff --git a/arch/arm/mach-s3c24xx/mach-gta02.c b/arch/arm/mach-s3c24xx/mach-gta02.c index ba5d85394105..0f29f64a3eeb 100644 --- a/arch/arm/mach-s3c24xx/mach-gta02.c +++ b/arch/arm/mach-s3c24xx/mach-gta02.c @@ -387,11 +387,8 @@ static struct physmap_flash_data gta02_nor_flash_data = { .width = 2, }; -static struct resource gta02_nor_flash_resource = { - .start = GTA02_FLASH_BASE, - .end = GTA02_FLASH_BASE + GTA02_FLASH_SIZE - 1, - .flags = IORESOURCE_MEM, -}; +static struct resource gta02_nor_flash_resource = + DEFINE_RES_MEM(GTA02_FLASH_BASE, GTA02_FLASH_SIZE); static struct platform_device gta02_nor_flash = { .name = "physmap-flash", diff --git a/arch/arm/mach-s3c24xx/mach-h1940.c b/arch/arm/mach-s3c24xx/mach-h1940.c index 6b21ba107eab..bb8d008d5a5c 100644 --- a/arch/arm/mach-s3c24xx/mach-h1940.c +++ b/arch/arm/mach-s3c24xx/mach-h1940.c @@ -253,13 +253,8 @@ static struct pda_power_pdata power_supply_info = { }; static struct resource power_supply_resources[] = { - [0] = { - .name = "ac", - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE | - IORESOURCE_IRQ_HIGHEDGE, - .start = IRQ_EINT2, - .end = IRQ_EINT2, - }, + [0] = DEFINE_RES_NAMED(IRQ_EINT2, 1, "ac", IORESOURCE_IRQ \ + | IORESOURCE_IRQ_LOWEDGE | IORESOURCE_IRQ_HIGHEDGE), }; static struct platform_device power_supply = { diff --git a/arch/arm/mach-s3c24xx/mach-mini2440.c b/arch/arm/mach-s3c24xx/mach-mini2440.c index 5d66fb218a41..f092b188ab70 100644 --- a/arch/arm/mach-s3c24xx/mach-mini2440.c +++ b/arch/arm/mach-s3c24xx/mach-mini2440.c @@ -292,21 +292,10 @@ static struct s3c2410_platform_nand mini2440_nand_info __initdata = { /* DM9000AEP 10/100 ethernet controller */ static struct resource mini2440_dm9k_resource[] = { - [0] = { - .start = MACH_MINI2440_DM9K_BASE, - .end = MACH_MINI2440_DM9K_BASE + 3, - .flags = IORESOURCE_MEM - }, - [1] = { - .start = MACH_MINI2440_DM9K_BASE + 4, - .end = MACH_MINI2440_DM9K_BASE + 7, - .flags = IORESOURCE_MEM - }, - [2] = { - .start = IRQ_EINT7, - .end = IRQ_EINT7, - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, - } + [0] = DEFINE_RES_MEM(MACH_MINI2440_DM9K_BASE, 4), + [1] = DEFINE_RES_MEM(MACH_MINI2440_DM9K_BASE + 4, 4), + [2] = DEFINE_RES_NAMED(IRQ_EINT7, 1, NULL, IORESOURCE_IRQ \ + | IORESOURCE_IRQ_HIGHEDGE), }; /* diff --git a/arch/arm/mach-s3c24xx/mach-nexcoder.c b/arch/arm/mach-s3c24xx/mach-nexcoder.c index 5198e3e1c5be..5c05ba1c330f 100644 --- a/arch/arm/mach-s3c24xx/mach-nexcoder.c +++ b/arch/arm/mach-s3c24xx/mach-nexcoder.c @@ -84,11 +84,7 @@ static struct s3c2410_uartcfg nexcoder_uartcfgs[] __initdata = { /* NOR Flash on NexVision NexCoder 2440 board */ static struct resource nexcoder_nor_resource[] = { - [0] = { - .start = S3C2410_CS0, - .end = S3C2410_CS0 + (8*1024*1024) - 1, - .flags = IORESOURCE_MEM, - } + [0] = DEFINE_RES_MEM(S3C2410_CS0, SZ_8M), }; static struct map_info nexcoder_nor_map = { diff --git a/arch/arm/mach-s3c24xx/mach-osiris.c b/arch/arm/mach-s3c24xx/mach-osiris.c index c5daeb612a88..95d077255024 100644 --- a/arch/arm/mach-s3c24xx/mach-osiris.c +++ b/arch/arm/mach-s3c24xx/mach-osiris.c @@ -244,16 +244,8 @@ static struct s3c2410_platform_nand __initdata osiris_nand_info = { /* PCMCIA control and configuration */ static struct resource osiris_pcmcia_resource[] = { - [0] = { - .start = 0x0f000000, - .end = 0x0f100000, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = 0x0c000000, - .end = 0x0c100000, - .flags = IORESOURCE_MEM, - } + [0] = DEFINE_RES_MEM(0x0f000000, SZ_1M), + [1] = DEFINE_RES_MEM(0x0c000000, SZ_1M), }; static struct platform_device osiris_pcmcia = { diff --git a/arch/arm/mach-s3c24xx/mach-otom.c b/arch/arm/mach-s3c24xx/mach-otom.c index 5f1e0eeb38a9..bc4b6efb3b27 100644 --- a/arch/arm/mach-s3c24xx/mach-otom.c +++ b/arch/arm/mach-s3c24xx/mach-otom.c @@ -77,11 +77,7 @@ static struct s3c2410_uartcfg otom11_uartcfgs[] __initdata = { /* NOR Flash on NexVision OTOM board */ static struct resource otom_nor_resource[] = { - [0] = { - .start = S3C2410_CS0, - .end = S3C2410_CS0 + (4*1024*1024) - 1, - .flags = IORESOURCE_MEM, - } + [0] = DEFINE_RES_MEM(S3C2410_CS0, SZ_4M), }; static struct platform_device otom_device_nor = { diff --git a/arch/arm/mach-s3c24xx/mach-qt2410.c b/arch/arm/mach-s3c24xx/mach-qt2410.c index 91c16d9d2459..b868dddcb836 100644 --- a/arch/arm/mach-s3c24xx/mach-qt2410.c +++ b/arch/arm/mach-s3c24xx/mach-qt2410.c @@ -180,16 +180,8 @@ static struct s3c2410fb_mach_info qt2410_fb_info __initdata = { /* CS8900 */ static struct resource qt2410_cs89x0_resources[] = { - [0] = { - .start = 0x19000000, - .end = 0x19000000 + 16, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_EINT9, - .end = IRQ_EINT9, - .flags = IORESOURCE_IRQ, - }, + [0] = DEFINE_RES_MEM(0x19000000, 17), + [1] = DEFINE_RES_IRQ(IRQ_EINT9), }; static struct platform_device qt2410_cs89x0 = { diff --git a/arch/arm/mach-s3c24xx/mach-rx1950.c b/arch/arm/mach-s3c24xx/mach-rx1950.c index 200debb4c72d..a6762aae4727 100644 --- a/arch/arm/mach-s3c24xx/mach-rx1950.c +++ b/arch/arm/mach-s3c24xx/mach-rx1950.c @@ -152,13 +152,8 @@ static struct pda_power_pdata power_supply_info = { }; static struct resource power_supply_resources[] = { - [0] = { - .name = "ac", - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE | - IORESOURCE_IRQ_HIGHEDGE, - .start = IRQ_EINT2, - .end = IRQ_EINT2, - }, + [0] = DEFINE_RES_NAMED(IRQ_EINT2, 1, "ac", IORESOURCE_IRQ \ + | IORESOURCE_IRQ_LOWEDGE | IORESOURCE_IRQ_HIGHEDGE), }; static struct platform_device power_supply = { diff --git a/arch/arm/mach-s3c24xx/mach-tct_hammer.c b/arch/arm/mach-s3c24xx/mach-tct_hammer.c index 1114666f0efb..fe990289ee7d 100644 --- a/arch/arm/mach-s3c24xx/mach-tct_hammer.c +++ b/arch/arm/mach-s3c24xx/mach-tct_hammer.c @@ -56,11 +56,8 @@ #include "common.h" -static struct resource tct_hammer_nor_resource = { - .start = 0x00000000, - .end = 0x01000000 - 1, - .flags = IORESOURCE_MEM, -}; +static struct resource tct_hammer_nor_resource = + DEFINE_RES_MEM(0x00000000, SZ_16M); static struct mtd_partition tct_hammer_mtd_partitions[] = { { diff --git a/arch/arm/mach-s3c24xx/mach-vr1000.c b/arch/arm/mach-s3c24xx/mach-vr1000.c index 87608d45dac4..bd5f189f0424 100644 --- a/arch/arm/mach-s3c24xx/mach-vr1000.c +++ b/arch/arm/mach-s3c24xx/mach-vr1000.c @@ -187,40 +187,17 @@ static struct platform_device serial_device = { /* DM9000 ethernet devices */ static struct resource vr1000_dm9k0_resource[] = { - [0] = { - .start = S3C2410_CS5 + VR1000_PA_DM9000, - .end = S3C2410_CS5 + VR1000_PA_DM9000 + 3, - .flags = IORESOURCE_MEM - }, - [1] = { - .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x40, - .end = S3C2410_CS5 + VR1000_PA_DM9000 + 0x7f, - .flags = IORESOURCE_MEM - }, - [2] = { - .start = IRQ_VR1000_DM9000A, - .end = IRQ_VR1000_DM9000A, - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, - } - + [0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000, 4), + [1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x40, 0x40), + [2] = DEFINE_RES_NAMED(IRQ_VR1000_DM9000A, 1, NULL, IORESOURCE_IRQ \ + | IORESOURCE_IRQ_HIGHLEVEL), }; static struct resource vr1000_dm9k1_resource[] = { - [0] = { - .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x80, - .end = S3C2410_CS5 + VR1000_PA_DM9000 + 0x83, - .flags = IORESOURCE_MEM - }, - [1] = { - .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0, - .end = S3C2410_CS5 + VR1000_PA_DM9000 + 0xFF, - .flags = IORESOURCE_MEM - }, - [2] = { - .start = IRQ_VR1000_DM9000N, - .end = IRQ_VR1000_DM9000N, - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, - } + [0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x80, 4), + [1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0, 0x40), + [2] = DEFINE_RES_NAMED(IRQ_VR1000_DM9000N, 1, NULL, IORESOURCE_IRQ \ + | IORESOURCE_IRQ_HIGHLEVEL), }; /* for the moment we limit ourselves to 16bit IO until some diff --git a/arch/arm/mach-s3c24xx/pm.c b/arch/arm/mach-s3c24xx/pm.c new file mode 100644 index 000000000000..60627e63a254 --- /dev/null +++ b/arch/arm/mach-s3c24xx/pm.c @@ -0,0 +1,149 @@ +/* linux/arch/arm/plat-s3c24xx/pm.c + * + * Copyright (c) 2004-2006 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * S3C24XX Power Manager (Suspend-To-RAM) support + * + * See Documentation/arm/Samsung-S3C24XX/Suspend.txt for more information + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * Parts based on arch/arm/mach-pxa/pm.c + * + * Thanks to Dimitry Andric for debugging +*/ + +#include <linux/init.h> +#include <linux/suspend.h> +#include <linux/errno.h> +#include <linux/time.h> +#include <linux/gpio.h> +#include <linux/interrupt.h> +#include <linux/serial_core.h> +#include <linux/io.h> + +#include <plat/regs-serial.h> +#include <mach/regs-clock.h> +#include <mach/regs-gpio.h> +#include <mach/regs-mem.h> +#include <mach/regs-irq.h> + +#include <asm/mach/time.h> + +#include <plat/gpio-cfg.h> +#include <plat/pm.h> + +#define PFX "s3c24xx-pm: " + +static struct sleep_save core_save[] = { + SAVE_ITEM(S3C2410_LOCKTIME), + SAVE_ITEM(S3C2410_CLKCON), + + /* we restore the timings here, with the proviso that the board + * brings the system up in an slower, or equal frequency setting + * to the original system. + * + * if we cannot guarantee this, then things are going to go very + * wrong here, as we modify the refresh and both pll settings. + */ + + SAVE_ITEM(S3C2410_BWSCON), + SAVE_ITEM(S3C2410_BANKCON0), + SAVE_ITEM(S3C2410_BANKCON1), + SAVE_ITEM(S3C2410_BANKCON2), + SAVE_ITEM(S3C2410_BANKCON3), + SAVE_ITEM(S3C2410_BANKCON4), + SAVE_ITEM(S3C2410_BANKCON5), + +#ifndef CONFIG_CPU_FREQ + SAVE_ITEM(S3C2410_CLKDIVN), + SAVE_ITEM(S3C2410_MPLLCON), + SAVE_ITEM(S3C2410_REFRESH), +#endif + SAVE_ITEM(S3C2410_UPLLCON), + SAVE_ITEM(S3C2410_CLKSLOW), +}; + +static struct sleep_save misc_save[] = { + SAVE_ITEM(S3C2410_DCLKCON), +}; + +/* s3c_pm_check_resume_pin + * + * check to see if the pin is configured correctly for sleep mode, and + * make any necessary adjustments if it is not +*/ + +static void s3c_pm_check_resume_pin(unsigned int pin, unsigned int irqoffs) +{ + unsigned long irqstate; + unsigned long pinstate; + int irq = gpio_to_irq(pin); + + if (irqoffs < 4) + irqstate = s3c_irqwake_intmask & (1L<<irqoffs); + else + irqstate = s3c_irqwake_eintmask & (1L<<irqoffs); + + pinstate = s3c_gpio_getcfg(pin); + + if (!irqstate) { + if (pinstate == S3C2410_GPIO_IRQ) + S3C_PMDBG("Leaving IRQ %d (pin %d) as is\n", irq, pin); + } else { + if (pinstate == S3C2410_GPIO_IRQ) { + S3C_PMDBG("Disabling IRQ %d (pin %d)\n", irq, pin); + s3c_gpio_cfgpin(pin, S3C2410_GPIO_INPUT); + } + } +} + +/* s3c_pm_configure_extint + * + * configure all external interrupt pins +*/ + +void s3c_pm_configure_extint(void) +{ + int pin; + + /* for each of the external interrupts (EINT0..EINT15) we + * need to check wether it is an external interrupt source, + * and then configure it as an input if it is not + */ + + for (pin = S3C2410_GPF(0); pin <= S3C2410_GPF(7); pin++) { + s3c_pm_check_resume_pin(pin, pin - S3C2410_GPF(0)); + } + + for (pin = S3C2410_GPG(0); pin <= S3C2410_GPG(7); pin++) { + s3c_pm_check_resume_pin(pin, (pin - S3C2410_GPG(0))+8); + } +} + + +void s3c_pm_restore_core(void) +{ + s3c_pm_do_restore_core(core_save, ARRAY_SIZE(core_save)); + s3c_pm_do_restore(misc_save, ARRAY_SIZE(misc_save)); +} + +void s3c_pm_save_core(void) +{ + s3c_pm_do_save(misc_save, ARRAY_SIZE(misc_save)); + s3c_pm_do_save(core_save, ARRAY_SIZE(core_save)); +} + diff --git a/arch/arm/mach-s3c24xx/simtec-nor.c b/arch/arm/mach-s3c24xx/simtec-nor.c index b9d6d4f92c03..029744fcaacb 100644 --- a/arch/arm/mach-s3c24xx/simtec-nor.c +++ b/arch/arm/mach-s3c24xx/simtec-nor.c @@ -55,11 +55,7 @@ static struct physmap_flash_data simtec_nor_pdata = { }; static struct resource simtec_nor_resource[] = { - [0] = { - .start = S3C2410_CS1 + 0x4000000, - .end = S3C2410_CS1 + 0x4000000 + SZ_8M - 1, - .flags = IORESOURCE_MEM, - } + [0] = DEFINE_RES_MEM(S3C2410_CS1 + 0x4000000, SZ_8M), }; static struct platform_device simtec_device_nor = { diff --git a/arch/arm/mach-s3c24xx/sleep.S b/arch/arm/mach-s3c24xx/sleep.S new file mode 100644 index 000000000000..c56612569b40 --- /dev/null +++ b/arch/arm/mach-s3c24xx/sleep.S @@ -0,0 +1,84 @@ +/* linux/arch/arm/plat-s3c24xx/sleep.S + * + * Copyright (c) 2004 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * S3C2410 Power Manager (Suspend-To-RAM) support + * + * Based on PXA/SA1100 sleep code by: + * Nicolas Pitre, (c) 2002 Monta Vista Software Inc + * Cliff Brake, (c) 2001 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +*/ + +#include <linux/linkage.h> +#include <asm/assembler.h> +#include <mach/hardware.h> +#include <mach/map.h> + +#include <mach/regs-gpio.h> +#include <mach/regs-clock.h> +#include <mach/regs-mem.h> +#include <plat/regs-serial.h> + +/* CONFIG_DEBUG_RESUME is dangerous if your bootloader does not + * reset the UART configuration, only enable if you really need this! +*/ +//#define CONFIG_DEBUG_RESUME + + .text + + /* sleep magic, to allow the bootloader to check for an valid + * image to resume to. Must be the first word before the + * s3c_cpu_resume entry. + */ + + .word 0x2bedf00d + + /* s3c_cpu_resume + * + * resume code entry for bootloader to call + */ + +ENTRY(s3c_cpu_resume) + mov r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE + msr cpsr_c, r0 + + @@ load UART to allow us to print the two characters for + @@ resume debug + + mov r2, #S3C24XX_PA_UART & 0xff000000 + orr r2, r2, #S3C24XX_PA_UART & 0xff000 + +#if 0 + /* SMDK2440 LED set */ + mov r14, #S3C24XX_PA_GPIO + ldr r12, [ r14, #0x54 ] + bic r12, r12, #3<<4 + orr r12, r12, #1<<7 + str r12, [ r14, #0x54 ] +#endif + +#ifdef CONFIG_DEBUG_RESUME + mov r3, #'L' + strb r3, [ r2, #S3C2410_UTXH ] +1001: + ldrb r14, [ r3, #S3C2410_UTRSTAT ] + tst r14, #S3C2410_UTRSTAT_TXE + beq 1001b +#endif /* CONFIG_DEBUG_RESUME */ + + b cpu_resume |