diff options
Diffstat (limited to 'arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c')
-rw-r--r-- | arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c | 85 |
1 files changed, 68 insertions, 17 deletions
diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c index 3524f0e7b6d5..ae2b35e76dc8 100644 --- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c +++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c @@ -1,7 +1,7 @@ /* * OMAP2xxx DVFS virtual clock functions * - * Copyright (C) 2005-2008 Texas Instruments, Inc. + * Copyright (C) 2005-2008, 2012 Texas Instruments, Inc. * Copyright (C) 2004-2010 Nokia Corporation * * Contacts: @@ -33,27 +33,33 @@ #include <linux/cpufreq.h> #include <linux/slab.h> -#include <plat/clock.h> -#include <plat/sram.h> -#include <plat/sdrc.h> - #include "soc.h" #include "clock.h" #include "clock2xxx.h" #include "opp2xxx.h" -#include "cm2xxx_3xxx.h" +#include "cm2xxx.h" #include "cm-regbits-24xx.h" +#include "sdrc.h" +#include "sram.h" const struct prcm_config *curr_prcm_set; const struct prcm_config *rate_table; +/* + * sys_ck_rate: the rate of the external high-frequency clock + * oscillator on the board. Set by the SoC-specific clock init code. + * Once set during a boot, will not change. + */ +static unsigned long sys_ck_rate; + /** * omap2_table_mpu_recalc - just return the MPU speed * @clk: virt_prcm_set struct clk * * Set virt_prcm_set's rate to the mpu_speed field of the current PRCM set. */ -unsigned long omap2_table_mpu_recalc(struct clk *clk) +unsigned long omap2_table_mpu_recalc(struct clk_hw *clk, + unsigned long parent_rate) { return curr_prcm_set->mpu_speed; } @@ -65,18 +71,18 @@ unsigned long omap2_table_mpu_recalc(struct clk *clk) * Some might argue L3-DDR, others ARM, others IVA. This code is simple and * just uses the ARM rates. */ -long omap2_round_to_table_rate(struct clk *clk, unsigned long rate) +long omap2_round_to_table_rate(struct clk_hw *hw, unsigned long rate, + unsigned long *parent_rate) { const struct prcm_config *ptr; - long highest_rate, sys_clk_rate; + long highest_rate; highest_rate = -EINVAL; - sys_clk_rate = __clk_get_rate(sclk); for (ptr = rate_table; ptr->mpu_speed; ptr++) { if (!(ptr->flags & cpu_mask)) continue; - if (ptr->xtal_speed != sys_clk_rate) + if (ptr->xtal_speed != sys_ck_rate) continue; highest_rate = ptr->mpu_speed; @@ -89,21 +95,19 @@ long omap2_round_to_table_rate(struct clk *clk, unsigned long rate) } /* Sets basic clocks based on the specified rate */ -int omap2_select_table_rate(struct clk *clk, unsigned long rate) +int omap2_select_table_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) { u32 cur_rate, done_rate, bypass = 0, tmp; const struct prcm_config *prcm; unsigned long found_speed = 0; unsigned long flags; - long sys_clk_rate; - - sys_clk_rate = __clk_get_rate(sclk); for (prcm = rate_table; prcm->mpu_speed; prcm++) { if (!(prcm->flags & cpu_mask)) continue; - if (prcm->xtal_speed != sys_clk_rate) + if (prcm->xtal_speed != sys_ck_rate) continue; if (prcm->mpu_speed <= rate) { @@ -119,7 +123,7 @@ int omap2_select_table_rate(struct clk *clk, unsigned long rate) } curr_prcm_set = prcm; - cur_rate = omap2xxx_clk_get_core_rate(dclk); + cur_rate = omap2xxx_clk_get_core_rate(); if (prcm->dpll_speed == cur_rate / 2) { omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL, 1); @@ -169,3 +173,50 @@ int omap2_select_table_rate(struct clk *clk, unsigned long rate) return 0; } + +/** + * omap2xxx_clkt_vps_check_bootloader_rate - determine which of the rate + * table sets matches the current CORE DPLL hardware rate + * + * Check the MPU rate set by bootloader. Sets the 'curr_prcm_set' + * global to point to the active rate set when found; otherwise, sets + * it to NULL. No return value; + */ +void omap2xxx_clkt_vps_check_bootloader_rates(void) +{ + const struct prcm_config *prcm = NULL; + unsigned long rate; + + rate = omap2xxx_clk_get_core_rate(); + for (prcm = rate_table; prcm->mpu_speed; prcm++) { + if (!(prcm->flags & cpu_mask)) + continue; + if (prcm->xtal_speed != sys_ck_rate) + continue; + if (prcm->dpll_speed <= rate) + break; + } + curr_prcm_set = prcm; +} + +/** + * omap2xxx_clkt_vps_late_init - store a copy of the sys_ck rate + * + * Store a copy of the sys_ck rate for later use by the OMAP2xxx DVFS + * code. (The sys_ck rate does not -- or rather, must not -- change + * during kernel runtime.) Must be called after we have a valid + * sys_ck rate, but before the virt_prcm_set clock rate is + * recalculated. No return value. + */ +void omap2xxx_clkt_vps_late_init(void) +{ + struct clk *c; + + c = clk_get(NULL, "sys_ck"); + if (IS_ERR(c)) { + WARN(1, "could not locate sys_ck\n"); + } else { + sys_ck_rate = clk_get_rate(c); + clk_put(c); + } +} |