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author | Olof Johansson <olof@lixom.net> | 2013-12-26 11:03:29 -0800 |
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committer | Olof Johansson <olof@lixom.net> | 2013-12-26 11:03:29 -0800 |
commit | 770039fef4887d22b12525b62cc4ade1ca724173 (patch) | |
tree | 7408ae2a4dbe6a3b36af36976a04a968d951d6af /sound/firewire/dice.c | |
parent | 954e198eac14f6c34157bbf053149f3c2917cbbd (diff) | |
parent | 8a0a1af30cbf56b41220a02e34835022c4d72f41 (diff) | |
download | talos-op-linux-770039fef4887d22b12525b62cc4ade1ca724173.tar.gz talos-op-linux-770039fef4887d22b12525b62cc4ade1ca724173.zip |
Merge branch 'tegra/dma-reset-rework' into next/dt
Bringing in the tegra dma/reset framework cleanup as a base for the DT changes.
* tegra/dma-reset-rework: (320 commits)
spi: tegra: checking for ERR_PTR instead of NULL
ASoC: tegra: update module reset list for Tegra124
clk: tegra: remove bogus PCIE_XCLK
clk: tegra: remove legacy reset APIs
ARM: tegra: remove legacy DMA entries from DT
ARM: tegra: remove legacy clock entries from DT
USB: EHCI: tegra: use reset framework
Input: tegra-kbc - use reset framework
serial: tegra: convert to standard DMA DT bindings
serial: tegra: use reset framework
spi: tegra: convert to standard DMA DT bindings
spi: tegra: use reset framework
staging: nvec: use reset framework
i2c: tegra: use reset framework
ASoC: tegra: convert to standard DMA DT bindings
ASoC: tegra: allocate AHUB FIFO during probe() not startup()
ASoC: tegra: call pm_runtime APIs around register accesses
ASoC: tegra: use reset framework
dma: tegra: register as an OF DMA controller
dma: tegra: use reset framework
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'sound/firewire/dice.c')
-rw-r--r-- | sound/firewire/dice.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/sound/firewire/dice.c b/sound/firewire/dice.c index 57bcd31fcc12..c0aa64941cee 100644 --- a/sound/firewire/dice.c +++ b/sound/firewire/dice.c @@ -1019,7 +1019,7 @@ static void dice_proc_read(struct snd_info_entry *entry, if (dice_proc_read_mem(dice, &tx_rx_header, sections[2], 2) < 0) return; - quadlets = min_t(u32, tx_rx_header.size, sizeof(buf.tx)); + quadlets = min_t(u32, tx_rx_header.size, sizeof(buf.tx) / 4); for (stream = 0; stream < tx_rx_header.number; ++stream) { if (dice_proc_read_mem(dice, &buf.tx, sections[2] + 2 + stream * tx_rx_header.size, @@ -1045,7 +1045,7 @@ static void dice_proc_read(struct snd_info_entry *entry, if (dice_proc_read_mem(dice, &tx_rx_header, sections[4], 2) < 0) return; - quadlets = min_t(u32, tx_rx_header.size, sizeof(buf.rx)); + quadlets = min_t(u32, tx_rx_header.size, sizeof(buf.rx) / 4); for (stream = 0; stream < tx_rx_header.number; ++stream) { if (dice_proc_read_mem(dice, &buf.rx, sections[4] + 2 + stream * tx_rx_header.size, |