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| author | Stephen Warren <swarren@nvidia.com> | 2013-11-07 10:58:21 -0700 |
|---|---|---|
| committer | Stephen Warren <swarren@nvidia.com> | 2013-12-11 16:45:13 -0700 |
| commit | a85f06badc3cff4069f2f5112cea63cd39d99920 (patch) | |
| tree | 1f8550812bcf67687068b9e7e39459658ee02a0c /include/dt-bindings | |
| parent | 2ae77527bb1a510070d039aaa22d1ae9a5807b6f (diff) | |
| download | talos-op-linux-a85f06badc3cff4069f2f5112cea63cd39d99920.tar.gz talos-op-linux-a85f06badc3cff4069f2f5112cea63cd39d99920.zip | |
clk: tegra: remove bogus PCIE_XCLK
The "pcie_xclk" clock is not actually a clock at all, but rather a reset
domain. Now that the custom Tegra module reset API has been removed, we
can remove the definition of any "clocks" that existed solely to support
it.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>
Diffstat (limited to 'include/dt-bindings')
| -rw-r--r-- | include/dt-bindings/clock/tegra20-car.h | 2 | ||||
| -rw-r--r-- | include/dt-bindings/clock/tegra30-car.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/include/dt-bindings/clock/tegra20-car.h b/include/dt-bindings/clock/tegra20-car.h index a1ae9a8fdd6c..9406207cfac8 100644 --- a/include/dt-bindings/clock/tegra20-car.h +++ b/include/dt-bindings/clock/tegra20-car.h @@ -92,7 +92,7 @@ #define TEGRA20_CLK_OWR 71 #define TEGRA20_CLK_AFI 72 #define TEGRA20_CLK_CSITE 73 -#define TEGRA20_CLK_PCIE_XCLK 74 +/* 74 */ #define TEGRA20_CLK_AVPUCQ 75 #define TEGRA20_CLK_LA 76 /* 77 */ diff --git a/include/dt-bindings/clock/tegra30-car.h b/include/dt-bindings/clock/tegra30-car.h index 22445820a929..889e49ba0aa3 100644 --- a/include/dt-bindings/clock/tegra30-car.h +++ b/include/dt-bindings/clock/tegra30-car.h @@ -92,7 +92,7 @@ #define TEGRA30_CLK_OWR 71 #define TEGRA30_CLK_AFI 72 #define TEGRA30_CLK_CSITE 73 -#define TEGRA30_CLK_PCIEX 74 +/* 74 */ #define TEGRA30_CLK_AVPUCQ 75 #define TEGRA30_CLK_LA 76 /* 77 */ |
