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authorDaniel Vetter <daniel.vetter@ffwll.ch>2010-11-05 18:12:18 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2010-11-23 20:14:44 +0000
commit40ce6575102b23e432932b5ce41c44bf7cc5023b (patch)
treec14bb9bf62a83e35f81d0aaef55536c324bdbb3b /include/drm/intel-gtt.h
parent23ed992a5ebe6964ebe312b54142fbc5e8185cdc (diff)
downloadtalos-op-linux-40ce6575102b23e432932b5ce41c44bf7cc5023b.tar.gz
talos-op-linux-40ce6575102b23e432932b5ce41c44bf7cc5023b.zip
drm/i915/gtt: call chipset flush directly
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'include/drm/intel-gtt.h')
-rw-r--r--include/drm/intel-gtt.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/drm/intel-gtt.h b/include/drm/intel-gtt.h
index 9f91cbe35157..c35817a11690 100644
--- a/include/drm/intel-gtt.h
+++ b/include/drm/intel-gtt.h
@@ -13,6 +13,7 @@ const struct intel_gtt {
unsigned int gtt_mappable_entries;
} *intel_gtt_get(void);
+void intel_gtt_chipset_flush(void);
/* Special gtt memory types */
#define AGP_DCACHE_MEMORY 1
@@ -26,4 +27,3 @@ const struct intel_gtt {
#define AGP_USER_CACHED_MEMORY_GFDT (1 << 3)
#endif
-
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