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| author | Stuart Menefy <stuart.menefy@st.com> | 2007-11-30 17:06:36 +0900 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2008-01-28 13:18:59 +0900 |
| commit | cbaa118ecfd99fc5ed7adbd9c34a30e1c05e3c93 (patch) | |
| tree | e60db5c0f3573558c97f39cfab78732220a72e6d /include/asm-sh/system.h | |
| parent | 325df7f20467da07901c4f2b006d3457bba0adec (diff) | |
| download | talos-op-linux-cbaa118ecfd99fc5ed7adbd9c34a30e1c05e3c93.tar.gz talos-op-linux-cbaa118ecfd99fc5ed7adbd9c34a30e1c05e3c93.zip | |
sh: Preparation for uncached jumps through PMB.
Presently most of the 29-bit physical parts do P1/P2 segmentation
with a 1:1 cached/uncached mapping, jumping between the two to
control the caching behaviour. This provides the basic infrastructure
to maintain this behaviour on 32-bit physical parts that don't map
P1/P2 at all, using a shiny new linker section and corresponding
fixmap entry.
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include/asm-sh/system.h')
| -rw-r--r-- | include/asm-sh/system.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/asm-sh/system.h b/include/asm-sh/system.h index 969f3d4afe2a..9bda8d063ecf 100644 --- a/include/asm-sh/system.h +++ b/include/asm-sh/system.h @@ -144,6 +144,8 @@ extern unsigned int instruction_size(unsigned int insn); #define instruction_size(insn) (4) #endif +extern unsigned long cached_to_uncached; + /* XXX * disable hlt during certain critical i/o operations */ |
