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authorLinus Torvalds <torvalds@linux-foundation.org>2008-01-29 08:52:50 +1100
committerLinus Torvalds <torvalds@linux-foundation.org>2008-01-29 08:52:50 +1100
commite189f3495c4e30fc84fc9241096edf3932e23439 (patch)
tree5916c89ace81537a02ae01869386ba6caafdab9c /include/asm-sh/atomic-grb.h
parentf4798748dee00c807a63f5518f08b3df161e0f6d (diff)
parent6582d7b7376aa587d74b08c74457dc28abc1a9fa (diff)
downloadtalos-op-linux-e189f3495c4e30fc84fc9241096edf3932e23439.tar.gz
talos-op-linux-e189f3495c4e30fc84fc9241096edf3932e23439.zip
Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (197 commits) sh: add spi header and r2d platform data V3 sh: update r7780rp interrupt code sh: remove consistent alloc stuff from the machine vector sh: use declared coherent memory for dreamcast pci ethernet adapter sh: declared coherent memory support V2 sh: Add support for SDK7780 board. sh: constify function pointer tables sh: Kill off -traditional for linker script. cdrom: Add support for Sega Dreamcast GD-ROM. sh: Kill off hs7751rvoip reference from arch/sh/Kconfig. sh: Drop r7780rp_defconfig, use r7780mp_defconfig as kbuild default. sh: Kill off dead HS771RVoIP board support. sh: r7785rp: Fix up DECLARE_INTC_DESC() arg mismatch. sh: r7785rp: Hook up the rest of the HL7785 FPGA IRQ vectors. sh: r2d - enable sm501 usb host function sh: remove voyagergx sh: r2d - add lcd planel timings to sm501 platform data sh: Add OHCI and UDC platform devices for SH7720. sh: intc - remove default interrupt priority tables sh: Correct pte size mismatch for X2 TLB. ...
Diffstat (limited to 'include/asm-sh/atomic-grb.h')
-rw-r--r--include/asm-sh/atomic-grb.h169
1 files changed, 169 insertions, 0 deletions
diff --git a/include/asm-sh/atomic-grb.h b/include/asm-sh/atomic-grb.h
new file mode 100644
index 000000000000..4c5b7dbfcedb
--- /dev/null
+++ b/include/asm-sh/atomic-grb.h
@@ -0,0 +1,169 @@
+#ifndef __ASM_SH_ATOMIC_GRB_H
+#define __ASM_SH_ATOMIC_GRB_H
+
+static inline void atomic_add(int i, atomic_t *v)
+{
+ int tmp;
+
+ __asm__ __volatile__ (
+ " .align 2 \n\t"
+ " mova 1f, r0 \n\t" /* r0 = end point */
+ " mov r15, r1 \n\t" /* r1 = saved sp */
+ " mov #-6, r15 \n\t" /* LOGIN: r15 = size */
+ " mov.l @%1, %0 \n\t" /* load old value */
+ " add %2, %0 \n\t" /* add */
+ " mov.l %0, @%1 \n\t" /* store new value */
+ "1: mov r1, r15 \n\t" /* LOGOUT */
+ : "=&r" (tmp),
+ "+r" (v)
+ : "r" (i)
+ : "memory" , "r0", "r1");
+}
+
+static inline void atomic_sub(int i, atomic_t *v)
+{
+ int tmp;
+
+ __asm__ __volatile__ (
+ " .align 2 \n\t"
+ " mova 1f, r0 \n\t" /* r0 = end point */
+ " mov r15, r1 \n\t" /* r1 = saved sp */
+ " mov #-6, r15 \n\t" /* LOGIN: r15 = size */
+ " mov.l @%1, %0 \n\t" /* load old value */
+ " sub %2, %0 \n\t" /* sub */
+ " mov.l %0, @%1 \n\t" /* store new value */
+ "1: mov r1, r15 \n\t" /* LOGOUT */
+ : "=&r" (tmp),
+ "+r" (v)
+ : "r" (i)
+ : "memory" , "r0", "r1");
+}
+
+static inline int atomic_add_return(int i, atomic_t *v)
+{
+ int tmp;
+
+ __asm__ __volatile__ (
+ " .align 2 \n\t"
+ " mova 1f, r0 \n\t" /* r0 = end point */
+ " mov r15, r1 \n\t" /* r1 = saved sp */
+ " mov #-6, r15 \n\t" /* LOGIN: r15 = size */
+ " mov.l @%1, %0 \n\t" /* load old value */
+ " add %2, %0 \n\t" /* add */
+ " mov.l %0, @%1 \n\t" /* store new value */
+ "1: mov r1, r15 \n\t" /* LOGOUT */
+ : "=&r" (tmp),
+ "+r" (v)
+ : "r" (i)
+ : "memory" , "r0", "r1");
+
+ return tmp;
+}
+
+static inline int atomic_sub_return(int i, atomic_t *v)
+{
+ int tmp;
+
+ __asm__ __volatile__ (
+ " .align 2 \n\t"
+ " mova 1f, r0 \n\t" /* r0 = end point */
+ " mov r15, r1 \n\t" /* r1 = saved sp */
+ " mov #-6, r15 \n\t" /* LOGIN: r15 = size */
+ " mov.l @%1, %0 \n\t" /* load old value */
+ " sub %2, %0 \n\t" /* sub */
+ " mov.l %0, @%1 \n\t" /* store new value */
+ "1: mov r1, r15 \n\t" /* LOGOUT */
+ : "=&r" (tmp),
+ "+r" (v)
+ : "r" (i)
+ : "memory", "r0", "r1");
+
+ return tmp;
+}
+
+static inline void atomic_clear_mask(unsigned int mask, atomic_t *v)
+{
+ int tmp;
+ unsigned int _mask = ~mask;
+
+ __asm__ __volatile__ (
+ " .align 2 \n\t"
+ " mova 1f, r0 \n\t" /* r0 = end point */
+ " mov r15, r1 \n\t" /* r1 = saved sp */
+ " mov #-6, r15 \n\t" /* LOGIN: r15 = size */
+ " mov.l @%1, %0 \n\t" /* load old value */
+ " and %2, %0 \n\t" /* add */
+ " mov.l %0, @%1 \n\t" /* store new value */
+ "1: mov r1, r15 \n\t" /* LOGOUT */
+ : "=&r" (tmp),
+ "+r" (v)
+ : "r" (_mask)
+ : "memory" , "r0", "r1");
+}
+
+static inline void atomic_set_mask(unsigned int mask, atomic_t *v)
+{
+ int tmp;
+
+ __asm__ __volatile__ (
+ " .align 2 \n\t"
+ " mova 1f, r0 \n\t" /* r0 = end point */
+ " mov r15, r1 \n\t" /* r1 = saved sp */
+ " mov #-6, r15 \n\t" /* LOGIN: r15 = size */
+ " mov.l @%1, %0 \n\t" /* load old value */
+ " or %2, %0 \n\t" /* or */
+ " mov.l %0, @%1 \n\t" /* store new value */
+ "1: mov r1, r15 \n\t" /* LOGOUT */
+ : "=&r" (tmp),
+ "+r" (v)
+ : "r" (mask)
+ : "memory" , "r0", "r1");
+}
+
+static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
+{
+ int ret;
+
+ __asm__ __volatile__ (
+ " .align 2 \n\t"
+ " mova 1f, r0 \n\t"
+ " nop \n\t"
+ " mov r15, r1 \n\t"
+ " mov #-8, r15 \n\t"
+ " mov.l @%1, %0 \n\t"
+ " cmp/eq %2, %0 \n\t"
+ " bf 1f \n\t"
+ " mov.l %3, @%1 \n\t"
+ "1: mov r1, r15 \n\t"
+ : "=&r" (ret)
+ : "r" (v), "r" (old), "r" (new)
+ : "memory" , "r0", "r1" , "t");
+
+ return ret;
+}
+
+static inline int atomic_add_unless(atomic_t *v, int a, int u)
+{
+ int ret;
+ unsigned long tmp;
+
+ __asm__ __volatile__ (
+ " .align 2 \n\t"
+ " mova 1f, r0 \n\t"
+ " nop \n\t"
+ " mov r15, r1 \n\t"
+ " mov #-12, r15 \n\t"
+ " mov.l @%2, %1 \n\t"
+ " mov %1, %0 \n\t"
+ " cmp/eq %4, %0 \n\t"
+ " bt/s 1f \n\t"
+ " add %3, %1 \n\t"
+ " mov.l %1, @%2 \n\t"
+ "1: mov r1, r15 \n\t"
+ : "=&r" (ret), "=&r" (tmp)
+ : "r" (v), "r" (a), "r" (u)
+ : "memory" , "r0", "r1" , "t");
+
+ return ret != u;
+}
+#endif /* __ASM_SH_ATOMIC_GRB_H */
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