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| author | Ingo Molnar <mingo@elte.hu> | 2008-07-08 07:47:47 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-07-08 07:47:47 +0200 |
| commit | 93022136fff9e6130aa128a5ed8a599e93ac813c (patch) | |
| tree | 185390fb75a3d7423cc508610b76637c957205b9 /include/asm-mips/cpu-info.h | |
| parent | c49c412a47b5102516d3313d4eba38cb1e968721 (diff) | |
| parent | b7279469d66b55119784b8b9529c99c1955fe747 (diff) | |
| download | talos-op-linux-93022136fff9e6130aa128a5ed8a599e93ac813c.tar.gz talos-op-linux-93022136fff9e6130aa128a5ed8a599e93ac813c.zip | |
Merge commit 'v2.6.26-rc9' into x86/cpu
Diffstat (limited to 'include/asm-mips/cpu-info.h')
| -rw-r--r-- | include/asm-mips/cpu-info.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/include/asm-mips/cpu-info.h b/include/asm-mips/cpu-info.h index 0c5a358863f3..2de73dbb2e9e 100644 --- a/include/asm-mips/cpu-info.h +++ b/include/asm-mips/cpu-info.h @@ -56,7 +56,7 @@ struct cpuinfo_mips { struct cache_desc tcache; /* Tertiary/split secondary cache */ int srsets; /* Shadow register sets */ int core; /* physical core number */ -#if defined(CONFIG_MIPS_MT_SMTC) +#if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC) /* * In the MIPS MT "SMTC" model, each TC is considered * to be a "CPU" for the purposes of scheduling, but @@ -64,7 +64,7 @@ struct cpuinfo_mips { * to all TCs within the same VPE. */ int vpe_id; /* Virtual Processor number */ -#endif /* CONFIG_MIPS_MT */ +#endif #ifdef CONFIG_MIPS_MT_SMTC int tc_id; /* Thread Context number */ #endif |
