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authorArjan van de Ven <arjan@linux.intel.com>2008-10-17 09:20:26 -0700
committerArjan van de Ven <arjan@linux.intel.com>2008-10-17 09:20:26 -0700
commit651dab4264e4ba0e563f5ff56f748127246e9065 (patch)
tree016630974bdcb00fe529b673f96d389e0fd6dc94 /include/asm-mips/cachectl.h
parent40b8606253552109815786e5d4b0de98782d31f5 (diff)
parent2e532d68a2b3e2aa6b19731501222069735c741c (diff)
downloadtalos-op-linux-651dab4264e4ba0e563f5ff56f748127246e9065.tar.gz
talos-op-linux-651dab4264e4ba0e563f5ff56f748127246e9065.zip
Merge commit 'linus/master' into merge-linus
Conflicts: arch/x86/kvm/i8254.c
Diffstat (limited to 'include/asm-mips/cachectl.h')
-rw-r--r--include/asm-mips/cachectl.h26
1 files changed, 0 insertions, 26 deletions
diff --git a/include/asm-mips/cachectl.h b/include/asm-mips/cachectl.h
deleted file mode 100644
index f3ce721861d3..000000000000
--- a/include/asm-mips/cachectl.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994, 1995, 1996 by Ralf Baechle
- */
-#ifndef _ASM_CACHECTL
-#define _ASM_CACHECTL
-
-/*
- * Options for cacheflush system call
- */
-#define ICACHE (1<<0) /* flush instruction cache */
-#define DCACHE (1<<1) /* writeback and flush data cache */
-#define BCACHE (ICACHE|DCACHE) /* flush both caches */
-
-/*
- * Caching modes for the cachectl(2) call
- *
- * cachectl(2) is currently not supported and returns ENOSYS.
- */
-#define CACHEABLE 0 /* make pages cacheable */
-#define UNCACHEABLE 1 /* make pages uncacheable */
-
-#endif /* _ASM_CACHECTL */
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